Datasheet
Supervisor IC
System Power Good + Watchdog Timer +
Reset for Automotive
BD39040MUF-C
General Description
Key Specifications
BD39040MUF-C is a supervisor IC with quad power
good, Watchdog timer and reset. This IC enables existing
system to improve its ASIL level easily.
The BD39040MUF-C includes built-in self-test (BIST).
VDD Input Voltage Range:
2.7 V to 5.5 V
(VDD voltage level needs to be fixed within this range
in 10% accuracy to avoid RSTIN reset detection)
Detection Voltage (VDD POR/Power Good)
Under Voltage Detection:
-10 % (3 % accuracy)
Over Voltage Detection:
+10 % (3 % accuracy)
Reset Off Time:
10 ms
Operating Temperature Range: -40 °C to +125 °C
Features
AEC-Q100 Qualified(Note 1)
Quad Power Good for External Inputs
Over Voltage Detection (OVD)
Under Voltage Detection (UVD)
Adjustable Window Watchdog Timer(WDT)
Reset for VDD Input (POR)
Built-in Self-test (BIST)
Special Characteristics
Reference Voltage Accuracy
Under Voltage Detection:
Over Voltage Detection:
±3.0 %
±3.0 %
(Note 1) Grade 1
Applications
Package
Automotive for ADAS
Camera Module
Microwave Module
Power Train ECU
Other ECU
VQFN16FV3030
W (Typ) x D (Typ) x H (Max)
3.00 mm x 3.00 mm x 1.00 mm
Close-up
VQFN16FV3030
Wettable Flank Package
Typical Application Circuit
Battery
VO1
RSTIN
VDD
XRSTOUT
VO2
DIN1
PG1
DIN2
PG2
VO3
PMIC/
Discrete DCDC
VO4
DIN3
BD39040MUF-C
PG3
Processor
VO5
DIN4
PG4
WDIN
WDEN
RTW
GND
〇Product structure : Silicon integrated circuit
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WDOUT
〇This product has no designed protection against radioactive rays
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Contents
General Description ................................................................................................................................................................ 1
Features ................................................................................................................................................................................. 1
Applications ............................................................................................................................................................................ 1
Key Specifications................................................................................................................................................................... 1
Special Characteristics ............................................................................................................................................................ 1
Package
............................................................................................................................................................................. 1
Typical Application Circuit ........................................................................................................................................................ 1
Pin Configuration .................................................................................................................................................................... 3
Pin Descriptions ...................................................................................................................................................................... 3
Block Diagram ........................................................................................................................................................................ 4
Absolute Maximum Ratings ..................................................................................................................................................... 9
Thermal Resistance ................................................................................................................................................................ 9
Recommended Operating Conditions ...................................................................................................................................... 9
Electrical Characteristics ..................................................................................................................................................... 10
Typical Performance Curves .................................................................................................................................................. 12
Timing Chart ......................................................................................................................................................................... 16
Application Example.............................................................................................................................................................. 20
Operational Notes ................................................................................................................................................................. 22
Ordering Information ............................................................................................................................................................. 24
Marking Diagram................................................................................................................................................................... 24
Physical Dimension and Packing Information ......................................................................................................................... 25
Revision History .................................................................................................................................................................... 26
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Pin Configuration
(TOP View)
DIN3
14
PG3
WDIN
DIN4
13
PG4
WDEN
12
11
10
9
8
PG2
7
DIN2
EXP-PAD
XRSTOUT
15
6
PG1
WDOUT
16
5
DIN1
RSTIN
3
GND
4
RTW
5
DIN1
6
PG1
7
DIN2
8
PG2
9
DIN3
10
PG3
11
DIN4
12
PG4
13
14
WDEN
WDIN
15
XRSTOUT
16
WDOUT
-
EXP-PAD
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4
RTW
2
3
GND
Pin Name
VDD
RSTIN
Pin No.
1
2
VDD
Pin Descriptions
1
Function
IC’s Power Source
The VDD pin voltage divided by external resistor input pin. Nominal voltage level
needs to be 0.8 V.
IC’s Power Ground
WDT frequency setting pin. FAST Timeout and SLOW Timeout is adjusted by
the resistor value for this pin.
Voltage for monitoring channel divided by external resistor input pin. Nominal
voltage level needs to be 0.8 V.
POWER GOOD output pin for the DIN1 pin, and Nch Open Drain output.
Hi-Z for assertion, and Low for de-assertion is its value. Please be pulled-up by
external resistor.
It can be pulled-up to any voltage source.
Voltage for monitoring channel divided by external resistor input pin. Nominal
voltage level needs to be 0.8 V.
POWER GOOD output pin for the DIN2 pin, and Nch Open Drain output.
Hi-Z for assertion, and Low for de-assertion is its value. Please be pulled-up by
external resistor.
It can be pulled-up to any voltage source.
Voltage for monitoring channel divided by external resistor input pin. Nominal
voltage level needs to be 0.8 V.
POWER GOOD output pin for the DIN3 pin, and Nch Open Drain output.
Hi-Z for assertion, and Low for de-assertion is its value. Please be pulled-up by
external resistor.
It can be pulled-up to any voltage source.
Voltage for monitoring channel divided by external resistor input pin. Nominal
voltage level needs to be 0.8 V.
POWER GOOD output pin for the DIN4 pin, and Nch Open Drain output.
Hi-Z for assertion, and Low for de-assertion is its value. Please be pulled-up by
external resistor.
It can be pulled-up to any voltage source.
Enable pin for WDT. High=Active, Low=Disable and WDT error is ignored.
Clock input pin for WDT
Reset output pin. Nch Open Drain output.
Hi-Z for normal, and Low for abnormal (reset) is its value. Please be pulled-up
by external resistor.
It can be pulled-up to any voltage source. Either error of OVD, UVD for RSTIN,
reference voltage monitoring, internal OSC monitoring, WDT and BIST at
power-up sequence causes this pin to drive low.
Buffer output pin for the WDEN pin input. Abnormal Power Source / the GND pin
shortage for the WDEN pin can be recognized by monitoring this pin. This pin
becomes Low when the XRSTOUT pin is low.
The EXP-PAD is connected to the PCB Ground plane.
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Block Diagram
VDD
VREF
VREF_DET
VREF_DET
VREF_SUB
VREF_DET
RSTIN_DET
BIST_ERROR
WDT_DET
CLK_DET
WDT_OSC_DET
BIST_EN
UVLO
UVLO
RSTIN
OVD
+
XRSTOUT
XRSTOUT_DET
OVD_RST
-
RSTIN_DET
BIST_EN
Filter
Counter
UVD
-
UVD_RST
+
VREF_DET
BIST_ERROR
OVD_RST
BIST_EN
UVD_RST
DIN1
VREF
BIST
OVD1,OVD2,
OVD3,OVD4
OVD2
OVD
+
BIST_EN
UVD1,UVD2,
UVD3,UVD4
OVD1
-
VREF_DET
BIST_EN
Filter
PG1
Counter
UVD
-
UVD1
+
BIST_EN
DIN2
VREF
OVD
+
OVD2
-
VREF_DET
BIST_EN
Filter
PG2
Counter
UVD
-
UVD2
DIGITAL
+
BIST_EN
DIN3
VREF
OVD
+
OVD3
-
PG3
VREF_DET
BIST_EN
Filter
Counter
UVD
-
UVD3
+
BIST_EN
DIN4
VREF
OVD
+
OVD4
-
PG4
VREF_DET
BIST_EN
UVD
Filter
Counter
UVD4
+
BIST_EN
DIGITAL_OSC
CLK_DET
CLK_DET
RTW
WDT_OSC
WDT_OSC_DET
WDT_DET
WDIN
WDT
VDD
XRSTOUT_DET
WDEN
WDOUT
Counter
UVLO
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Block Diagrams - continued
Description of Blocks
Reference Voltage (VREF)
VREF is used for the reference voltage of monitoring each input voltage.
Reference Voltage (VREF_SUB)
VREF_SUB is used for the reference voltage of mutual monitoring VREF.
Reference Voltage (VREF_DET)
This is monitoring the 2 reference voltage, VREF and VREF_SUB.
This block contributes to the higher reliability by continuous, mutual monitoring each other if it turns on correctly.
Occurrence of error leads to Low output at the XRSTOUT pin and which is never de-asserted as long as abnormal status
lasts. It becomes High at 10 ms (Typ) after the voltage returned to the normal range.
Under Voltage Lockout Circuit (UVLO)
Protection circuit to prevent internal circuit from malfunction at lower voltage (Power-up sequence or input power supply
drop). This is monitoring the VDD pin voltage and UVLO works when it goes down to threshold level.
As UVLO is detected, the XRSTOUT, WDOUT, PG1, PG2, PG3 and PG4 pins output Low. Also Counter value in DIGITAL
BLOCK is initialized and DIGITAL_OSC/WDT_OSC stop working.
Oscillator (DIGITAL_OSC)
This OSC generates the clock to control DIGITAL BLOCK. The frequency of DIGITAL_OSC is fixed at 2.2 MHz
Oscillator (WDT_OSC)
This OSC generates the clock to control WDT.
The frequency of WDT_OSC is possible to be adjusted by the resistor value, so that FAST Timeout / SLOW Timeout is
changed by that.
WDT_OSC has the function to stop its working when the external resistor at the RTW pin is shorted or OPEN
(WDT_OSC_DET). Once CLK_DET is detected, XRSTOUT becomes Low.
Oscillator (CLK_DET)
This block monitors both DIGITAL_OSC and WDT_OSC.
2 OSCs always monitor their frequency each other and it leads to the higher reliability.
When an error happened at the monitoring, XRSTOUT becomes Low.
Over Voltage Detection (OVD1, OVD2, OVD3, OVD4, OVD_RST)
When input voltage goes over the threshold level, OVD is detected and the PG1, PG2, PG3 and PG4 pins are driven by Low.
Detecting pins are DIN1, DIN2, DIN3 and DIN4 and RSTIN. OVD detection for the DIN1, DIN2, DIN3 and DIN4 pins causes
corresponding the PG1, PG2, PG3 and PG4 pins to become Low. OVD detection for RSTIN causes the XRSTOUT pin to
become Low. These output signals become High at 10 ms (Typ) after each input pin returns within the nominal voltage range.
And each input has a filter in DIGITAL BLOCK, then overshoot within 50 µs (Min) is ignored.
Under Voltage Detection (UVD1, UVD2, UVD3, UVD4, UVD_RST)
When input voltage goes below the threshold level, UVD is detected and the PG1, PG2, PG3 and PG4 pins are driven by Low.
Detecting pins are DIN1, DIN2, DIN3, DIN4 and RSTIN. UVD detection for the DIN1, DIN2, DIN3 and DIN4 pins causes
corresponding the PG1, PG2, PG3 and PG4 pins to become Low. UVD detection for RSTIN causes the XRSTOUT pin to
become Low. These output signals become High at 10 ms (Typ) after each input pin returns within the nominal voltage range.
And each input has a filter in DIGITAL BLOCK, then undershoot within 50 µs (Min) is ignored.
BIST
When VDD Power on Reset (monitoring the RSTIN pin) is released, BIST is performed and self-test for DIN1, DIN2, DIN3,
DIN4, RSTIN and VREF_DET comparators are executed to see if each comparator correctly toggles their High/Low output
based on input level change.
BIST time (tBIST) is 2 ms (Max). Once BIST ends without any errors, XRSTOUT becomes High. If an error is found during BIST,
XRSTOUT keeps Low and BIST is repeated until it passes.
Watchdog Timer (WDT)
Watchdog Timer (WDT) monitors microprocessor’s operation by detecting the time from both rise and fall edge of WDIN. If
BIST result is abnormality, WDT does not work and XRSTOUT is kept low. WDT is activated when WDOUT=High, and both
WDEN and XRSTOUT have to be High in order to get WDOUT to be High.
As long as the duty of WDIN clock is kept within “Trigger open window” in Figure 1, WDT does not detect any errors and
XRSTOUT stays at High.
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Description of Blocks - continued
WDT St art f rom rising of WDOUT
Detec ti on guaranteed
Detec ti on guaranteed
WDT
Fast Tim eout
WDIN
WDT
S LOW Ti meout
WDT
Trigger open window
tWF (Mi n)
t[ms]
tWF (Max )
tO K(Typ)
tWS (Mi n)
tWS (Max )
Figure 1. WDT Window Description
Sequence for FAST Timeout and SLOW Timeout are shown in Figure 2 and Figure 3.
WDT FAST Timeout Detection
1. WDIN input signal is ignored when WDOUT=Low. WDT is activated when WDOUT=High, and both WDEN and
XRSTOUT have to be High in order to get WDOUT to be High.
2. For the initial duration just after WDOUT goes to High, only SLOW Timeout detection works and FAST Timeout does not
work. Either Low or High input to the WDIN pin is acceptable as initial level. Once rising-up or falling-down edge of
WDIN comes within SLOW Timeout, both FAST Timeout and SLOW Timeout detections start to work.
3. These time detection monitors the time until next edge and when it detects WDIN edge within FAST Timeout (tWF),
XRSTOUT and WDOUT becomes Low. XRSTOUT goes back to High after 10 ms (Typ) delay, while WDOUT goes back
to High after tWDIM (500 ms: Typ) in addition to tRSTL (10 ms: Typ) as long as WDEN=High.
tWDIM is implemented as a time for microprocessor to be reset normally and stabilized.
If this time is unnecessary and WDT should be activated as soon as possible, WDEN may be controlled like state 5 in
the Figure 2.
WDEN toggle during XRSTOUT=Low is ignored.
4. When WDOUT becomes High, WDT is activated again and operation resumes.
Only SLOW Timeout detection works until the next first edge, and both SLOW Timeout and FAST Timeout starts at the
first edge like state 1 in Figure 2.
5. If this time is unnecessary and WDT should be activated as soon as possible, WDEN may be controlled like in Figure 2.
tWDIM is canceled by toggling WDEN like High->Low->High and WDT is activated immediately even during tWDIM.
After WDT is enabled it works as same as state 2 in Figure 2.
6. When WDEN is Low, WDOUT becomes Low and WDT is disabled. During this period WDIN input signal is ignored and
XRSTOUT output is not affected by that.
FAST Timeout
Ignored
OK
OK
OK
OK
FAST Timeout
Ignored
OK
Ignored OK
OK
Ignored
OK
Ignored
WDIN
WDEN
Enable:ON
Enable:OFF
O.K.
tWS
FAST
Timeout
SLOW
Timeout
O.K.
O.K.
FAST
Timeout
SLOW
Timeout
tWF
tWS
Only SLOW Timeout is monitored for
the first edge right after WDOUT=High
FAST
Timeout
O.K.
Enable:OFF
XRSTOUT
O.K.
O.K.
O.K.
SLOW
Timeout
SLOW
Timeout
O.K.
SLOW
Timeout
FAST
Timeout
O.K.
SLOW
Timeout
SLOW
Timeout
tRSTL
10ms
tWDIM
500ms
tRSTL
10ms
2
O.K.
FAST
Timeout
SLOW
Timeout
tRSTL
10ms
WDOUT
O.K.
SLOW
Timeout
SLOW
Timeout
FAST
Timeout
1
SLOW
Timeout
FAST
Timeout
FAST
Timeout
state
Enable:ON
Ignored
3
tRSTL
10ms
4
tWDIM
500ms
5
6
Figure 2. WDT FAST Timeout Detection
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Block Diagrams - continued
WDT SLOW Timeout Detection
1. WDIN input signal is ignored when WDOUT=Low. WDT is activated when WDOUT=High, and both WDEN and
XRSTOUT have to be High in order to get WDOUT to be High.
2. For the initial duration just after WDOUT goes to High, only SLOW Timeout detection works and FAST Timeout does not
work. Either Low or High input to the WDIN pin is acceptable as initial level. Once rising-up or falling-down edge of
WDIN comes within SLOW Timeout, both FAST Timeout and SLOW Timeout detections start to work.
3. These time detection monitors the time until next edge and when it can not detect WDIN edge within SLOW Timeout
(tWS), XRSTOUT and WDOUT becomes Low. XRSTOUT goes back to High after 10 ms (Typ) delay, while WDOUT goes
back to High after tWDIM (500 ms: Typ) in addition to tRSTL (10 ms: Typ) as long as WDEN=High.
tWDIM is implemented as a time for microprocessor to be reset normally and stabilized.
If this time is unnecessary and WDT should be activated as soon as possible, WDEN may be controlled like state 5 in
the Figure 3.
WDEN toggle during XRSTOUT=Low is ignored.
4. When WDOUT becomes High, WDT is activated again and operation resumes.
Only SLOW Timeout detection works until the next first edge, and both SLOW Timeout and FAST Timeout starts at the
first edge like state 1 in Figure 3.
5. If this time is unnecessary and WDT should be activated as soon as possible, WDEN may be controlled like the Figure 3.
tWDIM is canceled by toggling WDEN like High->Low->High and WDT is activated immediately even during tWDIM.
After WDT is enabled it works as same as state 2 in Figure3.
6. When WDEN is Low, WDOUT becomes Low and WDT is disabled. During this period WDIN input signal is ignored and
XRSTOUT output is not affected by that.
Ignored
OK
OK
SLOW Timeout
OK
Ignored
SLOW Timeout
OK
Ignored OK
Ignored
OK
Ignored
WDIN
WDEN
Enable:ON
Enable:OFF
Ignored
O.K.
tWS
FAST
Timeout
SLOW
Timeout
O.K.
FAST
Timeout
SLOW
Timeout
O.K.
Enable:ON
SLOW
Timeout
O.K.
O.K.
SLOW
Timeout
FAST
Timeout
tWF
tWS
Only SLOW Timeout is monitored for
the first edge right after WDOUT=High
O.K.
O.K.
SLOW
Timeout
O.K.
SLOW
Timeout
SLOW
Timeout
tRSTL
10ms
WDOUT
tRSTL
10ms
2
O.K.
SLOW
Timeout
XRSTOUT
1
SLOW
Timeout
FAST
Timeout
FAST
Timeout
FAST
Timeout
state
Enable:OFF
tRSTL
10ms
tRSTL
10ms
tWDIM
500ms
3
4
tWDIM
500ms
5
6
Figure 3. WDT SLOW Timeout Detection
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WDT SLOW Timeout Detection - continued
SLOW Timeout
Ignored
SLOW Timeout
SLOW Timeout
SLOW Timeout
WDIN
Enable:ON
WDEN
O.K.
SLOW
Timeout
O.K.
ｔWS
WDT
Disabled
XRSTOUT
SLOW
Timeout
O.K.
ｔWS
SLOW
Timeout
O.K.
ｔWS
SLOW
Timeout
ｔWS
WDT Enabled
tRSTL
10ｍｓ
tRSTL
10ｍｓ
tRSTL
10ｍｓ
tWDIM
500ms
tRSTL
10ｍｓ
tRSTL
10ｍｓ
tRSTL
10ｍｓ
tRSTL
10ｍｓ
tWDIM
500ms
tWDIM
500ms
tRSTL
10ｍｓ
tWDIM
500ms
WDOUT
Figure 4. XRSTOUT Behavior with Continuous WDT Timeout Detected
The window time for detection can be changed by the resistor value between the RTW and GND pins. Following figure
shows the detection time determined by RRTW resistor value. Please refer to a table of electric characteristic regarding
accuracy. Customer can choose the value ranging from 10 kΩ to 47 kΩ according to their clock frequency. The ratio for
detection time is fixed and can be shown like this, FAST Timeout : SLOW Timeout = 1 : 2.
WDT Detection Time vs RRTW
130
120
SLOW Timeout Detect Area guaranteed
110
100
Detection Time [ms]
90
80
SLOW Timeout Detect
70
FAST/SLOW Normal time
60
50
40
FAST Timeout Detect
30
20
FAST Timeout Detect Area guaranteed
10
0
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
RRTW[kΩ]
Figure 5. Detection Time vs RRTW
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Absolute Maximum Ratings
Parameter
VDD Voltage
RSTIN Voltage
DIN1,DIN2,DIN3,DIN4 Voltage
XRSTOUT Voltage
PG1,PG2,PG3,PG4 Voltage
WDIN Voltage
Symbol
Rating
Unit
VDD
-0.3 to +7
V
VRSTIN
VDIN1, VDIN2,
VDIN3, VDIN4
VXRSTOUT
VPG1, VPG2,
VPG3, VPG4
-0.3 to +7
V
-0.3 to +7
V
-0.3 to +7
V
-0.3 to +7
V
VWDIN
-0.3 to +7
V
WDEN Voltage
VWDEN
-0.3 to +7
V
WDOUT Voltage
VWDOUT
-0.3 to VDD+0.3
V
RTW Voltage
VRTW
-0.3 to VDD+0.3
V
Maximum Junction Temperature
Tjmax
150
°C
Tstg
-55 to +150
°C
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance(Note 1)
Parameter
Thermal Resistance (Typ)
Symbol
Unit
1s(Note 3)
2s2p(Note 4)
θJA
189.0
57.5
°C/W
ΨJT
23
10
°C/W
VQFN16FV3030
Junction to Ambient
Junction to Top Characterization Parameter
(Note 2)
(Note 1) Based on JESD51-2A(Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
Thermal Via(Note 5)
Pitch
Diameter
1.20 mm
Φ0.30 mm
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 5) This thermal via connects with the copper pattern of all layers.
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Operating Temperature
VDD Voltage
Topr
VDD
-40
2.7
-
+125
5.5
°C
V
WDIN Input Pulse Width
tWDIN
10
-
125
ms
WDIN Minimum ON Pulse / OFF Pulse
tWDP
-
-
100
μs
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Electrical Characteristics (Unless otherwise specified VDD=2.7 V to 5.5 V, -40 °C ≤ Ta ≤ +125 °C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
IVDD
440
785
1320
µA
VDD=4.1 V, RRTW =27 kΩ,
XRSTOUT,PG1,PG2,PG3,PG4=H
VVDDUV1
2.25
2.50
2.65
V
VDD monitor
VVDDUV2
2.30
2.55
2.70
V
VDD monitor
VVDDHYS
-
50
-
mV
VUVD1
0.698
0.720
0.742
V
DIN1 Pin Voltage=Sweep down
VOVD1
0.854
0.880
0.906
V
DIN1 Pin Voltage=Sweep up
tDIN1
All
Circuit Current
VDD Power On Reset Threshold
Voltage (Falling)
VDD Power On Reset Threshold
Voltage (Rising)
VDD Power On Reset Hysteresis
Power Good
DIN1 Power Good Low Detect
Voltage
DIN1 Power Good High Detect
Voltage
DIN1 Input Filter Time
75
-
µs
VPG1L
50
-
100
PG1 Low Voltage
0.3
V
IPG1=1 mA
PG1 Leak Current
ILPG1
-
-
2
µA
VPG1=5.5 V
PG1 Assertion Delay Time
DIN2 Power Good Low Detect
Voltage
DIN2 Power Good High Detect
Voltage
DIN2 Input Filter Time
tPG1
7
10
13
ms
VUVD2
0.698
0.720
0.742
V
DIN2 Pin Voltage=Sweep down
VOVD2
0.854
0.880
0.906
V
DIN2 Pin Voltage=Sweep up
tDIN2
75
-
µs
VPG2L
50
-
100
PG2 Low Voltage
0.3
V
IPG2=1 mA
PG2 Leak Current
ILPG2
-
-
2
µA
VPG2=5.5 V
PG2 Assertion Delay Time
DIN3 Power Good Low Detect
Voltage
DIN3 Power Good High Detect
Voltage
DIN3 Input Filter Time
tPG2
7
10
13
ms
VUVD3
0.698
0.720
0.742
V
DIN3 Pin Voltage=Sweep down
VOVD3
0.854
0.880
0.906
V
DIN3 Pin Voltage=Sweep up
tDIN3
50
-
75
-
100
µs
0.3
V
IPG3=1 m A
VPG3=5.5 V
PG3 Low Voltage
VPG3L
PG3 Leak Current
ILPG3
-
-
2
µA
PG3 Assertion Delay Time
DIN4 Power Good Low Detect
Voltage
DIN4 Power Good High Detect
Voltage
DIN4 Input Filter Time
tPG3
7
10
13
ms
VUVD4
0.698
0.720
0.742
V
DIN4 Pin Voltage=Sweep down
VOVD4
0.854
0.880
0.906
V
DIN4 Pin Voltage=Sweep up
tDIN4
50
-
75
-
100
µs
0.3
V
IPG4=1 mA
VPG4=5.5 V
PG4 Low Voltage
VPG4L
PG4 Leak Current
ILPG4
-
-
2
µA
PG4 Assertion Delay Time
tPG4
7
10
13
ms
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TSZ22111 • 15 • 001
10/26
TSZ02201-0A3A0AM00460-1-2
15.Feb.2019 Rev.001
BD39040MUF-C
Electrical Characteristics (Unless otherwise specified VDD=2.7 V to 5.5 V, -40 °C ≤ Ta ≤ +125 °C) - continued
Parameter
Symbol
Min
Typ
Max
Unit
VUVDRST
0.698
0.720
0.742
V
RSTIN Pin Voltage=Sweep
down
VOVDRST
0.854
0.880
0.906
V
RSTIN Pin Voltage=Sweep up
tRSTIN
75
-
µs
XRSTOUT Low Voltage
50
-
100
VXRSTL
0.3
V
IVDDRST=1 mA
XRSTOUT Leak Current
IXRST
-
-
10
µA
VVDDRST=5.5 V
XRSTOUT Assertion Delay Time
tXRSTL
7
10
13
ms
FAST Timeout Detect1
tWF1
9.0
11.2
13.5
ms
RRTW =10 kΩ
SLOW Timeout Detect1
tWS1
17.9
22.4
26.9
ms
RRTW =10 kΩ
FAST/SLOW Normal Time1
tOK1
13.6
15.7
17.8
ms
RRTW =10 kΩ
FAST Timeout Detect2
tWF2
24.4
30.5
36.6
ms
RRTW =27 kΩ
SLOW Timeout Detect2
tWS2
48.8
61.0
73.2
ms
RRTW =27 kΩ
FAST/SLOW Normal Time2
tOK2
36.7
42.7
48.7
ms
RRTW =27 kΩ
FAST Timeout Detect3
tWF3
42.5
53.2
63.8
ms
RRTW =47 kΩ
SLOW Timeout Detect3
tWS3
85.0
106.3
127.6
ms
RRTW =47 kΩ
FAST/SLOW Normal Time3
tOK3
63.9
74.4
84.9
ms
RRTW =47 kΩ
WDIN Detect Minimum Pulse Width
tWDIN
20
-
-
µs
WDIN Initial Mask Time
tWDIM
325
500
675
ms
WDIN Pull-down Resistor Value
RWDIN
50
100
kΩ
WDIN Low Level Input Voltage
VWDINL
-
-
150
0.2
x VDD
WDIN High Level Input Voltage
VWDINH
WDEN Pull-down Resistor Value
VDD Power On Reset
RSTIN Power Good Low Detect
Voltage
RSTIN Power Good High Detect
Voltage
RSTIN Input Filter Time
Conditions
Watch Dog Timer
VDD Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 28. Example of Monolithic IC Structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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TSZ22111 • 15 • 001
23/26
TSZ02201-0A3A0AM00460-1-2
15.Feb.2019 Rev.001
BD39040MUF-C
Ordering Information
B
D
3
9
0
4
Part Number
0
M
U
F
-
Package
MUF: VQFN16FV3030
CE2
Packaging and forming specification
C: for Automotive
E2: Embossed tape and reel
Marking Diagram
VQFN16FV3030 (TOP VIEW)
Part Number Marking
D39
LOT Number
0 4 0
Pin 1 Mark
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© 2017 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
24/26
TSZ02201-0A3A0AM00460-1-2
15.Feb.2019 Rev.001
BD39040MUF-C
Physical Dimension and Packing Information
Package Name
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© 2017 ROHM Co., Ltd. All rights reserved.
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VQFN16FV3030
25/26
TSZ02201-0A3A0AM00460-1-2
15.Feb.2019 Rev.001
BD39040MUF-C
Revision History
Date
Revision
15.Feb.2019
Rev.001
Changes
New Release
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
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