TECHNICAL NOTE
Power Management Switch IC Series for PCs and Digital Consumer Product
Power Switch ICs
TM
ExpressCard
BD4153FV, BD4153EFV, BD4154FV, BD4155FV, BD4156MUV
●Description
BD4153FV, BD4153EFV, BD4154FV, BD4155FV, BD4156MUV is a power management switch IC for the next generation
TM
TM
TM
PC card (ExpressCard ) that PCMCIA recommends. Conforms to PCMCIA’s ExpressCard Standard, ExpressCard
TM
Compliance Checklist, and ExpressCard Implementation Guideline, and obtains the world first Compliance ID「EC100001」
(BD4153FV, BD4153EFV), 「EC100040」(BD4154FV),「EC100052」(BD4155FV) from PCMCIA. Offers various functions
such as adjustable soft-starter, overcurrent detector (OC function), card detector, and system condition detector, which are
ideally suited for laptop and desktop computers.
●Features
1)
2)
3)
4)
5)
6)
7)
8)
9)
10)
11)
12)
13)
TM
Incorporates three low on-resistance FETs for ExpressCard .
Incorporates an FET for output discharge.
Incorporates an enabler.
Incorporates an under voltage lockout (UVLO)
Incorporates a thermal shutdown protector (TSD).
Incorporates a soft-starter.
Incorporates an over current protector (OCP).
Incorporates an over current flag output (OC).
Built-in enable signal for PLL.
TM
Built-in Pull up resistance for detecting ExpressCard .
TM
Conforms to ExpressCard Standard.
TM
Conforms to ExpressCard Compliance Checklist.
Conforms to ExpressCardTM Implementation Guideline.
●Use
Laptop and desktop computers, and other digital devices equipped with ExpressCard.
●Lineup
Parameter
Package
Soft Start
PERST Delay
OC detector
BD4153FV
SSOP-B24
adjustable
adjustable
BD4153EFV
HTSSOP-B24
adjustable
adjustable
BD4154FV
SSOP-B20
Fix
Fix
―
BD4155FV
SSOP-B20
Fix
Fix
―
BD4156MUV
VQFN020V4040
Fix
Fix
TM
“ExpressCard ” is a trademark registered by PCMCIA(Personal Computer Memory Card International Association).
Nov. 2006
●ABSOLUTE MAXIMUM RATINGS (Ta=25℃)
◎BD4153FV, BD4153EFV
Parameter
Symbol
BD4153FV
VCC
5.0 *
EN,CPPE#,CPUSB#,
SYSR,PERST_IN#
5.0 *
Logic Output Voltage 1
OC
5.0 *
Logic Output Voltage 2
PERST#
VCC *
Power Supply Voltage
Logic Input Voltage
BD4153EFV
Unit
1
5.0 *1
V
1
5.0 *1
V
1
5.0 *1
V
1
VCC *1
V
1
1
5.0 *
V
1
VCC *1
V
1
Input Voltage 1
V3_IN, V15_IN
5.0 *
Input Voltage 2
V3AUX_IN
VCC *
Output Voltage
V3,V3AUX,V15
5.0 *
5.0 *1
V
Output current 1
IOV3, IOV15
2.0
2.0
A
Output current 2
IOV3AUX
1.0
1.0
A
Power Dissipation 1
Pd1
787 *
-
mW
Power Dissipation 2
Pd2
1025 *
1100 *4
mW
Operating Temperature Range
Topr
-40～+100
-40～+100
℃
Storage Temperature Range
Tstg
-55～+150
-55～+150
℃
Tjmax
+150
+150
℃
Maximum Junction Temperature
2
3
*1 However, not exceeding Pd.
*2 Pd derating at 6.3mW/℃ for temperature above Ta=25℃
*3 In the case of Ta≥25°C (when mounting to 70mmx70mmx1.6mm glass epoxy substrate), derated at 8.2 mW/°C.
*4 In the case of Ta≥25°C (when mounting to 70mmx70mmx1.6mm glass epoxy substrate), derated at 8.8 mW/°C.
●OPERATING CONDITIONS (Ta=25℃)
◎BD4153FV, BD4153EFV
Parameter
Symbol
MIN
MAX
Unit
Power Supply Voltage
VCC
3.0
3.6
V
Logic Input Voltage 1
EN
-0.2
3.6
V
-0.2
VCC
V
Logic Input Voltage 2
CPPE#,CPUSB#,
SYSR,PERST_IN#
Logic Output Voltage 1
OC
-
3.6
V
Logic Output Voltage 2
PERST#
-
VCC
V
Input Voltage 1
V3_IN
3.0
3.6
V
Input Voltage 2
V3AUX_IN
3.0
VCC
V
Input Voltage 3
V15_IN
1.35
1.65
V
Soft Start Setup Capacitor 1
CSS_V3, CSS_V15
0.001
1.0
μF
Soft Start Setup Capacitor 2
CSS_V3AUX
0.001
0.1
μF
★ This product is designed for protection against radioactive rays.
2/28
●ABSOLUTE MAXIMUM RATINGS (Ta=25℃)
◎BD4154FV
Parameter
Symbol
Limit
Unit
5
Input Voltage
V3AUX_IN, V3_IN, V15_IN
-0.3～5.0 *
V
Logic Input Voltage 1
EN,CPPE#,CPUSB#,SYSR,
PERST_IN#,RCLKEN
-0.3～V3AUX_IN+0.3 *5
V
Logic Output Voltage 1
RCLKEN
-0.3～V3AUX_IN+0.3 *5
V
Logic Output Voltage 2
PERST#
-0.3～V3AUX_IN+0.3
V
Output Voltage
5
V3AUX,V3, V15
-0.3～5.0 *
V
Output Current 1
IOV3AUX
1.0
A
Output Current 2
IOV3
2.0
A
Output Current 3
IOV15
2.0
A
Pd1
500.0 *6
mW
Power Dissipation 2
Pd2
812.5 *
7
mW
Operating Temperature Range
Topr
-40～+100
℃
Storage Temperature Range
Tstg
-55～+150
℃
Tjmax
+150
℃
Power Dissipation 1
Maximum Junction Temperature
*5 Not to exceed Pd.
*6 Reduced by 4.0mW for each increase in Ta of 1℃ over 25℃
*7 Reduced by 6.5mW for each increase in Ta of 1℃ over 25℃（When mounted on a board 70mm×70mm×1.6mm Glass-epoxy PCB）
●OPERATING CONDITIONS (Ta=25℃)
◎BD4154FV
Parameter
Symbol
MIN
MAX
Unit
Input Voltage 1
V3AUX_IN
3.0
3.6
V
Input Voltage 2
V3_IN
3.0
3.6
V
Input Voltage 3
V15_IN
1.35
1.65
V
Logic Input Voltage 1
EN
-0.3
3.6
V
Logic Input Voltage 2
CPPE#,CPUSB#,SYSR,
PERST_IN#,RCLKEN
0
V3AUX_IN
V
Logic Output Voltage 1
RCLKEN
0
V3AUX_IN
V
Logic Output Voltage 2
PERST#
0
V3AUX_IN
V
Output Current 1
IOV3AUX
0
275
mA
Output Current 2
IOV3
0
1.3
A
Output Current 3
IOV15
0
650
mA
★ This product is not designed to offer protection against radioactive rays.
3/28
●ABSOLUTE MAXIMUM RATINGS (Ta=25℃)
◎BD4155FV
Parameter
Symbol
Limit
Unit
8
V3AUX_IN, V3_IN, V15_IN
-0.3～+5.0 *
V
CPPE#,CPUSB#,SYSR,EC_CLKREQ#,
EC_CLKEN#,EC_RST#,PLT_RST#
-0.3～V3AUX_IN+0.3 *8
V
PERST#
-0.3～V3AUX_IN+0.3
V
Logic Output applied Voltage
PLL_CLKREQ#
-0.3～+5.0
V
Output Voltage
V3AUX,V3, V15
-0.3～+5.0 *
V
Output current 1
IOV3AUX
1.0
A
Output current 2
IOV3
2.0
A
Output current 3
IOV15
2.0
A
Power Dissipation 1
Pd1
500 *9
mW
Power Dissipation 2
Pd2
812.5 *10
mW
Operating Temperature Range
Topr
-40～+100
℃
Storage Temperature Range
Tstg
-55～+150
℃
Tjmax
+150
℃
Input Voltage
Logic Input Voltage
Logic Output Voltage
Maximum Junction Temperature
8
*8 Not to exceed Pd.
*9 Reduced by 4.0mW for each increase in Ta of 1℃ over 25℃
*10 Reduced by 6.5mW for each increase in Ta of 1℃ over 25℃（When mounted on a board 70mm×70mm×1.6mm Glass-epoxy PCB）.
●OPERATING CONDITIONS (Ta=25℃)
◎BD4155FV
Parameter
Symbol
MIN
MAX
Unit
Input Voltage 1
V3AUX_IN
3.0
3.6
V
Input Voltage 2
V3_IN
3.0
3.6
V
Input Voltage 3
V15_IN
1.35
1.65
V
CPPE#,CPUSB#,SYSR,EC_CLKREQ#,
EC_CLKEN#,EC_RST#,PLT_RST#
0
V3AUX_IN
V
Logic Output Voltage 1
PERST#
0
V3AUX_IN
V
Logic Output Voltage 2
PLL_CLKREQ#
0
3.6
V
Output current 1
IOV3AUX
0
275
mA
Output current 2
IOV3
0
1.3
A
Output current 3
IOV15
0
650
mA
Logic Input Voltage
★ This product is not designed to offer protection against radioactive rays.
4/28
●ABSOLUTE MAXIMUM RATINGS (Ta=25℃)
◎BD4156MUV
Parameter
Symbol
Limit
Unit
11
Input Voltage
V3AUX_IN, V3_IN, V15_IN
Logic Input Voltage 1
EN,CPPE#,CPUSB#,SYSR,
PERST_IN#,RCLKEN
-0.3～V3AUX_IN+0.3 *11
V
Logic Output Voltage 1
RCLKEN
-0.3～V3AUX_IN+0.3 *11
V
Logic Output Voltage 2
PERST#
-0.3～V3AUX_IN+0.3
V
Logic Output Voltage 3
OC#
-0.3～5.0
V
Output Voltage
-0.3～5.0 *
V
11
V3AUX,V3, V15
-0.3～5.0 *
V
Output Current 1
IOV3AUX
1.0
A
Output Current 2
IOV3
2.0
A
Output Current 3
IOV15
2.0
A
12
Power Dissipation 1
Pd1
0.34 *
W
Power Dissipation 2
Pd2
0.70 *13
W
Operating Temperature Range
Topr
-40～+100
℃
Storage Temperature Range
Tstg
-55～+150
℃
Tjmax
+150
℃
Maximum Junction Temperature
*11 Not to exceed Pd.
*12 Reduced by 2.7mW for each increase in Ta of 1℃ over 25℃
*13 Reduced by 5.6mW for each increase in Ta of 1℃ over 25℃（When mounted on a board 70mm×70mm×1.6mm Glass-epoxy PCB）.
●OPERATING CONDITIONS (Ta=25℃)
◎BD4156MUV
Parameter
Symbol
MIN
MAX
Unit
Input Voltage 1
V3AUX_IN
3.0
3.6
V
Input Voltage 2
V3_IN
3.0
3.6
V
Input Voltage 3
V15_IN
1.35
1.65
V
Logic Input Voltage 1
EN
-0.3
3.6
V
Logic Input Voltage 2
CPPE#,CPUSB#,SYSR,
PERST_IN#,RCLKEN
0
V3AUX_IN
V
Logic Output Voltage 1
RCLKEN
0
V3AUX_IN
V
Logic Output Voltage 2
PERST#
0
V3AUX_IN
V
Logic Output Voltage 3
OC#
0
3.6
V
Output Current 1
IOV3AUX
0
275
mA
Output Current 2
IOV3
0
1.3
A
Output Current 3
IOV15
0
650
mA
★ This product is not designed to offer protection against radioactive rays.
5/28
●ELECTRICAL CHARACTERISTICS
(BD4153FV, BD4153EFV)
（unless otherwise noted, Ta=25℃ VCC=3.3V VEN=3.3V V3_IN=V3AUX_IN=3.3V,V15_IN=1.5V）
Parameter
Symbol
Standard Value
MIN
TYP
MAX
Unit
Condition
Standby current
IST
-
35
70
μA
VEN=0V
Bias current 1
Icc1
-
0.25
0.50
mA
VSYSR=0V
Bias current 2
Icc2
-
1.0
2.0
mA
VSYSR=3.3V
High Level Enable Input Voltage
VENHI
2.3
-
5.5
V
Low Level Enable Input Voltage
VENLOW
-0.2
-
0.8
V
IEN
-
3
10
μA
[Enable]
Enable Pin Input current
VEN=3V
[Logic (CPPE#,CPUSB#)]
High Level Logic Input Voltage
VLHI
2.3
-
VCC
V
Low Level Logic Input Voltage
VLLOW
-0.2
-
0.8
V
IL
-1
0
1
μA
Logic Pin Input current
VCPPE#=3.3V or VCPUSB#=3.3V
[Logic (SYSR)]
High Level Logic Input Voltage
VSYSRHI
2.3
-
VCC
V
Low Level Logic Input Voltage
VSYSRLOW
-0.2
-
0.8
V
ISYSR
6
11
18
μA
Logic Pin Input current
VSYSR=3.3V
[Logic (PERST_IN#)]
High Level Logic Input Voltage
VPSTHI
2.3
-
VCC
V
Low Level Logic Input Voltage
VPSTLOW
-0.2
-
0.8
V
IPST
-18
-11
-6
μA
VPERST_IN＃=0V
RV3
-
35
73
mΩ
Tj=-10～100℃ *
RV3Dis
-
60
150
Ω
RV3AUX
-
100
210
mΩ
RV3AUXDis
-
60
150
Ω
RV15
-
42
85
mΩ
RV15Dis
-
60
150
Ω
Logic Pin Input current
[Switch V3]
On Resistance
Discharge On Resistance
[Switch V3AUX]
On Resistance
Discharge On Resistance
Tj=-10～100℃ *
[Switch V15]
On Resistance
Discharge On Resistance
Tj=-10～100℃ *
[Soft Start]
Charge current
Ichr
1.0
2.0
3.0
μA
SS_V3high
V3+4
V3+5
V3+6
V
SS_V15 High Voltage
SS_V15high
V15+4
V15+5
V15+6
V
SS_V3AUX High Voltage
SS_AUXhigh
1.5
1.8
2.1
V
IDis
0.3
1.0
-
mA
SSLOW
-
-
50
mV
A
SS_V3 High Voltage
Discharge current
Low Voltage
Vss=1V
[Over Current Protection]
OC Flag V3
OCPV3_S
1.0
-
-
V3 Over current
OCPV3
2.0
-
-
A
OC Flag V3AUX
OCPV3AUX_S
0.25
-
-
A
V3AUX Over current
OCPV3AUX
0.50
-
-
A
OC Flag V15
OCPV15_S
0.50
-
-
Ａ
V15 Over current
OCPV15
1.20
-
-
A
OC_Delay Charge current
IOCP_Delaych
1.0
2.0
3.0
μA
OC_Delay Discharge current
IOCP_Delaydis
1.0
2.0
-
mA
OC_Delay Standby Voltage
VOCP_Delayst
-
-
50
mV
OC_Delay Threshold Voltage
VOC_DELAY=1V
VOCP_Delayth
0.6
0.7
0.8
V
OC Low Voltage
VOCP
-
0.1
0.2
V
IOC=0.5mA
OC Leak current
IOCP
-
-
1
μA
VOC=3.65V
V3_IN UVLO OFF Voltage
VUVLOV3_IN
2.80
2.90
3.00
V
V3_IN Hysteresis Voltage
⊿VUVLOV3_IN
80
160
240
mV
V3AUX_IN UVLO OFF Voltage
VUVLOV3AUX_IN
2.80
2.90
3.00
V
V3AUX_IN Hysteresis Voltage
[Under Voltage Lockout]
⊿VUVLOV3AUX_IN
80
160
240
mV
V15 UVLO OFF Voltage
VUVLOV15
1.25
1.30
1.35
V
V15 Hysteresis Voltage
⊿VUVLO15
50
100
150
mV
VCC UVLO OFF Voltage
VUVLOVCC
2.80
2.90
3.00
V
VCC Hysteresis Voltage
⊿VUVLOVCC
80
160
240
mV
* Design Guarantee
6/28
sweep up
sweep down
sweep up
sweep down
sweep up
sweep down
sweep up
sweep down
●ELECTRICAL CHARACTERISTICS
(BD4154FV)
（unless otherwise noted, Ta=25℃ VEN=3.3V V3AUX_IN =V3_IN=3.3V,V15_IN=1.5V）
Standard Value
Parameter
Symbol
Unit
Condition
MIN
TYP
MAX
uA
Standby Current
IST
40
80
VEN=0V (Include IEN, IRCLKEN)
uA
Bias Current 1
Icc1
120
250
VSYSR=0V
uA
Bias Current 2
Icc2
250
500
VSYSR=3.3V
[Enable]
High Level Enable Input Voltage
Low Level Enable Input Voltage
Enable Pin Input Current
[Logic]
High Level Logic Input Voltage
Low Level Logic Input Voltage
VENHI
VENLOW
IEN
2.0
-0.2
10
-
5.5
0.8
30
V
V
uA
VLHI
VLLOW
0
0
0
0
0
0.1
-
0.8
1
30
1
30
1
30
1
30
1
30
0.3
1
V
V
uA
uA
uA
uA
uA
uA
uA
uA
uA
VRCLKEN
IRCLKEN
2.0
10
10
10
10
10
-
RV3AUX
RV3AUX Dis
-
120
60
220
150
mΩ
Ω
Tj=-10～100℃ *
RV3
RV3Dis
-
42
60
90
150
mΩ
Ω
Tj=-10～100℃ *
RV15
RV15Dis
-
45
60
90
150
mΩ
Ω
Tj=-10～100℃ *
OCPV3
OCPV3AUX
OCPV15
1.3
0.275
0.65
-
-
A
A
A
VUVLOV3_IN
⊿VUVLOV3_IN
VUVLOV3AUX_IN
VUVLOV15_IN
⊿VUVLOV15_IN
2.70
50
2.70
50
1.15
50
2.80
100
2.80
100
1.20
100
2.90
150
2.90
150
1.25
150
V
mV
V
mV
V
mV
PGV3
2.700
2.850
3.000
V
PGV3AUX
2.700
2.850
3.000
V
PGV15
VPERST#Low
VPERST#HIGH
TPERST#
Tast
1.200
3.0
4
-
1.275
0.1
-
1.350
0.3
20
500
V
V
V
ms
ns
TV3
TV3AUX
TV15
0.1
0.1
0.1
-
3
3
3
ms
ms
ms
ICPPE#
ICPUSB#
Logic Pin Input Current
ISYSR
IPRT_IN#
IRCLKEN
RCLKEN Low Voltage
RCLKEN Leak Current
[Switch V3AUX]
On Resistance
Discharge On Resistance
[Switch V3]
On Resistance
Discharge On Resistance
[Switch V15]
On Resistance
Discharge On Resistance
[Over Current Protection]
V3 Over Current
V3AUX Over Current
V15 Over Current
[Under Voltage Lockout]
V3_IN UVLO OFF Voltage
V3_IN Hysteresis Voltage
V3AUX_IN UVLO OFF Voltage
V3AUX_IN Hysteresis Voltage
V15_IN UVLO OFF Voltage
V15_IN Hysteresis Voltage
[POWER GOOD]
V3 POWER GOOD Voltage
V3AUX POWER GOOD
Voltage
V15 POWER GOOD Voltage
PERST# LOW Voltage
PERST# HIGH Voltage
PERST# Delay Time
PERST# assertion time
[OUTPUT RISE TIME]
V3_IN to V3
V3AUX_IN to V3AUX
V15_IN to V15
⊿VUVLOV3AUX_IN
* Design Guarantee
7/28
uA
V
uA
VEN=0V
CPPE#=3.6V
CPPE#=0V
CPUSB#=3.6V
CPUSB#=0V
SYSR=3.6V
SYSR=0V
PERST_IN#=3.6V
PERST_IN#=0V
RCLKEN=3.6V
RCLKEN=0V
IRCLKEN=0.5mA
VRCLKEN=3.65V
sweep up
sweep down
sweep up
sweep down
sweep up
sweep down
IPERST=0.5mA
● ELECTRICAL CHARACTERISTICS (BD4155FV)
（unless otherwise noted, Ta=25℃ V3AUX_IN =V3_IN=3.3V,V15_IN=1.5V）
Standard Value
Parameter
Symbol
MIN
TYP
MAX
Standby current
Icc1
120
250
Bias current
Icc2
250
500
[Logic]
High Level Enable Input Voltage
VLHI
2.0
Low Level Enable Input Voltage
VLLOW
0.8
0
1
ICPPE#
10
30
0
1
ICPUSB#
10
30
Input current
ISYSR
-1
0
1
IEC_CLKEN#
5
0
20
IEC_CLKREQ#
-1
0
1
IEC_RST#
-1
0
1
IPLT_RST#
-1
0
1
[Switch V3AUX]
On Resistance
RV3AUX
120
220
Discharge On Resistance
RV3AUXDis
60
150
[Switch V3]
On Resistance
RV3
42
90
Discharge On Resistance
RV3Dis
60
150
[Switch V15]
On Resistance
RV15
45
90
Discharge On Resistance
RV15Dis
60
150
[Over Current Protection]
V3 Over current
OCPV3
1.6
V3AUX Over current
OCPV3AUX
0.35
V15 Over current
OCPV15
0.8
[Low input miss operation prevent Block]
V3_IN threshold voltage
VUVLOV3_IN
2.70
2.80
2.90
V3_IN hysteresis Voltage
⊿VUVLOV3_IN
50
100
150
V3AUX_IN threshold voltage
VUVLOV3AUX_IN
2.70
2.80
2.90
V3AUX_IN hysteresis Voltage
⊿VUVLOV3AUX_IN
50
100
150
V15_IN threshold voltage
VUVLOV15_IN
1.15
1.20
1.25
V15_IN hysteresis Voltage
⊿VUVLOV15_IN
50
100
150
[POWER GOOD]
V3 POWER GOOD Voltage
PGV3
2.700
2.850
3.000
V3AUX POWER GOOD Voltage
PGV3AUX
2.700
2.850
3.000
V15 POWER GOOD Voltage
PGV15
1.200
1.275
1.350
PERST# LOW Voltage
VPERST#Low
0.1
0.3
PERST# HIGH Voltage
VPERST#HIGH
3.0
PERST Delay
TPERST#
4
10
20
PLL_CLKREQ# Low Voltage
VPLL
0.1
0.2
PLL_CLKREQ# Leak Current
IPLL
1
[WAKE UP TIME]
V3_IN to V3
TV3
0.1
3
V3AUX_IN to V3AUX
TV3AUX
0.1
3
V15_IN to V15
TV15
0.1
3
* Design Guarantee
8/28
Unit
Condition
uA
uA
VSYSR=0V
VSYSR=3.3V
V
V
uA
uA
uA
uA
uA
uA
uA
uA
uA
CPPE#=3.6V
CPPE#=0V
CPUSB#=3.6V
CPUSB#=0V
SYSR=3.6V
EC_CLKEN#=3.6V
EC_CLKREQ#=3.6V
EC_RST#=3.6V
PLT_RST#=3.6V
mΩ
Ω
Tj=-10～100℃ *
mΩ
Ω
Tj=-10～100℃ *
mΩ
Ω
Tj=-10～100℃ *
A
A
A
V
mV
V
mV
V
mV
V
V
V
V
V
ms
V
uA
ms
ms
ms
sweep up
sweep down
sweep up
sweep down
sweep up
sweep down
IPERST=0.5mA
IPLL_CLKREQ#=0.5mA
VPLL_CLKREQ#=3.6V
● ELECTRICAL CHARACTERISTICS (BD4156MUV)
（unless otherwise noted, Ta=25℃ VEN=3.3V V3AUX_IN =V3_IN=3.3V,V15_IN=1.5V）
Standard Value
Parameter
Symbol
Unit
Condition
MIN
TYP
MAX
Standby Current
IST
40
80
uA
VEN=0V (Include IEN, IRCLKEN)
Bias Current 1
Icc1
120
250
uA
VSYSR=0V
Bias Current 2
Icc2
250
500
uA
VSYSR=3.3V
[Enable]
High Level Enable Input Voltage
VENHI
2.0
5.5
V
Low Level Enable Input Voltage
VENLOW
-0.2
0.8
V
Enable Pin Input Current
IEN
10
30
uA
VEN=0V
[Logic]
High Level Logic Input Voltage
VLHI
2.0
V
Low Level Logic Input Voltage
VLLOW
0.8
V
0
1
uA
CPPE#=3.6V
ICPPE#
10
30
uA
CPPE#=0V
0
1
uA
CPUSB#=3.6V
ICPUSB#
10
30
uA
CPUSB#=0V
0
1
uA
SYSR=3.6V
Logic Pin Input Current
ISYSR
10
30
uA
SYSR=0V
0
1
uA
PERST_IN#=3.6V
IPRT_IN#
10
30
uA
PERST_IN#=0V
0
1
uA
RCLKEN=3.6V
IRCLKEN
10
30
uA
RCLKEN=0V
RCLKEN Low Voltage
VRCLKEN
0.1
0.3
V
IRCLKEN=0.5mA
RCLKEN Leak Current
IRCLKEN
1
uA
VRCLKEN=3.65V
[Switch V3AUX]
On Resistance
RV3AUX
120
220
mΩ Tj=-10～100℃ *
Discharge On Resistance
RV3AUX Dis
60
150
Ω
[Switch V3]
On Resistance
RV3
42
90
mΩ Tj=-10～100℃ *
Discharge On Resistance
RV3Dis
60
150
Ω
[Switch V15]
On Resistance
RV15
45
90
mΩ Tj=-10～100℃ *
Discharge On Resistance
RV15Dis
60
150
Ω
[Over Current Protection]
OC flag V3 Current
OCV3
1.0
A
V3 Over Current
OCPV3
1.3
A
OC flag V3AUX Current
OCV3AUX
0.25
A
V3AUX Over Current
OCPV3AUX
0.275
A
OC flag V15 Current
OCV15
0.5
A
V15 Over Current
OCPV15
0.65
A
OC delay time
TOC#
4
20
ms
[Under Voltage Lockout]
V3_IN UVLO OFF Voltage
VUVLOV3_IN
2.70
2.80
2.90
V
sweep up
V3_IN Hysteresis Voltage
⊿VUVLOV3_IN
50
100
150
mV sweep down
V3AUX_IN UVLO OFF Voltage VUVLOV3AUX_IN
2.70
2.80
2.90
V
sweep up
V3AUX_IN Hysteresis Voltage
⊿VUVLOV3AUX_IN
50
100
150
mV sweep down
V15_IN UVLO OFF Voltage
VUVLOV15_IN
1.15
1.20
1.25
V
sweep up
V15_IN Hysteresis Voltage
⊿VUVLOV15_IN
50
100
150
mV sweep down
[POWER GOOD]
V3 POWER GOOD Voltage
PGV3
2.700 2.850 3.000
V
V3AUX POWER GOOD
PGV3AUX
2.700 2.850 3.000
V
Voltage
V15 POWER GOOD Voltage
PGV15
1.200 1.275 1.350
V
PERST# LOW Voltage
VPERST#Low
0.1
0.3
V
IPERST=0.5mA
PERST# HIGH Voltage
VPERST#HIGH
3.0
V
PERST# Delay Time
TPERST#
4
20
ms
PERST# assertion time
Tast
500
ns
[OUTPUT RISE TIME]
V3_IN to V3
TV3
0.1
3
ms
V3AUX_IN to V3AUX
TV3AUX
0.1
3
ms
V15_IN to V15
TV15
0.1
3
ms
* Design Guarantee
9/28
●Reference data
CPPE#(2V/div)
CPPE#(2V/div)
SYSR(2V/div)
V3(2V/div)
V3(2V/div)
V3(2V/div)
V3AUX(2V/div)
V3AUX(2V/div) RV3=3.3Ω
RV3AUX=13.2Ω
RV15=3Ω
V3AUX(2V/div)
V15(1V/div)
V15(1V/div)
5.0ms/div
Fig.1
5.0ms/div
Card Assert/ De-assert
(Active)
Fig.2
Card Assert/De-assert
(Standby)
SYSR(2V/div)
V3AUX(2V/div)
V15(1V/div)
CPUSB#(2V/div)
V3(2V/div)
V3(2V/div)
V3AUX(2V/div)
V3AUX(2V/div)
V15(1V/div)
V15(1V/div)
500μs/div
5.0ms/div
Fig.4 System Active
⇔Standby(No Card)
Fig.5
Wakeup Wave Form
(Card Assert)
EN(2V/div)
V3(2V/div)
V3AUX(2V/div)
(Shut Down→Active)
CPPE#(2V/div)
V3(2V/div)
V3(2V/div)
V3AUX(2V/div)
V15(1V/div)
500μs/div
Fig.8
Wakeup Wave Form
(Standby→Active)
CPUSB#(2V/div)
Wakeup Wave Form
(USB2.0 Assert)
SYSR(2V/div)
V15(1V/div)
500μs/div
Wakeup Wave Form
500μs/div
Fig.6
V3AUX(2V/div)
V15(1V/div)
500μs/div
Fig.9
Power Down Wave Form
(Card De-assert)
EN(2V/div)
SYSR(2V/div)
V3(2V/div)
V3(2V/div)
V3(2V/div)
V3AUX(2V/div)
V3AUX(2V/div)
V15(1V/div)
V15(1V/div)
V3AUX(2V/div)
500μs/div
Fig.10
5.0ms/div
Fig.3 System Active
⇔Standby( Card Present)
CPPE#(2V/div)
V3(2V/div)
Fig.7
V15(1V/div)
Power Down Wave Form
(USB2.0 De-assert)
V15(1V/div)
500μs/div
Fig.11
Power Down Wave Form
(Active→Shut Down)
10/28
5.0ms/div
Fig.12
Power Down Wave Form
(Active→Standby)
CPPE#(2V/div)
CPPE#(2V/div)
CPPE#(2V/div)
V3(2V/div)
V3(2V/div)
V3(2V/div)
V3AUX(2V/div)
V3AUX(2V/div)
V3AUX(2V/div)
RCLKEN(2V/div)
PERST#(2V/div)
PERST#(2V/div)
Fig.13 PERST# Wave Form
(Card Assert/ De-assert)
Fig.14 RCLKEN Wave Form
(Card Assert/ De-assert)
Fig.15 PERST# Wave Form
(USB2.0 Assert/ De-assert)
(BD4154FV, BD4156MUV)
CPUSB#(2V/div)
PERST_IN#(2V/div)
V3(2V/div)
V3(2V/div)
V3AUX(2V/div)
V3AUX(2V/div)
RCLKEN(2V/div)
PERST#(2V/div)
Fig.16 RCLKEN Wave Form
(USB2.0 Assert/ De-assert)
Fig.17 PERST# Wave Form
(PERST_IN# Input)
(BD4154FV, BD4156MUV)
PERST_IN#(2V/div)
V3(2V/div)
V3AUX(2V/div)
RCLKEN(2V/div)
Fig.18 RCLKEN Wave Form
(PERST_IN# Input)
(BD4153FV, BD4153EFV, BD4154FV, BD4156MUV)
(BD4154FV, BD4156MUV)
PLT_RST#(2V/div)
PLT_RST#(2V/div)
CPUSB#(2V/div)
V3AUX(2V/div)
Fig.20
PERST# Wave Form
(PLT_RST Input)
Fig.21
(BD4155FV)
EC_CLKREQ#(2V/div)
EC_CLKEN#(2V/div)
EC_CLKEN#(2V/div)
V3(2V/div)
V3(2V/div)
PLL_CLKREQ#(2V/div)
PLL_CLKREQ#(2V/div)
1.0ms/div
1.0ms/div
Fig.23
PLL_CLKREQ# Wave Form
(EC_CLKEN# Input)
(BD4155FV)
11/28
PERST# Wave Form
(EC RST Input)
(BD4155FV)
EC_CLKREQ#(2V/div)
(BD4155FV)
5.0ms/div
5.0ms/div
(BD4155FV)
PLL_CLKREQ# Wave Form
(EC_CLKREQ# Input)
PERST#(2V/div)
PERST#(2V/div)
5.0ms/div
Fig.22
V3(2V/div)
V3(2V/div)
PLL_CLKREQ#(2V/div)
Fig.19 PLL_CLKREQ# Wave Form
(USB2.0 Assert/ De-assert)
EC_RST(2V/div)
EC_RST(2V/div)
V3(2V/div)
CPPE#(2V/div)
V3(2V/div)
V3AUX(2V/div)
PLL_CLKREQ(2V/div)
5.0ms/div
Fig.24
PLL_CLKREQ# Wave Form
(EC_CLKEN# Input)
(BD4155FV)
●BLOCK DIAGRAM (BD4153FV, BD4153EFV)
V3_IN1
3.3V
V3-1
21
VD
22
4
V3_IN2
SS_V3
V3AUX_IN
3.3V/1.30A
3
V3-2
2
TSD,CL,UVLO
20
3.3V AUX/275mA
5
V3AUX_IN
V3AUX
3.3V
SS_V3AUX
6
V15_IN1
V15_IN2
1.5V
TSD,CL,UVLO_AUX
17
8
18
CPPE# 11
SYSR
SS_V15
1.5V/625mA
9
V15-2
VD
CPUSB#
V15-1
Input
12
logic
Power
good
10
19
16
PERST#
VCC
TSD,CL,UVLO
7
EN,SYSR,CPUSB#,CPPE#
PERST_IN#
13
Thermal
protection
VCC
24
TSD
PERST#_DELAY
V3_IN,V3AUX_IN,V15
CL
V3,V3AUX,V15
EN
23
Reference
Block
V3_IN
V3AUX_IN
Charge
VD
Pump
V15_IN
VCC
15
Under
UVLO
OC
voltage
lock out
14
UVLO_AUX
OC_DELAY
1
GND
●PHYSICAL DIMENSIONS
●PIN FUNCTION
BD4153FV
Lot No.
(UNIT:mm)
PIN No
PIN NAME
1
GND
2
SS_V3
V3 soft start pin
3
V3_1
V3 output pin 1
4
V3_2
V3 output pin 2
5
V3AUX
6
SS_V3AUX
7
PERST_IN#
8
V15_1
V15 output pin 1
10
V15_2
V15 output pin 2
11
SYSR
Logic input pin
CPPE#
Logic input pin
12
CPUSB#
Logic input pin
13
PERST#_DELAY
14
OC_DELAY
SSOP-B24
D4153EFV
Lot No.
(Unit:mm)
PIN FUNCTION
GND pin
V3AUX output pin
V3AUX soft start pin
PERST# control input pin (SysReset#)
PERST# delay time setting pin
OCP delay time setting pin
15
OC
16
SS_V15
V15 soft start pin
17
V15_IN1
V15 input pin 1
18
V15_IN2
V15 input pin 2
19
PERST#
20
V3AUX_IN
21
V3_IN1
V3 input pin 1
22
V3_IN2
V3 input pin 2
23
EN
24
VCC
HTSSOP-B24（ESSOP-B24）
12/28
over current protect signal output pin
Logic output pin
V3AUX input pin 1
Enable input pin
Input voltage
●BLOCK DIAGRAM (BD4154FV)
V3-1
V3_IN1
4
VD
5
3.3V
3.3V/1.30A
6
7
V3_IN2
V3-2
TSD,CL,UVLO
3.3V AUX/275mA
V3AUX_IN
18
17
VD
3.3V
V3AUX
TSD,CL,UVLO_AUX
V15_IN1
V15_IN2
1.5V
CPPE#
CPUSB#
SYSR
V15-1 1.5V/625mA
15
14
V3AUX_IN
16
V3AUX_IN
12
Input
11
logic
19 RCLKEN
Power
good
TSD,CL,UVLO
EN,SYSR,CPUSB#,CPPE#
Thermal
protection
TSD
V3_IN,V3AUX_IN,V15_IN
2
Reference
Block
PERST#
1
PERST_IN#
V3_IN
Under
voltage
V3AUX_IN
Charge
Pump
8
CL
V3,V3AUX,V15
EN
V15-2
VD
3
V3AUX_IN
13
VD
V15_IN
lock out
UVLO
UVLO_AUX
10
GND
●PHYSICAL DIMENSIONS
●PIN FUNCTION
PIN
No
1
D4154FV
Lot No.
SSOP-B20 (Unit:mm)
PIN NAME
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
PERST_IN#
EN
SYSR
V3_IN1
V3_IN2
V3_1
V3_2
PERST#
TEST
GND
CPUSB#
CPPE#
V15_1
V15_2
V15_IN1
V15_IN2
V3AUX
V3AUX_IN
19
RCLKEN
20
NC
13/28
PIN FUNCTION
PERST# control input pin (SysReset#)
Enable input pin
Logic input pin
V3 input pin 1
V3 input pin 2
V3 output pin 1
V3 output pin 2
Logic output pin
Test pin
GND pin
Logic input pin
Logic input pin
V15 output pin 1
V15 output pin 2
V15 input pin 1
V15 input pin 2
V3AUX output pin
V3AUX input pin 1
Reference clock enable signal／
Power good signal （No delay）
Non connection
●BLOCK DIAGRAM (BD4155FV)
V3_IN
V3-1
4
3.3V
3.3V/1.30A
6
VD
5
7
V3_IN2
V3-2
TSD,CL,UVLO
V3AUX_IN
18
17
VD
3.3V
V3AUX
TSD,CL,UVLO_AUX
V15_IN1
1.5V
V15-1
15
13
16
14
V15_IN2
1
2
V3AUX_IN
(from host) SYSR
12
Input
11
logic
3
VD
V3AUX_IN
Reference
Block
Charge
Pump
Thermal
protection
VD
Under
voltage
lock out
EC_CLKEN#(from host)
CL
UVLO
UVLO_AUX
10
●PIN FUNCTION
D4155FV
Lot No.
SSOP-B20
EC_CLKREQ#(from card)
9
GND
●PHYSICAL DIMENSIONS
EC_RST#(from host)
20
TSD
V3_IN,V3AUX_IN,V15_IN
V3,V3AUX,V15
V3_IN
V3AUX_IN
V15_IN
V15-2
PLT_RST#(from host)
19 PLL_CLKREQ#(to PLL)
SYSR
CPUSB#
CPPE#
TSD,CL,UVLO
V3AUX_IN
1.5V/625mA
8 PERST#(to card)
Power
good
(from card) CPPE#
(from card) CPUSB#
3.3V AUX/275mA
(Unit:mm)
PIN
No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
14/28
PIN NAME
PLT_RST#
EC_RST#
SYSR
V3_IN1
V3_IN2
V3_1
V3_2
PERST#
EC_CLKEN#
GND
CPUSB#
CPPE#
V15_1
V15_2
V15_IN1
V15_IN2
V3AUX
V3AUX_IN
PLL_CLKREQ#
EC_CLKREQ#
PIN FUNCTION
Logic input pin (from HOST)
Logic input pin (from HOST)
Logic input pin
V3 input pin 1
V3 input pin 2
V3 output pin 1
V3 output pin 2
Logic output pin
Logic input pin (from HOST)
GND pin
Logic input pin
Logic input pin
V15 output pin 1
V15 output pin 2
V15 input pin 1
V15 input pin 2
V3AUX output pin
V3AUX input pin 1
Clock enable signal (to PLL)
Logic input pin (from CARD)
●BLOCK DIAGRAM (BD4156MUV)
5
2
3.3V
3.3V/1.30A
V3
V3_IN
VD
4
3
V3_IN
V3
TSD,CL,UVLO
3.3V AUX/275mA
V3AUX_IN
17
15
VD
V3AUX
3.3V
TSD,CL,UVLO_AUX
V15_IN
V15
12
V15_IN
14
1.5V
V3AUX_IN
CPUSB#
SYSR
10
13
V3AUX_IN
VD
CPPE#
1.5V/625mA
11
Input
9
logic
18
RCLKEN
8
PERST#
6
PERST_IN#
Power
good
TSD,CL,UVLO
1
EN,SYSR,CPUSB#,CPPE#
V3AUX_IN
V15
TSD
Thermal
protection
V3_IN,V3AUX_IN,V15_IN
CL
V3,V3AUX,V15
EN
Reference
20
V3_IN
19
Block
V3AUX_IN
voltage
Charge
VD
OC#
Under
V15_IN
UVLO
lock out
Pump
UVLO_AUX
7
GND
●PHYSICAL DIMENSIONS
●PIN FUNCTION
D4156
Lot No.
PIN No
PIN NAME
1
SYSR
2
3
V3_IN
4
V3_IN
V3
5
V3
6
PERST_IN#
7
GND
8
9
PERST#
CPUSB#
10
CPPE#
11
V15
12
V15_IN
13
V15
14
V15_IN
15
V3AUX
16
TEST
17
V3AUX_IN
18
RCLKEN
19
OC#
20
EN
VQFN020V4040 Package(Unit:mm)
15/28
PIN FUNCTION
Logic input pin
V3 input pin
V3 output pin
V3 input pin
V3 output pin
PERST# control input pin (SysReset#)
GND pin
Logic output pin
Logic input pin
Logic input pin
V15 output pin
V15 input pin
V15 output pin
V15 input pin
V3AUX output pin
Test pin
V3AUX input pin 1
Reference clock enable signal／
Power good signal （No delay）
over current protect signal output pin
Enable input pin
●Description of operations
VCC (BD4153FV, BD4153EFV)
BD4153FV, BD4153EFV has an independent power input pin for an internal circuit operation in order to activate UVLO, Input
logic, and charge pump, the maximum current through which is rated to 2 mA. It is recommended to connect a bypass capacitor
of 0.1 µF or so to VCC pin.
EN (BD4153FV, BD4153EFV)
With an input of 2.3 volts or higher, this terminal turns to “High” level to activate the circuit, while it turns to “Low” level to
deactivate the circuit (with the standby circuit current of 35 µA), discharges each output and lowers output voltage If the input is
lowered to 0.8 volts or less.
EN (BD4154FV/BD4156MUV)
With an input of 2.0 volts or higher, this terminal goes HIGH to activate the circuit, and goes LOW to deactivate the circuit (with
the standby circuit current of 40 µA), It discharges each output and lowers output voltage when the input falls to 0.8 volts or less.
V3_IN, V15_IN, and V3AUX_IN (BD4153FV, BD4153EFV)
These are the input terminals for each channel of a 3ch switch. V3_IN and V15_IN terminals have two pins each, which should
be short-circuited on the pc board with a thick conductor. And V3AUX IN terminal should be short-circuited to VCC terminal.
Through these three terminals, a big current runs (V3_IN: 1.35A, V3AUX_IN: 0.275 A, and V15_IN: 0.625 A). In order to lower
the output impedance of the power supply to be connected, it is recommended to provide ceramic capacitors (of B-characteristics
or better) between these terminals and ground; 1 µF or so between V3_IN and GND and between V15_IN and GND, and 0.1 µF
or so between V3AUX_IN and GND.
V3_IN, V15_IN, and V3AUX_IN (BD4154FV, BD4155FV, BD4156MUV)
These are the input terminals for each channel of a 3ch switch. V3_IN and V15_IN terminals have two pins each, which should
be short-circuited on the pc board with a thick conductor. A large current runs through these three terminals : (V3_IN: 1.35A;
V3AUX_IN: 0.275 A; and V15_IN: 0.625 A). In order to lower the output impedance of the connected power supply, it is
recommended that ceramic capacitors (with B-type characteristics or better) be provided between these terminals and the ground.
Specifically, the capacitors should be on the order of 1 µF between V3_IN and GND, and between V15_IN and GND; and on the
order of 0.1 µF between V3AUX_IN and GND.
V3, V15, and V3AUX (BD4153FV, BD4153EFV, BD4154FV, BD4155FV, BD4156MUV)
These are the output terminals for each switch. V3 and V15 terminals have two pins each, which should be short-circuited on
the pc board and connected to an ExpressCard connector with a thick conductor as shortest as possible. In order to stabilize
the output, it is recommended to provide ceramic capacitors (of B-characteristics or better) between these terminals and ground;
10 µF or so between V3 and GND and between V15 and GND, and 1 µF or so between V3AUX and GND.
CPPE# (BD4153FV, BD4153EFV)
The pin used to find whether a PCI-Express signal compatible card is provided or not. Turns to “High” level with an input of 2.3
volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less,
which means that a card is provided. Controls turning ON/OFF of the switch according to the status of the system.
CPPE# (BD4154FV, BD4155FV, BD4156MUV)
This pin is used to find whether or not a PCI-Express signal compatible card is present. Turns to “High” level with an input of 2.0
volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less,
which means that a card is provided. Controls the ON/OFF, switch selecting the proper mode based on the status of the system.
Pull up resistance (100kΩ～200kΩ) is built into, so the number of components is reduced.
CPUSB# (BD4153FV, BD4153EFV)
The pin used to find whether a USB2.0 signal compatible card is provided or not. Turns to “High” level with an input of 2.3 volts
or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which
means that a card is provided. Controls turning ON/OFF of the switch according to the system status.
CPUSB# (BD4154FV, BD4155FV, BD4156MUV)
This pin is used to find whether or not a USB2.0 signal compatible card is present. Turns to “High” level with an input of 2.0 volts
or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which
means that a card is provided. Controls the ON/OFF switch, selecting the proper mode based on the system status.
Pull up resistance (100kΩ～200kΩ) is built into, so the number of components is reduced.
SYSR (BD4153FV, BD4153EFV)
The pin used to detect the system status. Turns to “High” level with an input of 2.3 volts or higher, which means that the system
is activated, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that the system is on standby.
SYSR (BD4154FV, BD4156MUV)
This pin is used to detect the system status. Turns to “High” level with an input of 2.0 volts or higher, which means that the
system is activated, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that the system is on
standby. (Pull up resistance (100kΩ～200kΩ) is built into, so the number of components is reduced.)
SYSR (BD4155FV)
The pin used to detect the system status. Turns to “High” level with an input of 2.0 volts or higher, which means that the system
is activated, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that the system is on standby.
16/28
PERST_IN# (BD4153FV, BD4153EFV)
The pin used to control a reset signal to a card (PERST#) from the system side. (Also referred to as “SysReset#” by PCMCIA.)
Turns to “High” level with an input of 2.3 volts or higher, and turns PERST# to “High” level AND with a “Power Good” output.
Turns to “Low” level and turns PERST# to “Low” level when the input is lowered to 0.8 volts or less.
PERST_IN# (BD4154FV, BD4156MUV)
This pin is used to control the reset signal (PERST#) to a card from the system side. (Also referred to as “SysReset#” by
PCMCIA.) Turns to “High” level with an input of 2.0 volts or higher, and sets PERST# to “High” AND with a “Power Good” output.
Turns to “Low” level and sets PERST# to “Low” when the input falls to 0.8 volts or less.
PERST# (BD4153FV, BD4153EFV, BD4154FV, BD4156MUV)
The pin used to provide a reset signal to a PCI-Express compatible card. The status is determined by each output, PERST#_IN,
CPPE# system status, and EN on/off status. Turns to “High” level and activates the PCI-Express compatible card only if each
output is within the “Power Good” threshold with the card kept inserted and with PERST_IN# turned to “High” level.
PERST# (BD4155FV)
This pin is used to send a reset signal to a PCI-Express compatible card. Reset status is determined by the outputs, PLT_RST#,
EC_RST#, CPPE# system status. Turns to “High” level and activates the PCI-Express compatible card only if each output is
within the “Power Good” threshold, with the card inserted and PLT_RST#, EC_RST# turned to “High” level.
PERST#_DELAY (BD4153FV, BD4153EFV)
Delay during which the level at PERST# pin turns from Low to High may be set with a capacitor externally applied. The delay
time is determined by the regulated current (2 µA), the reference voltage (0.7 volts) inside the IC and the capacitance of the
capacitor externally applied. The delay time is specified as “at least 1 ms” in “ExpressCard Standard”. It does not synchronize
with PERST_IN#, and it synchronizes only with a “Power Good” output inside the IC. Turns to “Low” level when SW is turned
OFF.
OC (BD4153FV, BD4153EFV, BD4156MUV)
Turns its output to “Low” level if an overcurrent condition is detected. This open drain output may be pulled up to 3.6 volts power
supply via resistor.
OC-Delay (BD4153FV, BD4153EFV)
Delay during which the level at OC pin turns from High to Low may be set with a capacitor externally applied. The delay time is
determined by the regulated current (2 µA), the reference voltage (0.7 volts) inside the IC and the capacitance of the capacitor
externally applied. May be used to control with the OC status fed back to the system. If fed back to EN terminal of this IC, it
may be used to turn OFF the output that is provided when an overcurrent condition is detected.
RCLKEN (BD4154FV, BD4156MUV)
This pin is used to send an enable signal to the reference clock. Activation status is determined by the outputs, CPPE# system
status, and EN on/off status. Turns to “High” level and activates the reference clock PLL only if each output is within the “Power
Good” threshold, with the card kept inserted.
TEST (BD4154FV, BD4156MUV)
This pin is used to test, which should be short-circuited to the GND. When it is short-circuited to V3AUX_IN, UVLO (V3_IN,
V15_IN) turns OFF.
PLT_RST#, EC_RST# (BD4155FV)
These pins are used to control the reset signal (PERST#) to a card from the system side. (Also referred to as “SysReset#” by
PCMCIA.) Turns to “High” level with an input of 2.0 volts or higher, and sets PERST# to “High” AND with a “Power Good” output.
Turns to “Low” level and sets PERST# to “Low” when the input falls to 0.8 volts or less.
EC_CLKEN#, EC_CLKREQ# (BD4155FV)
These pins are used to control the enable signal (PLL_CLKREQ#) to the reference clock. Turns to “High” level and set
PLL_CLKREQ# to “High” when the input rise to 2.0 volts or higher. Turns to “Low” level with an input of 0.8 volts or less, and sets
PLL_CLKREQ# to “Low” or with a inverting “Power Good” output.
PLL_CLKREQ# (BD4155FV)
This pin is used to send an enable signal to the reference clock. Activation status is determined by the outputs,
EC_CLKEN#,EC_CLKREQ#, CPPE# system status. Turns to “Low” level and activates the reference clock PLL only if each
output is within the “Power Good” threshold, with the card kept inserted, and EC_CLKEN#, EC_CLKREQ# turned to “Low”level.
17/28
●TIMING CHART
TM
Power ON/OFF Status of ExpressCard
System Status
ExpressCARD
Primary
Auxiliary
OFF
OFF
ON
ON
Power Switch Status
Module
Status
Primary
Auxiliary
Don’t Care
OFF
OFF
De-asserted
OFF
OFF
Asserted
ON
ON
De-asserted
OFF
OFF
Asserted Before This
OFF
ON
Asserted After This
OFF
OFF
ON
ON
TM
ExpressCardTM States Transition Diagram
SYSR=L
CP#=Ｌ→Ｈ
SYSR=H⇔L
CP#=H
SYSR=H
CP#=H→L
SYSR=L
CP#=H⇔L
V3AUX=OFF
V15=V3=OFF
SYSR=Ｌ→Ｈ
CP#=L
V3AUX=ON
V15=V3=ON
SYSR=H→L
CP#=L
SYSR=H
CP#=Ｌ→Ｈ
SYSR=L→H
CP#=L
V3AUX=ON
V15=V3=OFF
SYSR=H→L
CP#=L
SYSR=L
CP#=L
⇔
SYSR=H
CP#=H
System Status
Card Status
Stand-by Status
:SYSR=L
CardAsserted Status
:CP#=L
ON Status
:SYSR=H
Card De-asserted Status
:CP#=H
From ON to Stand-by Status
:SYSR=H→L
From De-asserted to Asserted Status :CP#=H→L
From Stand-by to ON Status :SYSR=L→H
From Asserted to De-asserted Status :CP#=L→H
18/28
●OUTPUT CONDITION LIST（Output） (BD4154FV, BD4156MUV)
Power Supply
State
Logic input
Output
V3AUX_IN
V3_IN
V15_IN
EN
SYSR
CPPE#
CPUSB#
V3/V15
V3AUX
OFF
0
×
×
×
×
×
×
OFF
OFF
Shut down
1
×
×
0
×
×
×
OFF
OFF
1
1
OFF
OFF
×
0
OFF
ON
0
×
OFF
ON
×
×
OFF
OFF
1
1
OFF
OFF
×
0
ON
ON
0
×
ON
ON
ON
1
↓
×
×
1
1→0
Stand-by
Stand-by
ON
1
1
×
×
1
1
State
1
0
1
1
Logic input
Logic output
PERST_IN#
RCLKEN(Input)
PERST#
RCLKEN
OFF
×
×
0
0
Shut down
×
×
0
0
Stand-by
×
×
0
0
ON(No Card)
×
×
0
0
0
Hiz
0
0
0
0
0
0
1
Hiz
0
0
1
0
0
0
0
Hiz
0
1
0
0
0
0
1
Hiz
1
1
1
0
0
0
ON(CPUSB#=0)
ON(CPPE#=0)
19/28
●Reference data
(BD4155FV)
Condition
UVLO
UVLO
Thermal
（V3/V15）
（V3AUX）
―
―
―
ON
OFF
OFF
―
ON
OFF
OFF
―
―
ON
OUTPUT CONDITION LIST（Protect Circuit）
CPxx#
H
L
Output
V3/V15
V3AUX
L
Hi-Z
L
H
Hi-Z
L
H
L
H
Hi-Z
Input
State
V3AUX_IN
0
V3_IN
0
1
×
Stand-by
1
×
ON
1
1
OFF
ON
↓
Stand-by
V15_IN
0
SYSR
0
CPPE#
×
1
×
1→0
×
0
1
×
0
×
0
1
1
1
×
0
OUTPUT CONDITION LIST（Logic）
Output
V3/V15
V3AUX
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
CPUSB#
×
1
0
×
1
0
×
1
0
×
Input
State
Output
V3AUX_IN
V3_IN
V15_IN
SYSR
CPPE#
CPUSB#
OFF
Stand-by
0
1
0
×
0
×
0
0
×
×
1
0
×
×
1
×
ON
1
1
1
1
0
×
POWER
PLT_RST# EC_RST# PERST#
GOOD
1
0
OUTPUT CONDITION LIST（PERST#）
×
×
×
NG
×
×
×
×
OK
0
OK
1
×
×
×
×
×
×
0
1
0
1
×
Input
State
Output
V3AUX_IN
V3_IN
V15_IN
SYSR
CPPE#
CPUSB#
OFF
Stand-by
0
1
0
×
0
×
0
0
×
×
1
0
×
×
1
×
ON
1
1
1
1
0
×
POWER
EC_
EC_
GOOD CLKREQ# CLKEN#
×
×
×
NG
×
×
×
×
OK
0
OK
1
1
0
×
OUTPUT CONDITION LIST（PLL_CLKREQ#）
×
20/28
L
L
L
L
L
L
L
H
L
×
×
×
×
0
1
0
1
×
PLL_
CLKREQ#
Hi-Z
L
H
H
L
H
H
H
H
■ BD4153FV, BD4153EFV Evaluation Board Circuit
U1
TP16 TP15
1
C2
TP1
4
TP2
5
C6a
6
C6
C3
TP21
VCC
R7
C5
2
TP17
3
V3_AUXIN
7
S2
R7a
TP4
TP18
C7
TP6
S4
TP7
8
C8
9
R10a
10
R11a
TP8
S5
TP3
R12a
11
12
S6
BD4153FV
GND
VCC
SS_V3
EN
V3_1
V3_IN2
V3_2
V3 IN1
V3_AUXIN
V3AUX
SS_V3AUX
PERST#
PERST_IN#
V15 IN2
V15_1
V15 IN1
V15_2
SS_V15
SYSR
OC
CPPE#
OC_DELAY
CPUSB#
PERST#_DELAY
24
R24
23
R23
VCC
TP14
C23
TP13
22
21
S1
TP20
C24
C23a
C21
R20
TP22
20
TP12
TP11
19
C20
TP10
18
TP19
17
C17
C16
16
TP9
15
C14
14
VCC
C13
13
R18 R15
VCC
R10 R11 R12
C10 C11 C12
■ BD4153FV, BD4153EFV Evaluation Board Application Components
Part No
Value
Company
Part Name
Part No
Value
Company
Part Name
U1
-
ROHM
BD4153FV
C6a
-
-
-
R7
10kΩ
ROHM
MCR03series
C7
-
-
-
R10
10kΩ
ROHM
MCR03series
C8
10μF
MURATA
GRM31CB10J106KC01B
R10a
0Ω
ROHM
MCR03series
C10
-
-
-
R11
120kΩ
ROHM
MCR03series
C11
-
-
-
R11a
0Ω
ROHM
MCR03series
C12
-
-
-
R12
120kΩ
ROHM
MCR03series
C13
0.033μF
MURATA
GRM155B11A333
R12a
0Ω
ROHM
MCR03series
C14
0.22μF
MURATA
GRM188B11A224KA61B
R15
10kΩ
ROHM
C16
2200pF
MURATA
GRM1881X1H222JA01B
R18
-
MCR03series
-
C17
1μF
MURATA
GRM188B10J105KA01B
R20
0Ω
ROHM
MCR03series
C20
0.1μF
MURATA
GRM155B11A104
R23
0Ω
ROHM
MCR03series
C21
1μF
MURATA
GRM188B10J105KA01B
R24
10Ω
ROHM
MCR03series
C23
0.1μF
MURATA
GRM155B11A104
C2
2200pF
MURATA
GRM1881X1H222JA01B
C23a
-
-
C3
10μF
MURATA
GRM31CB10J106KC01B
C24
0.1μF
MURATA
C5
1μF
MURATA
GRM188B10J105KA01B
C6
0.01μF
MURATA
GRM1881X1H103JA01B
21/28
GRM155B11A104
■ BD4154FV, BD4156MUV Evaluation Board
V3AUX_IN
BD4156MUV only
U1
R1(R6)
GND SW2
GND SW3
GND
1(6)
PERST_IN#
R2(R20)
C1(C6)
GND
2(20)
R3(R1)
C2(C20)
GND
3(1)
EN
C3(C1)
V3_IN(S)
GND
4(2)
SYSR
V3_IN
C4(C2)
5(4)
GND
R19B
BD4154FV
(BD4156MUV)
SW1
OC#
PERST_IN#
RCLKEN
EN
20(19) R19A
19(18)
RCLKEN
18(17) V3AUX_IN(S)
V3AUX_IN
17(15) V3AUX(S)
C18(C17)
GND
16(13) V15_IN(S)
C17(C15)
GND
V3AUX
V3_IN1
V15_IN2
V3_IN2
6(3)
V3_1
V15_IN1
V3_2
V15_2
C6(C3)
GND
7(5)
8(8)
PERST #
V3AUX_IN
SW7
9(16)
V15_1
TEST
CPPE#
CPUSB#
GND
GND
V15
C13(C14)
GND
13(12)
SW5
R12(R10)
12(10)
11(9)
CPPE#
SW6
GND
CPUSB#
■ BD4154FV, BD4156MUV Evaluation Board Application Components
Part No
Value
Company
Part Name
R1(R6)
0Ω
ROHM
MCR03series
R2(R20)
0Ω
ROHM
MCR03series
R3(R1)
0Ω
ROHM
MCR03series
R11(R9)
0Ω
ROHM
MCR03series
R12(R10)
0Ω
ROHM
MCR03series
R19A
0Ω
ROHM
MCR03series
※ BD4156MUV
※ BD4156MUV
R19B
20kΩ
ROHM
MCR03series
C1(C6)
-
-
-
C2(C20)
-
-
-
C3(C1)
-
-
-
C4(C2)
1μF
MURATA
GRM188B10J105KA01B
C6(C3)
10μF
MURATA
GRM31CB10J106KC01B
C11(C9)
-
-
-
C12(C10)
-
-
-
C13(C14)
10μF
MURATA
GRM31CB10J106KC01B
C15(C13)
1μF
MURATA
GRM188B10J105KA01B
C17(C15)
1μF
MURATA
GRM188B10J105KA01B
C18(C17)
0.1μF
MURATA
GRM155B11A104
C19
-
-
-
GND
R11(R9)
C11(C9)
GND
SSOP-B20
22/28
V15_IN
V15(S)
C12(C10)
10(7)
V3AUX
C15(C13)
GND
15(11)
14(14)
PERST#
GND
V3AUX_IN
V3AUX_IN
SYSR
V3(S)
V3
SW4
C19
GND
※ BD4156MUV
GND
■ BD4155FV Evaluation Board
U1
V3AUX_IN
SW1
R1a R1
GND
1
PLT_RST# V3AUX_IN
SW2
R2a R2
GND
SYSR
PLT_RST#
EC_CLKREQ#
2
C2
GND
C3
GND
PLL_CLKREQ#
GND
19
R19
SYSR
V3AUX_IN1
18
V3AUX_IN
V3_IN(S)
4
V3_IN
C4
GND
5
V3_IN1
V3AUX
V3_IN2
V15_IN2
V3AUX(S)
C18
GND
V15_IN(S)
C17
GND
17
V3AUX
16
V15_IN
C15
GND
V3(S)
6
V3
PLL_CLKREQ#
V3AUX_IN
V3AUX_IN(S)
3
R3
GND
V3AUX_IN EC_CLKREQ#
C20
EC_RST#
SW20
R20 R20a
20
C1
GND
EC_RST# V3AUX_IN
SW3
R3a
GND
V3AUX_IN
BD4155FV
V3_1
V15_IN1
V3_2
V15_2
15
C6
GND
7
V15(S)
14
V15
C13
GND
SW9
8
PERST #
V3AUX_IN
R9a
GND
EC_CLKEN#
9
R9
C9
GND
PERST#
V15_1
EC_CLKEN#
CPPE#
13
V3AUX_IN
C12
10
GND
CPUSB#
SW12
R12 R12a
12
GND
11
C11
GND
GND
V3AUX_IN CPPE#
SW11
R11 R11a
GND
CPUSB#
GND
SSOP-B20
■ BD4155FV Evaluation Board Application Components
Part No
Value
Company
Part Name
Part No
Value
Company
Part Name
R1
0Ω
ROHM
MCR03series
C1
-
-
-
R1a
100kΩ
ROHM
MCR03series
C2
-
-
-
R2
0Ω
ROHM
MCR03series
C3
-
-
-
R2a
100kΩ
ROHM
MCR03series
C4
1μF
MURATA
GRM188B10J105KA01B
R3
0Ω
ROHM
MCR03series
C6
10μF
MURATA
GRM31CB10J106KC01B
R3a
100kΩ
ROHM
MCR03series
C9
-
-
-
R9
0Ω
ROHM
MCR03series
C11
-
-
-
R9a
100kΩ
ROHM
MCR03series
C12
-
-
-
R11
0Ω
ROHM
MCR03series
C13
10μF
MURATA
GRM31CB10J106KC01B
R11a
-
-
-
C15
1μF
MURATA
GRM188B10J105KA01B
R12
0Ω
ROHM
MCR03series
C17
1μF
MURATA
GRM188B10J105KA01B
R12a
-
-
-
C18
0.1μF
MURATA
GRM155B11A104
R19
10kΩ
ROHM
MCR03series
C20
-
-
-
R20
0Ω
ROHM
MCR03series
R20a
100kΩ
ROHM
MCR03series
23/28
●NOTE FOR USE
1.Absolute maximum ratings
For the present product, thoroughgoing quality control is carried out, but in the event that applied voltage, working
temperature range, and other absolute maximum rating are exceeded, the present product may be destroyed. Because it
is unable to identify the short mode, open mode, etc., if any special mode is assumed, which exceeds the absolute
maximum rating, physical safety measures are requested to be taken, such as fuses, etc.
2.GND potential
Bring the GND terminal potential to the minimum potential in any operating condition.
3.Thermal design
Consider allowable loss (Pd) under actual working condition and carry out thermal design with sufficient margin provided.
4.Terminal-to-terminal short-circuit and erroneous mounting
When the present IC is mounted to a printed circuit board, take utmost care to direction of IC and displacement. In the
event that the IC is mounted erroneously, IC may be destroyed. In the event of short-circuit caused by foreign matter that
enters in a clearance between outputs or output and power-GND, the IC may be destroyed.
5.Operation in strong electromagnetic field
The use of the present IC in the strong electromagnetic field may result in maloperation, to which care must be taken.
6.Built-in thermal shutdown protection circuit
The present IC incorporates a thermal shutdown protection circuit (TSD circuit). The working temperature is 175°C
(standard value) and has a -15°C (standard value) hysteresis width. When the IC chip temperature rises and the TSD
circuit operates, the output terminal is brought to the OFF state. The built-in thermal shutdown protection circuit (TSD
circuit) is first and foremost intended for interrupt IC from thermal runaway, and is not intended to protect and warrant the IC.
Consequently, never attempt to continuously use the IC after this circuit is activated or to use the circuit with the activation of
the circuit premised.
7.Capacitor across output and GND
In the event a large capacitor is connected across output and GND, when Vcc and VIN are short-circuited with 0V or GND
for some kind of reasons, current charged in the capacitor flows into the output and may destroy the IC. Use a capacitor
smaller than 1000 µF between output and GND.
8.Inspection by set substrate
In the event a capacitor is connected to a pin with low impedance at the time of inspection with a set substrate, there is a
fear of applying stress to the IC. Therefore, be sure to discharge electricity for every process. As electrostatic measures,
provide grounding in the assembly process, and take utmost care in transportation and storage. Furthermore, when the
set substrate is connected to a jig in the inspection process, be sure to turn OFF power supply to connect the jig and be sure
to turn OFF power supply to remove the jig.
9.IC terminal input
+
The present IC is a monolithic IC and has a P substrate and P isolation between elements.
With this P layer and N layer of each element, PN junction is formed, and when the potential relation is
yGND>terminal A>terminal B, PN junction works as a diode, and
yterminal B>GND terminal A, PN junction operates as a parasitic transistor.
The parasitic element is inevitably formed because of the IC construction. The operation of the parasitic element gives rise
to mutual interference between circuits and results in malfunction, and eventually, breakdown. Consequently, take utmost
care not to use the IC to operate the parasitic element such as applying voltage lower than GND (P substrate) to the input
terminal.
Resistor
NPN Transistor Structure (NPN)
（PIN A）
（PIN B）
B
E
C
Parasitic diode
GND
N
P+
P+
P
P
P+
N
GND
（PIN B）
P+
N
N
N
P substrate
（PIN A）
N
Parasitic diode
GND
C
N
B
E
P substrate
Parasitic diode
GND
GND
Nearby other device
Parasitic diode
24/28
10. GND wiring pattern
If there are a small signal GND and a high current GND, it is recommended to separate the patterns for the high current
GND and the small signal GND and provide a proper grounding to the reference point of the set not to affect the voltage at
the small signal GND with the change in voltage due to resistance component of pattern wiring and high current. Also for
GND wiring pattern of component externally connected, pay special attention not to cause undesirable change to it.
11. Electrical characteristics
The electrical characteristics in the Specifications may vary depending on ambient temperature, power supply voltage,
circuit(s) externally applied, and/or other conditions. It is therefore requested to carefully check them including transient
characteristics.
12. Capacitors to be applied to the input terminals
The capacitors to be applied to the input terminals (VCC, V3_IN, V3AUX_IN and V15_IN) are used to lower the output
impedance of the power supply to be connected. An increase in the output impedance of the power supply may result in
destabilization of input voltages (VCC, V3_IN, V3AUX_IN and V15_IN). It is recommended to use a low ESR capacitor
with less temperature coefficient (change in capacitance vs. change in temperature), 0.1 µF more or less for VCC and
V3AUX_IN while 1 µF more or less for V3_IN and V15_IN, but it must be thoroughly checked at the temperature and with
the load of the range expected to use because it significantly depends on the characteristics of the input power supply to be
used and the conductor pattern of the pc board.
13. Capacitors to be applied to the output terminals
To the output terminals (V3, V3_AUX, and V15), the output capacitors should be connected between the respective output
terminal and GND. It is recommended to use a low ESR capacitor with less temperature coefficient, 1 µF more or less for
V3 and V15 terminals while 1µF more or less for V3_AUX, but it must be thoroughly checked at the temperature and with
the load of the range expected to use because it significantly depends on the temperature and the load conditions.
14. Not of a radiation-resistant design.
15. .Allowable loss Pd
With respect to the allowable loss, the thermal derating characteristics are shown in the Exhibit, which we hope would be
used as a good-rule-of-thumb. Should the IC be used in such a manner to exceed the allowable loss, reduction of
current capacity due to chip temperature rise, and other degraded properties inherent to the IC would result. You are
strongly urged to use the IC within the allowable loss.
16. In the event that load containing a large inductance component is connected to the output terminal, and generation of
back-EMF at the start-up and when output is turned OFF is assumed, it is requested to insert a protection diode.
OUTPUT PIN
17. Operating ranges
If it is within the operating ranges, certain circuit functions and operations are warranted in the working ambient
temperature range. With respect to characteristic values, it is unable to warrant standard values of electric
characteristics but there are no sudden variations in characteristic values within these ranges.
18. We are certain that examples of applied circuit diagrams are recommendable, but you are requested to thoroughly confirm
the characteristics before using the IC.In addition, when the IC is used with the external circuit changed, decide the IC with
sufficient margin provided while consideration is being given not only to static characteristics but also variations of external
parts and our IC including transient
19. Wiring to the input terminals (V3 IN, V3AUX IN, and V15 IN) and output terminals (V3, V3AUX and V15) of built-in FET
should be carried out with special care. Unnecessarily long and/or thin conductors used in wiring may result in
degradation of characteristics including decrease in output voltage.
20. Heat sink
Heat sink is connected to SUB, which should be short-circuited to GND. Solder the heat sink to a pc board properly,
which offers lower thermal resistance.
25/28
●POWER DISSIPATION
◎BD4153FV
[W] 1.4
Mounted on board
1.025W
70mm×70mm×1.6mm
Glass-epoxy PCB
θj-a=122.0℃/W
1.0
Without heat sink.
0.787W
0.8
θj-a=158.7℃/W
0.6
100℃
0.4
0.2
0
0
Power Dissipation (Pd)
Power Dissipation (Pd)
1.2
◎BD4153EFV
[W] 5
4
PCB①：θja=113.6℃/W
PCB②：θja=43.5℃/W
④4.0W
PCB③：θja=44.6℃/W
PCB④：θja=31.3℃/W
3
2
1
25 50 75 100 125 150
Ambient Temperature (Ta) [℃]
measure：TH-156（Kuwano-Denki）
measure condition：Rohm Standard Board
PCB size：70mm×70mm×1.6mmt
(PCB with Thermal Via)
③2.8W
②1.7W
PCB①：Single-layer substrate
（substrate surface copper foil area:0mm×0mm）
PCB②：Double-layer substrate
（substrate surface copper foil area:15mm×15mm）
PCB③：Double-layer substrate
（substrate surface copper foil area:70mm×70mm）
PCB④：Fourth-layer substrate
（substrate surface copper foil area:70mm×70mm）
①1.1W
0
25 50 75 100 125 150
Ambient Temperature (Ta) [℃]
●Ordering part number
B
D
4
1
5
3
Package Type
Part Number
・BD4153
V
2
7.8 ± 0.2
13
0.3Min.
7.6 ± 0.3
5.6 ± 0.2
24
1
Embossed carrier tape
2000pcs
Direction
of feed
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.15 ± 0.1
1234
1234
4 +6
−4
7.6 ± 0.2
5.6 ± 0.1
0.53 ± 0.15
1 ± 0.2
13
12
2000pcs
Direction
of feed
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
1234
1234
1234
1pin
1234
（Unit:mm)
1234
Reel
1234
0.08 M
1234
+0.05
−0.04
Embossed carrier tape
Quantity
1234
0.2
Tape
+0.05
0.17 −0.03
0.08 S
0.65
1234
1
1234
7.8 ± 0.1
24
Direction of feed
1pin
Reel
HTSSOP-B24
1234
1234
0.22 ± 0.1
1234
0.1
1234
0.65
12
Quantity
（Unit:mm)
1.0Max.
0.85 ± 0.05
0.08 ± 0.05
E
E2 : Embossed carrier tape
Tape
0.325
―
・FV : SSOP-B24
・EFV : HTSSOP-B24
SSOP-B24
1.15 ± 0.1
0.1
F
Direction of feed
※When you order , please order in times the amount of package quantity.
26/28
●POWER DISSIPATION
◎BD4154FV, BD4155FV
[mW] 1000
Mounted on board
70mm×70mm×1.6mmglass-epoxy PCB
θj-a=153.8℃/W
812.5mW
Power Dissipation (Pd)
800
600
Without heat sink
θj-a=250.0℃/W
500mW
400
100℃
200
0
0
25
50
75
125
100
150 [℃]
Ambient Temperature (Ta)
● Ordering part number
B
D
4
Type
1
5
4
―
V
E
2
E2:Embossed tape and reel, Pin 1 fed last
Package Type
BD4154
BD4155
F
FV : SSOP - B20
SSOP-B20
Embossed carrier tape
Tape
20
11
0.3Min.
1
10
0.15 ± 0.1
(With reel in left hand, unreeling with the right, the index pin
[1-pin] is at top left))
Direction of feed
※Please order by the number of reels desired.bb
27/28
1234
1234
1234
1pin
1234
1234
（Unit:mm)
Reel
1234
0.1
Direction
of feed
1234
0.65 0.22 ± 0.1
2500pcs
E2
1234
6.4 ± 0.3
1.15 ± 0.1
4.4 ± 0.2
0.1
6.5 ± 0.2
Quantity/Reel
●POWER DISSIPATION
◎BD4156MUV
Mounted on board
70mm×70mm×1.6mm
Glass-epoxy PCB
θj-a=178.6℃/W
Power Dissipation (Pd)
[W] 1.0
0.8
②0.70W
Without heat sink.
0.6
0.4
θj-a=367.6℃/W
①0.34W
0.2
0
25 50
75 100 125 150
[℃]
Ambient Temperature (Ta)
● Ordering part number
B
D
Type
BD4156
4
1
5
6
M
U
Package Type
―
V
E
2
E2:Embossed tape and reel, Pin 1 fed last
MUV : VQFN020V4040
VQFN020V4040
Embossed carrier tape
Tape
Quantity/Reel
2500pcs
Direction
of feed
E2
(With reel in left hand, unreeling with the right, the index pin
[1-pin] is at top left))
Direction of
1pin
Reel
※Please order by the number of reels desired.bb
1234
1234
1234
1234
1234
1234
（Unit:mm)
feed
Catalog No.06T259A '06.11 ROHM © 1000 TSU
28/28
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any
means without prior permission of ROHM CO.,LTD.
The contents described herein are subject to change without notice. The specifications for the
product described in this document are for reference only. Upon actual use, therefore, please request
that specifications to be separately delivered.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams information, described herein
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of
whatsoever nature in the event of any such infringement, or arising from or connected with or related
to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or
otherwise dispose of the same, no express or implied right or license to practice or commercially
exploit any intellectual property rights or other proprietary rights owned or controlled by
ROHM CO., LTD. is granted to any such buyer.
Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices
(such as audio visual equipment, office-automation equipment, communications devices, electrical
appliances and electronic toys).
Should you intend to use these products with equipment or devices which require an extremely high level
of reliability and the malfunction of which would directly endanger human life (such as medical
instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers
and other safety devices), please be sure to consult with our sales representative in advance.
It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance
of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow
for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in
order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM
cannot be held responsible for any damages arising from the use of the products under conditions out of the
range of the specifications or due to non-compliance with the NOTES specified in this catalog.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2008 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : webmaster@ rohm.co. jp
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
TEL : +81-75-311-2121
FAX : +81-75-315-0172
Appendix1-Rev2.0
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