BD4157MUV

Power Management Switch ICs for PCs and Digital Consumer Products Power Switch IC for ExpressCardTM BD4157MUV No.11029EAT26 ●Description TM BD4157MUV is a power management switch IC for the next generation PC card (ExpressCard ) developed by the PCMCIA. TM TM It conforms to the PCMCIA ExpressCard Standard, ExpressCard Compliance Checklist., and ExpressCardTM Implementation Guideline, and obtains Compliance ID “EC100395” from PCMCIA. The power switch offers a number of functions - card detector, and system status detector - which are ideally suited for laptop and desktop computers. ●Features TM 1) Incorporates three low on-resistance FETs for ExpressCard . 2) Incorporates an FET for output discharge. 3) Incorporates an enabler. 4) Incorporates under voltage lockout (UVLO) protection. 5) Employs an VQFN020V4040 package. 6) Built-in thermal shutdown protector (TSD). 7) Built-in thermal shutdown protector (TSD). 8) Incorporates an overcurrent protection (OCP). 9) Built-in enable signal for PLL 10) Built-in Pull up resistance for detecting ExpressCardTM TM 11) Conforms to the ExpressCard Standard. 12) Conforms to the ExpressCardTM Compliance Checklist. TM 13) Conforms to the ExpressCard Implementation Guideline. ●Applications TM Laptop and desktop computers, and other ExpressCard equipped digital devices. ●Product Lineup Parameter Package BD4157MUV VQFN020V4040 “ExpressCardTM” is a registered trademark registered of the PCMCIA (Personal Computer Memory Card International Association). www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/24 2011.06 - Rev.A BD4157MUV ●Absolute Maximum Ratings Parameter Input Voltage Logic Input Voltage 1 Logic Output Voltage 1 Logic Output Voltage 2 Output Voltage Output Current 1 Output Current 2 Output Current 3 Power Dissipation 1 Power Dissipation 2 Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Symbol V3AUX_IN, V3_IN, V15_IN EN,CPPE#,CPUSB#,SYSR, PERST_IN#,RCLKEN RCLKEN PERST# V3AUX,V3, V15 IOV3AUX IOV3 IOV15 Pd1 Pd2 Topr Tstg Tjmax Ratings -0.3～4.5 *1 -0.3～V3AUX_IN+0.3 *1 -0.3～V3AUX_IN+0.3 *1 -0.3～V3AUX_IN+0.3 -0.3～4.5 *1 1.0 2.0 2.0 0.34 *2 0.70 *3 -40～+100 -55～+150 +150 Technical Note Unit V V V V V A A A mW mW ℃ ℃ ℃ *1 Not to exceed Pd. *2 Reduced by 2.7mW for each increase in Ta of 1℃ over 25℃ *3 Reduced by 5.6mW for each increase in Ta of 1℃ over 25℃(When mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB）. ●Operating Conditions (Ta=25℃) Parameter Input Voltage 1 Input Voltage 2 Input Voltage 3 Logic Input Voltage 1 Logic Input Voltage 2 Logic Output Voltage 1 Logic Output Voltage 2 Output Current 1 Output Current 2 Output Current 3 Symbol V3AUX_IN V3_IN V15_IN EN CPPE#,CPUSB#,SYSR, PERST_IN#,RCLKEN RCLKEN PERST# IOV3AUX IOV3 IOV15 Ratings MIN 3.0 3.0 1.35 -0.3 0 0 0 0 0 0 MAX 3.6 3.6 1.65 3.6 V3AUX_IN V3AUX_IN V3AUX_IN 275 1.3 650 Unit V V V V V V V mA A mA ★ This product is not designed to offer protection against radioactive rays. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/24 2011.06 - Rev.A BD4157MUV Technical Note ●ELECTRICAL CHARACTERISTICS (Unless otherwise noted, Ta=25℃, V3AUX_IN =V3_IN=3.3V, V15_IN=1.5V VEN=OPEN,VSYSR=OPEN,CPPE#=0V,CPUSB#=OPEN,PERST_IN#=OPEN) Limits Parameter Symbol Unit Condition MIN TYP MAX Standby Current Bias Current 1 Bias Current 2 [Enable] High Level Enable Input Voltage Low Level Enable Input Voltage Enable Pin Input Current [Logic] High Level Logic Input Voltage Low Level Logic Input Voltage VLHI VLLOW ICPPE# ICPUSB# Logic Pin Input Current ISYSR IPRT_IN# IRCLKEN RCLKEN Low Voltage RCLKEN Leak Current [Switch V3AUX] On Resistance Discharge On Resistance [Switch V3] On Resistance Discharge On Resistance [Switch V15] On Resistance Discharge On Resistance [Over Current Protection] V3 Over Current V3AUX Over Current V15 Over Current OCPV3 OCPV3AUX OCPV15 1.3 0.275 0.65 A A A RV15 RV15Dis 50 30 90 150 mΩ Ω Tj=-10～100℃ RV3 RV3Dis 50 30 90 150 mΩ Ω Tj=-10～100℃ RV3AUX RV3AUX Dis 140 30 220 150 mΩ Ω Tj=-10～100℃ VRCLKEN IRCLKEN 2.0 10 10 10 10 10 0 0 0 0 0 0.1 0.8 1 30 1 30 1 30 1 30 1 30 0.3 1 V V µA µA µA µA µA µA µA µA µA µA V µA CPPE#=3.6V CPPE#=0V CPUSB#=3.6V CPUSB#=0V SYSR=3.6V SYSR=0V PERST_IN#=3.6V PERST_IN#=0V RCLKEN=3.6V RCLKEN=0V IRCLKEN=0.5mA VRCLKEN=3.6V VENHI VENLOW IEN 2.0 -0.2 10 3.6 0.8 30 V V µA VEN=0V IST Icc1 Icc2 40 100 250 80 250 500 µA µA µA VEN=0V (Include IEN, IRCLKEN) VSYSR=0V, CPPE#=OPEN www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/24 2011.06 - Rev.A BD4157MUV Technical Note Parameter [Under Voltage Lockout] V3_IN UVLO OFF Voltage V3_IN Hysteresis Voltage V3AUX_IN UVLO OFF Voltage V3AUX_IN Hysteresis Voltage V15_IN UVLO OFF Voltage V15_IN Hysteresis Voltage [POWER GOOD] V3 POWER GOOD Voltage V3AUX POWER GOOD Voltage V15 POWER GOOD Voltage PERST# LOW Voltage PERST# HIGH Voltage PERST# Delay Time PERST# assertion time [OUTPUT RISE TIME] V3_IN to V3 V3AUX_IN to V3AUX V15_IN to V15 Symbol Limits MIN TYP MAX Unit Condition VUVLOV3_IN ⊿VUVLOV3_IN VUVLOV3AUX_IN ⊿VUVLOV3AUX_IN 2.60 50 2.60 50 1.10 50 2.80 100 2.80 100 1.20 100 3.00 150 3.00 150 1.30 150 V mV V mV V mV sweep up sweep down sweep up sweep down sweep up sweep down VUVLOV15_IN ⊿VUVLOV15_IN PGV3 PGV3AUX PGV15 VPERST#Low VPERST#HIGH TPERST# Tast 2.700 2.700 1.200 3.0 4 - 2.850 2.850 1.275 0.01 - 3.000 3.000 1.350 0.1 20 500 V V V V V ms ns IPERST=0.5mA TV3 TV3AUX TV15 0.1 0.1 0.1 - 3 3 3 ms ms ms www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/24 2011.06 - Rev.A BD4157MUV ●Reference data Technical Note CPPE#(2V/div) V3(2V/div) CPPE#(2V/div) SYSR(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) RV3=3.3Ω RV3AUX=13.2Ω RV15=3Ω V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) V15(1V/div) 5.0ms/div 5.0ms/div V15(1V/div) 5.0ms/div Fig.1 Card Assert/ De-assert (Active) Fig.2 Card Assert/De-assert (Standby) Fig.3 System Active ⇔Standby( Card Present) SYSR(2V/div) CPPE#(2V/div) CPUSB#(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) 5.0ms/div V15(1V/div) V15(1V/div) 500µs/div 500µs/div Fig.4 System Active ⇔Standby(No Card) Fig.5 Wakeup Wave Form (Card Assert) Fig.6 Wakeup Wave Form (USB2.0 Assert) EN(2V/div) V3(2V/div) SYSR(2V/div) CPPE#(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) V15(1V/div) 500µs/div V15(1V/div) 500µs/div 500µs/div Fig.7 Wakeup Wave Form (Shut Down→Active) Fig.8 Wakeup Wave Form (Standby→Active) Fig.9 Power Down Wave Form (Card De-assert) CPUSB#(2V/div) EN(2V/div) SYSR(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) 500µs/div V15(1V/div) 500µs/div V15(1V/div) 5.0ms/div Fig.10 Power Down Wave Form (USB2.0 De-assert) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Fig.11 Power Down Wave Form (Active→Shut Down) Fig.12 Power Down Wave Form (Active→Standby) 5/24 2011.06 - Rev.A BD4157MUV Technical Note CPPE#(2V/div) CPPE#(2V/div) CPPE#(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) PERST#(2V/div) 5.0ms/div RCLKEN(2V/div) 5.0ms/div PERST#(2V/div) 5.0ms/div Fig.13 PERST# Wave Form (Card Assert/ De-assert) Fig.14 RCLKEN Wave Form (Card Assert/ De-assert) Fig.15 PERST# Wave Form (USB2.0 Assert/ De-assert) CPUSB#(2V/div) PERST_IN#(2V/div) PERST_IN#(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) RCLKEN(2V/div) 5.0ms/div PERST#(2V/div) 1.0ms/div RCLKEN(2V/div) 1.0ms/div Fig.16 RCLKEN Wave Form (USB2.0 Assert/ De-assert) Fig.17 PERST# Wave Form (PERST_IN# Input) Fig.18 RCLKEN Wave Form (PERST_IN# Input) V3_IN(2V/div) V3AUX_IN(2V/div) V15_IN(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) V15(1V/div) V15(1V/div) 500µs/div 500µs/div 500µs/div Fig.19 Output Voltage (V3_IN:OFF→ON) Fig.20 Output Voltage (V3AUX_IN:OFF→ON) Fig.21 Output Voltage (V15_IN:OFF→ON) V3_IN(2V/div) V3AUX_IN(2V/div) V15_IN(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) RV3=3.3Ω RV3AUX=13.2Ω RV15=3Ω V3AUX(2V/div) RV3=3.3Ω RV3AUX=13.2Ω RV15=3Ω V15(1V/div) 500µs/div V15(1V/div) 500µs/div RV3=3.3Ω V15(1V/div) RV3AUX=13.2Ω RV15=3Ω 500µs/div Fig.22 Output Voltage (V3_IN:ON→OFF) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Fig.23 Output Voltage (V3AUX_IN:ON→OFF) Fig.24 Output Voltage (V15_IN:ON→OFF) 6/24 2011.06 - Rev.A BD4157MUV ●Block Diagram Technical Note V3_IN1 V3-1 3.3V/1.30A 2 3.3V V3_IN2 VD 3 5 V3-2 4 TSD,CL,UVLO V3AUX_IN 3.3V /275mA 17 3.3V VD 15 V3AUX TSD,CL,UVLO_AUX V15_IN1 V15-1 1.5V/650mA 12 V15_IN2 1.5V CPPE# CPUSB# SYSR V3AUX_IN VD V3AUX_IN 11 13 V15-2 14 10 9 1 Input logic TSD,CL,UVLO Power good 18 RCLKEN EN,SYSR,CPUSB#,CPPE# TSD 8 6 PERST# V3AUX_IN Thermal protection PERST_IN# V3_IN,V3AUX_IN,V15_IN V3,V3AUX,V15 V3_IN CL EN 20 Reference Block 19 Under voltage UVLO N.C. V3AUX_IN Charge Pump VD V15_IN lock out UVLO_AUX 16 TEST 7 GND ●Physical Dimensions 4.0±0.1 4.0±0.1 D4157 ●Pin Function PIN No PIN NAME 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SYSR V3_IN1 V3-1 V3_IN2 V3-2 PERST_IN# GND PERST# CPUSB# CPPE# V15-1 V15_IN1 V15-2 V15_IN2 V3AUX TEST V3AUX_IN RCLKEN N.C. EN PIN FUNCTION Logic input pin V3 input pin V3 output pin V3 input pin V3 output pin PERST# control input pin (SysReset#) GND pin Logic output pin Logic input pin Logic input pin V15 output pin V15 input pin V15 output pin V15 input pin V3AUX output pin Test pin. Must be open or GND. V3AUX input pin 1 Reference clock enable signal/ Power good signal (No delay） Must be open or GND. Enable input pin 1.0Max. Lot No. S 0.08 S C0.2 2.1±0.1 1 5 0.4±0.1 16 15 11 10 1.0 0.5 0.25 +0.05 -0.04 VQFN020V4040 Package (Unit:mm) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2.1±0.1 20 6 0.02 +0.03 -0.02 (0.22) 7/24 2011.06 - Rev.A BD4157MUV Technical Note ●Description of block operation EN With an input of 2.0 volts or higher, this terminal goes HIGH to activate the circuit, and goes LOW to deactivate the circuit (with the standby circuit current of 40 μA), It discharges each output and lowers output voltage when the input falls to 0.8 volts or less. V3_IN, V15_IN, and V3AUX_IN These are the input terminals for each channel of a 3ch switch. V3_IN and V15_IN terminals have two pins each, which should be short-circuited on the pc board with a thick conductor. A large current runs through these three terminals : (V3_IN: 1.3A; V3AUX_IN: 0.275 A; and V15_IN: 0.65 A). In order to lower the output impedance of the connected power supply, it is recommended that ceramic capacitors (with B-type characteristics or better) be provided between these terminals and the ground. Specifically, the capacitors should be on the order of 1 μF between V3_IN and GND, and between V15_IN and GND; and on the order of 0.1 μF between V3AUX_IN and GND. V3, V15, and V3AUX These are the output terminals for each switch. The V3 and V15 terminals have two pins each, which should be short-circuited on the PC board and connected to an ExpressCard connector with a thick conductor, as short as possible. In order to stabilize the output, it is recommended that ceramic capacitors (with B-type characteristics or better) be provided between these terminals and the ground. Specifically, the capacitors should be on the order of 10 μF between V3 and GND, and between V15 and GND; and on the order of 1 μF between V3AUX and GND. CPPE# This pin is used to find whether or not a PCI-Express signal compatible card is present. Turns to “High” level with an input of 2.0 volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that a card is provided. Controls the ON/OFF, switch selecting the proper mode based on the status of the system. Pull up resistance (100kΩ～200kΩ) is built into, so the number of components is reduced. CPUSB# This pin is used to find whether or not a USB2.0 signal compatible card is present. Turns to “High” level with an input of 2.0 volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that a card is provided. Controls the ON/OFF switch, selecting the proper mode based on the system status. Pull up resistance (100kΩ～200kΩ) is built into, so the number of components is reduced. SYSR This pin is used to detect the system status. Turns to “High” level with an input of 2.0 volts or higher, which means that the system is activated, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that the system is on standby. PERST_IN# This pin is used to control the reset signal (PERST#) to a card from the system side. (Also referred to as “SysReset#” by PCMCIA.) Turns to “High” level with an input of 2.0 volts or higher, and sets PERST# to “High” AND with a “Power Good” output. Turns to “Low” level and sets PERST# to “Low” when the input falls to 0.8 volts or less. PERST# This pin is used to send a reset signal to a PCI-Express compatible card. Reset status is determined by the outputs, PERST_IN#, CPPE# system status, and EN on/off status. Turns to “High” level and activates the PCI-Express compatible card only if each output is within the “Power Good” threshold, with the card inserted and PERST_IN# turned to “High” level. RCLKEN This pin is used to send an enable signal to the reference clock. Activation status is determined by the outputs, CPPE# system status, and EN on/off status. Turns to “High” level and activates the reference clock PLL only if each output is within the “Power Good” threshold, with the card kept inserted. TEST This pin is used to test, which should be short-circuited to the GND. (V3_IN, V15_IN) turns OFF. When it is short-circuited to V3AUX_IN, UVLO www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/24 2011.06 - Rev.A BD4157MUV ●Timing Chart Power ON/OFF Status of ExpressCard System Status Primary OFF ON Auxiliary OFF ON ExpressCardTM Module Status Don’t care De-asserted Asserted De-asserted ON ON Asserted Before This Asserted After This TM Technical Note Power Switch Status Primary (+3.3V and +1.5V) OFF OFF ON OFF OFF OFF Auxiliary (3.3V Aux) OFF OFF ON OFF ON OFF ExpressCard SYSR=H⇔L CP#=H TM States Transition Diagram SYSR=L CP#=L→H SYSR=L CP#=H⇔L V3AUX=OFF V15=V3=OFF SYSR=H CP#=H→L SYSR=L→H CP#=L V3AUX=ON V15=V3=ON SYSR=H CP#=L→H SYSR=H→L CP#=L SYSR=H→L CP#=L V3AUX=ON V15=V3=OFF SYSR=L→H CP#=L SYSR=L ⇔ CP#=L SYSR=H CP#=H System Status Stand-by Status ON Status From ON to Stand-by Status From Stand-by to ON Status :SYSR=L :SYSR=H :SYSR=H→L :SYSR=L→H Card Asserted Status Card Status :CP#=L :CP#=H :CP#=H→L :CP#=L→H Card De-asserted Status From De-asserted to Asserted Status From Asserted to De-asserted Status www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/24 2011.06 - Rev.A BD4157MUV ●ExpressCardTM Timing Diagrams Technical Note Host Power (V3AUX_IN,V3_IN, V15_IN) PERST_IN# a CPPE# Card Power (V3AUX,V3,V15) RCLKEN b PERST# REFCLK g c e f d Tpd a b c d e f g Min Max Units System Dependent 100 µs System Dependent System Dependent 100 4 20 10 µs ms ms Timing Signals-Card Present Before Host Power is On Host Power (V3AUX_IN,V3_IN, V15_IN) PERST_IN# a CPUSB# Card Power (V3AUX,V3,V15) RCLKEN PERST# REFCLK (Either Tri-Stated or Off) Tpd a b Min Max Units System Dependent 10 ms b Timing Signals-USB Present Before Host Power is On www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/24 2011.06 - Rev.A BD4157MUV Technical Note Host Power (V3AUX_IN,V3_IN, V15_IN) PERST_IN# CPPE# Card Power (V3AUX,V3,V15) RCLKEN a PERST# REFCLK b c e d Tpd a b c d e Min - Max 100 10 Units µs ms System Dependent System Dependent 4 10 ms Timing Signals Host Power is On Prior to Card Insertion Host Power (V3AUX_IN,V3_IN, V15_IN) PERST_IN# CPUSB# Card Power (V3AUX,V3,V15) RCLKEN PERST# REFCLK (Either Tri-Stated or Off) Tpd a a Min - Max 10 Units ms Timing Signals Host Power is On Prior to USB Insertion www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 11/24 2011.06 - Rev.A BD4157MUV ●Application Information (continued) Host Power (V3AUX_IN) Technical Note Host Power (V3_IN,V15_IN,SYSR) PERST_IN# CPPE# Card Power (V3AUX,V3,V15) RCLKEN PERST# REFCLK (Either Tri-Stated or Off) Timing Signals-Host System In Standby Prior to Card Insertion Host Power (V3AUX_IN) Host Power (V3_IN,V15_IN,SYSR) PERST_IN# CPUSB# Card Power (V3AUX,V3,V15) RCLKEN PERST# REFCLK (Either Tri-Stated or Off) Timing Signals-Host System In Standby Prior to USB Insertion www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 12/24 2011.06 - Rev.A BD4157MUV Technical Note Host Power (V3AUX_IN, V3_IN,V15_IN) c PERST_IN CPPE# Card Power (V3AUX,V3,V15) d RCLKEN a PERST# REFCLK b e Tpd a b c d e Min - Max 2 Units µs System Dependent System Dependent Load Dependent 2 µs Timing Signals Host Controlled Power Down Host Power (V3AUX_IN, V3_IN,V15_IN) a PERST_IN CPUSB# Card Power (V3AUX,V3,V15) b RCLKEN PERST# REFCLK (Either Tri-Stated or Off) Timing Signals Host Controlled Power Down Tpd a b Min Max Units System Dependent Load Dependent www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 13/24 2011.06 - Rev.A BD4157MUV ●Application Information (continued) Host Power (V3AUX_IN,V3_IN, V15_IN) e EN CPPE# Card Power (V3AUX,V3,V15) f Technical Note Tpd a b c a d Min Max Units Load Dependent System Dependent 500 2 ns µs RCLKEN PERST# b REFCLK d e f c System Dependent System Dependent Timing Signals Controlled Power Down When EN Asserted Host Power (V3AUX_IN,V3_IN, V15_IN) b EN CPUSB# Card Power (V3AUX,V3,V15) c a RCLKEN PERST# REFCLK (Either Tri-Stated or Off) Tpd a b c Min Max Units Load Dependent System Dependent System Dependent Timing Signals Controlled Power Down When EN Asserted www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 14/24 2011.06 - Rev.A BD4157MUV Technical Note Host Power (V3AUX_IN,V3_IN, V15_IN) RERST_IN# CPPE# Card Power (V3AUX,V3,V15) a RCLKEN PERST# d Tpd a b Min Max Units b Load Dependent 500 ns REFCLK c c d System Dependent 2 µs Timing Signals-Surprise Card Removal Host Power (V3AUX_IN,V3_IN, V15_IN) RERST_IN# CPUSB# Card Power (V3AUX,V3,V15) a RCLKEN PERST# REFCLK (Either Tri-Stated or Off) Tpd a Min Max Units Load Dependent Timing Signals-Surprise USB Removal www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 15/24 2011.06 - Rev.A BD4157MUV Technical Note Host Power (V3AUX_IN,V3_IN, V15_IN) SYSR CPPE# Card Power (V3AUX) Card Power (V3,V15) b PERST# d REFCLK e c a Tpd b Min Max Units a b c d e System Dependent 4 20 2 ms µs System Dependent System Dependent RCLKEN=OPEN, PERST_IN=3.3V,EN=3.3V Timing Signals Power state transitions (Signal applies for SYSR) Host Power (V3AUX_IN,V3_IN, V15_IN) SYSR CPUSB# Card Power (V3AUX) Card Power (V3,V15) PERST# a Tpd a Min Max Units System Dependent REFCLK (Either Tri-Stated or Off) RCLKEN=OPEN, PERST_IN=3.3V,EN=3.3V Timing Signals Power state transitions (Signal applies for SYSR) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 16/24 2011.06 - Rev.A BD4157MUV Technical Note V3AUX_IN EN V3_IN,SYSR V15_IN PERST_IN# CPPE# Card Power (V3AUX) a Card Power (V3,V15) b PERST# d REFCLK e c b Tpd a b c d e Min Max Units System Dependent 4 20 2 ms µs System Dependent System Dependent RCLKEN=OPEN, PERST_IN# is asserted in advance of power changes. Timing Signals – Power state transitions (SYSR and EN are connected to V3_IN/V3AUX_IN.) V3AUX_IN EN V3_IN,SYSR V15_IN PERST_IN# CPUSB# Card Power (V3AUX) Card Power (V3,V15) PERST# a Tpd REFCLK (Either Tri-Stated or Off) Min Max Units a System Dependent RCLKEN=OPEN, PERST_IN# is asserted in advance of power changes. Timing Signals – Power state transitions (SYSR and EN are connected to V3_IN/V3AUX_IN.) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 17/24 2011.06 - Rev.A BD4157MUV ●Output Condition List(Output） Power Supply State V3AUX_IN V3_IN OFF Shut down ON ↓ Stand-by Stand-by 0 1 × × Technical Note Logic input V15_IN × × EN × 0 SYSR × × CPPE# × × 1 CPUSB# × × 1 0 × × 1 0 × Output V3/V15 OFF OFF OFF OFF OFF OFF OFF ON ON V3AUX OFF OFF OFF ON ON OFF OFF ON ON 1 × × 1 1→0 × 0 1 × × 1 0 × 1 ON 1 1 1 1 1 × 0 State OFF Shut down Stand-by ON(No Card) Logic input PERST_IN# × × × × 0 RCLKEN(Input) × × × × Hiz 0 Hiz 0 Hiz 0 Hiz 0 PERST# 0 0 0 0 0 0 0 0 0 0 1 0 Logic output RCLKEN 0 0 0 0 0 0 0 0 1 0 1 0 ON(CPUSB#=0) 0 1 1 0 0 1 1 ON(CPPE#=0) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 18/24 2011.06 - Rev.A BD4157MUV ●Application Circuit (Circuit for ExpressCardTM Compliance Checklist) Technical Note CPPE# CPPE#(10pin) RCLKEN(18pin) RCLKEN CPUSB# CPUSB#(9pin) V3_IN(2,4pin) 3.3V 3.3V V3(3,5pin) V3AUX_IN(17pin) 3.3V BD4157MUV 3.3V V3AUX(15pin) V15_IN(12,14pin) 1.5V 1.5V V15(11,13pin) PERST_IN#(6pin) SysReset# PERST# PERST#(8pin) TEST(16pin) EN(20pin) SYSR(1pin) GND(7pin) ●Heat loss Thermal design should allow the device to operate within the following conditions. Note that the temperatures listed are the allowed temperature limits. Thermal design should allow sufficient margin from these limits. 1. Ambient temperature Ta can be no higher than 100℃. 2. Chip junction temperature Tj can be no higher more than 150℃. Chip junction temperature Tj can be determined as follows: Chip junction temperature Tj is calculated from ambient temperature Ta: Tj=Ta+θj-a×W ＜Reference value＞ θj-c:VQFN020V4040 367.6℃/W IC only 2 178.6℃/W 1-layer (copper foil density 10.29mm ) 56.6℃/W 4-layer (copper foil density 10.29mm2/ 2,3-layer copper foil density 5505mm2 ) 35.1℃/W 4-layer (copper foil density 5505mm2) Substrate size 74.2×74.2×1.6mm3 (thermal vias in the board.) Most of heat loss in the BD4157MUV occurs at the output switch. on-resistance by the square of output current of each switch. The power lost is determined by multiplying the www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 19/24 2011.06 - Rev.A BD4157MUV ●Equivalent Circuit 1pin V3AUX_IN V3AUX_IN Technical Note 2,4pin 3,5pin V3_IN V3 6pin V3AUX_IN V3AUX_IN 8pin V3AUX_IN 9pin V3AUX_IN V3AUX_IN 10pin V3AUX_IN V3AUX_IN 11,13pin 12,14pin V3_IN V15 15pin V3AUX_IN 16pin 17pin V3AUX 18pin V3AUX_IN 20pin V3AUX_IN V3AUX_IN www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 20/24 2011.06 - Rev.A BD4157MUV Technical Note ●Notes for use 1. Absolute maximum ratings Although quality is rigorously controlled, the device may be destroyed when applied voltage, operating temperature, etc. exceeds its absolute maximum rating. Because the source (short mode or open mode) cannot be identified once the IC is destroyed, it is important to take physical safety measures such as fusing when implementing any special mode that operates in excess of absolute rating limits. 2. 3. Thermal design Consider allowable loss (Pd) under actual operating conditions and provide sufficient margin in the thermal design. Terminal-to-terminal short-circuit and mis-mounting When the mounting the IC to a printed circuit board, take utmost care to assure the position and orientation of the IC are correct. In the event that the IC is mounted erroneously, it may be destroyed. The IC may also be destroyed when a short-circuit is caused by foreign matter introduced into the clearance between outputs, or between an output and power-GND. Operation in strong electromagnetic fields Using the IC in strong electromagnetic fields may cause malfunctions. Exercise caution in respect to electromagnetic fields. Built-in thermal shutdown protection circuit This IC incorporates a thermal shutdown protection circuit (TSD circuit). The working temperature is 175℃ (standard value) with a -15℃ (standard value) hysteresis width. When the IC chip temperature rises the TSD circuit is activated, while the output terminal is brought to the OFF state. The built-in TSD circuit is intended exclusively to shut down the IC in a thermal runaway event, and is not intended to protect the IC or guarantee performance in these conditions. Therefore, do not operate the IC after with the expectation of continued use or subsequent operation once this circuit is activated. Capacitor across output and GND When a large capacitor is connected across the output and GND, and the V3AUX_IN is short-circuited with 0V or GND for any reason, current charged in the capacitor flows into the output and may destroy the IC. Therefore, use a capacitor smaller than 1000 μF between the output and GND. Set substrate inspection Connecting a low-impedance capacitor to a pin when running an inspection with a set substrate may produce stress on the IC. Therefore, be certain to discharge electricity at each process of the operation. To prevent electrostatic accumulation and discharge in the assembly process, thoroughly ground yourself and any equipment that could sustain ESD damage, and continue observing ESD-prevention procedures in all handling, transfer and storage operations. Before attempting to connect the set substrate to the test setup, make certain that the power supply is OFF. Likewise, be sure the power supply is OFF before removing the substrate from the test setup. IC terminal input + This integrated circuit is a monolithic IC, with P substrate and P isolation between elements. The P layer and N layer of each element form a, PN junction. When the potential relation is GND>terminal A>terminal B, the PN junction works as a diode, and when terminal B>GND terminal A, the PN junction operates as a parasitic transistor. Parasitic elements inevitably form, due to the nature of the IC construction. The operation of the parasitic element gives rise to mutual interference between circuits and results in malfunction, and eventually, breakdown. Consequently, take utmost care not to use the IC in a way that would cause the parasitic element to actively operate, such as applying voltage lower than GND (P substrate) to the input terminal. Resistor Pin A Pin A P + 4. 5. 6. 7. 8. Transistor (NPN) Pin B C B E B P P + Pin B N P P + N N P+ N N C E N P substrate Parasitic element GND Parasitic element Parasitic element P substrate GND GND GND Parasitic element Other adjacent elements 9. GND wiring pattern If both a small signal GND and a high current GND are present, it is recommended that the patterns for the high current GND and the small signal GND be separated. Proper grounding to the reference point of the set should also be provided. In this way, the small signal GND voltage will by unaffected by the change in voltage stemming from the pattern wiring resistance and the high current. Also, pay special attention to avoid undesirable wiring pattern fluctuations in any externally connected GND component. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 21/24 2011.06 - Rev.A BD4157MUV 10. Technical Note Electrical characteristics The electrical characteristics in the Specifications may vary, depending on ambient temperature, power supply voltage, circuit(s) externally applied, and/or other conditions. Therefore, please check all such factors, including transient characteristics, that could affect the electrical characteristics. Capacitors applied to input terminals The capacitors applied to the input terminals (V3_IN, V3AUX_IN and V15_IN) are used to lower the output impedance of the connected power supply. An increase in the output impedance of the power supply may result in destabilization of input voltages (V3_IN, V3AUX_IN and V15_IN). It is recommended that a low-ESR capacitor be used, with a lower temperature coefficient (change in capacitance vs. change in temperature), Recommended capacitors are on the order of 0.1 μF for V3AUX_IN, and1 μF for V3_IN and V15_IN. However, they must be thoroughly checked at the temperature and with the load range expected in actual use, because capacitor selection depends to a significant degree on the characteristics of the input power supply to be used and the conductor pattern of the PC board. Capacitors applied to output terminals Capacitors for the output terminals (V3, V3_AUX, and V15), should be connected between each of the output terminals and GND. A low-ESR, low temperature coefficient output capacitor is recommended-on the order of 1 μF for V3 and V15 terminals, and 1μF less for V3_AUX. However, they must be thoroughly checked at the temperature and with the load range expected in actual use, because capacitor selection depends to a significant degree on the temperature and the load conditions. Not of a radiation-resistant design. Allowable loss (Pd) With respect to the allowable loss, please refer to the thermal derating characteristics shown in the Exhibit, which serves as a rule of thumb. When the system design causes the IC to operate in excess of the allowable loss, chip temperature will rise, reducing the current capacity and decreasing other basic IC functionality. Therefore, design should always enable IC operation within the allowable loss only. Operating range Basic circuit functions and operations are warranted within the specified operating range the working ambient temperature range. Although reference values for electrical characteristics are not warranted, no rapid or extraordinary changes in these characteristics are expected, provided operation is within the normal operating and temperature range. The applied circuit example diagrams presented here are recommended configurations. However, actual design depends on IC characteristics, which should be confirmed before operation. Also, note that modifying external circuits may impact static, noise and other IC characteristics, including transient characteristics. Be sure to allow sufficient margin in the design to accommodate these factors. Wiring to the input terminals (V3 IN, V3AUX IN, and V15 IN) and output terminals (V3, V3AUX and V15) of the built-in FET should be carried out with special care. Using unnecessarily long and/or thin conductors may decrease output voltage and degrade other characteristics. Heatsink The heatsink is connected to the SUB, which should be short-circuited to the GND. Proper heatsink soldering to the PC board should enable lower thermal resistance. 11. 12. 13. 14. 15. 16. 17. 18. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 22/24 2011.06 - Rev.A BD4157MUV ●Power Dissipation ◎BD4157MUV 4.0 Technical Note ①3.56W 3.5 3.0 Power Dissipation : Pd （W) 2.5 2.0 1.5 ②2.21W ①4-layer (copper foil density 5505mm2) θj-a=35.1℃/W ② 4-layer (copper foil density 10.29mm2) (2,3-layer copper foil density 5505mm2) θj-a=56.6℃/W ③ 1-layer (copper foil density 10.29mm2) θj-a=178.6℃/W ④IC only θj-a=367.6℃/W 1.0 0.5 0.0 0 ③0.70W ④0.34W 25 50 75 100 105 125 150 Ambient Temperature: Ta(℃) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 23/24 2011.06 - Rev.A BD4157MUV ●Ordering part number Technical Note B D 4 Part No. 5 1 7 M U V - E 2 Part No. Package MUV:VQFN020V4040 Packaging and forming specification E2: Embossed tape and reel VQFN020V4040 4.0±0.1 Tape 4.0±0.1 Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold Quantity Direction of feed 1PIN MARK 1.0MAX S ( reel on the left hand and you pull out the tape on the right hand ) 0.08 S 2.1±0.1 0.5 1 20 16 15 11 5 6 10 C0.2 0.4±0.1 1.0 +0.05 0.25 -0.04 2.1±0.1 +0.03 0.02 -0.02 (0.22) 1pin (Unit : mm) Direction of feed Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 24/24 2011.06 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. R1120A