Datasheet
LDO Regulators with Voltage Detector
200mA / 300mA Output LDO Regulator
with 2ch RESET
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
General Description
Key Specifications
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C are a
low quiescent voltage regulator with 45V absolute
maximum voltage allowing usage in battery
direct-connected systems. IC integrates Power on and
under-voltage reset and Input voltage reset for VCC or
other voltages. Quiescent current is minimized to
optimize the system current consumption. Offers
selection of the output current between 200 mA or 300
mA depending on the application.
Power on and under-voltage reset and Input voltage
reset threshold voltage can be adjusted by external
resistance. Power on and under-voltage reset delay time
can programmed set by external capacitor.
◼
◼
◼
◼
◼
◼
◼
◼
Features
Qualified for Automotive Applications
Input voltage range:
-0.3 to +45 V
Low quiescent current:
70 μA (Typ)
Output load (BD4269FJ-C):
200 mA
(BD4269EFJ-C)
300 mA
(BD4269UEFJ-C)
300 mA
Output voltage:
5.0 V ±2 %
Power on and under-voltage reset detect voltage:
4.62 V ±2.6 %
(Adjusting detect voltage accuracy:±3 %)
Over Current Protection (OCP)
Thermal Shut Down (TSD)
Packages
AEC-Q100 Qualifies (Note 1)
Low ESR ceramic capacitors applicable for output.
Low drop voltage: PDMOS output transistor
Power on and under-voltage reset
Sense input comparator for VCC or other voltage
Adjustable power on and under-voltage reset and
Sense input comparator by external resistance
◼ Programmable reset delay time by external capacitor.
◼
◼
◼
◼
◼
◼
◼
FJ: SOP-J8
W (Typ) x D (Typ) x H (Max)
4.90 mm x 6.00 mm x 1.65 mm
◼
EFJ：HTSOP-J8
4.90 mm x 6.00 mm x 1.00 mm
(Note 1: Grade 1)
Applications
◼ Onboard vehicle device (body-control, car stereos,
satellite navigation system, etc.)
Typical Application Circuits
◼ VCC and VO pin capacitors: 0.1 μF ≤ CIN (Typ), 6 μF ≤ CO (Min)
Please refer to the "Selection of Components Externally Connected".
< Using SI and RADJ >
VIN
< Not Using SI and RADJ >
SO
VCC
RO
SI
CIN
CT
VO
GND
Sen se Ou tput
Reset Output
VIN
5V Output
RADJ
○Product structure：Silicon monolithic integrated circuit
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TSZ22111・14・001
SO
VCC
RO
SI
CIN
CO
CT
VO
GND
RADJ
Sen se Ou tput
Reset Output
5V Output
CO
○This product is not designed for protection against radioactive rays
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Pin Configurations
SOP-J8
(TOP VIEW)
HTSOP-J8
(TOP VIEW)
8
7
6
5
8
7
6
5
1
2
3
4
1
2
3
4
Pin Description
Pin No.
Symbol
1
VCC
2
SI
3
RADJ
4
CT
5
GND
6
RO
7
SO
8
VO
Function
Supply voltage input
Sense input ; if not needed, connect to VO.
Power on and under-voltage reset Threshold adjust ; if not needed, connect to GND.
Power on and under-voltage reset
Delay; connect capacitor to GND for setting delay time.
Ground
Power on and under-voltage reset output ; the open-collector output is internally linked
to VO via a 24 kΩ pull-up resistor. Keep open, if not needed.
Input voltage reset output ; the open-collector output is internally linked
to VO via a 24 kΩ pull-up resistor. Keep open, if not needed.
5 V Output
Block Diagram
VO
VCC
VO
Error
Amplifier
PREREG
OCP
Reference
TSD
RO
CT
Reference
UVLO
RADJ
SO
SI
GND
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Description of Blocks
Block Name
Function
PREREG
Internal Power Supply
Reference
Reference Voltage
Error Amplifier
Error Amplifier
TSD
Thermal Shutdown Protection
OCP
Over Current Protection
The OCP protect the device from damage caused by over
current.
UVLO
Under Voltage Lock Out
The UVLO prevents malfunction of the reset block in case of
very low output voltage.
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Description of Blocks
Power Supply for Internal Circuit
The Reference generates the Reference Voltage
The Error Amplifier amplifies the difference between the
feedback voltage of the output voltage and the reference
voltage
The TSD protect the device from overheating.
If the chip temperature (Tj) reaches ca. 175 °C (Typ),
the output is turned off.
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Absolute Maximum Ratings
Parameter
Symbol
Ratings
Unit
VCC
-0.3 to + 45.0
V
VRADJ
-0.3 to +7.0 (≤ VO +0.3)
V
RO Input Voltage
RO
-0.3 to +7.0 (≤ VO +0.3)
V
VO Input Voltage
VO
-0.3 to +7.0 (≤ VO +0.3)
V
SO Input Voltage
SO
-0.3 to +7.0 (≤ VO +0.3)
V
SI Input Voltage
VSI
-0.3 to +45.0 (≤ VCC +0.3)
V
0.80
W
0.96
W
VCC Input Voltage
(Note 1)
RADJ Input Voltage
Power Dissipation
(SOP-J8)
(Note 2)
(HTSOP-J8)
(Note 3)
Pd
Junction Temperature Range
Tj
-40 to + 150
°C
Storage Temperature Range
Tstg
-55 to + 150
°C
(Note 1)
Not to exceed Pd.
(Note 2)
Reduced by 6.45 mW / °C over Ta = 25 °C, when mounted on glass epoxy board: 114.3 mm x 76.2 mm x 1.6 mm.
(Note 3)
Reduced by 7.69 mW / °C over Ta = 25 °C, when mounted on glass epoxy board: 114.3 mm x 76.2 mm x 1.6 mm.
Caution:
Exceeding the absolute maximum rating for supply voltage, operating temperature or other parameters can result in damages to or destruction
of the chip. In this event it also becomes impossible to determine the cause of the damage (e.g. short circuit, open circuit, etc.). Therefore, if any
special mode is being considered with values expected to exceed the absolute maximum ratings, implementing physical safety measures, such
as adding fuses, should be considered.
Recommended Operating Conditions (-40 °C ≤ Tj ≤ +150 °C)
Parameter
Symbol
Min
Max
Unit
VCC
5.5
45.0
V
VCC
6.0
45.0
V
Start Up Voltage
VCC
3.0
-
V
VO Operating Voltage for RO
VOPR
1.0
-
V
VO Operating Voltage for SO
VOPS
3.5
-
V
VRTADJ
3.5
4.5
V
VSI
0
VCC
V
VRADJ
0
VO
V
0
200
mA
0
300
mA
-40
+125
°C
Supply Voltage
(IO ≤ 100mA)
(Note 1)
Supply Voltage
(IO ≤ 200mA)
(Note 1)
Power on and Under-Voltage Reset
Switching Threshold Adjustable Range
SI Input Voltage
RADJ Input Voltage
Output Current
(SOP-J8)
(HTSOP-J8)
Operating Temperature Range
(Note 1)
IO
Ta
Not to exceed Pd.
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Thermal Characteristics (Note 1)
Parameter
Symbol
Typ.
Unit
Conditions
155
°C / W
1s
(Note 2)
87
°C / W
2s2p
(Note 3)
15
°C / W
1s
(Note 2)
13
°C / W
2s2p
(Note 3)
130
°C / W
1s
(Note 2)
34
°C / W
2s2p
(Note 3)
15
°C / W
1s
(Note 2)
7
°C / W
2s2p
(Note 3)
SOP-J8
Junction to Ambient
θJA
Junction to Top Center of Case (Note 4)
ΨJT
HTSOP-J8
Junction to Ambient
θJA
Junction to Top Center of Case (Note 4)
ΨJT
(Note 1)
(Note 2)
(Note 3)
(Note 4)
The thermal impedance is based on JESD51 - 2A (Still - Air) standard.
JESD51 - 3 standard FR4 114.3 mm x 76.2 mm x 1.57 mm 1 - layer (1s)
(Top copper foil: ROHM recommended footprint + wiring to measure, 2 oz. copper.)
JESD51 - 5 / - 7 standard FR4 114.3 mm x 76.2 mm x 1.60 mm 4 - layer (2s2p)
(Top copper foil: ROHM recommended footprint + wiring to measure /
2 inner layers and copper foil area on the reverse side of PCB: 74.2 mm x 74.2 mm,
copper (top & reverse side / inner layers) 2oz. / 1oz.)
TT : Top center of case’s (mold) temperature
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Electrical Characteristics
(Unless otherwise specified, Tj = -40 °C to +150 °C, VCC = 13.5 V)
Limits
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Circuit current
ICC
-
70
150
μA
IO = 0 mA to 200 mA
Output voltage
VQ
4.90
5.00
5.10
V
1 mA ≤ IO ≤ 100 mA
6 V ≤ VCC ≤ 16 V
Dropout voltage
ΔVd
-
0.25
0.50
V
VCC = 4.75 V, IO = 100 mA
Load regulation
Reg.L
-
10
30
mV
IO = 10 mA to 100 mA
Line regulation
Reg.I
-
10
30
mV
VCC = 8 V to 16 V, IO = 1 mA
200
-
-
mA
-
300
-
-
mA
-
-
175
-
°C
-
BD4269FJ-C
Current limit
BD4269EFJ-C
BD4269UEFJ-C
IOCP
Thermal Shut Down Temperature
TTSD
Electrical Characteristics (Power on and under-voltage reset)
(Unless otherwise specified, Tj = -40 °C to +150 °C, VCC = 13.5 V)
Parameter
Symbol
Limits
Unit
Conditions
Min
Typ
Max
VRT
4.50
4.62
4.74
V
-
VRHY
20
60
100
mV
-
VRADJ,TH
0.776
0.800
0.824
V
3.5 V ≤ Vo ≤ 4.5 V
RADJ input current
IRADJ
-1
0
+1
μA
VRADJ = 2 V
RO pull-up resistance
RRO
10
24
40
kΩ
-
CT threshold high
VCTH
-
1.20
-
V
-
CT threshold low
VCTL
-
0.25
-
V
-
ICT
5
12
20
μA
VCT = 0.5 V
TDLH
17
22
28
ms
CCT = 0.22 μF (Note 1)
Power on and under-voltage reset
Switching threshold
Power on and under-voltage reset
Switching Hysteresis
RADJ switching threshold
CT Charge current
Delay time L→H
(Power On Reset Time)
(Note 1)
TDLH can be varied by changing the CT capacitance value. ( 0.001µF to 10 µF available )
TDLH (ms) ≈ TDLH0 (Delay time L→H at CCT = 0.22 µF ) × CCT (μF) / 0.22
example: When CCT= 2.2µF, 170ms ≤ TPOR ≤ 280 ms
CCT : 0.1µF ≤ CCT ≤ 10 μF
TDLH (ms) ≈ TDLH0 ( Delay time L→H at CCT = 0.22 µF ) × CCT (μF) / 0.22 ±0.1
example: When CCT= 0.022µF, 1.6ms ≤ TDLH ≤ 2.9 ms
CCT: 0.001µF ≤ CCT < 0.1 μF
Electrical Characteristics (Input voltage reset)
(Unless otherwise specified, Tj = -40 °C to 150 °C, VCC = 13.5 V)
Parameter
Symbol
Limits
Min
Typ
Max
Unit
Conditions
SI threshold high
VSIH
0.80
0.87
0.94
V
-
SI threshold low
VSIL
0.75
0.80
0.85
V
-
SO pull-up resistance
Rso
10
24
40
kΩ
-
SI input current
ISI
-1
0
+1
μA
VSI = 2 V
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
6
6
5
5
Output Voltage: VO [V]
Output Voltage: VO [V]
Typical Performance Curves (Unless otherwise specified, Tj = 25 °C, VCC = 13.5 V)
4
3
2
4
3
2
Tj = -40 °C
Tj = 25 °C
1
0
1
0
5
10
15 20 25 30 35
Supply Voltage: VCC [V]
40
45
0
50
Tj = 125 °C
0
2
Figure 1. Output Voltage vs. Supply Voltage
(RL = open)
4
6
Supply Voltage: VCC [V]
8
10
Figure 2. Output Voltage vs. Supply Voltage
(at low Supply Voltage: RL = open)
5.10
3.0
2.5
Output Voltage: VO [V]
Circuit Current: ICC [mA]
5.05
5.00
4.95
2.0
1.5
1.0
0.5
4.90
-40
0
40
80
120
150
Junction Temperature : Tj [℃]
Figure 3. Output Voltage vs. Junction Temperature
(RL = 1 kΩ)
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0.0
0
5
10
15 20 25 30 35 40
Supply Voltage: V CC [V]
45
50
Figure 4. Circuit Current vs. Supply Voltage
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Typical Performance Curves (Unless otherwise specified, Tj = 25 °C, VCC = 13.5 V) -Continued
80
120
Circuit Current: ICC [μA]
150
Circuit Current: ICC [μA]
100
60
40
20
BD4269EFJ-C ≤ 300 mA
BD4269UEFJ-C ≤ 300 mA
BD4269FJ-C ≤ 200 mA
0
0
50
100
150
200
250
90
60
30
0
300
-40
0
Output Current : IO [mA]
5
500
4
400
Output Current: IO [mA]
Output Voltage: V O [V]
600
3
2
Tj = -40 °C
Tj = 25 °C
Tj = 125 °C
0
100
200
300
400
Output Current: IO [mA]
500
150
300
200
100
0
600
-40
0
40
80
120
150
Junction Temperature : Tj [℃]
Figure 8. Output Current vs. Junction Temperature
Figure 7. Output Voltage vs. Output Current
(Over Current Protection)
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120
Figure 6. Circuit Current vs. Junction Temperature
6
0
80
Junction Temperature : Tj [℃]
Figure 5. Circuit Current vs. Output Current
1
40
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Typical Performance Curves (Unless otherwise specified, Tj = 25 °C, VCC = 13.5 V) -Continued
6
800
Tj = -40 °C
5
Tj = 25 °C
600
Tj = 125 °C
Output Voltage: VO [V]
Dropout Voltage: ΔVd [mV]
700
500
400
300
4
3
2
200
1
BD4269EFJ-C ≤ 300 mA
BD4269UEFJ-C ≤ 300 mA
BD4269FJ ≤ 200 mA
100
0
0
50
100
150
200
Output Current: IO [mA]
250
300
0
Figure 9. Dropout Voltage vs. Output Current
(VCC = 4.75 V)
()
200
4.8
5
Power on and under-voltage reset Switing
threshold and Hysteresis: VRT , VRHY [V]
Tj = -40 °C
Tj = 25 °C
Tj = 125 °C
RO Voltage : VRO [V]
125
150
175
Junction Temperature: Tj [°C]
Figure 10. Output Voltage vs. Junction Temperature
(Thermal Shut Down)
6
4
3
2
1
0
100
0
1
2
3
4
5
6
4.6
4.5
VRT+VRHY
4.4
4.3
VRT
-40
0
40
80
120
150
Junction Temperature : Tj [℃]
Figure 12. Power on and under-voltage reset Switching
threshold and Hysteresis vs. Junction Temperature
VO voltage : VO [V]
Figure 11. RO Voltage vs. VO Voltage
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Typical Performance Curves (Unless otherwise specified, Tj = -40 °C to 150 °C, VCC = 13.5 V) -Continued
28
10000
1000
Delay Time L→H: TDLH [ms]
Delay time L→H: TDLH [ms]
27
25
23
21
19
100
10
1
0.1
17
-40
0
40
80
120
0.01
0.001
150
0.01
Junction Temperature : Tj [℃]
10
Figure 14. Delay Time L→H vs. CT Capacitance
0.90
6
5
RADJ Switcting threshold : V RADJ,TH [V]
Tj = -40 °C
RO Voltage : VRO [V]
1
CT Capacitance : CCT [μF]
Figure 13. Delay Time L→H vs. Junction Temperature
(CCT = 0.22 µF)
Tj = 25 °C
Tj = 125 °C
4
3
2
1
0
0.1
0.85
0.80
0.75
0.70
0.65
0.60
0.0
0.2
0.4
0.6
0.8
1.0
0
40
80
120
150
Junction Temperature : Tj [℃]
RADJ voltage : VRADJ [V]
Figure 15. RO Voltage vs. RADJ Voltage
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-40
Figure 16. RADJ switching threshold
vs. Junction Temperature
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Typical Performance Curves (Unless otherwise specified, Tj = -40 °C to 150 °C, VCC = 13.5 V) -Continued
0.90
6
Tj = -40 °C
Tj = 25 °C
Tj = 125 °C
0.85
SI threshold : VSIH, VSIL [V]
SO Voltage : VSO [V]
5
4
3
2
1
0
0.80
0.75
0.70
VSIH
0.65
0.0
0.2
0.4
0.6
0.8
0.60
1.0
SI Voltage : VSI [V]
-40
0
40
80
120
150
Junction Temperature : Tj [℃]
Figure 17. SO Voltage vs. SI Voltage
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VSIL
Figure 18. SI threshold vs. Junction Temperature
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Measurement circuit for Typical Performance Curves
7. SO
1. VCC
2. SI
4. CT
4. CT
V
10 μF
RL
8. VO
4. CT
A
5. GND 3. RADJ
A
0.22 μF
A
10 μF
10 μF
4.7 μF
Measurement Circuit for
Figure 7, 8
Measurement Circuit for
Figure 5
Measurement Circuit for
Figure 1, 2, 3, 4, 6, 10
6. RO
2. SI
8. VO
5. GND 3. RADJ
0.22 μF
4.7 μF
7. SO
1. VCC
6. RO
2. SI
8. VO
5. GND 3. RADJ
0.22 μF
4.7 μF
7. SO
1. VCC
6. RO
V
7. SO
1. VCC
2. SI
4. CT
A
0.22 μF
10 μF
Measurement Circuit for
Figure 9
4.4 V
4. CT
V
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Monitor
Measurement Circuit for
Figure 13, 14
8. VO
5. GND 3. RADJ
V
0.22 μF
4.7 μF
0.22 μF
6. RO
2. SI
8. VO
Measurement Circuit for
Figure 15, 16
V
8. VO
5. GND 3. RADJ
7. SO
1. VCC
5. GND 3. RADJ
6. RO
2. SI
4. CT
Measurement Circuit for
Figure 11, 12
6. RO
0.22 μF
8. VO
5. GND 3. RADJ
0.22 μF
4.7 μF
7. SO
2. SI
4. CT
4. CT
7. SO
1. VCC
6. RO
2. SI
8. VO
5. GND 3. RADJ
4.7 μF
1. VCC
7. SO
1. VCC
6. RO
10 μF
Measurement Circuit for
Figure 17, 18
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Timing Chart
1.
Power on and under-voltage reset (RADJ is connected to GND)
13.5 V
VVCC
CC
0V
VREC (1)
VVOO
VRU (2)
VRT
5V
0V
≈ VO
0V
VCT
CT
VCTH
VCTL
≈ VO
0V
V
RRO
O
VREC = VRT + VRHY
VRU = 2 to 3.5 V
(3) When RADJ is used, V
RT = VRTADJ, VREC = VRTADJ + VRHY
(1)
(2)
2.
Input voltage reset
5V
VRU
VO
VSIH
0V
VSIL
VSI
0V
VO
VSO
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Selection of Components Externally Connected
・VCC pin capacitor
Insert capacitors with a capacitance of 0.1 μF or higher between the VCC and GND pin. We recommend using
ceramic capacitor generally featuring good high frequency characteristic. When selecting a ceramic capacitor, please
be consider about temperature and DC - biasing characteristics. Place capacitors closest possible to VCC - GND pin.
When input impedance is high, e.g. in case there is distance from battery, line voltage drop needs to be prevented by
large capacitor. Choose the capacitance according to the line impedance between the power smoothing circuit and
the VCC pin. Selection of the capacitance also depends on the applications. Verify the application and allow sufficient
margins in the design. We recommend using a capacitor with excellent voltage and temperature characteristics.
・Output pin capacitor
In order to prevent oscillation, a capacitor needs to be placed between the output pin and GND pin. We recommend
using a ceramic capacitor with a capacitance of 6 μF or higher. In selecting the capacitor, ensure that the capacitance
of 6 μF or higher is maintained at the intended applied voltage and temperature range. Due to changes in
temperature the capacitor's capacitance can fluctuate possibly resulting in oscillation.
In actual applications the stable operating range is influenced by the PCB impedance, input supply impedance and
load impedance. Therefore verification of the final operating environment is needed. When selecting a ceramic
capacitor, we recommend using X7R or better components with excellent temperature and DC - biasing
characteristics and high voltage tolerance.
In case of the transient input voltage and the load current fluctuation, output voltage may fluctuate. In case this
fluctuation can be problematic for the application, connect low ESR capacitor (capacitance > 6 μF, ESR < 1 Ω) in
paralleled to large capacitor with a capacitance of 13 μF or higher and ESR of 5 Ω or lower. Electrolytic and tantalum
capacitors can be used as large capacitor. When selecting an electrolytic capacitor, please consider about increasing
ESR and decreasing capacitance at cold temperature.
Place the capacitor closest possible to output pin.
・RADJ pin
Power on and under-voltage reset threshold is changed by
connecting external resister R1 and R2 in Figure 19.The
available resister range is from
VO
VO
R2
𝑉𝑂 = 𝑉𝑅𝐴𝐷𝐽,𝑇𝐻 ×
RADJ
R1
RO
VREF
𝑅1 + 𝑅2
𝑅1
(R1 and R2 recommended resistance values are
100 kΩ or lower.)
Power on and under-voltage reset is adjusted in from 3.5V to
4.5V. In case that it is needless to RADJ pin, it must be short
GND. If it is open, the reset function can be unstable.
Figure 19. RADJ pin configuration method
・SI pin
Input voltage reset threshold is changed by connecting external
resister R3 and R4 in Figure 20. The adjusted reset threshold
VSIADJL and VSIADJH can be calculated by following equation.
VCC
VO
R4
𝑉𝐶𝐶 = 𝑉𝑆𝐼𝐿 ×
SI
R3
VREF
SO
Figure 20. SI pin configuration method
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TSZ22111･15･001
𝑅3 + 𝑅4
𝑅3
(R3 and R4 recommended resistance values are
100 kΩ or lower.)
This IC incorporates UVLO circuit to prevent malfunction of the
reset block in case of very low output voltage. When UVLO is
activated, SO is L regardless of SI voltage. When SI is used,
set VO ≥ 3.5 V.
In case that it is needless to SI pin, it must be short VO. If it is
open, the reset function can be unstable.
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BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Datasheet
Power Dissipation
■SOP-J8
Power Dissipation: Pd [W]
2.0
IC mounted on ROHM standard board based on JEDEC.
① : 1 - layer PCB
(Copper foil area on the reverse side of PCB: 0 mm x 0 mm)
Board material: FR4
Board size: 114.3 mm x 76.2 mm x 1.57 mmt
Mount condition: PCB and exposed pad are soldered.
Top copper foil: ROHM recommended
footprint + wiring to measure, 2 oz. copper.
②1.43W
1.5
1.0
②
①0.80 W
0.5
0.0
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 21. SOP-J8 Package Data
(Reference Data)
: 4 - layer PCB
(2 inner layers and Copper foil area on the reverse side of PCB:
74.2 mm x 74.2 mm)
Board material: FR4
Board size: 114.3 mm x 76.2 mm x 1.60 mmt
Mount condition: PCB and exposed pad are soldered.
Top copper foil: ROHM recommended
footprint + wiring to measure, 2 oz. copper.
2 inner layers copper foil area of PCB
: 74.2 mm x 74.2 mm, 1 oz. copper.
Copper foil area on the reverse side of PCB
: 74.2 mm x 74.2 mm, 2 oz. copper.
Condition①: θJA = 155 °C / W, ΨJT (top center) = 15 °C / W
Condition②: θJA = 87 °C / W, ΨJT (top center) = 13 °C / W
■HTSOP-J8
5
Power Dissipation: Pd[W]
4
IC mounted on ROHM standard board based on JEDEC.
① : 1 - layer PCB
(Copper foil area on the reverse side of PCB: 0 mm x 0 mm)
Board material: FR4
Board size: 114.3 mm x 76.2 mm x 1.57 mmt
Mount condition: PCB and exposed pad are soldered.
Top copper foil: ROHM recommended
footprint + wiring to measure, 2 oz. copper.
②3.67 W
3
2
②
①0.96 W
1
0
0
25
50
75
100
125
Ambient Temperature: Ta [°C]
Figure 22. HTSOP-J8 Package Data
(Reference Data)
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150
: 4 - layer PCB
(2 inner layers and Copper foil area on the reverse side of PCB:
74.2 mm x 74.2 mm)
Board material: FR4
Board size: 114.3 mm x 76.2 mm x 1.60 mmt
Mount condition: PCB and exposed pad are soldered.
Top copper foil: ROHM recommended
footprint + wiring to measure, 2 oz. copper.
2 inner layers copper foil area of PCB
: 74.2 mm x 74.2 mm, 1 oz. copper.
Copper foil area on the reverse side of PCB
: 74.2 mm x 74.2 mm, 2 oz. copper.
Condition①: θJA = 130 °C / W, ΨJT (top center) = 15 °C / W
Condition②: θJA = 34 °C / W, ΨJT (top center) = 7 °C / W
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BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Datasheet
Thermal Design
Within this product, the power consumption is decided by the dropout voltage condition, the load current and the circuit
current. Refer to Package Data illustrated in Figure 21, 22 when using the IC in an environment of Ta ≥ 25 °C. Even if the
ambient temperature Ta is at 25 °C, depending on the input voltage and the load current, chip junction temperature can be
very high. Consider the design to be Tj ≤ Tjmax = 150 °C in all possible operating temperature range. On the reverse side of
the package BD4269EFJ-C, BD4269UEFJ-C have an exposed heat pad for improving the heat dissipation.
Should by any condition the maximum junction temperature Tjmax = 150 °C rating be exceeded by the temperature increase
of the chip, it may result in deterioration of the properties of the chip. The thermal impedance in this specification is based on
recommended PCB and measurement condition by JEDEC standard. Verify the application and allow sufficient margins in
the thermal design by the following method is used to calculate the junction temperature Tj.
Tj can be calculated by either of the two following methods.
1.
The following method is used to calculate the junction temperature Tj.
Tj = Ta + PC × θJA
Where:
Tj
Ta
PC
θJA
: Junction Temperature
: Ambient Temperature
: Power Consumption
: Thermal Impedance
(Junction to Ambient)
2. The following method is also used to calculate the junction temperature Tj.
Tj = TT + PC × ΨJT
Where:
Tj
TT
PC
ΨJT
: Junction Temperature
: Top Center of Case’s (mold) Temperature
: Power consumption
: Thermal Impedance
(Junction to Top Center of Case)
The following method is used to calculate the power consumption Pc (W).
Pc = (VCC - VO) × IO + VCC × ICC
Where:
PC
VCC
VO
IO
ICC
: Power Consumption
: Input Voltage
: Output Voltage
: Load Current
: Circuit Current
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
・Calculation Example (SOP-J8)
If VCC = 13.5 V, VO = 5.0 V, IO = 50 mA, ICC = 70 μA, the power consumption Pc can be calculated as follows:
PC = (VCC - VO) × IO + VCC × ICC
= (13.5 V – 5.0 V) × 50 mA + 13.5 V × 70 μA
= 0.43 W
At the ambient temperature Tamax = 85°C, the thermal Impedance (Junction to Ambient)θJA = 87 °C / W ( 4-layer PCB ),
Tj = Tamax + PC × θJA
= 85 °C + 0.43 W × 87 °C / W
= 122.5 °C
When operating the IC, the top center of case’s (mold) temperature TT = 100 °C、ΨJT = 15 °C / W (1-layer PCB),
Tj = TT + PC × ΨJT
= 100 °C + 0.43 W × 15 °C / W
= 106.5 °C
For optimum thermal performance, it is recommended to expand the copper foil area of the board, increasing the layer and
thermal via between thermal land pad.
・Calculation Example (HTSOP-J8)
If VCC = 13.5 V, VO = 5.0 V, IO = 50 mA, ICC = 70 μA, the power consumption Pc can be calculated as follows:
PC = (VCC - VO) ×IO + VCC × ICC
= (13.5 V – 5.0 V) × 50 mA + 13.5 V × 70 μA
= 0.43 W
At the ambient temperature Tamax = 85°C, the thermal impedance (Junction to Ambient) θJA = 34 °C / W (4-layer PCB),
Tj = Tamax + PC × θJA
= 85 °C + 0.43 W × 34 °C / W
= 99.7 °C
When operating the IC, the top center of case’s (mold) temperature TT = 100 °C, ΨJT = 15 °C / W (1-layer PCB),
Tj = TT + PC × ΨJT
= 100 °C + 0.43 W × 15 °C / W
= 106.5 °C
For optimum thermal performance, it is recommended to expand the copper foil area of the board, increasing the layer and
thermal via between thermal land pad.
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
I/O equivalence circuits
1 VCC
2 SI
3 RADJ
VO
VCC
VCC
IC
SI
100 kΩ
(Typ)
20 kΩ
(Typ)
RADJ
50 kΩ
(Typ)
3 pF
(Typ)
4 CT
VO
6 RO
VO
VO
VO
20 kΩ
(Typ)
CT
7 SO
RO
100 Ω
(Typ)
24 kΩ
(Typ)
SO
100 Ω
(Typ)
24 kΩ
(Typ)
50 kΩ
(Typ)
8 VO
VCC
VO
1500 kΩ
(Typ)
Reset
Block
500 kΩ
(Typ)
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Application Examples
・Applying positive surge to the VCC
If the possibility exists that surges higher than 45 V will be applied to the VCC, a Zener Diode should be placed between
the VCC and GND as shown in the figure below.
VCC
VO
GND
・Applying negative surge to the VCC
If the possibility exists that negative surges lower than the GND are applied to the VCC, a Shottky Diode should be place
between the VCC and GND as shown in the figure below.
VCC
VO
GND
・Implementing a Protection Diode
If the possibility exists that a large inductive load is connected to the output pin resulting in back-EMF at time of startup
and shutdown, a protection diode should be placed as shown in the figure below.
VCC
VO
GND
・Reverse Polarity Diode
In some applications, the VCC and the VO potential might be reversed, possibly resulting in circuit internal damage or
damage to the elements. For example, the accumulated charge in the output pin capacitor flowing backward from the VO
to the VCC when the VCC shorts to the GND. In order to minimize the damage in such case, use a capacitor with a
capacitance less than 1000 μF. Also by inserting a reverse polarity diode in series to the VCC, it can prevent reverse
current from reverse battery connection or the case. When the point A is short-circuited GND, if there may be any possible
case point B is short-circuited to GND, we also recommend using a bypass diode between the VCC and the VO.
Bypass Diode
Reverse Polarity Diode
A
B
VCC
VO
GND
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BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Datasheet
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
The power dissipation under actual operating conditions should be taken into consideration and a sufficient margin
should be allowed for in the thermal design. On the reverse side of the package BD4269EFJ-C, BD4269UEFJ-C have
an exposed heat pad for improving the heat dissipation. Use both the front and reverse side of the PCB to increase the
heat dissipation pattern as far as possible. The amount of heat generated depends on the voltage difference across the
input and output, load current, and bias current. Therefore, when actually using the chip, ensure that the generated
heat does not exceed the Pd rating.
Should by any condition the maximum junction temperature Tjmax = 150 °C rating be exceeded by the temperature
increase of the chip, it may result in deterioration of the properties of the chip. The thermal impedance in this
specification is based on recommended PCB and measurement condition by JEDEC standard. Verify the application
and allow sufficient margins in the thermal design.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Rush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
8.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
9.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
10. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to
the power supply or ground line.
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Operational Notes – continued
11. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin A
N
P+
N
P
N
P+
N
Parasitic
Elements
N
P+
GND
E
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
Parasitic
Elements
Pin B
B
Parasitic
Elements
GND
GND
N Region
close-by
GND
12. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
13. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
14. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Physical Dimension, Tape and Reel Information
Package Name
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Physical Dimension, Tape and Reel Information -Continued
Package Name
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HTSOP-J8
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Ordering Information
B D 4
2
6
Product Name
Production Line
NONE:
Production Line A
“U”:
Production Line B
Package
SOP-J8
HTSOP-J8
9
x
F
J -
C
Package
FJ：SOP-J8
EFJ：HTSOP-J8
Ordering Code
E2
Product Grade
C: for Automotive
Packaging and forming specification
E2: Embossed tape and reel
Remarks
BD4269FJ-CE2
-
BD4269EFJ-CE2
Production Line A (Note 1)
BD4269UEFJ-CE2
Production Line B (Note 1)
(Note 1) For the purpose of improving production efficiency, Production Line A and B have a multi-line configuration.
Electrical Characteristics noted in Datasheet does not differ between Production Line A and B.
Production Line B is recommended for new product.
Marking Diagram
SOP-J8 (TOP VIEW)
Part Number Marking
LOT Number
Part Number Marking
Part Number
D4269
BD4269FJ-CE2
PartPart
Number
Marking
Number
D4269
BD4269FJ-CE2
BD4269EFJ-CE2
D4269U
BD4269UEFJ-CE2
1PIN MARK
HTSOP-J8 (TOP VIEW)
Part Number Marking
LOT
PartNumber
Number Marking
D4269
PartNumber
Number Marking
LOT
Part Number
1PIN MARK
1PIN MARK
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Datasheet
BD4269FJ-C BD4269EFJ-C BD4269UEFJ-C
Revision History
Date
31.Jul.2014
Revision
Changes
001
New Release
27.Feb.2015
002
BD4269EFJ-C was added.
P1 Revised expression on the tittle
P1 AEC-Q100 grade was added.
P4, P5, P15, P16 and P17 Revised expression on the information of Thermal
Characteristics of SOP-J8.
P14 Revised expression on the information of VCC pin and Output pin capacitors.
P19 Added description on Reverse Polarity Diode.
P20 Revised expression on the information of Thermal Consideration.
20.Mar.2015
003
P5 A writing error of paragraph of Thermal Characteristics was corrected.
P15 A writing error of paragraph of Power Dissipation was corrected.
5.Jun.2015
004
P1 The Figure of “Not Using SI and RADJ” was corrected.
P16 Description of Thermal Design was corrected.
005
BD4269UEFJ-C added.
P2 PREREG, TSD, OCP added to Block Diagram.
P3 PREREG added to Description of Blocks.
P9 A writing error of the graph title was corrected.
19.Nov.2021
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
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