TECHNICAL NOTE
System Power Supply LSIs for use in automotive Electronics
Multifunction System
Power Supply IC
(with Watchdog Timer)
ESD
Resistance
Now available
BD4911FM
zDescription
The BD4911FM multiple-output system power supply features microcontroller output and is capable of operating at super-low
dark current levels. With a built-in reset, with a microcontroller delay, BATTERY/ACCESSORY voltage detection, and mute
function, WDT (Watch Dog Timer)function, the BD4911FM is ideal for car audio and satellite navigation systems.
zFeatures
1) Main regulator Vo1 can be switched between 5.0 V and 3.3 V output using the SEL input voltage, and can be used
with an external boost transistor.
Sub-regulator Vo2 generates 3.3 V output.
Both regulators feature an output current of 150 mA.
2) Built-in WDT reset; monitor time can be set with the CTW capacitor.
WDT operation can be switched on and off using INH input.
3) Circuit current during standby operation (WDT off): 100 µA (TYP)
4) Built-in reduced power detection circuits for Vo1 and Vo2 output
5) Built-in elevated output detection circuit for Vo1
6) The IC monitors the BuM voltage and outputs it to the BuDET1 and BuDET2 pins.
7) The IC monitors the ACCM voltage and outputs it to the ACCM pin when BuDET1 and BuDET2 are low.
8) Built-in mute circuit. Pulse width can be set with the CE capacitor.
9) Built-in power-on reset function for which RESET output can be set with the CTP capacitor.
10) Vo1 generates low-saturation voltage type PMOS output.
11) Built-in overcurrent protection circuit
12) Built-in overvoltage protection circuit
13) Built-in thermal shutdown circuit
14) The 28-pin HSOP-M28 package is ideal for space-saving designs.
zApplications
Car audio and satellite navigation systems
Ver.B Oct.2005
zAbsolute Maximum Ratings (Ta = 25°C)
Symbol
Limits
Unit
Supply Voltage 1
Parameter
VIN1
-0.3 to 36
V
Supply Voltage 2
VIN2
-0.3 to 36
V
Power Dissipation
Pd
Operating Temperature Range
Storage Temperature Range
2200
(*1)
mW
Topr
-40 to +85
°C
Tstg
-55 to +150
°C
VIN1 Peak
50 (*2)
V
Peak Supply Voltage 2
VIN2 Peak
50 (*2)
V
Surge Applied Current 1
IACC (S+)
+3 (*2)
mA
Surge Applied Current 2
IACC (S-)
-12 (*3)
mA
Tjmax
150
°C
Peak Supply Voltage 1
Maximum Junction Temperature
*1: When mounted on a PCB (70 mm × 70 mm × 1.6 mm glass epoxy).
*2: tr ≥ 1 ms, Bias voltage/current is less than 200 ms or shorter
*3: tr ≥ 1 ms, Bias voltage/current 60 ms or shorter
zRecommended operating ranges (Ta = 25°C)
Parameter
Recommended Power
Supply Voltage Range 1
Symbol
VIN1
VIN1
Min.
Vo1+1.2
Vo1 + 0.5 +
eternal TrVBE
Limits
Typ.
13.2
Max.
16.0
13.2
16.0
Unit
Comment
V
When using built-in transistor.
When using external boost
transistor.
V
Recommended Power
VIN2
4.5
13.2
16.0
V
Supply Voltage Range 2
Recommended Power
Vo1
1.2
—
5.2
V
RESET, DET1
Supply Voltage Range 3
Recommended Power
BuDET, ACCDET, MUTE,
Vo1
2.5
—
5.2
V
Supply Voltage Range 4
WDT
Recommended Power
Vo2
1.2
—
3.4
V
DET2
Supply Voltage Range 5
*Electrical characteristics are not guaranteed (especially when operating on reduced voltage).
zExternal element setting time (Ta = 25°C)
Parameter
Symbol
Runaway Operation Detection
TWD1
Time 1
Runaway Operation Detection
TWD2
Time 2
Runaway Operation Reset Time 1
TWR1
Runaway Operation Reset Time 2
TWR2
Power-on Reset Time
TPR
CD Delay Time
Td
MUTE Pulse Width
Tm
BuM Detection Voltage (rising)
VTHBu
BuM Detection Voltage (falling)
VTLBu
ACCM Detection Voltage (rising)
VTHACC
ACCM Detection Voltage (falling)
ATLACC
Equation（TYP）
Unit
Recommendation
Unit
Condition
700 × CTW (µF)
mS
0.1 to 2.2
µF
SEL > 1.5 V
462 × CTW (µF)
mS
0.1 to 2.2
µF
SEL < 1.0 V
340 × CTW (µF)
260 × CTW (µF)
1000 × CTP (µF)
100 × CD (µF)
1 × CE (µF)
1.252 × (R1+R2)/R2
1.184 × (R1+R2)/R2
1.252 ×
(R3 + R4)/R4
1.184 × (R3+R4)/R4
mS
mS
mS
mS
S
V
V
0.1 to 2.2
0.1 to 2.2
0.047 to 0.22
0.047 to 0.22
0.1 to 2.2
R1: 0.5 to 2
R2: 0.1 to 0.5
µF
µF
µF
µF
µF
SEL > 1.5 V
SEL < 1.0 V
V
R3: 50 to 200
V
R4: 10 to 50
2/16
MΩ
kΩ
zElectrical characteristics (Unless otherwise specified, Ta = 25°C, VIN1 = VIN2 = 13.2 V)
Limits
Parameter
Symbol
Unit
Condition
Min.
Typ.
Max.
[Overall]
VIN1 Supply Current
IVIN1
65
95
125
µA
ACC = 0 V, WDINH = H
VIN2 Supply Current
IVIN2
5
10
20
µA
ACC = 0 V, WDINH = H
IVINA
65
100
135
µA
ACC = 0 V, WDINH = H
Total Supply Current
IVINB
65
130
195
µA
ACC = 13.2 V
Overvoltage Detection Voltage
VOVP
28
31
34
V
All regulator output off
All regulator output reset
Overvoltage Detection Hysteresis
VOVPHY
0.5
1
1.5
V
Width
[Main Regulator (REG1)]
VIN1 = 6.2 V to 16 V,
VO1 Output Voltage 1
VO1-1
4.8
5.0
5.2
V
Io1 = 0 mA to 150 mA, SEL > 1.5 V
VO1 Line Regulation 1
∆VO1l-1
—
1
30
mV
VIN1 = 6.2 V to 16 V, SEL > 1.5 V
VO1 Load Regulation 1
∆VO1L-1
—
7
50
mV
Io1 = 0 mA to 150 mA, SEL > 1.5 V
VIN1 = 4.5 to 16 V, Io1 = 0150 mA,
VO1 Output Voltage 2
VO1-2
3.168
3.3
3.432
V
SEL < 1.0 V
VO1 Line Regulation 2
∆VO1l-2
—
1
30
mV
VIN1 = 4.5 V to 16 V, SEL < 1.0 V
VO1 Load Regulation 2
∆VO1L-2
—
7
30
mV
Io1 = 0 mA to 150 mA, SEL < 1.0 V
Minimum VO1 Output
VO1-L
2.5
—
—
V
VIN1 = 3.0 V, Io1 = 0 mA
Short Protection Start Current
IO1max
150
400
600
mA
Power Supply Ripple Rejection Ratio RRVO1
45
55
—
dB
fin = 120 Hz, -10 dBV, Io1 = 150 mA
Vo1 = 5 V, VIN1 = ACC = OPEN,
VO1 Sink Current
IVO1in
35
90
145
µA
WDINH = SEL = 5 V
[External Boost Transistor Current-limiting Circuit (OCP)]
OCP Input Current
IOCP
0
0.1
1.0
µA
VOCP = VIN1 = 16 V
OCP Detection Voltage
VOCP1
360
400
440
mV
Voltage differential with VIN1
Vo1 = 0 V, voltage differential with
OCP Detection Voltage (During
VOCP2
20
32
50
mV
VIN1
Output Ground Fault)
[Elevated Output Detection Circuit (COMP)]
Elevated Output Detection Voltage 1 VOVER1
5.30
5.49
5.68
V
SEL > 1.5 V
Elevated Output Detection Voltage 2 VOVER2
3.5
3.62
3.75
V
SEL < 1.0 V
Elevated Output Detection Output VCOMP
—
0.1
0.4
V
VO1 > 5.68 V, Io = 100 µA
Vo1: 3.1→4.8 V (tr = 0.01 V/µS)
Output Off Delay Time
TmVoff
—
—
50
µS
VIN1 = 4.8 V, Ro = 1 kΩ
[Sub-regulator (REG2)]
VIN1 = VIN2 = 4.5 V to 16V, Io2 =
VO2 Output Voltage
VO2
3.168
3.3
3.432
V
0 mA to 150 mA,
VO2 Line Regulation
∆VO2l
—
1
30
mV
VIN1 = VIN2 = 4.5 V to 16V
VO2 Load Regulation
∆VO2L
—
7
30
mV
Io2 = 0 mA to 150 mA
Minimum VO2 Output
VO2-L
2.5
—
—
—
VIN1 = VIN2 = 3.0 V, Io2 = 0 mA
Short Protection Start Current
IO2max
150
400
600
mA
Power Supply Ripple Rejection Ratio RRVO2
45
55
－
dB
fin = 120 Hz, -10 dBV, Io2 = 150 mA
[Regulator Voltage Selection Circuit (SEL)]
SEL Threshold
VTHSEL
1.20
1.25
1.30
V
SEL Input Current
ISEL
1
2
4
µA
VSEL = 5 V
[VO1 Reduced-voltage Detection Circuit (DET1)]
VO1 Detection Voltage 1
VTLP1-1
4.00
4.15
4.30
V
Vo1 falling, SEL > 1.5 V
Reset Voltage 1
VTHP1-1
4.10
4.35
4.60
V
Vo1 rising, SEL > 1.5 V
Hysteresis Width 1
VHSP1-1
0.1
0.2
0.3
V
SEL > 1.5 V
VO1 Detection Voltage 2
VTLP1-2
2.85
2.95
3.05
V
Vo1 falling, SEL < 1.0 V
Reset Voltage 2
VTHP1-2
2.92
3.09
3.26
V
Vo1 rising, SEL < 1.0 V
Hysteresis Width 2
VHSP1-2
0.07
0.14
0.21
V
SEL < 1.0 V
DET1 Output On Resistance
RDET1
—
270
600
Ω
IDET1 = 1 mA
DET1 Output Saturation Voltage
VDET1L
—
0.1
0.4
V
IDET1 = 2 µA, Vo1 = 1.2 V
This IC is not designed to be radiation-resistant.
3/16
zElectrical characteristics (Unless otherwise specified, Ta = 25°C, VIN1 = VIN2 = 13.2 V)
Limits
Parameter
Symbol
Unit
Condition
Min.
Typ.
Max.
[VO2 Reduced-voltage Detection Circuit (DET2)]
VO2 Detection Voltage
VTLP2
2.85
2.95
3.05
V
Vo2 falling
Reset Voltage
VTHP2
2.92
3.09
3.26
V
Vo2 rising
Hysteresis Width
VHSP2
0.07
0.14
0.21
V
DET2 Output On Resistance
RDET2
—
270
600
Ω
IDET2 = 1 mA
DET2 Output Saturation Voltage
VDET2L
—
0.1
0.4
V
IDET2 = 2 µA, Vo1 = 1.2 V
[Power-on Reset Timer (CTP, RESET)]
CTP Charge Resistance 1
RCTP1
0.6
0.9
1.2
MΩ
When RESET is low (while charging).
When RESET is high (after charging
CTP Charge Resistance2
RCTP2
5.5
8.5
11.5
kΩ
is complete).
VTHP1
3.00
3.33
3.66
V
SEL > 1.5 V
CTP Rising Threshold
VTHP2
1.98
2.2
2.42
V
SEL < 1.0 V
VTLP1
1.50
1.67
1.83
V
SEL > 1.5 V
CTP Falling Threshold
VTLP2
0.9
1.0
1.1
V
SEL < 1.0 V
Power-on Reset Time
TPR
60
100
140
mS
CTP = 0.1 µF
Reset On Delay Time
TDR
10
50
100
µS
CTP = 0.1 µF
RESET Output On Resistance
RRST
—
—
100
Ω
IRST = 1 mA
RESET Low Output Voltage
VRSTL
—
—
0.4
V
IRST = 2 µA, Vo1 = 1.2 V
[Watchdog Timer (WDT, WDINH, CTW)]
CT = 1 µF,
Runaway Operation Detection
Time from final WDT
TWD1
420
700
980
mS
VO1 = 5 V
Time 1
signal input to RESET
CT = 1 µF,
Runaway Operation Detection
inversion
TWD2
277.2 462.0 646.8
mS
VO1 = 3.3 V
Time 2
Runaway Operation Reset Time 1
TWR1
204
340
476
mS
CT = 1 µF, VO1 = 5 V
Runaway Operation Reset Time 2
TWR2
156
260
364
mS
CT = 1 µF, VO1 = 3.3 V
CTW Charge Current (Source)
IHCTW
3.3
4.7
6.1
µA
CTW Discharge Current (Sink)
ILCTW
3.4
4.8
6.2
µA
RCTWon1
—
16
50
Ω
When WDT signal input is active.
CTW Rapid Discharge Resistance
RCTWon2
—
0.5
2.5
kΩ
ACC: L, WDINH: H
VTHW1
3.00
3.33
3.66
V
SEL > 1.5 V
CTW Rising Threshold
VTHW2
1.98
2.20
2.42
V
SEL < 1.0 V
VTLW1
1.50
1.67
1.83
V
SEL > 1.5 V
CTW Falling Threshold
VTLW2
0.9
1.0
1.1
V
SE L ≤ 1.0 V
VTHWDT1 3.00
3.33
3.66
V
SEL > 1.5 V
WDT Rrising Threshold
VTHWDT2 1.98
2.20
2.42
V
SEL < 1.0 V
This IC is not designed to be radiation-resistant.
4/16
zElectrical characteristics (Unless otherwise specified, Ta = 25°C, VIN1 = VIN2 = 13.2 V)
Limits
Parameter
Symbol
Unit
Condition
Min.
Typ.
Max.
VTLWDT1 1.50
1.67
1.83
V
SEL > 1.5 V
WDT Falling Threshold
VTLWDT2
0.9
1.0
1.1
V
SEL < 1.0 V
WDT Input Current
IWDT
0.5
1.0
2.0
µA
VWDT = 5 V, SEL > 1.5 V
WDT Ddge Pulse Width
TPULSE
100
190
300
µS
0.8X
WDINH Input Voltage At High Level
VIH
—
—
V
Vo1
0.3X
WDINH Input Voltage Low Level
VIL
—
—
V
Vo1
WDT Input Current
IWDINH
1
2
4
µA
VWDINH = 5 V, SEL < 1.0 V
[Bu Voltage Detection Circuit (BuM, BuDET)]
BuM Detection Voltage (Rising)
VTHB
1.214 1.252 1.290
V
IC without heat sink
BuDET: H→L, AccDET: H→L
BuM Detection Voltage (Falling)
VTLB
1.148 1.184 1.220
V
IC without heat sink
BuDET: L→H, AccDET: L→H
Vo1
Vo1
BuDET1 High Output Voltage
VBDTH1
—
V
Iout = -5 mA
-0.4
-0.2
BuDET1 Low Output Voltage
VBDTL1
—
0.15
0.40
V
Iout = 5 mA
Vo2
Vo2
BuDET2 High Output Voltage
VBDTH2
—
V
Iout = -5 mA
-0.4
-0.2
BuDET2 Low Output Voltage
VBDTL2
—
0.15
0.40
V
Iout = 5 mA
IBM1
0
4
110
nA
BuM = 1 V
BuM Input Current
IBM2
0
20
110
nA
BuM = 2 V
[MUTE One-shot Pulse Generation Circuit (MUTE, CE)]
Tm1
0.6
1.0
1.4
S
CE = 1 µF, SEL > 1.5 V
MUTE Pulse Width
Tm2
0.6
1.0
1.4
S
CE = 1 µF, SEL < 1.0 V
Td1
0
5
10
µS
CE = 1 µF, SEL > 1.5 V
MUTE Pulse On Dalay Time
Td2
0
8
16
µS
CE = 1 µF, SEL < 1.0 V
When MUTE is on (resistance while
CE Charge Resistance 1
RTM1
0.7
1.0
1.3
MΩ
charging).
When MUTE is off (resistance when
CE Charge Resistance 2
RTM2
8.0
11.5
15.0
kΩ
stabilized after charging).
CE Rapid Discharge Resistance
RCEon
—
4
20
Ω
Must satisfy Td.
CE Output Saturation Voltage
VCEL
—
0.1
0.3
V
CE output on, ICE = 0 µA
VTHCE1
3.00
3.33
3.66
V
SEL > 1.5 V
CE-CMP Threshold (rising)
VTHCE2
1.98
2.2
2.42
V
SEL < 1.0 V
VTLCE1
1.50
1.67
1.83
V
SEL > 1.5 V
CE-CMP Threshold (falling)
VTLCE2
0.9
1.0
1.1
V
SEL < 1.0 V
MUTE Output Saturation Voltage
VMUTEL
—
0.2
0.4
V
IMUTE = 5 mA
[ACC Voltage Detection & Delay Circuit (ACCM, CD, ACCDET)]
ACCM Detection Voltage (Rising)
VTHA
1.214 1.252 1.290
V
IC without heat sink, BuM = H
ACCM Detection Voltage (Falling)
VTLA
1.148 1.184 1.220
V
IC without heat sink, BuM = H
ACCM Positive Clamp Voltage
VHACC
8
11
14
V
IACCM = +5 mA
ACCM Negative Clamp Voltage
VLACC
-0.30
-0.15
0
V
IACCM = -12 mA
ACCM Input Current 1
IACC1
-5
-1
0
µA
ACCM = 0 V
ACCM Input Current 2
IACC2
0
10
110
nA
ACCM = 2 V
TdLH
6
10
14
mS
CD = 0.1 µF
CD Delay Time
TdHL
6
10
14
mS
CD = 0.1 µF
CD Charge Resistance
ICDH
60
90
120
kΩ
CD Discharge Resistance
ICDL
60
90
120
kΩ
VTHCD1
3.00
3.33
3.66
V
SEL > 1.5 V
CD-CMP Threshold (Rising)
VTHCD2
1.98
2.2
2.42
V
SEL < 1.0 V
VTLCD1
1.50
1.67
1.84
V
SEL > 1.5 V
CD-CMP Threshold (Falling)
VTLCD2
0.9
1.0
1.1
V
SEL < 1.0 V
ACCDET Output Saturation Voltage
VADTL
—
0.2
0.4
V
IADT = 5 mA
This IC is not designed to be radiation-resistant.
5/16
zReference data (Unless otherwise specified, VIN1 = VIN2 = 13.2 V)
6
200
Ta=85℃
100
50
150
Ta=-40℃
100
5
10
15
20
25
1
5
10
15
20
25
0
Ta=-40℃
4
3
2
1
60
50
From the top,
Ta=85℃
Ta=25℃
Ta=-40℃
40
30
20
300
400
500
600
10
100
OUTPUT CURRENT:Io1 [mA]
RIPPLE REJECTION:RRVO2[dB]
From the left, Ta=85℃
Ta=25℃
Ta=-40℃
3
2
1
10000
200
300
400
500
0
5
50
From the top,
Ta=85℃
Ta=25℃
Ta=-40℃
30
20
10
100
1000
10000
100000
40
20
4
5
6
75
100
125
150
175
200
15
8
From the right, Ta=85℃
Ta=25℃
Ta=-40℃
6
4
2
0
0
3
1
Fig.9 Thermal Shutdown Circuit
OUTPUT VOLTAGE:Vo1[V]
OUTPUT VOLTAGE:Vo1[V]
60
2
2
AMBIENT TEMPERATURE:Ta[℃]
10
1
3
50
Fig.8 VO2 Ripple Rejection
From the top,
Ta=85℃
Ta=25℃
Ta=-40℃
40
4
FREQUENCY:f[Hz]
100
30
0
10
600
20
Fig.6 Vo2 Line Regulation
60
40
10
SUPPLY VOLTAGE:VIN1,2[V]
6
Fig.7 Vo2 Load Regulation
0
1
70
OUTPUT CURRENT:Io2 [mA]
80
2
100000
0
0
100
From the left,
Ta=85℃
Ta=25℃
Ta=-40℃
Fig.5 VO1 Ripple Rejection
VO1 = 5V
5
0
3
FREQUENCY:f[Hz]
Fig.4 Vo1 Load Regulation
4
1000
OUTPUT VOLTAGE:Vo1[V]
200
4
0
0
100
40
10
0
0
30
5
OUTPUT VOLTAGE:Vo2[V]
RIPPLE REJECTION:RRVO1[dB]
5
20
Fig.3 Vo1 Line Regulation
70
Ta=25℃
10
SUPPLY VOLTAGE:VIN1,2[V]
Fig.2 Total Circuit Current B
6
OUTPUT VOLTAGE:Vo1[V]
2
SUPPLY VOLTAGE:VIN1,2[V]
Fig.1 Total Circuit Current A
Ta=85℃
From the left,
Ta=85℃
Ta=25℃
Ta=-40℃
3
0
0
SUPPLY VOLTAGE:VIN1,2[V]
OUTPUT VOLTAGE:Vo2[V]
4
0
0
INPUT CURRENT:IVO1[µA]
Ta=25℃
50
0
5
OUTPUT VOLTAGE ： Vo1 [V]
From the top,
Ta=85℃
Ta=25℃
Ta=-40℃
150
CIRCUIT CURRENT:IVINB[µA]
CIRCUIT CURRENT:IVINA[µA]
200
12
9
From the left,
Ta=-40℃
Ta=25℃
Ta=85℃
6
3
0
0
100
200
300
400
500
0
10
20
30
40
INPUT VOLTAGE:Vo1[V]
DIFFERENCE VOLTAGE:VOCP[mV]
DIFFERENCE VOLTAGE:VOCP[mV]
Fig.10 VO1 Sink Current
Fig.11 OCP Detection Voltage
Fig.12 External OCP
Detection Voltage
6/16
50
3.0
3
From the left, Ta=85℃
Ta=25℃
Ta=-40℃
2
1
0
5
2.5
Ta=25℃
2.0
Ta=85℃
1.5
1.0
Ta=-40℃
0.5
1
2
3
4
3
4
0
INPUT VOLTAGE:Vo1[V]
1
1
2
3
4
0
5
Fig.14 DET1 Output Voltage
2.5
5
2.5
Ta=85℃
1.0
Ta=-40℃
0.5
0.0
1
2
3
4
3
From the left Ta=-40℃
Ta=25℃
Ta=85℃
2
1
5
0
0.5
1
1.5
INPUT VOLTAGE:VSEL[V]
Fig.16 DET2 Output Voltage
Fig.17 SEL Threshold Voltage
4
3
2
1
0
0.5
0.0
0
1
2
3
4
Ta=25℃
150
Ta=85℃
100
50
Ta=-40℃
INPUT VOLTAGE:Vo1[V]
4
5
Fig.18 SEL Input Current
4.0
3.0
From the left,
Ta=85℃
Ta=25℃
Ta=-40℃
2.0
From the right,
Ta=-40℃
Ta=25℃
Ta=85℃
1.0
1
2
3
4
5
0.0
INPUT CURRENT:IRESET[mA]
0.5
1.0
1.5
2.0
INPUT VOLTAGE:VBuM[V]
Fig.20 RESET Output Voltage
Fig.21 BuDET1 Detection Voltage
800
4
3
0.0
0
Fig.19 RESET Threshold Voltage
2
5.0
200
5
1
INPUT VOLTAGE:VSEL[V]
0
0
From the top,
Ta=25℃
Ta=85℃
Ta=-40℃
1.0
OUTPUT VOLTAGE:VBuDET1[V]
OUTPUT VOLTAGE:VRESET[mV]
From the left, Ta=-40℃
Ta=85℃
Ta=25℃
4
1.5
250
5
3
2.0
2
INPUT CURRENT:IDET2[mA]
6
4
OUTPUT VOLTAGE:VBuDET1[V]
Ta=-40℃
3
2
Ta=85℃
Ta=25℃
1
OUTPUT VOLTAGE:VBuDET2[V]
OUTPUT VOLTAGE:VRESET[V]
4
0
0
OUTPUT VOLTAGE:VBuDET1[V]
INPUT CURRENT:ISEL[µA]
3.0
OUTPUT VOLTAGE:Vo1[V]
6
Ta=25℃
2
Fig.15 Vo2 Output Detection Voltage
3.0
1.5
1
INPUT VOLTAGE:Vo2[V]
DET1 INPUT CURRENT:IDET1 [mA]
Fig.13 Vo1 Output Detection Voltage
2.0
From the left, Ta=85℃
Ta=25℃
Ta=-40℃
2
0
0.0
0
OUTPUT VOLTAGE:VDET2[V]
OUTPUT VOLTAGE:VDET2[V]
4
OUTPUT VOLTAGE:VDET1[V]
OUTPUT VOLTAGE:VDET1[V]
5
600
Ta=25℃
400
Ta=85℃
200
3
2
From the left,
Ta=85℃
Ta=25℃
Ta=-40℃
From the right,
Ta=-40℃
Ta=25℃
Ta=85℃
1
Ta=-40℃
0
0
0
2
4
6
8
OUTPUT CURRENT:IBuDET1[mA]
Fig.22 BuDET1 High
Output Voltage
10
0
2
4
6
8
INPUT CURRENT:IBuDET1 [mA]
Fig.23 BuDET1 Low
Output Voltage
7/16
10
0
0.0
0.5
1.0
1.5
2.0
INPUT VOLTAGE:VBuM[V]
Fig.24 BuDET2 Detection Voltage
4
3
2
1
OUTPUT VOLTAGE:VACCDET[V]
From the top,
Ta=-40℃
Ta=25℃
Ta=85℃
OUTPUT VOLTAGE:VBuDET2[V]
OUTPUT VOLTAGE:VBuDET2[V]
5
500
5
400
Ta=25℃
300
Ta=85℃
200
100
4
3
From the left,
Ta=-40℃
Ta=25℃
Ta=85℃
2
1
Ta=-40℃
0
0
0
0
2
4
6
8
10
0
INPUT CURRENT:IBuDET2[mA]
6
8
0
10
0.4
0.8
1.2
1.6
2
INPUT VOLTAGE:VACCM[V]
Fig.26 BuDET2 Low Output Voltage
Fig.27 ACCDET Detection Voltage
12
1
5
10
Ta=25℃
0.6
Ta=85℃
0.4
0.2
From the top,
Ta=85℃
Ta=25℃
Ta=-40℃
8
6
4
2
0
Ta=-40℃
-2
0
0
2
4
6
8
-20
10
Fig.28 ACCDET Output Voltage
-15
-10
-5
0
From the left,
Ta=-40℃
Ta=25℃
Ta=85℃
2
1
0.5
1
1.5
2
2.5
From the left,
Ta=-40℃
Ta=25℃
Ta=85℃
4
3
2
1
0
INPUT CURRENT :ICTW[mA]
1.2
1
2
3
4
5
2.5
0
1
2
3
4
5
From the top,
Ta=85℃
Ta=-40℃
Ta=25℃
0
-2.5
-5
0.0
5
0.5
1.0
1.5
2.0
2.5
3.0
4
Ta=-40℃
0.9
Ta=25℃
0.6
Ta=85℃
0.3
3
Ta=-40℃
2
Ta=25℃
1
Ta=85℃
0.0
-5
1.50
7.5
Fig.33 CTW Threshold 1
(SEL = L)
5
-2.5
1.25
Fig.32 CTP Threshold Voltage 2
(SEL = H)
1.5
0
1.00
INPUT VOLTAGE:VCTW [V]
7.5
From the top,
Ta=85℃
Ta=25℃
Ta=-40℃
0.75
INPUT VOLTAGE:VCTP[V]
INPUT VOLTAGE:VCTP[V]
2.5
0.50
10
5
3
Fig.31 CTP Threshold Voltage 1
(SEL = L)
0.25
Fig.30 ACC Detection Voltage
CURRENT:ICTW[mA]
0
1
Fig. 29 ACCM Positive/Negative
Clamp Voltage
0
0
From the left, Ta=-40℃
Ta=25℃
Ta=85℃
2
INPUT VOLTAGE:VACCM[V]
INPUT CURRENT:ICTW[μA]
OUTPUT VOLTAGE:VRESET[V]
3
3
0
0.00
5
6
4
4
INPUT CURRENT:IACCM[mA]
INPUT CURRENT:IACCDET[mA]
OUTPUT VOLTAGE:VRESET[V]
OUTPUT VOLTAGE:VO1[V]
0.8
ACCM VOLTAGE:VACCM[V]
OUTPUT VOLTAGE:VACCDET[V]
4
INPUT CURRENT:IBuDET2[mA]
Fig.25 BuDET2 High Output Voltage
INPUT CURRENT:ICTW[μA]
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0
1
2
3
4
INPUT VOLTAGE:VCTW [V]
INPUT VOLTAGE:VINH[V]
INPUT VOLTAGEVINH[V]
Fig.34 CTW Threshold 2
(SEL = H)
Fig.35 INH Threshold 1
(SEL = L)
Fig.36 INH Threshold 2
(SEL = H)
8/16
5
5
2.5
1.5
1.0
0.5
0.0
From the top,
Ta=85℃
Ta=25℃
Ta=-40℃
2.0
1.5
1.0
0.5
0.5
1.0
1.5
2.0
2.5
0.0
3.0
0.5
INPUT VOLTAGE:VWDT[V]
1.0
1.5
2.0
2.5
4
2
0.8
Ta=85℃
0.6
Ta=25℃
0.4
0.2
0.0
3
4
1
5
0
2
INPUT VOLTAGE:VCE[V]
2
4
6
8
10
3
From the left,
Ta=-40℃
Ta=25℃
Ta=85℃
2
1
0
0.5
1.0
Fig.41 MUTE Output Voltage
1.5
2.0
OUTPUT VOLTAGE:VACCDET[V]
From the left, Ta=-40℃
Ta=25℃
Ta=85℃
6
400ms/div
BuM
1V/div
WDT
CTW
3.0
Fig.42 CD-CMP Threshold 1
(SEL = L)
100μs/div
INH
2.5
INPUT VOLTAGE:VCD[V]
10
8
2.5
4
INPUT CURRENT:IMUTE[mA]
Fig.40 CE-CMP Threshold 2
(SEL = H)
1.5
5
Ta=-40℃
0
2
1
Fig.39 CE-CMP Threshold 1
(SEL = L)
OUTPUT VOLTAGE:VACCDET[V]
OUTPUT VOLTAGE:VMUTE[V]
From the left,
Ta=-40℃
Ta=25℃
Ta=85℃
1
2
INPUT VOLTAGE:VCE[V]
1.0
0
From the left,
Ta=-40℃
Ta=25℃
Ta=85℃
0.5
3.0
Fig.38 WDT Input Current 2
(SEL = H)
10
6
3
INPUT VOLTAGE:VWDT[V]
Fig.37 WDT Input Current 1
(SEL = L)
8
4
0
0.0
0.0
OUTPUT VOLTAGE:VMUTE[V]
OUTPUT VOLTAGE:VMUTE[V]
From the top,
Ta=85℃
Ta=25℃
Ta=-40℃
2.0
INPUT CURRENT:IWDT[µA]
INPUT CURRENT:IWDT[µA]
2.5
1.03sec
208μsec
4
MUTE
2V/div
RESET
2
0
0
1
2
3
4
5
Ta=25℃
Ta=25℃
INPUT VOLTAGE:VCD[V]
Fig.43 CD-CMP Threshold 2
(SEL = H)
Fig.44 WDT Edge Pulse Width
Fig.45 MUTE Timer Time (Low→High)
400ms/div
40ms/div
VCC
BuM
1V/div
Vo1=1V/div
1.03sec
Runaway operation detection time: 694msec
CTP=2V/div
MUTE
2V/div
CT
Runaway operation
reset time: 340 msec
134msec
RESET=5V/div
RESET
Ta=25℃
Fig.46 MUTE Timer Time (High→Low)
Ta=25℃
Fig.47 Runaway Operation
RESET Time
9/16
Ta=25℃
Fig.48 Power-on Reset Time
zBlock diagram, IC package & timing chart
Vo1D
1
150 mA
5 V or 3.3 V
REG1
Pin name
1
Vo1D
Vo1
2
10 µF
COMP
OCP
Overvoltage
detection
No.
External
transistor
current imiting
power supply pin
Watchdog pulse signal input pin
Overheat
detection
DET1
TSD
4
WDINH
when ACC is low or WDINH is high).
5
RESET
Reset signal output pin
6
CTW
7
DET1
Reset signal output pin
10 µF
OCP
2u
WDT
Watchdog prohibit signal input pin (prohibits WDT
14
8
3
Vo2
3.3 V 150 mA
REG2
Reference
voltage
Vo1
Main regulator built-in boost transistor output pin
Main regulator output voltage monitor/Vo1 circuit
9
COMP
SEL
2
Function
7
Runaway operation detection time setting
capacitor connection pin
Vo1 reduced-voltage detection signal output pin
CTP
11
DET1
Vo2
Vo1 Vo1
0.1 µF
Vo2
DET2
Vo1
Reduced voltage
detection
DET2
Watchdog timer
Vo1
6
WDT
1 µF
Rising edge
pulse
generation
9u
3
1u
WDINH
4
Watchdog prohibited
2u
Vo1
Bu Voltage detection
BuM
Vo1
MUTE pulse generation
Vo1
1.25 V/1.18 V
Vo1
13
BuDET2
1M
Edge
pulse
generation
Positive/
Negative
surge
clamp
BuDET1
10
TSD
24
18
MUTE
ACC voltage
detection
ACC delay
Vo1
ACCM
100 k
ACCDET
1.25 V/1.18 V
GND
1 µF
19
CE
21
CD
0.1 µF
[W]
11
CTP
12
DET2
13
BuDET2
14
Vo2
Sub-regulator output pin
15
VIN2
Sub-regulator input pin
16
N.C.
NC pin
17
ACCDET
18
MUTE
output)
19
CE
20
GND
Power-on reset time setting capacitor connection
pin
Vo2 reduced-voltage detection signal output pin
+B drop detection signal output pin (Vo2 at high
output)
ACC voltage detection signal output pin
MUTE output pin
MUTE pulse width setting capacitor connection pin
GND pin
ACCDET delay time setting capacitor connection
21
CD
22
ACCM
23
N.C.
NC pin
24
BuM
Battery voltage monitor input pin
25
N.C.
pin
Acc voltage monitor input pin
NC pin
Main regulator external boost transistor current
OCP
limit setting resistance connection pin
27
N.C.
NC pin
28
VIN1
Main regulator connection pin
FIN
FIN
1.5
Heat dissipation fin (sub) (Connect to GND pin.)
BD4911FM
1.0
Vo1D
Vo1
WDT
WDINH
RESET
CTW
DET1
POWER DISSIPATION: Pd
2.0
Elevated output detection output
+B drop detection signal output pin (Vo1 at high
BuDET1
(1) When mounted on a PCB (100 mm × 100 mm
× 2 mm [thickness], glass epoxy).
(Connect the heat dissipation fin to the GND
pin.)
(2) Reduced 17.6 mW/°C when Ta ≥ 25°C.
2.2(1)
detection voltage selection input pin
10
26
Fig.49 Block Diagram
2.5
COMP
17
22
20
9
RESET
5
Vo1
4.5u
SEL
0.5
SEL
COMP
BuDET1
CTP
DET2
BuDET2
Vo2
CTW
Vo2
Reduced voltage
detection
Power-on reset timer
8
12
OCP
Vo1
VIN1
Vo1
Main regulator output voltage and reduced-voltage
VIN2
26
CD
GND
CE
MUTE
ACCDET
OCP
28
ACCM
VIN1
15
BuM
VIN2
0
0
25
50
75
100
125
AMBIENT TEMPERATURE: Ta [°C]
150
UNIT: (mm)
Fig.50 Power Dissipation Characteristics
Fig.51 Pin Assign Diagram
10/16
zBlock diagram, IC package & timing chart
{I/O Timing Chart
{Watchdog timer and runaway operation reset timing chart 1
Prohibit watchdog when the following conditions are both satisfied. ACC: Low level and WDINH: High level.
ACC
VIN1,VIN2
Watchdog prohibited
Watchdog permitted
Watchdog prohibited
WDINH
SEL
ＷＤＴ
Vo1
Vo1*2/3
CTW
Vo1*1/3
DET1
TWD
RESET
TWR
Runaway
monitor time Runaway reset time
CTP
Fig.53
RESET
BuM
{Watchdog timer and runaway operation reset timing chart 2
BuDET1
VIN1,VIN
VTHP
VTLP
Vo1
CE
Watchdog permitted
WDINH
Prohibit
Permit
Permit
Prohibit
ＷＤＴ
MUTE
Vo1*2/3
ACCM
CTW
Vo1*1/3
CD
RESET
TPR
TDR
TPR
TDR
ACCDET
Fig.54
CTW(WDINH=H)
Fig.52
{Power-on reset and reduced-voltage reset timing chart
VIN1,VIN2
{BuDET1, BuDET2, ACCDET, and MUTE timing chart
VTHB
VIN1, VIN2
Reduced voltage detection
Vo1
VTHP
VTLP
Vo1
ACC
DET1
OFF
ON
Reduced voltage
detection
ON
OFF
RESET
CE
TPR
Power-on reset time
TDR
TPR
TDR
TdL
TdH
TDB2
TDB1
TdL
TDB1
TDB2
OFF
Vo1*2/3
Vo1*1/3
CTP
VTLA
TdH
ACCDET
BuDET1,2
DET2
VTHA
OFF
VTHP
VTLP
Vo2
Voltage maintained
with output capacity
VTLB
TPR
MUTE
TDR
VTHCE
Tm
ON
VTLCE
OFF
Td
Tm
ON
Reset delay time
Fig.55
Fig.56
11/16
Td
Tm
ON
Td
OFF
ON
zApplication circuits example
1
0
ACCSW
R1
1360 k
R3
136 k
R2
220 k
Vo1
Vo1
R4
22 k
Power
zener
10 k
10 k
0.47
VIN2
MUTE
ACCDET
CE
COMP
BuDET1
CD
GND
CD
0.1 µ
ACCM
BuM
OCP
VIN1
CE
1µ
Vo2
BuDET2
CTP
DET2
SEL
CTW
DET1
RESET
WDINH
Vo1
WDT
Vo1D
BD4911FM
CTW
1µ
+B
100 k
SW4
10 k
CTP
0.1 µ
*10 µ
(Unit)
Resistor: Ω
0
1
External boost
transistor Tr
Super capacitor
47 m
1Ω
*10 µ
Microcontroller
SW4
When Vo1 outputs 5 V
1
When Vo1 outputs 3.3 V
0
Capacitor: F
*Select the output capacitance carefully after referring to all operating
precautions.
Fig.57 Application Circuits example
12/16
zOperation Notes
1.
Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as
fuses.
2. GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
3. Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4. Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
5.
Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
6. Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure.
Use similar precaution when transporting or storing the IC.
7. Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode
or transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate,
such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
Resistor
Transistor (NPN)
(Pin A)
B
(Pin B)
～
～
C
P
P＋
P＋
E
P
P＋
P＋
N
N
P substrate
N
N
N
P substrate
Parasitic elements
GND
N
GND
Parasitic elements
(Pin B)
(Pin A)
B
C
Parasitic elements
E
GND
Other Adjacent Elements
GND
Parasitic elements
Fig.58 Example of a Simple Monolithic IC Architecture
13/16
8. Ground Wiring Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing
a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations
caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND
wiring pattern of any external components, either.
9. Recommended operating ranges
Proper circuit functionality is guaranteed within the operating temperature range for power supply voltages that fall within the
recommended ranges.
Although standard electrical characteristics values are not guaranteed, characteristics values will not vary suddenly within
these ranges.
10.
Output capacitors
Capacitors for stopping oscillation must be placed between each output pin and the GND pin.
It is recommended to use a 10 µF ceramic capacitor (B characteristics). When using an external boost transistor, the ceramic
capacitor described above should be connected in series with a 1 Ω resistor. Abrupt input voltage and load fluctuations can
affect output voltages. Output capacitor capacitance values should be determined after sufficient testing of the actual
application.
11.
Applications or inspection processes with modes where the potentials of the VIN pin and other pins may be reversed
from their normal states may cause damage to the IC's internal circuitry or elements. For example, such damage might occur
when VIN is shorted with the GND pin while an external capacitor is charged. Use capacitors that fall within the range listed
for each pin in Table 1. It is recommended to insert a diode to prevent back current flow in series with VIN, or bypass diodes
between VIN and each pin. If the VIN pin carries a lower voltage than the GND pin, insert a protective diode between the VIN
and GND pins.
Bypass diode
Diode for preventing back current flow
Output pin
Vo1
Vo2
Output capacitor
10 µF to 2200 µF
10 µF to 2200 µF
Table 1
VIN
Protective
diode
Pin
Fig.59
12. Overcurrent protection circuits
The IC incorporates a built-in overcurrent protection circuit for each output pin. Each circuit is specifically designed for the
current capacity of the corresponding pin and acts to prevent damage to the IC when an overcurrent flows.
The protection circuits use drooping type current limiting (when using the built-in transistor) or dropping fold-back type
current limiting (when using the external boost transistor). They are designed to limit current flow by not latching up in the
event of a large and instantaneous current flow originating from a large capacitor or other component. Their design allows for
sufficient safety margins. These protection circuits are effective in preventing damage due to sudden and unexpected
accidents. However, the IC should not be used in applications characterized by the continuous operation or transitioning of
the protection circuits (for example, applications where the IC is continuously connected to a load that significantly exceeds
the output current capacity).
Use caution regarding thermal design, as the output current capacity varies negatively with the temperature characteristics.
13. Overvoltage protection circuit
Overvoltage protection is designed to turn off all output voltages when the voltage differential between the VIN and GND pins
exceeds approximately 31 V (at room temperature). Use caution when determining the power supply voltage range to use.
14/16
14. Thermal shutdown circuit (TSD)
This IC incorporates a built-in thermal shutdown circuit for the protection from thermal destruction. The IC should be used
within the specified power dissipation range. However, in the event that the IC continues to be operated in excess of its
power dissipation limits, the attendant rise in the chip's temperature Tj will trigger the thermal shutdown circuit to turn off all
output power elements. The circuit will automatically reset once the chip's temperature Tj drops.
Operation of the thermal shutdown circuit presumes that the IC's absolute maximum ratings have been exceeded.
Application designs should never make use of the thermal shutdown circuit.
15. Ground precautions
Pattern routes connecting the ground points, indicated in application circuits example, to the GND pin should be sufficiently
short and should be positioned to avoid electrical interference.
16. Bypass capacitor between the VIN and GND pins
It is recommended to insert a 0.47 µF to 10 mF bypass capacitor between the VIN and GND pins. Capacitance values vary
with application. Capacitors should be tested in actual implementations, and designs should allow for sufficient margins.
Failure to use the optimum capacitance value may lead to output oscillation and other issues.
17.
Applications with modes where the potentials of the input pins (VIN1, VIN2) and GND pins and other output pins may be
reversed from their normal states may cause damage to the IC's internal circuitry. In particular, it is recommended to create a
bypass route with diodes or other components when loads including large inductance components are connected where
BEMF may be generated during startup or when output is turned off.
Fig.60
18.
Always verify the characteristics of example application circuits prior to their use. When changing other external circuit b
constants, allow for sufficient margins after considering the variability of both the ROHM IC and external components,
including both static and transient characteristics.
15/16
zSelecting a model name when ordering
B D 4 9 1 1
Part number
BD4911
F M
E 2
Package type
FM: HSOPM28
Taping type
E2 = Reel-wound embossed taping
(HSOPM28)
HSOP-M28
Embossed carrier tape
Tape
18.5 ± 0.2
9.9 ± 0.3
0.5 ± 0.2
5.15 ± 0.1
0.8
1500pcs
Direction
of feed
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.25 ± 0.1
1234
1234
1Pin
1234
1234
(Unit:mm)
Reel
1234
0.1 S
1234
0.35 ± 0.1
0.08 M
16.0 ± 0.2
14
Quantity
1234
0.11
1
2.2 ± 0.1
15
7.5 ± 0.2
28
Direction of feed
※When you order , please order in times the amount of package quantity.
The contents described herein are correct as of October, 2005
The contents described herein are subject to change without notice. For updates of the latest information, please contact and confirm with ROHM CO.,LTD.
Any part of this application note must not be duplicated or copied without our permission.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding
upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams and information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any
warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such
infringement, or arising from or connected with or related to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, implied right or license to practice or commercially exploit any intellectual property rights or other
proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer.
The products described herein utilize silicon as the main material.
The products described herein are not designed to be X ray proof.
Published by
Application Engineering Group
Catalog No.05T453Be '05.10 ROHM C 1000 TSU
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any
means without prior permission of ROHM CO.,LTD.
The contents described herein are subject to change without notice. The specifications for the
product described in this document are for reference only. Upon actual use, therefore, please request
that specifications to be separately delivered.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams information, described herein
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of
whatsoever nature in the event of any such infringement, or arising from or connected with or related
to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or
otherwise dispose of the same, no express or implied right or license to practice or commercially
exploit any intellectual property rights or other proprietary rights owned or controlled by
ROHM CO., LTD. is granted to any such buyer.
Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices
(such as audio visual equipment, office-automation equipment, communications devices, electrical
appliances and electronic toys).
Should you intend to use these products with equipment or devices which require an extremely high level
of reliability and the malfunction of which would directly endanger human life (such as medical
instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers
and other safety devices), please be sure to consult with our sales representative in advance.
It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance
of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow
for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in
order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM
cannot be held responsible for any damages arising from the use of the products under conditions out of the
range of the specifications or due to non-compliance with the NOTES specified in this catalog.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2008 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : webmaster@ rohm.co. jp
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
TEL : +81-75-311-2121
FAX : +81-75-315-0172
Appendix1-Rev2.0
工商网监
湘ICP备2023018690号
