Datasheet
Automotive 1.0 A LDO Regulator
BD50HC0MEFJ-C BD50HC0VEFJ-C
General Description
Key Specifications
◼
◼
◼
◼
◼
BD50HC0MEFJ-C and BD50HC0VEFJ-C are a LDO
regulator with output current 1.0 A. The output
accuracy is ±3% between Ta = -40 °C to +125 °C. It
has package type: HTSOP-J8 which is small and good
heat resistance. Over current protection (for protecting
the IC from destruction by output short circuit), circuit
current ON/OFF switch (for setting the circuit 0 μA at
shutdown mode), and thermal shutdown circuit (for
protecting IC from heat destruction by over load
condition) are all built in. It is usable for ceramic
capacitor and enables to improve smaller set and
long-life.
Input Power Supply Voltage Range: 4.5 V to 8.0 V
Output Voltage:
5.0 V
Output Current:
1.0 A (Max)
Shutdown Current:
0 μA (Typ)
Ambient Temperature Range Ta: -40 °C to +125 °C
Package
W (Typ) x D (Typ) x H (Max)
4.90 mm x 6.00 mm x 1.00 mm
HTSOP-J8
Features
◼
◼
◼
◼
◼
AEC-Q100 Qualified(Note 1)
High Accuracy Reference Voltage Circuit
Built-in Over Current Protection Circuit (OCP)
Built-in Thermal Shutdown Circuit (TSD)
With Shutdown Switch
(Note 1) Grade1
Application
◼ Power Train
◼ Body
◼ Other Automotive Products
Typical Application Circuit
VCC
◼ Components Externally Connected
Input Capacitor: 1.0 µF ≤ CIN (Min)
Output Capacitor: 1.0 µF ≤ CO (Min) (Note 2)
VO
CO
CIN
VO_S
EN
(Note 2) Electrolytic, tantalum and ceramic capacitors can be used.
S
GND
EXP-PAD
D
Figure 1
〇Product structure : Silicon integrated circuit
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〇This product has no designed protection against radioactive rays
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Contents
General Description ...................................................................................................................................................................... 1
Features ......................................................................................................................................................................................... 1
Application .................................................................................................................................................................................... 1
Key Specifications ........................................................................................................................................................................ 1
Package ......................................................................................................................................................................................... 1
Typical Application Circuit ........................................................................................................................................................... 1
Contents ........................................................................................................................................................................................ 2
Pin Configuration .......................................................................................................................................................................... 3
Pin Description ............................................................................................................................................................................. 3
Block Diagram............................................................................................................................................................................... 4
Description of Blocks ................................................................................................................................................................... 4
Absolute Maximum Ratings ......................................................................................................................................................... 5
Operating Ratings ......................................................................................................................................................................... 5
Electrical Characteristics ........................................................................................................................................................... 5
Thermal Resistance .................................................................................................................................................................... 6
Typical Performance Curves ........................................................................................................................................................ 7
Power Dissipation ....................................................................................................................................................................... 16
Application and Implementation ............................................................................................................................................... 17
Selection of External Components ........................................................................................................................................ 17
Input Pin Capacitor .............................................................................................................................................................. 17
Output Pin Capacitor ........................................................................................................................................................... 17
Thermal Design ........................................................................................................................................................................... 18
I/O Equivalence Circuits ............................................................................................................................................................. 20
Linear Regulators Surge Voltage Protection ............................................................................................................................ 21
Applying Positive Surge to the Input ................................................................................................................................. 21
Applying Negative Surge to the input ................................................................................................................................ 21
Linear Regulators Reverse Voltage Protection ........................................................................................................................ 21
Reverse Input /Output Voltage............................................................................................................................................ 21
Protection against Input Reverse Voltage ......................................................................................................................... 22
Protection against Output Reverse Voltage when Output Connect to an Inductor ....................................................... 23
Operational Notes ....................................................................................................................................................................... 24
1.
Reverse Connection of Power Supply ........................................................................................................................ 24
2.
Power Supply Lines ..................................................................................................................................................... 24
3.
Ground Voltage ............................................................................................................................................................. 24
4.
Ground Wiring Pattern ................................................................................................................................................. 24
5.
Operating Ratings ........................................................................................................................................................ 24
6.
Inrush Current............................................................................................................................................................... 24
7.
Testing on Application Boards .................................................................................................................................... 24
8.
Inter-pin Short and Mounting Errors ........................................................................................................................... 24
9.
Unused Input Pins ........................................................................................................................................................ 24
10.
Regarding the Input Pin of the IC ................................................................................................................................ 25
11.
Ceramic Capacitor ........................................................................................................................................................ 25
12.
Thermal Shutdown Circuit(TSD) ................................................................................................................................. 25
13.
Over Current Protection Circuit (OCP) ....................................................................................................................... 25
Ordering Information .................................................................................................................................................................. 26
Marking Diagram......................................................................................................................................................................... 26
Physical Dimension and Packing Information ......................................................................................................................... 27
Revision History ......................................................................................................................................................................... 28
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Pin Configuration
(TOP VIEW)
8 VCC
VO 1
VO_S 2
EXP-PAD
7 N.C.
GND 3
6 N.C.
N.C. 4
5 EN
Figure 2
Pin Description
Pin No.
Pin Name
Function
Descriptions
This pin generate 5.0 V output.
It is necessary to use a capacitor with a capacitance of 1.0 μF (Min)
or higher between the VO pin and GND. The detail of a selection is
described in page 17.
1
VO
Output pin
2
VO_S
Output sense pin
3
GND
GND pin
4
N.C.
Non Connection
5
EN
Enable pin
6
N.C.
Non Connection
N.C. pin can be opened or connected to GND, because it isn’t
connected it inside of IC.
7
N.C.
Non Connection
N.C. pin can be opened or connected to GND, because it isn’t
connected it inside of IC.
Input power supply voltage
It is necessary to use a capacitor with a capacitance of 1.0 μF (Min)
or higher between the VCC pin and GND. The detail of a selection
is described in page 17. If the inductance of power supply line is
high, please adjust input capacitor value.
8
VCC
Input pin
Reverse
EXP-PAD
GND
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This pin monitors output voltage.
VO_S should be connected to VO.
Ground
N.C. pin can be opened or connected to GND, because it isn’t
connected it inside of IC.
Enable the device with high input over the threshold.
Disable the device with low input under the threshold.
Ground and Heat Sink
This pin should be connected to Analog ground/Power ground.
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Block Diagram
Figure 3
Description of Blocks
Block Name
Function
EN
Control Output Voltage ON / OFF
PREREG
Internal Power Supply
TSD
Thermal Shutdown Protection
VREF
Reference Voltage
AMP
Error Amplifier
The Error Amplifier amplifies the difference between the output
voltage and the reference voltage and drive the Output MOSFET
(Power Tr.)
SOFT START
Soft Start
Output voltage rises slowly to reduce overshoot and rash
current. Output rise time is 800 µs (Typ).
Over Current Protection
To protect the device from damage caused by over current such
as output short.
If the output current reaches 1.8 A (Typ),
the output current is limited.
OCP
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Description of Blocks
A logical “HIGH” (VEN ≥ 2.4 V) at the EN enables the device
and “LOW” (VEN ≤ 0.8 V) at the EN disables the device.
Power Supply for Internal Circuit
To protect the device from overheating.
If the chip temperature (Tj) reaches 173 °C (Typ),
the output is turned off.
Generate the Reference Voltage
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Absolute Maximum Ratings
Parameter
Power Supply Voltage(Note 1)
EN
Voltage(Note 2)
Storage Temperature Range
Maximum Junction Temperature
Symbol
Limits
Unit
VCC
-0.3 to +10.0
V
VEN
-0.3 to +10.0
V
Tstg
-55 to +150
°C
Tjmax
+150
°C
ESD Withstand Voltage
(HBM)(Note 3)
VESD_HBM
±2000
V
ESD Withstand Voltage
(CDM)(Note 4)
VESD_CDM
±750
V
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit
between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit
protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings.
Caution 2:Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, design a PCB
with thermal resistance and power dissipation taken into consideration by increasing board size and copper
area so as not to exceed the maximum junction temperature rating.
(Note 1) Not to exceed Tjmax
(Note 2) The start-up orders of power supply (VCC) and the VEN do not influence if the voltage is within the operation power supply voltage range.
(Note 3) ESD susceptibility Human Body Model “HBM”; base on ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF).
(Note 4) ESD susceptibility Charged Device Model “CDM”; base on JEDEC JESD22-C101.
Operating Ratings
Symbol
Min
Max
Unit
Conditions
Start-up Power Supply Voltage
VCC
4.5
-
V
-
Input Power Supply Voltage
VCC
6.2
8.0
V
Operating Temperature
Ta
-40
+125
°C
-
EN Voltage
VEN
0.0
8.0
V
-
Output Current
IO
0.0
1.0
A
-
Input Capacitor(Note 5)
CIN
1.0
-
µF
Ceramic Capacitor
Output Capacitor(Note 5)
CO
1.0
-
µF
Ceramic Capacitor
ESR(CO)
-
7
Ω
Output Capacitor
Parameter
Equivalent Series Resistance
IO = 1 A
(Note 5) Set the value of the capacitor so that it does not fall below the minimum value.
Take into consideration the temperature characteristics, DC device characteristics and degradation with time.
Electrical Characteristics (Unless otherwise noted, Ta = -40 °C to +125 °C, VEN = 3 V, VCC = 6.0 V)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Shutdown Current
ISD
-
0
5
μA
VEN = 0 V, OFF mode
Bias Current
ICC
-
600
1200
μA
Line Regulation
Reg.I
-
25
50
mV
VCC = (VO+1.2 V) to 8.0 V
Load Regulation
Reg.IO
-
25
75
mV
IO = 0 A to 1 A
Dropout Voltage
VDROP
-
0.6
1.2
V
VCC = 5.0 V, VO_S = 0 V, IO = 1 A
Output Voltage
VO
4.85
5.00
5.15
V
IO = 0 mA
EN Low Voltage
VEN(Low)
0
-
0.8
V
-
EN High Voltage
VEN(High)
2.4
-
8.0
V
-
EN Bias Current
IEN
-
3
9
µA
-
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Thermal Resistance (Note 1)
Thermal Resistance (Typ)
Parameter
Symbol
Unit
1s(Note 3)
2s2p(Note 4)
θJA
206.4
45.2
°C/W
ΨJT
21
13
°C/W
HTSOP-J8
Junction to Ambient
Junction to Top Characterization
Parameter(Note 2)
(Note 1) Based on JESD51-2A(Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Material
Board Size
Single
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
Material
4 Layers
FR-4
Thermal Via(Note 5)
Top
Board Size
114.3 mm x 76.2 mm x 1.6 mmt
2 Internal Layers
Pitch
Diameter
1.20 mm
Φ0.30 mm
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 5) This thermal via connects with the copper pattern of all layers.
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Typical Performance Curves
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
VO
100 mV/div
VO
100 mV/div
IO
0.5 A/div
IO
0.5 A/div
10 μs/div
10 μs/div
Figure 4. Transient Response
(IO = 0 A to 1 A, Ta = -40 °C)
Figure 5. Transient Response
(IO = 0 A to 1 A, Ta = +25 °C)
VO
100 mV/div
VO
100 mV/div
IO
0.5 A/div
IO
0.5 A/div
10 μs/div
400 µs/div
Figure 6. Transient Response
(IO = 0 A to 1 A, Ta = +125 °C)
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Figure 7. Transient Response
(IO = 1 A to 0 A, Ta = -40 °C)
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Typical Performance Curves - continued
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
VO
100 mV/div
VO
100 mV/div
IO
0.5 A/div
IO
0.5 A/div
400 µs/div
400 µs/div
Figure 8. Transient Response
(IO = 1 A to 0 A, Ta = +25 °C)
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Figure 9. Transient Response
(IO = 1 A to 0 A, Ta = +125 °C)
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Typical Performance Curves - continued
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
VEN
2 V/div
VEN
2 V/div
VCC
2 V/div
VCC
2 V/div
VO
2 V/div
VO
2 V/div
400 μs/div
400 μs/div
Figure 11. VCC Rise Response
(Ta = +25 °C)
Figure 10. VCC Rise Response
(Ta = -40 °C)
VEN
2 V/div
VEN
2 V/div
VCC
2 V/div
VCC
2 V/div
VO
2 V/div
VO
2 V/div
400 μs/div
40 ms/div
Figure 13. VCC Fall Response
(Ta = -40 °C)
Figure 12. VCC Rise Response
(Ta = +125 °C)
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Typical Performance Curves - continued
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
VEN
2 V/div
VEN
2 V/div
VCC
2 V/div
VCC
2 V/div
VO
2 V/div
VO
2 V/div
40 ms/div
40 ms/div
Figure 14. VCC Fall Response
(Ta = +25 °C)
Figure 15. VCC Fall Response
(Ta = +125 °C)
VEN
2 V/div
VEN
2 V/div
VCC
2 V/div
VCC
2 V/div
VO
2 V/div
VO
2 V/div
400 μs/div
400 μs/div
Figure 16. EN Rise Response
(Ta = -40 °C)
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Figure 17. EN Rise Response
(Ta = +25 °C)
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Typical Performance Curves - continued
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
VEN
2 V/div
VEN
2 V/div
VCC
2 V/div
VCC
2 V/div
VO
2 V/div
VO
2 V/div
400 μs/div
40 ms/div
Figure 18. EN Rise Response
(Ta = +125 °C)
Figure 19. EN Fall Response
(Ta = -40 °C)
VEN
2 V/div
VEN
2 V/div
VCC
2 V/div
VCC
2 V/div
VO
2 V/div
VO
2 V/div
40 ms/div
40 ms/div
Figure 21. EN Fall Response
(Ta = +125 °C)
Figure 20. EN Fall Response
(Ta = +25 °C)
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Typical Performance Curves - continued
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
Figure 22. Output Voltage vs Ambient Temperature
(IO = 0 mA)
Figure 23. Bias Current vs Ambient Temperature
9.0
EN Bias Current:I EN [µA]
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-40 -25 -10 5 20 35 50 65 80 95 110125
Ambient Temparature:Ta[°
C]
Figure 24. Shutdown Current vs Ambient Temperature
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Figure 25. EN Bias Current vs Ambient Temperature
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Typical Performance Curves - continued
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
Figure 26. Output Voltage vs Output Current
Figure 27. Shutdown Current vs Power Supply Voltage
6.0
Output Voltage:V O [V]
5.0
4.0
3.0
2.0
1.0
0.0
125
150
175
200
Ambient Temparature:Ta[°
C]
Figure 28. Output Voltage vs Power Supply Voltage
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Figure 29. Output Voltage vs Ambient Temperature
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Typical Performance Curves - continued
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
Figure 30. Output Voltage vs Output Current
Figure 31. Dropout Voltage vs Ambient Temperature
(VCC = 5.0 V, VO_S = 0 V, IO = 1.0 A)
1200
1000
1
Bias Current:I CC [µA]
Equivalent Series Resistance:ESR(Co)[Ω]
10
0.1
Stable Region
0.01
800
600
400
Ta=-40°
C
Ta=+25°
C
200
Ta=+125°
C
0
0.001
0
0.2
0.4
0.6
0.8
0
1
0.4
0.6
0.8
1
Output Current:I O [A]
Output Current:Io[A]
Figure 32. Equivalent Series Resistance vs Output Current
[-40 °C ≤ Ta ≤ +125 °C, (VO + VDROP) ≤ VCC ≤ 8 V]
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0.2
Figure 33. Bias Current vs Output Current
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Typical Performance Curves - continued
(Unless otherwise noted, VEN = 3 V, VCC = 6.0 V, CIN = CO = 1 µF)
Figure 34. PSRR vs Frequency
(ein = 50 mVpp, Io = 100 mA, Co = 1 µF)
Figure 35. Dropout Voltage vs Output Current
(VCC = 5.0 V, VO_S = 0 V)
Figure 36. Dropout Voltage vs Output Current
(VCC = 8.0 V, VO_S = 0 V)
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Figure 37. Output Voltage vs EN Voltage
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Power Dissipation
■HTSOP-J8
IC mounted on ROHM standard board based on JEDEC.
1: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
Board material: FR4
Board size: 114.3 mm × 76.2 mm × 1.57 mmt
Top copper foil: ROHM recommended footprint
+ wiring to measure, 2 oz. copper.
3.5
Power Dissipation: Pd[W]
3
②2.70 W
2.5
2: 4-layer PCB
(Copper foil area on the reverse side of PCB: 74.2 mm × 74.2 mm)
Board material: FR4
Board size: 114.3 mm × 76.2 mm × 1.60 mmt
Top copper foil: ROHM recommended footprint
+ wiring to measure, 2 oz. copper.
2 inner layers copper foil area of PCB:
74.2 mm × 74.2 mm, 1 oz. copper.
Copper foil area on the reverse side of PCB:
74.2 mm × 74.2 mm, 2 oz. copper.
2
1.5
1
①0.60 W
0.5
0
0
25
50
75
100
125
150
Ambient Temperature: Ta[°C]
Condition 1: θJA = 206.4 °C/W, ΨJT (top center) = 21 °C/W
Condition 2: θJA = 45.2 °C/W, ΨJT (top center) = 13 °C/W
Figure 38. HTSOP-J8 Power Dissipation Graph
(Reference Data)
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Application and Implementation
Notice: The following information is provided only as reference for application and implementation, and does not guarantee
its operation on specific function, accuracy or the external components in the application. On application, after a
thorough confirmation such as characteristics of the capacitor, conduct the appropriate verification necessary in the
actual application and design with sufficient margin.
Selection of External Components
Input Pin Capacitor
When battery is distant or when input-side impedance is high, a high capacitance capacitor is required to prevent line
voltage drop. Select an input pin capacitor depending on the line impedance between power supply smoothing circuit and
the input pin. In this case, although the capacitance value setting will vary according to application, in general a capacitor
with capacitance value of 1.0 µF (Min) is recommended.
In addition, to prevent influence to the regulator characteristic from the external capacitor character variation, all input pin
capacitor mentioned above is recommended to have good DC bias characteristics and temperature characteristics
(approximately ±15%) with superior EIA standard high voltage breakdown. Mounting layout is recommended to be near
the input pin as much as possible and capacitor shall be on identical mounting side.
Output Pin Capacitor
In order to stabilize the operation of the regulator, capacitor with capacitance value ≥ 1.0 µF (Min) and ESR up to 7 Ω
(Max) must be inserted between output pin and GND pin for oscillation prevention.
Select an appropriate output pin capacitance value and ESR to improve the transient response of the regulator and the
stability of control loop. The correlation of output capacitance value and ESR is as shown in the graph on the Figure 32
(ESR stability region). As described in the graph, this product is designed to achieve a stable regulator operation with
capacitance value from 1.0 µF and with ESR value approximately within 7 Ω. (frequency bandwidth within approximately
10 kHz to 100 kHz range).
Provided however, the stable domain of this graph is based on the measurement result from single IC on our board with
resistive load. In the actual environment, stability is affected by wire impedance on the board, input power supply
impedance and load impedance, therefore we strongly recommend thorough verification in the actual usage environment.
For input voltage fluctuation or load fluctuation in frequency domain which is beyond regulator control loop
responsiveness, responsiveness in this case generally depends on capacitance value of the output pin capacitor.
Therefore, capacitance value of 1.0 µF (Min) or more for output pin capacitor is recommended. By insertion of bigger
capacitance value, further improvement of responsiveness in a high frequency domain is expected. Various types of
capacitors can be used for this high capacity output pin capacitor which includes electrolytic capacitor, electro-conductive
polymer capacitor and tantalum capacitor. Provided however, depending on the type of capacitor, ESR (≤ 7 Ω) absolute
value range, increase of ESR value and decrease of capacitance value in lower temperature needs to be taken into
consideration.
As with the input pin capacitor, in order to avoid the influence on the regulator characteristics due to variations in the
components of the external capacitor, DC bias characteristics and temperature characteristics are good for all of the
above output pin capacitors and mounting layout position (about ± 15% , X7R, X8R), it is recommended to select a
capacitor of an excellent EIA standard high withstanding voltage, place it as close to the output pin as possible so as not
to be affected by mounting impedance etc, and lay it on the same mounting surface.
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Thermal Design
Within this product, the power consumption is decided by the dropout voltage condition, the load current and the circuit
current. Refer to Package Data illustrated in Figure 38 when using the IC in an environment of Ta ≥ 25 °C. Even if the
ambient temperature Ta is at 25 °C, depending on the input voltage and the load current, chip junction temperature can be
very high. Consider the design to be Tj ≤ Tjmax = 150 °C in all possible operating temperature range. On the reverse side
of the package (HTSOP-J8) there is exposed heat pad for improving the heat dissipation.
Should by any condition the maximum junction temperature Tjmax = 150 °C rating be exceeded by the temperature
increase of the chip, it may result in deterioration of the properties of the chip. The thermal impedance in this specification is
based on recommended PCB and measurement condition by JEDEC standard. Verify the application and allow sufficient
margins in the thermal design by the following method is used to calculate the junction temperature Tj.
Tj can be calculated by either of the two following methods.
1.
The following method is used to calculate the Tj: Junction Temperature from Ta: Ambient Temperature.
Tj = Ta + PC × θJA
[°C]
Where:
Tj
Ta
PC
θJA
2.
: Junction Temperature
: Ambient Temperature
: Power Consumption
: Thermal Impedance
(Junction to Ambient)
The following method is also used to calculate the Tj: Junction Temperature from TT: top Center of Case’s (mold)
Temperature.
Tj = TT + PC × ΨJT
[°C]
Where:
Tj
TT
PC
ΨJT
: Junction Temperature
: Top Center of Case’s (mold) Temperature
: Power Consumption
: Thermal Characteristic Parameter
(Junction to Top Center of Case)
The following method is used to calculate the power consumption Pc (W) from input and output voltage, output current
and circuit current.
Pc = (VCC - VO) × IO + VCC × ICC
[W]
Where:
PC
VCC
VO
IO
ICC
: Power Consumption
: Input Voltage
: Output Voltage
: Output Current
: Circuit Current
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Thermal Design – continued
If VCC = 6.0 V, VO = 5.0 V, IO = 0.5 A, ICC = 600 μA, the power consumption Pc can be calculated as follows:
PC = (VCC - VO) × IO + VCC × ICC
= (6.0 V – 5.0 V) × 0.5 A + 6.0 V × 600 μA
= 0.5036 W
At the ambient temperature Tamax = 125 °C, the thermal Impedance (Junction to Ambient) θJA = 45.2 °C/W (4-layer PCB),
Tj = Tamax + PC × θJA
= 125 °C + 0.5036 W × 45.2 °C/W
= 147.7 °C
When operating the IC, the top center of case’s (mold) temperature TT = 100 °C, ΨJT = 13 °C/W (4-layer PCB),
Tj = TT + PC × ΨJT
= 100 °C + 0.5036 W × 13 °C/W
= 106.5 °C
For optimum thermal performance, it is recommended to expand the copper foil area of the board, increasing the layer and
thermal via between thermal land pad.
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I/O Equivalence Circuits
PIN8 : VCC
PIN1 : VO
PIN2 : VO_S
PIN5 : EN
PIN8 : VCC
33.9 kΩ
PIN2 : VO_S (Typ)
PIN5 : EN
6.5 kΩ
(Typ)
2 MΩ
(Typ)
1 MΩ
(Typ)
PIN1 : VO
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Linear Regulators Surge Voltage Protection
In the following, it explains the protection method for ICs when surge exceed absolute maximum ratings is applied to the
input.
Applying Positive Surge to the Input
If the positive surge that exceeds absolute maximum ratings 10 V is applied to the input, a Zener Diode should be
placed to protect the device in between the IN and the GND as shown in the figure 39.
IN
VIN
D1
OUT
GND
CIN
VOUT
COUT
Figure 39. Surges Higher than 10 V is Applied to the Input
Applying Negative Surge to the input
If the negative surge that exceeds absolute maximum ratings -0.3 V is applied to the input, a Schottky Diode should be
place to protect the device in between the IN and the GND as shown in the figure 40.
IN
VIN
D1
OUT
GND
CIN
VOUT
COUT
Figure 40. Surges Lower than -0.3 V is Applied to the Input
Linear Regulators Reverse Voltage Protection
A linear regulator integrated circuit (IC) requires that the input voltage is always higher than the output voltage. Output
voltage, however, may become higher than the input voltage under specific situations or circuit configurations, and that
reverse voltage and current may cause damage to the IC. A reverse polarity connection or certain inductor components can
also cause a polarity reversal between the input and output pins. In the following, it explains the protection method for ICs
when a condition of voltage reverses.
Reverse Input /Output Voltage
In a MOS linear regulator, a body diode exists as a parasitic element in the drain-source junction portion of its power
MOSFET. Reverse input/output voltage triggers the current flow from the output to the input through the body diode.
The inverted current may damage or destroy the semiconductor elements of the regulator since the effect of the
parasitic body diode is not guaranteed the operation (Figure 41).
IR
VOUT
VIN
Error
AMP.
VREF
Figure 41. Reverse Current Path in a MOS Linear Regulator
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Reverse Input /Output Voltage - continued
An effective solution to this is to connect an external bypass diode connected in-between the input and output to
prevent the reverse current from flowing inside the IC (see Figure 42). Note that the bypass diode must be turned on
before the internal circuit of the IC. Bypass diodes in the internal circuits of MOS linear regulators must have low
forward voltage VF. When the reverse current from this bypass diode is large, leakage current of the diode flows a lot
from the input to the output even if it turns off the output with IC the shutdown function; therefore, it is necessary to
choose one that has a small reverse current. Specifically, select a diode with a rated reverse voltage greater than the
input to output voltage differential and rated forward current greater than the reverse current.
D1
IN
VIN
OUT
VOUT
GND
CIN
COUT
Figure 42. Bypass Diode for Reverse Current Diversion
The lower forward voltage (VF) of Schottky barrier diodes cater to requirements of MOS linear regulators, however the
main drawback is that their reverse current (IR), which is relatively high. So, one with a low reverse current is
recommended when choosing a Schottky diode. The IR characteristics versus temperatures show increases at higher
temperatures. It is recommended that confirming the datasheet for Schottky barrier diodes.
If VIN is open in a circuit as shown in the following Figure 43 with its input/output voltage being reversed, the only
current that flows in the reverse current path is the bias current of the IC. Because the amperage is too low to damage
or destroy the parasitic element, a reverse current bypass diode is not required for this type of circuit.
ON→OFF
IBIAS
VIN
IN
VOUT
OUT
GND
CIN
COUT
Figure 43. Open VIN
Protection against Input Reverse Voltage
When connecting the power supply to the input, if plus and minus are inadvertently connected in reverse, or when
there is a possibility that the input may become lower than the GND pin, it is necessary to prevent the electrostatic
breakdown prevention diode between the IC input pin and the GND pin A large current may flow, so the IC may be
destroyed (see Figure 44).
A Schottky barrier diode or rectifier diode connected in series with the power supply as shown in Figure 45 is the
simplest solution to prevent this. There is a power loss calculated as VF x IOUT, as the forward voltage VF of the diode
drops in a correct connection. The VF of a Schottky barrier diode is lower than that of a rectifier diode gives a slightly
smaller power loss. Because diodes generate heat, select a diode that has enough allowance in power dissipation. A
reverse connection allows a negligible reverse current to flow in the diode.
VIN
IN
OUT
VOUT
D1
-
VIN
CIN
GND
COUT
CIN
+
GND
OUT
GND
VOUT
COUT
GND
Figure 44. Current Path in Reverse Input Connection
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Figure 45. Protection against Reverse Polarity 1
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Protection against Input Reverse Voltage - continued
Figure 46 shows a circuit in which a P-channel MOSFET is connected in series with the power. The diode located in
the drain-source junction portion of the MOSFET is a body diode (parasitic element). Pch MOSFET turns on in a
correct connection. The voltage drop is calculated by multiplying the ON resistance and the output current IOUT.
Therefore, it is smaller than the voltage drop by the diode (see Figure 46) and results in less of a power loss. No
current flows in a reverse connection where the MOSFET remains off.
If the voltage taking account of derating is greater than the voltage rating of MOSFET gate-source junction, lower the
gate-source junction voltage by connecting voltage dividing resistors as shown in Figure 47.
Q1
VIN
Q1
VIN
IN
GND
CIN
VOUT
VOUT
OUT
IN
R1
R2
COUT
Figure 46. Protection against Reverse Polarity 2
OUT
GND
CIN
COUT
Figure 47. Protection against Reverse Polarity 3
Protection against Output Reverse Voltage when Output Connect to an Inductor
If the output load is inductive, electrical energy accumulated in the inductive load is released to the ground upon the
output voltage turning off. There is a diode between the IC output pin and ground pin for preventing electrostatic
breakdown, in which a large current flows that could destroy the IC. To prevent this, connect a Schottky barrier diode in
parallel with the diode (see Figure 48).
Further, if a long wire is in use for the connection between the output pin of the IC and the load, observe the waveform
on an oscilloscope, since it is possible that the load becomes inductive. An additional diode is needed for a motor load
because a similar electric current flows by its counter electromotive force.
VIN
IN
VOUT
OUT
GND
CIN
COUT
GND
D1
XLL
GND
Figure 48. Current Path in Inductive Load (Output: Off)
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Operating Ratings
The function and operation of the IC are guaranteed within the range specified by the operating ratings. The
characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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Operational Notes – continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 49. Example of monolithic IC structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
13. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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Ordering Information
B
D
Part
Number
5
0
H
C
0
Output
voltage
Voltage Output
resist- current
ance
50:5.0 V
I:10 V
Package
HTSOP-J8
C0:1.0 A
y
E
Characteristic
F
J
-
Package
M:Automotive EFJ:HTSOP-J8
V:Automotive,
Additional
production line
C
E 2
Packaging and
forming specification
C: Automotive Grade
E2: Emboss tape reel
Production Line(Note 1)
A
B
Ordering Code
BD50HC0MEFJ-CE2
BD50HC0VEFJ-CE2
(Note 1) For the purpose of improving production efficiency, Production Line A and B have a multi-line configuration.
Electric characteristics noted in Datasheet does not differ between Production Line A and B. Production Line B is recommended
for new product.
Marking Diagram
HTSOP-J8 (TOP VIEW)
Part Number Marking
LOT Number
Pin 1 Mark
Part Number Marking
50HC0C
C50HC0
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Physical Dimension and Packing Information
Package Name
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Revision History
Date
Revision
Changes
26.Sep.2018
001
New release
14.Feb.2023
002
Add BD50HC0VEFJ-C
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
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