Datasheet
Voltage Detector (Reset) IC Series for Automotive Application
Free Time Delay Setting
CMOS Voltage Detector (Reset) IC
BD52xxNVX-2C Series BD5320NVX-2C
General Description
Key Specifications
ROHM's Free Time Delay Setting CMOS Voltage
Detector ICs are highly accurate, with ultra-low current
consumption feature that uses CMOS process. Delay
time setting can be control by an external capacitor. The
lineup includes N-channel open drain output (BD52xx
NVX-2C) and CMOS output (BD5320NVX-2C). The
devices are available for specific detection voltage is 1.4
V, 1.6 V, 2.0 V, 2.6 V to 3.1 V (0.1 V step).
The time delay has ±50 % accuracy in the overall
operating temperature range of -40 °C to 125 °C.
◼ Detection Voltage:
1.4 V, 1.6 V, 2.0 V, 2.6 V, 2.7 V
2.8 V, 2.9 V, 3.0 V, 3.1 V(Typ)
◼ Ultra-Low Current Consumption:
270 nA (Typ)
◼ Time Delay Accuracy:
±50 % (-40 °C to +125 °C,
CT pin capacitor ≥ 1 nF)
Special Characteristics
◼ Detection Voltage Accuracy:
±3.0 %±12 mV (VDET=1.4 V, 1.6 V)
±2.5 %(VDET=2.0 V, 2.6 V to 3.1 V)
Features
AEC-Q100 Qualified (Note 1)
Nano Energy™
Delay Time Setting Controlled by External Capacitor
Two output types (Nch open drain and CMOS
output)
◼ Miniature Surface-mount Package
◼
◼
◼
◼
Package
W(Typ) x D(Typ) x H(Max)
1.00 mm x 1.00 mm x 0.60 mm
SSON004R1010:
(Note 1) Grade 1
Application
All automotive devices that requires voltage detection
Typical Application Circuit
VDD1
VDD2
VDD1
RL
Microcontroller
Microcontroller
CVDD
CVDD
BD52xxNVX-2C
CCT
RST
BD5320NVX-2C
(Noise-reduction
Capacitor)
CCT
RST
(Noise-reduction
Capacitor)
CL
CL
GND
GND
Figure 2. CMOS Output Type
BD5320NVX-2C
Figure 1. Open Drain Output Type
BD52xxNVX-2C Series
Pin Configuration
Pin Description
SSON004R1010
CT
4
VOUT
3
VOUT
3
CT
4
PIN No.
1
2
3
Pin 1 Mark
EXP-PAD
4
1
GND
2
VDD
TOP VIEW
2
VDD
1
GND
-
BOTTOM VIEW
SSON004R1010
PIN NAME
Function
GND
GND
VDD
Power supply voltage
VOUT
Output pin
Capacitor connection pin for
CT
output delay time setting
Same potential with substrate
voltage (VDD), it is
EXP-PAD
recommended to connect to
VDD or can be left open
Nano Energy™ is a trademark or a registered trademark of ROHM Co., Ltd.
〇Product structure : Silicon integrated circuit
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〇This product has no designed protection against radioactive rays.
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BD52xxNVX-2C Series BD5320NVX-2C
Block Diagram
VDD
VOUT
Delay
Delay
Circuit
Vref
T
(Note)
(Note)
(Note)
GND
(Note) Parasitic Diode
CT
Figure 3. BD52xxNVX-2C Series
VDD
(Note)
Delay
Circuit
Vref
VOUT
(Note)
(Note)
(Note)
GND
CT
(Note) Parasitic Diode
Figure 4. BD5320NVX-2C
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BD52xxNVX-2C Series BD5320NVX-2C
Ordering Information
B
D
x
x
x
x
N V
X
-
2
Output Type
52 : Open Drain Detection Voltage Package
14 : 1.4 V
NVX : SSON004R1010
53 : CMOS
16 : 1.6 V
20 : 2.0 V
26 : 2.6 V
↓ 0.1 V step
31 : 3.1 V
C
T L
Product Rank
C : for Automotive
Packing and Forming
Specification
TL : Embossed tape and reel
Lineup
Output Type
Detection Voltage
3.1 V
3.0 V
2.9 V
2.8 V
2.7 V
2.6 V
2.0 V
1.6 V
1.4 V
Open Drain
Marking
6l
5l
4l
3l
2l
1l
g
e
CMOS
Part Number
BD5231NVX
BD5230NVX
BD5229NVX
BD5228NVX
BD5227NVX
BD5226NVX
BD5216NVX
BD5214NVX
Marking
nl
-
Part Number
BD5320NVX
-
Marking Diagram
SSON004R1010 (TOP VIEW)
LOT Number
Part Number Marking
Pin 1 Mark
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BD52xxNVX-2C Series BD5320NVX-2C
Absolute Maximum Ratings (Ta=25 °C)
Parameter
Power Supply Voltage
Nch Open Drain Output
Output Voltage
CMOS Output
Output Current
Maximum Junction Temperature
Storage Temperature Range
Symbol
VDD - GND
Limit
-0.3 to +7
GND-0.3 to +7
GND-0.3 to VDD+0.3
70
+150
-55 to +150
VOUT
IO
Tjmax
Tstg
Unit
V
V
mA
°C
°C
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance(Note 1)
Parameter
Symbol
Thermal Resistance (Typ)
Unit
1s(Note 3)
2s2p(Note 4)
θJA
450.2
97.1
°C/W
ΨJT
99
22
°C/W
SSON004R1010
Junction to Ambient
Junction to Top Characterization
Parameter(Note 2)
(Note 1) Based on JESD51-2A(Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
Thermal Via(Note 5)
Pitch
Diameter
1.20 mm
Φ0.30 mm
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 5) This thermal via connects with the copper pattern of layers 1,2, and 4. The placement and dimensions obey a land pattern.
Function Explanation
1.
Nano Energy™
Nano Energy™ is a combination of technologies which realizes ultra low quiescent current operation.
Recommended Operating Conditions
Parameter
Operating Temperature
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Symbol
Topr
4/18
Min
-40
Typ
+25
Max
+125
Unit
°C
TSZ02201-0GIG2G600050-1-2
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BD52xxNVX-2C Series BD5320NVX-2C
Electrical Characteristics (Unless otherwise specified Ta=-40 °C to +125 °C, VDD=0.8 V to 6.0 V)
Parameter
Detection Voltage
Hysteresis Voltage
Circuit Current when ON
Circuit Current when OFF
Minimum Operating Voltage
“Low” Output Voltage(Nch)
“High” Output Voltage(Pch)
Symbol
VDET
∆ VDET
IDD1
IDD2
VOPL
VOL
VOH
Output Leak Current
Ileak
Delay Time(L→H)
tPLH
Condition
VDET=1.4 V, 1.6 V, VDD=H→L,
RL=100 kΩ (Note 2)
VDET=2.0 V~3.1 V, VDD=H→L,
RL=100 kΩ (Note 2)
VDD=L→H→L, RL=100 kΩ
VDD=VDET-0.2 V
VDD=VDET+0.5 V
VOL≤0.4 V, RL=100 kΩ (Note 2)
VDD=0.8 V, ISINK=0.17 mA,
VDET=1.4 V, 1.6 V
VDD=1.2 V, ISINK=1.0 mA,
VDET=2.0 V to 3.1 V
VDD=2.4 V, ISINK=2.0 mA,
VDET=2.6 V to 3.1 V
VDD=4.8 V, ISOURCE=2.0 mA,
VDET=2.0 V
VDD=6.0 V, ISOURCE=2.5 mA,
VDET=2.0 V
VDD=VDS=6 V
VOUT=GND→50 %, CCT=0.01 μF
(Note 3) (Note 4)
Min
VDET(T)
×0.97
-0.012
VDET(T)
×0.975
Limit
Typ
VDET(T)
(Note 1)
VDET(T)
(Note 1)
Max
VDET(T)
×1.03
+0.012
VDET(T)
×1.025
VDET
×0.035
0.80
VDET
×0.05
0.23
0.27
-
VDET
×0.065
1.50
1.60
-
-
-
0.4
-
-
0.4
-
-
0.4
VDD-0.4
-
-
Unit
V
V
µA
µA
V
V
V
VDD-0.4
-
-
-
-
1.0
µA
27.7
55.5
83.2
ms
(Note 1) VDET(T): Standard Detection Voltage (1.4 V, 1.6 V, 2.0 V, 2.6 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V)
(Note 2) RL: Pull-up resistor connected between VOUT and power supply
(Note 3) tPLH: VDD=(VDET(T)–0.5 V) → (VDET(T)+0.5 V) for VDET=1.4 V, 1.6 V, 2.0 V, 2.6 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V
(Note 4) CT delay capacitor range: open to 4.7 µF
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BD52xxNVX-2C Series BD5320NVX-2C
Typical Performance Curves
0.6
1.0
BD5229NVX-2C
BD5229NVX-2C
0.9
0.5
Ta=+125 °C
0.7
0.6
Circuit Current : IDD[µA]
Circuit Current : IDD[µA]
0.8
Ta=+105 °C
0.5
Ta=+25 °C
0.4
0.3
0.2
0.4
0.3
VDD=VDET-0.2 V
0.2
0.1
Ta=-40 °C
0.1
0.0
0.0
0
1
2
3
4
5
Power Supply Voltage : VDD[V]
-40 -25 -10 5
6
20 35 50 65 80 95 110 125
Temperature : Ta[°C]
Figure 6. Circuit Current vs Temperature
Figure 5. Circuit Current vs Power Supply Voltage
6.0
3.10
BD5229NVX-2C
3.05
Detection Voltage : VDET[V]
5.0
Detection Voltage : VDET[V]
VDD=VDET+0.5 V
4.0
3.0
2.0
1.0
BD5229NVX-2C
3.00
2.95
2.90
2.85
2.80
2.75
0.0
2.70
2.4
2.6
2.8
3.0
3.2
Power Supply Voltage : VDD[V]
3.4
-40 -25 -10 5
Figure 7. Detection Voltage vs Power Supply Voltage
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20 35 50 65 80 95 110 125
Temperature : Ta[°C]
Figure 8. Detection Voltage vs Temperature
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BD52xxNVX-2C Series BD5320NVX-2C
Typical Performance Curves - continued
6.0
6.0
BD5229NVX-2C
BD5229NVX-2C
5.0
Ta=+125 °C
4.0
Output Voltage : VOUT[V]
Output Voltage : VOUT[V]
5.0
Ta=+105 °C
Ta=+25 °C
3.0
Ta=-40 °C
2.0
4.0
3.0
Ta=+125 °C
2.0
1.0
1.0
0.0
0.0
Ta=+105 °C
Ta=+25 °C
Ta=-40 °C
0.0
0.5
1.0 1.5 2.0 2.5 3.0 3.5
Power Supply Voltage : VDD[V]
0.0
4.0
Figure 9. I/O Characteristics
(VOUT Pull-up to 5 V, RL=100 kΩ)
4.0
1.0
BD5229NVX-2C
Minimum Operating Voltage : VOPL[V]
Minimum Operating Voltage : VOPL[V]
1.0 1.5 2.0 2.5 3.0 3.5
Power Supply Voltage : VDD[V]
Figure 10. I/O Characteristics
(VOUT Pull-up to VDD, RL=100 kΩ)
1.0
0.9
0.5
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.9
0.8
BD5229NVX-2C
CC
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0.0
-40 -25 -10 5
-40 -25 -10
20 35 50 65 80 95 110 125
Temperature : Ta[°C]
20 35 50 65 80 95 110 125
Temperature : Ta[°C]
Figure 12. Minimum Operating Voltage vs Temperature
(VOUT Pull-up to VDD, RL=100 kΩ)
Figure 11. Minimum Operating Voltage vs Temperature
(VOUT Pull-up to 5 V, RL=100 kΩ)
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BD52xxNVX-2C Series BD5320NVX-2C
Typical Performance Curves - continued
100
100
BD5229NVX-2C
80
70
60
50
40
30
20
10
80
70
60
50
40
30
20
10
0
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature : Ta[°C]
-40 -25 -10
100
100,000
BD5229NVX-2C
90
Ta=-40 °C
Delay Time (H→L) : tPHL[µs]
10,000
Ta=+25 °C
1,000
100
Ta=+105 °C
10
Ta=+125 °C
0.01
0.1
1
CT Pin Capacitance : CCT[µF]
10
Figure 15. Output Delay Time (L→H) vs CT Pin Capacitance
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BD5229NVX-2C
80
70
Ta=-40 °C
60
50
Ta=+25 °C
40
30
Ta=+105 °C
20
10
1
0.001
5 20 35 50 65 80 95 110 125
Temperature : Ta [°C]
Figure 14. Output Delay Time (H→L) vs Temperature
Figure 13. Output Delay Time (L→H) vs Temperature
(CCT=10 nF)
Delay Time (L→H) : tPLH[ms]
BD5229NVX-2C
90
Delay Time (H→L) : tPHL[µs]
Delay Time (L→H) : tPLH[ms]
90
0
0.001
Ta=+125 °C
0.01
0.1
1
CT Pin Capacitance : CCT[µF]
10
Figure 16. Output Delay Time (H→L) vs CT Pin Capacitance
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BD52xxNVX-2C Series BD5320NVX-2C
Typical Performance Curves - continued
70
70
60
VDD=2.0 V
"High" Output Current : IOH[mA]
"Low" Output Current : IOL[mA]
60
50
VDD=1.8 V
40
30
VDD=1.2 V
20
10
VDD=0.8 V
VDD=4.0 V
50
40
VDD=3.0 V
30
20
10
BD5229NVX-2C
BD5320NVX-2C
0
0
0.0
0.5
1.0
1.5
2.0
Drain-Source Voltage : VDS[V]
2.5
0.0
2.0
3.0
4.0
5.0
Drain-Source Voltage : VDS [V]
Figure 17. “Low” Output Current vs Drain-Source Voltage
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1.0
Figure 18. “High” Output Current vs Drain-Source Voltage
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BD52xxNVX-2C Series BD5320NVX-2C
Application Information
Operation Description
The detection and release voltage are used as threshold voltages. When the voltage applied to the V DD reaches the
applicable threshold voltage, the VOUT level switches from either “H”→“L” or from “L”→“H”. BD52xxNVX-2C series and
BD5320NVX-2C have delay time function, which set tPLH (output “L”→”H”) using an external capacitor connected in CT pin
(CCT).
Because the BD52xxNVX-2C series uses an open drain output type, it is necessary to connect a pull up resistor to V DD or
another power supply. [In this case, the output (VOUT) “H” voltage becomes VDD or the voltage of the other power supply].
VDD
VDD
VOUT
Vref
Delay
Circuit
Vref
GND
Delay
Circuit
VOUT
GND
CT
Figure 19. (BD52xxNVX-2C type internal block diagram)
CT
Figure 20. (BD5320NVX-2C type internal block diagram)
Setting of Detector Delay Time
Delay time L→H (tPLH) is the time when VOUT rises to 1/2 of VDD after VDD rises up and beyond the release voltage
(VDET+∆VDET).
Delay time L→H (tPLH) is determined by CT capacitor and can be calculated from the following formula. When CT capacitor
≥ 1nF, tCTO has less effect and tPLH computation is shown on Example No.2. The result has ±50 % tolerance within the
operating temperature range of -40 °C to +125 °C.
Formula: (Ta=25 °C)
𝑡𝑃𝐿𝐻 = 𝐶𝐶𝑇 × 𝐷𝑒𝑙𝑎𝑦 𝐶𝑜𝑒𝑓𝑓𝑖𝑐𝑖𝑒𝑛𝑡 + 𝑡𝐶𝑇𝑂
[s]
where:
CCT is the CT pin external capacitor
Delay Coefficient is equal to 5.55 x 106
tCTO is the delay time when CT=open (Note 1)
Temperature
Ta = -40 °C to +125 °C
Delay Time (tCTO)
Min
15 µs
Typ
50 µs
Max
150 µs
(Note 1) tCTO is design guarantee only
Example No.1:
CT capacitor = 100 pF
𝑡𝑃𝐿𝐻_𝑚𝑖𝑛 = (100 × 10−12 × 5.55 × 106 ) × 0.5 + 15 × 10−6 = 292 µ𝑠
𝑡𝑃𝐿𝐻_𝑡𝑦𝑝 = (100 × 10−12 × 5.55 × 106 ) × 1.0 + 50 × 10−6 = 605 µ𝑠
𝑡𝑃𝐿𝐻_𝑚𝑎𝑥 = (100 × 10−12 × 5.55 × 106 ) × 1.5 + 150 × 10−6 = 983 µ𝑠
Example No.2:
CT capacitor = 1 nF
𝑡𝑃𝐿𝐻_𝑡𝑦𝑝 = 1 × 10−9 × 5.55 × 106 = 5.55 𝑚𝑠
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BD52xxNVX-2C Series BD5320NVX-2C
Application Information - continued
Timing Waveform
The following shows the relationship between the input voltage VDD and the output voltage VOUT when the power supply
voltage VDD is sweep up and sweep down.
VDD
RL
VDD
Delay
Circuit
Vref
VOUT
GND
CT
CCT
Figure 21. BD52xxNVX-2C Set-up
VDD
VDET+ΔVDET
Hysteresis Voltage
(ΔVDET)
VDET
VOPL: