BD6039GU-E2

System Power Supply ICs for CCD Camera of Mobile Phones Power Supply for CCD Camera Module BD6039GU No.10033EAT02 ●Description BD6039GU is system power supply LSI for CCD camera that supplies all voltage sources for CCD camera. This IC has Step up DC/DC converter and LDO for CCD sensor, Inverted DC/DC converter for CCD sensor, and LDO (7ch). REGA, REG1, REG8, REG5 can be connected the power supply independent from VBAT. Each output voltage has an adjustable by the register, and this IC can correspond to various CCD modules. A necessary power supply for CCD camera system is integrated into 1chip, and it contributes to space saving. BD6039GU achieves compact size with the chip size package. ●Features 1) The BD6039GU is equipped with all voltage sources for CCD camera system. 2) Each output has an adjustable voltage; hence this IC can correspond to various CCD modules. 2 3) The BD6039GU is controlled by I C BUS format. 2 4) The BD6039GU employs 4.8mm chip size package, so this IC achieves compact size. ●Functions 1) Step up DC/DC converter and LDO for CCD sensor (+15V/+14.5V/+13V) 2) Inverted DC/DC converter for CCD sensor (-8V/-7.5V/-7V) 3) 7ch Series Regulator REG1 : 1.2V, Iomax=210mA REG2 : 3.0V, Iomax=50mA REG5 : 1.5V/1.8V, Iomax=100mA REG6 : 3.2V/3.3V, Iomax=260mA REG7 : 3.0V/3.3V, Iomax=50mA REG8 : 1.5V/1.8V, Iomax=100mA REGA : 1.5V/1.8V, Iomax=100mA 2 4) Correspondence to I C BUS format 5) Thermal shutdown (Auto-return type) 6) VCSP85H4 chip size package (1.0mm max) ●Absolute Maximum Ratings(Ta=25℃) Parameter Maximum Applied voltage 1 Maximum Applied voltage 2 Maximum Applied voltage 3 Maximum Applied voltage 4 Power Dissipation Operating Temperature Range Storage Temperature Range (Note 1) (Note 2) (Note 3) (Note 4) (Note 5) Symbol VMAX1 VMAX2 VMAX3 VMAX4 Pd Topr Tstg Ratings 20 18 -13.5 6 2110 -30 ～ +85 -55 ～ +150 Unit V V V V mW ℃ ℃ (Note 1) SWP, VPLUS1, VPLUS2 pin (Note 2) VDD3 pin (Note 3) VDD4, SWN pin (Note 4) Except Note1~Note3 pin (Note 5) Power dissipation deleting is 16.9mW/ ℃, when it’s used in over 25℃. (It’s deleting is on the board that is ROHM’s standard) ●Recommended Operating Conditions (VBAT≥VIO, Ta=-30~85 ℃) Parameter Symbol VBAT input voltage VIO pin voltage VBAT VIO Limits 2.7 ～ 5.5 1.65 ～ 3.3 Unit V V www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/24 2010.03 - Rev.A BD6039GU ●Electrical Characteristics(Unless otherwise specified, Ta=25℃, VBAT=3.6V, VIO=1.8V) Limits Parameter Symbol Unit Condition Min. Typ. Max. 【Circuit Current】 VBAT Circuit current 1 VBAT Circuit current 2 VBAT Circuit current 3 VBAT Circuit current 4 VBAT Circuit current 5 VBAT Circuit current 6 VBAT Circuit current 7 VBAT Circuit current 8 VBAT Circuit current 9 VBAT Circuit current 10 UVLO detect voltage 【SWREG3(Step up DC/DC)】 Output voltage 1 Output voltage 1 Output voltage 1 Output current Efficiency Oscillator frequency SW saturation voltage Over voltage protection Over current protection Soft start current 【SWREG4(Inverted DC/DC)】 Output voltage 1 Output voltage 2 Output voltage 2 Output current Efficiency Oscillator frequency SW saturation voltage Over voltage protection Over current protection Soft start current Discharge resister at OFF VoND1 VoND2 VoND3 IoND EffND foscND VsatND OvND OcND SftND ROFFN -8.4 -7.9 -7.4 0.8 -10.5 0.5 -8.0 -7.5 -7.0 (70) 1.0 100 -10.0 0.77 300 1.0 -7.6 -7.1 -6.6 40 1.2 200 -9.5 1 1.5 V V V mA % MHz mV V A mA kΩ Iin=100mA Io=40mA Io=40mA Io=40mA VBAT > 3.0V(Note 6) Io=40mA(Note 6) VoPD1 VoPD2 VoPD3 IoPD EffPD foscPD VsatPD OvPD OcPD SftPD 0.8 18.0 16.5 16.0 14.5 (80) 1.0 100 18.5 0.77 300 40 1.2 200 19.0 1 V V V mA % MHz mV V A mA Iin=100mA Io=40mA Io=40mA Io=40mA (Note 6) Technical Note IBAT1 IBAT2 IBAT3 IBAT4 IBAT5 IBAT6 IBAT7 IBAT8 IBAT9 IBAT10 UVLO 2.15 0.1 0.5 115 115 127 145 115 127 127 9 2.4 3.0 3.0 175 175 195 220 175 195 195 14 2.65 μA μA μA μA μA μA μA μA μA mA V RST=0V, VIO=0V RST=0V, VIO=1.8V REG1:ON, Io=0mA REG2:ON, Io=0mA REG5:ON, Io=0mA REG6:ON, Io=0mA REG7:ON, Io=0mA REG8:ON, Io=0mA REGA:ON, Io=0mA SWREG3:ON,REG3:ON, SWREG4:ON, Io=0mA VBAT falling Io=40mA(Note 6) (Note 6) The power efficiency changes with the fluctuation of external parts and the board mounting condition. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/24 2010.03 - Rev.A BD6039GU ●Electrical Characteristics(Unless otherwise specified, Ta=25℃, VBAT=3.6V, VIO=1.8V) Limits Symbol Unit Parameter Min. Typ. Max. 【REG1 (1.2V LDO)】 Vo1 ΔVo11 ΔVo12 RR1 Ilim01 ROFF1 Vo2 Vsat2 ΔVo21 ΔVo22 RR2 Ilim02 ROFF2 Vo31 Vo32 Vo33 Vsat3 ΔVo31 ΔVo32 ΔVo33 RR3 Ilim03 ROFF3 Vo51 Vo52 Vsat5 ΔVo51 ΔVo52 RR5 Ilim05 ROFF5 Vo61 Vo62 Vsat6 ΔVo61 ΔVo62 RR6 Ilim06 ROFF6 1.140 2.910 14.55 14.05 12.55 0.5 1.440 1.746 3.104 3.201 1.20 10 10 50 200 1.0 3.00 0.2 10 10 60 50 1.0 15.0 14.5 13.0 0.32 20 10 ±100 100 1.0 1.50 1.80 0.09 10 10 50 200 1.0 3.20 3.30 0.07 10 10 60 250 1.0 1.260 60 60 400 1.5 3.090 0.3 60 60 100 1.5 15.45 14.95 13.45 0.5 80 60 3 1.5 1.560 1.854 0.14 60 60 400 1.5 3.296 3.399 0.13 60 60 500 1.5 V mV mV dB mA kΩ V V mV mV dB mA kΩ V V V V mV mV Io=40mA Io=40mA Io=40mA Io=50mA VBAT=2.5V, Io=50mA Io=1~50mA Io=210mA Output voltage Load stability Input stability Ripple rejection ratio Short circuit current limit Discharge resister at OFF 【REG2 (3.0V LDO)】 Output voltage Output voltage Load stability Input stability Ripple rejection ratio Short circuit current limit Discharge resister at OFF 【REG3 Output voltage1 Output voltage2 Output voltage3 Output voltage Load stability Input stability Output voltage temperature fluctuation rate Output ripple voltage Short circuit current limit Discharge resister at OFF 【REG5 (1.5V/1.8V LDO)】 V V V mV mV dB mA kΩ V V V mV mV dB mA kΩ Io=260mA Io=260mA Io=100mA Io=100mA Output voltage1 Output voltage2 Output voltage Load stability Input stability Ripple rejection ratio Short circuit current limit Discharge resister at OFF 【REG6 (3.2V/3.3V LDO)】 Output voltage1 Output voltage2 Output voltage Load stability Input stability Ripple rejection ratio Short circuit current limit Discharge resister at OFF (Note 7) BW: Band width Technical Note Condition Io=1~210mA, VIN1=1.8V VBAT=3.2~4.5V, Io=210mA, VIN1=1.8V f=100Hz, VBAT(AC)=200mVp-p, VIN1=1.8V, Io=50mA, BW=20Hz~20kHz Vo=0V VBAT=3.4~4.5V, Io=50mA f=100Hz, VBAT(AC)=200mVp-p Io=50mA, BW=20Hz~20kHz Vo=0V (15V/14.5V/13V LDO)】 VPLUS2=11V, Io=40mA Io=1～40mA VPLUS2=16.5～17.5V, Io=40mA ppm/℃ Ta=-30℃～85℃, Io=40mA mVp-p mA kΩ Io=40mA, BW=20Hz～80kHz(Note 7) Vo=0V VIN5=1.7V, Io=100mA, Vo=1.8V Io=1~100mA, Vo=1.8V, VIN5=2.8V VBAT=3.3~4.5V, Io=100mA, Vo=1.8V VIN5=2.8V f=100Hz, VBAT(AC)=200mVp-p, Vo=1.8V VIN5=2.8V, Io=50mA, BW=20Hz~20kHz Vo=0V VIN6=3.2V, Io=260mA, Vo=3.3V Io=1~260mA, Vo=3.3V, VIN6=3.6V VBAT=3.4~4.5V, Io=260mA, Vo=3.3V VIN6=3.6V f=100Hz, VBAT(AC)=200mVp-p, Vo=3.3V VIN6=3.8V, Io=50mA, BW=20Hz~20kHz Vo=0V www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/24 2010.03 - Rev.A BD6039GU ●Electrical Characteristics(Unless otherwise specified, Ta=25℃, VBAT=3.6V, VIO=1.8V) Limits Parameter Symbol Unit Min. Typ. Max. 【REG7 (3.0V/3.3V LDO)】 Vo71 Vo72 Vsat7 Δvo71 Δvo72 RR7 Ilim07 ROFF7 Vo81 Vo82 Vsat8 Δvo81 Δvo82 RR8 Ilim08 ROFF8 VoA1 VoA2 VsatA ΔVoA1 ΔVoA2 RRA Ilim0A ROFFA VIL VIH Vhys VOL li 2.910 3.201 1.440 1.746 1.440 1.746 -0.3 0.75VIO 0.05VIO 0 -10 3.00 3.30 0.2 10 10 60 50 1.0 1.50 1.80 0.09 10 10 50 200 1.0 1.50 1.80 0.09 10 10 50 200 1.0 3.090 3.399 0.3 60 60 100 1.5 1.560 1.854 0.14 60 60 400 1.5 1.560 1.854 0.14 60 60 400 1.5 0.25VIO VBAT+0.3 0.30 10 V V V mV mV dB mA kΩ V V V mV mV dB mA kΩ V V V mV mV dB mA kΩ V V V V μA Io=100mA Io=100mA Io=100mA Io=100mA Io=50mA Io=50mA Output voltage1 Output voltage2 Output voltage Load stability Input stability Ripple rejection ratio Short circuit current limit Discharge resister at OFF 【REG8 (1.5V/1.8V LDO)】 Output voltage1 Output voltage2 Output voltage Load stability Input stability Ripple rejection ratio Short circuit current limit Discharge resister at OFF 【REGA (1.5V/1.8V LDO)】 Output voltage1 Output voltage2 Output voltage Load stability Input stability Ripple rejection ratio Short circuit current limit Discharge resister at OFF 【I2C Input (RST, SDA, SCL)】 LOW level input voltage HIGH level input voltage Hysteresis of Schmitt trigger input LOW level output voltage (SDA) at 3mA sink current Input current each I/O pin Technical Note Condition VBAT=2.5V, Io=50mA, Vo=3.0V Io=1~50mA, Vo=3.0V VBAT=3.4~4.5V, Io=50mA, Vo=3.0V f=100Hz, VBAT(AC)=200mVp-p, Vo=3.0V Io=50mA, BW=20Hz~20kHz Vo=0V VIN8=1.7V, Io=100mA, Vo=1.8V Io=1~100mA, Vo=1.8V, VIN8=2.8V VBAT=3.3~4.5V, Io=100mA, Vo=1.8V VIN8=2.8V f=100Hz, VBAT(AC)=200mVp-p, Vo=1.8V VIN8=2.8V, Io=50mA, BW=20Hz~20kHz Vo=0V VINA=1.7V, Io=100mA, Vo=1.8V Io=1~100mA, Vo=1.8V, VINA=2.8V VBAT=3.3~4.5V, Io=100mA, Vo=1.8V VINA=2.8V f=100Hz, VBAT(AC)=200mVp-p, Vo=1.8V VINA=2.8V, Io=50mA, BW=20Hz~20kHz Vo=0V input voltage from (0.1 x VIO) to (0.9 x VIO) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/24 2010.03 - Rev.A BD6039GU ●Power Dissipation (On the ROHM’s standard board) Technical Note 2.5 2210mW 2 Power Dissipation Pd （W) 1.5 1 0.5 0 0 25 50 75 100 125 150 Ta(℃) Fig.1 Power Dissipation Information of the ROHM’s standard board Material : glass-epoxy Size : 50mm×58mm×1.75mm (8 Layer) Pattern of the board Refer to after page www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/24 2010.03 - Rev.A BD6039GU ●Block Diagram / Application Circuit Example Battery 2.2μF(6.3V) F Technical Note 10μH RB521S-30 GNDPS VPLUS1 VBAT1 VBAT2 VBAT3 VBAT4 VBAT5 VBAT6 VBAT7 R 0.08Ω SWP GNDP 1μF(25V) VPLUS2 2.2μF(6.3V) REG3 Current Sense Over Voltage Limit 15V / 14.5V / 13V Iomax=40mA VDD3 1μF(16V) 4.4μF(16V) Q + - Driver VIN1 Control REG1 1.2V Iomax=210mA S VDD1 2.2μF(6.3V) 1μF(6.3V) + OSC VREF REG2 Feed Back 3.0V Iomax=50mA VDD2 1μF(6.3V) 1μF(6.3V) VREF + 0.1μF(6.3V) + VIN5 SWREG3 REG5 1.5V / 1.8V Iomax=100mA VDD5 2.2μF(6.3V) 1μF(6.3V) VIO TSD REG7 3.0V / 3.3V Iomax=50mA VDD7 1μF(6.3V) 1μF(6.3V) RST CPU SDA SCL IC 2 VIN8 CONT REG8 1.5V / 1.8V Iomax=100mA VDD8 2.2μF(6.3V) VINA 1μF(6.3V) TO1 TO2 TO3 TO4 TO5 TO6 TO7 UVLO REGA 1.5V / 1.8V Iomax=100mA AVDD 2.2μF(6.3V) 1μF(6.3V) SWREG4 Current Sense VBATN2 - VBATN1 0.08Ω + OSC 2.2μF(6.3V) + Battery - Control R S Q Driver SWN RB521S-30 Over Voltage Limit VIN6 VDD6 + REG6 3.2V / 3.3V Iomax=260mA 4.7μH VDD4 1μF(16V) 9.4μF(16V) + 9.4μF(16V) 4.7μF(6.3V) -8V / -7.5V / -7V Iomax=40mA TESTO3 TESTO2 TESTO1 T4 T2 T1 GND1 GND2 GND3 GND4 GND5 GND6 GND7 T3 Fig.2 Block Diagram / Application Circuit example www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. GND8 6/24 2010.03 - Rev.A BD6039GU ●Pin Configuration ［Bottom View］ Technical Note J T4 VDD3 VPLUS1 VBAT5 GND6 GNDP SWP AVDD T3 H VDD2 VBAT6 VPLUS2 TESTO3 TESTO1 GNDPS VBAT4 VINA VIN5 G VDD7 TESTO2 NC VDD5 VIN1 F GND7 SDA VDD1 VIN8 E SCL VIO VDD8 VDD6 D TO7 RST VREF VIN6 C TO5 TO6 VBAT3 GND5 B TO3 VBAT7 TO4 GND1 VBAT1 VBATN1 GND3 VBAT2 GND4 A T1 1 TO1 2 TO2 3 GND8 4 SWN 5 VBATN2 6 GND2 7 VDD4 8 T2 9 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/24 2010.03 - Rev.A BD6039GU ●Package Outline VCSP85H4 SIZE A ball pitch : CSP small package 2 : 4.8mm (A difference in public : X,Y Both ±0.05mm) : 0.5 mm Height 1.0mm max Technical Note (Unit: mm) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/24 2010.03 - Rev.A BD6039GU ●Pin Functions(total 57Pins) No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 Pin No. Pin Name B5 B8 C8 H7 J4 H2 B2 D8 E2 D2 F2 E1 D1 C2 C1 B1 A3 A2 B3 D9 E9 J7 J6 H6 J3 H3 J2 G9 F8 H1 H9 G8 G1 F9 E8 H8 J8 A6 B6 A5 A8 A1 A9 J9 J1 H5 G2 H4 B4 A7 B7 B9 C9 J5 F1 A4 G7 VBAT1 VBAT2 VBAT3 VBAT4 VBAT5 VBAT6 VBAT7 VREF VIO RST SDA SCL TO7 TO6 TO5 TO3 TO2 TO1 TO4 VIN6 VDD6 SWP GNDP GNDPS VPLUS1 VPLUS2 VDD3 VIN1 VDD1 VDD2 VIN5 VDD5 VDD7 VIN8 VDD8 VINA AVDD VBATN2 VBATN1 SWN VDD4 T1 T2 T3 T4 TESTO1 TESTO2 TESTO3 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 NC I/O O I I I I O O I I O I O O I O O I O I O I I O I I I I I O O O ESD Diode For Power For GND GND GND GND GND GND GND GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND GND VBAT GND GND VBAT GND GND GND GND GND GND VBAT VBAT GND GND VPLUS2 GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND GND GND VBAT GND VBAT GND VBAT GND VBAT GND VBAT GND GND VBAT GND GND VBAT VBAT VBAT VBAT VBAT VBAT VBAT VBAT Functions Battery is connected Battery is connected Battery is connected Battery is connected Battery is connected Battery is connected Battery is connected Reference voltage output Power supply for logic Reset input (L: reset, H: reset cancel) I2C data input I2C clock input Test pin (Open) Test pin (Open) Test pin (Open) Test pin Open) Test pin (Open) Test pin (Open) Test pin (Open) Input voltage for REG6 (connect to VBAT) REG6 output pin SWREG3 coil switching pin SWREG3 Power ground SWREG3 Power ground SWREG3 boost voltage feedback pin Input voltage forREG3 REG3 output pin Input voltage for REG REG1 output pin REG2 output pin Input voltage for REG5 REG5 output pin REG7 output pin Input voltage for REG8 REG8 output pin Input voltage for REGA REGA output pin SWREG4 current sense pin SWREG4 current sense pin SWREG4 coil switching pin SWREG4 boost voltage feedback pin Test pin Test pin Test pin Test pin Test pin Test pin Test pin Ground Ground Ground Ground Ground Ground Ground Ground NC pin Technical Note Initial conditions A A A A A A A P C H I H F G F G F G A A Q A B B A A U C Q Q C Q Q C Q C Q A A B V S S S S N M N B B B B B B B B W www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/24 2010.03 - Rev.A BD6039GU ●Equivalent Circuit Technical Note A B VBAT C VBAT D VBAT E F VBAT G H VBAT VIO I VBAT VIO J VBAT VIO K VIO VIO L VBAT VBAT M VBAT VBAT N VBAT O VBAT P VBAT VBAT Q VBAT VBAT R VBAT VBAT S VBAT VBAT T VIO VBAT U VPLUS2 VPLUS2 V W × OPEN www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/24 2010.03 - Rev.A BD6039GU ●I2C BUS format The writing/reading operation is based on the I2C slave standard. ◦Slave address A7 A6 0 0 Technical Note A5 0 A4 1 A3 0 A2 0 A1 1 R/W 1/0 ◦Bit Transfer SCL transfers 1-bit data during H. SCL cannot change signal of SDA during H at the time of bit transfer. If SDA changes while SCL is H, START conditions or STOP conditions will occur and it will be interpreted as a control signal. SDA SCL data line Stable; data valid change of data allowed ◦START and STOP condition When SDA and SCL are H, data is not transferred on the I2C- bus. This condition indicates, if SDA changes from H to L while SCL has been H, it will become START (S) conditions, and an access start, if SDA changes from L to H while SCL has been H, it will become STOP (P) conditions and an access end. SDA SCL S START condition P STOP condition ◦Acknowledge It transfers data 8 bits each after the occurrence of START condition. A transmitter opens SDA after transfer 8bits data, and a receiver returns the acknowledge signal by setting SDA to L. DATA OUTPUT BY TRANSMITTER not acknowledge DATA OUTPUT BY RECEIVER acknowledge SCL S START condition 1 2 8 clock pulse for acknowledgement 9 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/24 2010.03 - Rev.A BD6039GU Technical Note ◦Writing protocol A register address is transferred by the next 1 byte that transferred the slave address and the write-in command. The 3rd byte writes data in the internal register written in by the 2nd byte, and after 4th byte or, the increment of register address is carried out automatically. However, when a register address turns into the last address(07h), it is set to 00h by the next transmission. After the transmission end, the increment of the address is carried out. *1 S X X X X X X X 0 A A7 A6 A5 A4 A3 A2 A1 A0 A D7 D6 D5 D4 D3 D2 D1 D0 A slave address R/W=0(write) from master to slave from slave to master register address DATA register address increment A=acknowledge(SDA LOW) A=not acknowledge(SDA HIGH) S=START condition P=STOP condition *1: Write Timing *1 D7 D6 D5 D4 D3 D2 D1 D0 A P DATA register address increment ◦Reading protocol It reads from the next byte after writing a slave address and R/W bit. The register to read considers as the following address accessed at the end, and the data of the address that carried out the increment is read after it. If an address turns into the last address(07h), the next byte will read out 00h. After the transmission end, the increment of the address is carried out. SXXXX XXX slave address R/W=1(read) 1 A D7 D6 D5 D4 D3 D2 D1 D0 A DATA register address increment A=acknowledge(SDA LOW) A=not acknowledge(SDA HIGH) S=START condition P=STOP condition D7 D6 D5 D4 D3 D2 D1 D0 A P DATA register address increment from master to slave from slave to master ◦Multiple reading protocols After specifying an internal address, it reads by repeated START condition and changing the data transfer direction. The data of the address that carried out the increment is read after it. If an address turns into the last address, the next byte will read out 00h. After the transmission end, the increment of the address is carried out. S X X X X X X X 0 A A7 A6 A5 A4 A3 A2 A1 A0 A Sr X X X X X X X 1 A slave address R/W=0(write) register address slave address R/W=1(read) D7 D6 D5 D4 D3D2 D1D0 A DATA register address increment from master to slave from slave to master D7D6 D5D4D3D2D1D0 A P DATA register address increment A=acknowledge(SDA LOW) A=not acknowledge(SDA HIGH) S=START condition P=STOP condition Sr=repeated START condition As for reading protocol and multiple reading protocols, please do A(not acknowledge) after doing the final reading operation. It stops with read when ending by A(acknowledge), and SDA stops in the state of Low when the reading data of that time is 0. However, this state returns usually when SCL is moved, data is read, and A(not acknowledge) is done. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/24 2010.03 - Rev.A BD6039GU ●Timing diagram Technical Note SDA t BUF tf t LOW SCL t HD;STA t HD;DAT tr t SU;DAT tf t HD;STA tr t SP S t SU;STA t HIGH Sr t SU;STO P S ●Electrical Characteristics (Unless otherwise specified, Ta=25oC, VBAT=3.6V, VIO=1.8V/3.0V) Standard-mode Fast-mode Parameter Symbol Min. Typ. Max. Min. Typ. Max. I2C BUS format Unit SCL clock frequency LOW period of the SCL clock HIGH period of the SCL clock Hold time (repeated) START condition After this period, the first clock is generated Set-up time for a repeated START condition Data hold time Data set-up time Set-up time for STOP condition Bus free time between a STOP and START condition fSCL tLOW tHIGH tHD;STA tSU;STA tHD;DAT tSU;DAT tSU;STO tBUF 0 4.7 4.0 4.0 4.7 0 250 4.0 4.7 - 100 3.45 - 0 1.3 0.6 0.6 0.6 0 100 0.6 1.3 - 400 0.9 - kHz μs μs μs μs μs ns μs μs www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/24 2010.03 - Rev.A BD6039GU ●Register List Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh VDD4SEL1 AVDDSEL Reserved Register data D7 D6 D5 VDD6EN VDD3SEL1 VDD7SEL VDD5EN VDD3SEL0 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VDD8EN D4 D3 VDD4EN D2 VDD3EN D1 VDD2EN D0 Technical Note Function Software reset Power down 1 Output voltage Setting1 VER［2:0］ AVDDEN VDD4SEL0 VDD8SEL - SFTRST VDD1EN Reserved VDD6SEL VDD7EN Reserved Reserved Reserved Reserved VDD5SEL Output voltage Setting2 SWREG3EN Power down 2 Reserved for TEST for TEST for TEST for TEST for TEST for TEST for TEST Input "0” for "-". Input “0” for “Reserved” Access to the register for the test and the undefined register is prohibited. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/24 2010.03 - Rev.A BD6039GU ●Register Map Address00h < Software reset > Address R/W Bit7 Technical Note Bit6 Bit5 - Bit4 - Bit3 - Bit2 - Bit1 SFTRST Initial Value Bit0 00h 20h 00h Initial Value Bit [7:5] : R/W 20h VER[2:0] “001” : - VER[2:0] - - Reading the version information DS1 This register is “Read Only” Bit [4:1] : Bit 0 : Not used SFTRST “0” : Reset cancel “1” : Reset (All register initializing) Address01h < Power down 1 > Address R/W Bit7 01h Initial Value Bit 7 : Bit 6 : R/W 00h - Bit6 AVDDEN 0 Bit5 VDD6EN 0 Bit4 VDD5EN 0 Bit3 VDD4EN 0 Bit2 VDD3EN 0 Bit1 VDD2EN 0 Bit0 VDD1EN 0 Not used AVDDEN “0” : “1” : AVDD Control (ON/OFF) OFF ON VDD6 Control (ON/OFF) OFF ON VDD5 Control (ON/OFF) OFF ON VDD4 Control (ON/OFF) OFF ON VDD3 Control (ON/OFF) OFF ON VDD2 Control (ON/OFF) OFF ON VDD1 Control (ON/OFF) OFF ON Bit 5 : VDD6EN “0” : “1” : Bit 4 : VDD5EN “0” : “1” : Bit 3 : VDD4EN “0” : “1” : Bit 2 : VDD3EN “0” : “1” : Bit 1 : VDD2EN “0” : “1” : Bit 0 : VDD1EN “0” : “1” : www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/24 2010.03 - Rev.A BD6039GU Address02h < Output voltage Setting1 > Address R/W Bit7 Bit6 02h Initial Value Bit [7:6] : R/W 00h Technical Note Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 VDD4SEL1 VDD4SEL0 VDD3SEL1 VDD3SEL0 0 0 0 0 0 Reserved Initial Value 00h 0 VDD4SEL[1:0] VDD4 Output voltage “00” : -8V “01” : -7.5V “10” : -7V “11” : -7V VDD3SEL[1:0] VDD3 Output voltage “00” : 14.5V “01” : 15V “10” : 13V “11” : 13V Not used Bit [5:4] : Bit [3:0] : Address03h < Output voltageSetting2 > Address R/W Bit7 03h Initial Value Bit 7 : R/W 00h AVDDSEL “0” : “1” : Bit 6 : VDD8SEL “0” : “1” : Bit 5 : VDD7SEL “0” : “1” : Bit [4:3] : Bit 2 : Not used VDD6SEL “0” : “1” : Bit 1 : Bit 0 : Not used VDD5SEL “0” : “1” : Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 AVDDSEL VDD8SEL VDD7SEL Reserved 0 0 0 0 Reserved VDD6SEL Reserved VDD5SEL 0 0 0 0 AVDD Output voltage Setting 1.5V 1.8V VDD8 Output voltage Setting 1.5V 1.8V VDD7 Output voltage Setting 3.3V 3.0V VDD6 Output voltage Setting 3.3V 3.2V VDD5 Output voltage Setting 1.8V 1.5V www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/24 2010.03 - Rev.A BD6039GU Address04h < Power down 2 > Address R/W Bit7 04h Initial Value Bit [7:4] : Bit 3 : R/W 00h Not used VDD8EN “0” : “1” : Bit 2 : VDD7EN “0” : “1” : Bit 1 : Bit 0 : VDD7 Control (ON/OFF) OFF ON VDD8 Control (ON/OFF) OFF ON - Technical Note Bit6 - Bit5 - Bit4 - Bit3 VDD8EN 0 Bit2 VDD7EN 0 Bit1 Bit0 Reserved SWREG3EN 0 0 Not used (must be “0”) SWREG3EN SWREG3 Control (ON/OFF) “0” : OFF “1” : ON www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 17/24 2010.03 - Rev.A BD6039GU ●Explanation for Operate Technical Note 1. Reset There are two kinds of reset, Software reset and Hardware reset. (1) Software reset ◦It shifts to software reset with changing a register (SFTRST) setting “0” → “1”. ◦The register is returned to the initials value under the state of Soft Reset, and it stops accepting all address except for SFTRST. ◦It’s possible to release from a state of Soft Reset by setting register “1” → “0”. (2) Hardware reset ◦It shifts to hard reset by changing RST pin “H” → “L”. ◦The condition of all registers under Hardware Reset pin is returned to the initial value, and it stops accepting all address. ◦It’s possible to release from a state of hardware reset by setting register “L” → “H”. (3) Reset Sequence ◦When hardware reset was done during software reset, Software reset is canceled when hard reset is canceled. (Because the initial value of Soft Reset is “0”) 2. Thermal shutdown The blocks which thermal shutdown function is effective in SWREG3 SWREG4 REG1 REG2 REG3 REG5 REG6 REG7 REG8 REGA A thermal shutdown function works in about 175 oC. (Design reference value) When returns to undetected condition from detected condition, each block will start up simultaneously. So, if there are some problems, (for example rush current) please work out a countermeasure on system (for example sequence on start up) 3. UVLO(Under voltage detection of VBAT) When UVLO works, all register (except for Address=00h, SFTRST) will return to initial value. Please set the register again after VBAT comes to normal value. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 18/24 2010.03 - Rev.A BD6039GU Technical Note 4. ON/OFF control This IC controls each blocks by register setting after start up VREF (internal reference voltage). Detection voltage of VREF’s rise-up is 1.1V when static output is 1.2V. The output of SWREG3 is power supply for REG3, but there is no internal sequencer about these 2-blocks. Please be careful about ON/OFF timing. SWREG3EN VDD3EN VDD4EN VDD6EN VDD*EN VREF VREF>1.1[V] SWREG3 (VPLUS2) REG3 SWREG4 REG6 REG* VDD3 VDD4 VDD6 VDD* *：1,2,5,7,8,AVDD VREF receives a turning on instruction blocked either each and begins rise up. Therefore, it is necessary to consider the block started up first at the rise time of VREF LDO ON VREF output 95% up LDO output W orst 5ms www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 19/24 2010.03 - Rev.A BD6039GU Technical Note 5. I2C BUS Operation when a signal beyond fSCL=400kHz is input cannot be guaranteed, because this LSI doesn’t correspond to the H/S(High Speed) mode of the I2C BUS format. When it uses on the serial-bus-system which the F/S(Fast Speed) mode was mixed in with the H/S mode, please connect it and remove a connection by using the mutual connection bridge from the H/S mode section to F/S mode section or in that reverse direction. However, an optional input signal never spreads to the logic part of IC, because it stops the operation of the input buffer of SDA and SCL at RST pin=L. At RST=L, output ”H” fixed SCL (SDA) Level shifter EN Logic RST 6. Low input voltage LDO This is the system of LDO that can be input low voltage. Please start up LDO after input VIN*, and please input VIN* after input VBAT. VBAT VIN* VREF VDD* limiter 7. Power up sequence Input of VBAT, VIO and control of each block should be done by the sequence below. V BAT T VBATON V IO T VIOON=min 0.1ms R ST T RSTB=min 0.1ms T RST=min 0ms E nable T VIOOFF=min 1ms T VBATOFF Please take enough time for each wait time www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 20/24 2010.03 - Rev.A BD6039GU Technical Note 8. Start up for DC/DC DC/DC has soft start function to prevent rush current at starting up (both SWREG3, SWREG4) Soft start time is 21ms(max) based from internal OSC frequency. So, please take load current after this soft start time. SWREG3 is power supply for REG3. Please input the command SWREG3 on after input REG3 on, to prevent rush current at start up REG3. (REG3’s rush current is prevented by SWREG3’s soft start function.) At the unusual case the value of Cout (capacitor connected to Vout) is very large, soft start time will finish before SWREG3 rise up. So, there is a possibility to appear large rush current. R EG3EN T 1=min 0ms SW REG3EN Tsoft=max 2 1m s R EG3O, VPLUS O FF S oft Start Mode N orm al Mode Load Current 9. Start up for LDO LDO has soft start function to prevent rush current at starting up. This IC doesn’t consider the start up with the load current. Please add the load current after LDO’s output voltage rise up completely. ＜REG1, REG2, REG5, REG7, REG8, REGA＞ E nable V OUT O FF S oft Start Mode N orm al Mode L oad Current ＜REG6＞ R EG6EN 9 5% VOUT R EG6O O FF S oft Start Mode Norm al Mode L oad Current 10. Input capacitor for LDO Regarding REG1,REG5,REG8,REGA (can be connect with different power supply from VBAT), please connect capacitor with VIN* to prevent the influence ripple of VIN* to Vout. The required Value of input capacitor is changes from conditions of input voltage, output voltage, output capacitor, output impedance of power supply, wire impedance of power line, etc. So, please decide it after evaluation with real application, and with an enough margin. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 21/24 2010.03 - Rev.A BD6039GU ●PCB pattern of the Power Dissipation Measuring Board Technical Note 1st layer(component) 2nd layer 3rd layer 4th layer 5th layer 6th layer 7th layer 8th layer(solder) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 22/24 2010.03 - Rev.A BD6039GU Technical Note ●Notes for use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Power supply and ground line Design PCB pattern to provide low impedance for the wiring between the power supply and the ground lines. Pay attention to the interference by common impedance of layout pattern when there are plural power supplies and ground lines. Especially, when there are ground pattern for small signal and ground pattern for large current included the external circuits, please separate each ground pattern. Furthermore, for all power supply pins to ICs, mount a capacitor between the power supply and the ground pin. At the same time, in order to use a capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (3) Ground voltage Make setting of the potential of the ground pin so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no pins are at a potential lower than the ground voltage including an actual electric transient. (except for VDD4,SWN) (4) Short circuit between pins and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between pins or between the pin and the power supply or the ground pin, the ICs can break down. (5) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (6) Input pins In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input pin. Therefore, pay thorough attention not to handle the input pins, such as to apply to the input pins a voltage lower than the ground respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input pins a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (7) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (8) Thermal shutdown circuit (TSD) This LSI builds in a thermal shutdown (TSD) circuit. When junction temperatures become detection temperature or higher, the thermal shutdown circuit operates and turns a switch OFF. The thermal shutdown circuit, which is aimed at isolating the LSI from thermal runaway as much as possible, is not aimed at the protection or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit operating or use the LSI assuming its operation. (9) Thermal design Perform thermal design in which there are adequate margins by taking into account the permissible dissipation (Pd) in actual states of use. (10) LDO Use each output of LDO by the independence. Don’t use under the condition that each output is short-circuited because it has the possibility that an operation becomes unstable. (11) About the pin for the test, the un-use pin Prevent a problem from being in the pin for the test and the un-use pin under the state of actual use. Please refer to a function manual and an application notebook. And, as for the pin that doesn't specially have an explanation, ask our company person in charge. (12) About the rush current For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of wiring. (13) About the function description or application note or more. The function description and the application notebook are the design materials to design a set. So, the contents of the materials aren't always guaranteed. Please design application by having fully examination and evaluation include the external elements www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 23/24 2010.03 - Rev.A BD6039GU ●Ordering part number Technical Note B D 6 Part No. 0 3 9 G U - E 2 Part No. Package GU: VCSP85H4 Packaging and forming specification E2: Embossed tape and reel VCSP85H4 (BD6039GU) 1PIN MARK 4.8±0.05 Tape Quantity 0.25±0.1 1.0MAX Embossed carrier tape (heat sealing method) 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold 4.8±0.05 Direction of feed S 0.4±0.05 ( reel on the left hand and you pull out the tape on the right hand ) 57-φ0.30±0.05 0.05 A B J H G F E D C B A 0.06 S A B (φ0.15)INDEX POST P=0.5×8 1 2 34 5 6 7 8 9 0.4±0.05 P=0.5×8 1pin Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 24/24 2010.03 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A