Datasheet
Three Phase Brushless Motor Pre-driver
BD63003MUV
General Description
Key Specifications
BD63003MUV is a Pre-driver IC for 3-phase brushless
motor. It generates a driving signal from the Hall sensor
and applies PWM in the input control signal for motor
control. It has a built-in booster circuit which allows
Nch-Nch MOS transistors to be used as the external
power Transistor. It is compatible with 12 V or 24 V
power supply and has various controls and built-in
protection functions, making it useful for variety of
purposes. Since the IC adopts a small package, it can
also be used on small diameter motors.
Power Supply Voltage Rating:
Low Side Gate Drive Voltage:
High Side Gate Drive Voltage:
Operating Temperature Range:
Current Limit Detect Voltage:
UVLO Lockout Voltage:
OVLO Lockout Voltage:
Package
40 V
10 V (Typ)
10 V (Typ)
-40 °C to +85 °C
0.2 V±10 %
6.0 V (Typ)
28.5 V (Typ)
W (Typ) x D (Typ) x H (Max)
5.0 mm x 5.0 mm x 1.0 mm
VQFN032V5050
Features
Built in 120° Commutation Logic Circuit
Driving with Nch-Nch MOS Transistors
Built in Peak Current Control Function
For Controller Input of 3.3 V and 5 V
PWM Control Mode (lower arm switching)
CW/CCW Function
Short Brake Function
FG Output (1FG / 3FG conversion)
Built-in Protection Circuit for Current Limit (CL),
Overheating (TSD), Under Voltage (UVLO), Over
Voltage (OVLO), Motor Lock (MLP)
Applications
OA Machines
Other General Civil Equipment
Typical Application Circuit
0.1 µF
0.1 µF
VREG3
VREG
26
VCC
32
31
30
25
0.1 µF
HUP
HU
HUN
HVP
HV
HVN
HWP
HW
HWN
19
CP1
10
UH
8
UL
11
20
13
21
16
22
14
23
9
24
12
CW
3
BRKB
4
18
PWMB
2
5
17
6
1
SEL2
CP2
29
15
SEL1
47 µF
VG
0.1 µF
0.1 µF
0.1 µF
0.1 µF
VH
M
VL
WH
WL
U
V
W
RCL
RCLS
IREF
FG
27
GND
〇Product structure : Silicon integrated circuit
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〇This product has no designed protection against radioactive rays.
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BD63003MUV
Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Key Specifications .......................................................................................................................................................................... 1
Package .......................................................................................................................................................................................... 1
Typical Application Circuit ............................................................................................................................................................... 1
Pin Configuration ............................................................................................................................................................................ 3
Pin Descriptions .............................................................................................................................................................................. 3
Block Diagram ................................................................................................................................................................................ 4
Description of Blocks ...................................................................................................................................................................... 5
Absolute Maximum Ratings .......................................................................................................................................................... 11
Thermal Resistance ...................................................................................................................................................................... 11
Recommended Operating Conditions ........................................................................................................................................... 11
Electrical Characteristics............................................................................................................................................................... 12
Timing Chart ................................................................................................................................................................................. 14
I/O Equivalence Circuits................................................................................................................................................................ 15
Operational Notes ......................................................................................................................................................................... 17
Ordering Information ..................................................................................................................................................................... 19
Marking Diagram .......................................................................................................................................................................... 19
Physical Dimension and Packing Information ............................................................................................................................... 20
Revision History ............................................................................................................................................................................ 21
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Pin Configuration
HWN
HWP
HVN
HVP
HUN
HUP
RCLS
RCL
(TOP VIEW)
24
23
22
21
20
19
18
17
VREG
25
16
WH
VREG3
26
15
W
SEL2
27
14
WL
TEST
28
13
VL
CP1
29
12
V
CP2
30
11
VH
VG
31
10
UH
VCC
32
9
U
4
5
PWMB
CW
BRKB
IREF
Pin Descriptions
Pin
No.
Pin Name
1
FG
2
PWMB
3
CW
4
6
7
8
UL
3
GND
2
SEL1
1
FG
EXP-PAD
Pin
No.
Pin Name
1FG / 3FG output
17
RCL
PWM input (negative logic)
18
RCLS
RCL sense input
Changing direction of rotation
(H: CW, L: CCW)
19
HUP
U phase hall input +
BRKB
Brake input (negative logic)
20
HUN
U phase hall input -
5
IREF
Output driving current setting
21
HVP
V phase hall input +
6
SEL1
Function setting input 1
22
HVN
V phase hall input -
7
GND
GND
23
HWP
W phase hall input +
8
UL
U phase lower output
24
HWN
W phase hall input -
9
U
U phase output feedback
25
VREG
VREG output
10
UH
U phase upper output
26
VREG3
VREG3 output
11
VH
V phase upper output
27
SEL2
Function setting input 2
12
V
V phase output feedback
28
TEST
TEST input (GND)
13
VL
V phase lower output
29
CP1
Charge pump setting 1
14
WL
W phase lower output
30
CP2
Charge pump setting 2
15
W
W phase output feedback
31
VG
Charge pump output
16
WH
W phase upper output
32
VCC
-
EXP-PAD
Function
Function
Detect voltage input for over current
Power supply
Connect EXP-PAD to GND
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Block Diagram
VREG3
VCC
VG
26
32
31
VREG
VREG
25
HUP
19
HUN
20
HVP
21
HVN
22
HWP
23
HWN
24
CHARGE
PUMP
VREG
PRE
DRIVER
LOGIC
5
CW
BRKB
3
30
CP2
29
CP1
10
UH
8
UL
11
VH
13
VL
16
WH
14
WL
9
U
12
V
15
W
17
RCL
18
RCLS
5
IREF
1
FG
4
OVLO
PWMB
2
TSD
OSC
SEL1
6
SEL2
27
7
GND
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Description of Blocks
Commutation logic (120° commutation)
HU
H
H
H
L
L
HV
L
L
H
H
H
HW
Truth Table
CW (CW = H or OPEN)
FG
UH
UL
VH
VL
WH
WL
1FG
3FG
H
--------------------
PWM
PWM(Note 1)
H
L
L
L
L
Hi-z
L
--------------------
PWM(Note 1)
L
L
H
L
L
L
L
--------------------
PWM
PWM(Note 1)
H
L
L
Hi-z
L
--------------------
PWM(Note 1)
L
L
Hi-z
L
L
--------------------
PWM
PWM(Note 1)
Hi-z
Hi-z
--------------------
Hi-z
L
L
L
H
PWM
L
H
H
PWM
L
L
L
L
H
L
L
H
L
PWM
PWM(Note 1)
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Hi-z
Hi-z
HU
HV
HW
CCW (CW = L)
UH
FG
UL
VH
VL
--------------------
PWM(Note 1)
L
PWM
--------------------
H
L
H
H
L
H
L
L
H
L
PWM
L
WH
WL
1FG
3FG
L
L
L
Hi-z
--------------------
PWM(Note 1)
L
L
H
H
L
L
L
H
L
PWM
PWM(Note 1)
L
Hi-z
L
H
L
PWM
--------------------
PWM(Note 1)
H
L
L
L
Hi-z
L
--------------------
L
H
H
PWM
PWM(Note 1)
L
L
H
L
Hi-z
Hi-z
L
L
H
L
L
--------------------
PWM
PWM(Note 1)
H
L
Hi-z
L
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Hi-z
Hi-z
(Note 1) When PWM = "L", PWM = "H". When PWMB = H, PWMB = L.
1.
Regulator Output Pin (VREG)
This is constant voltage output pin of 5 V (Typ). Connect capacitors of 0.01 µF to 1 µF. Be careful that VREG current
does not exceed absolute maximum ratings in case of being used for bias power supply of hall elements.
2.
Regulator Output Pin (VREG3)
This is constant voltage output pin of 3.3 V (Typ). VREG3 can be used for bias voltage of hall elements. Be careful that
VREG3 current does not exceed absolute maximum ratings in case of being used.
VCC
VREG3
HU
HV
HW
Figure 1. VREG3 reference circuit
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Description of Blocks - continued
3.
PWM Input Pin (PWMB)
Speed can be controlled by inputting PWM signal into the PWMB pin (negative logic). Synchronous rectifier PWM can
be achieved through lower switching. When PWMB = "L", lower external FET that matches to Hall input logic is “L”.
When PWMB = "H" or open, lower external FET is "H". When PWMB = "H" or OPEN status is detected for 104 µs (Typ),
the synchronous rectifier is OFF. Synchronous rectifier turns ON through the falling edges of subsequent PWMB signals.
At startup, External FET keeps “Hi-z” states in which all phase is OFF (stand-by) until PWMB = "L" status is detected 2
µs (Typ) or more [figure 2]. However, the internal regulator of VREG, VG, the other regulator, protection function of
OVLO, and the other ones are operated in the stand-by. Additionally, the PWMB pin is pulled up by internal 3.3V (Typ)
through a resistance of 100 kΩ ± 30 kΩ and pulled down by GND through a resistance of 1000 kΩ ± 300 kΩ.
PWMB
PWM phase Lower External FET
H or OPEN
OFF
L
ON
VG
VG
VCC
VCC
VG
VCC
VG
VGUVON
VCC
V GUVON
VUVH
VUV H
2 µs (typ)
2 µs (typ)
PWMB
Driver
status
PWMB = "L"
PWMB
Active
Driver
status
Hiz
1. PWMB = "L" (VCC Rise Up)
PWMB = "H"
Hiz
PWMB = "L"
Active
2. PWMB = "H" (VCC Rise Up)
Figure 2. PWMB Status
4.
BRKB Pin (BRKB)
Motor rotation can be quickly stopped using the BRKB Pin (negative logic). When BRKB = "L", this causes all the upper
external FET to turn "OFF" and all the lower external FET to turn "ON", initiating short break operation. When BRKB =
"H" or OPEN, then short brake operation will be released. Additionally, the BRKB pin is pulled up by internal 3.3V (Typ)
through a resistance of 100 kΩ ± 30 kΩ and pulled down by GND through a resistance of 1000 kΩ ± 300 kΩ.
BRKB
Operation
H or OPEN
Normal
L
Short brake
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Description of Blocks - continued
5.
Rotatory Direction Change Pin (CW)
Rotation direction can be switched with the CW pin. When CW = "H" or OPEN, the direction is Clockwise (CW). When
CW = "L", the direction will be Counter Clockwise (CCW). We do not recommend switching rotation direction when
motor is rotating. If rotation direction is switched when rotating, the operation is the following due to the condition of
SEL1.
(1)
SBRK = "Enable" (SEL1 = "H" or "M1")
After having performed short brakes movement until hall frequency becomes approximately 40 Hz (Typ) or less,
rotatory direction is replaced. In the case of this condition, do not change the logic of CW for 10 ms after brakes
cancellation by the BRKB input (Figure 3).
less than 10 ms
more than 10 ms
BRKB
BRKB
CW
CW
Driver
status
short brake
Driver
status
Active
short brake
Active
Active
10 ms
10 ms
I.
short brake
OK (SBRK = "Enable")
II.
NG (SBRK = "Enable")
Figure 3. BRKB, CW Control Timing Limitation 1
(2)
SBRK = "Disable" (SEL1 = "M2" or "L")
Without the short brake such as (1), direction is replaced. In this case, be careful since high current may
sometimes flow in the external FET when the direction is replaced as described. In addition, there is no limitation in
timing of BRKB and CW such as (1) in this condition (Figure 4).
less than 10 ms
BRKB
CW
Driver
status
short brake
Active
10 ms
III.
OK (SBRK = "Disable")
Figure 4. BRKB, CW Control Timing Limitation 2
In addition, the CW pin is pulled up by internal 3.3 V (Typ) through resistance of 100 kΩ ± 30 kΩ and pulled down
by GND through a resistance of 1000 kΩ ± 300 kΩ.
CW
Direction
H or OPEN
CW
L
CCW
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Description of Blocks - continued
6.
7.
Select Pin 1 (SEL1)
The SEL1 pin can be used to select 1FG / 3FG and “Enable” or “Disable” of the short brakes (SBRK) at the direction
change with the CW pin. The SEL1 pin is a 4 input pin and can be set by being OPEN, 220 kΩ [± 5 %] to GND, 47 kΩ [±
5 %] to GND, and tied to GND. In addition, the SEL1 pin is pulled up by VREG through resistance of 100 kΩ ± 30 kΩ.
SEL1
FG
SBRK(CW/CCW)
H (OPEN)
3FG
Enable
M1 (220 kΩ [±5 %] to GND)
1FG
Enable
M2 (47 kΩ [±5 %] to GND)
1FG
Disable
L (tied to GND)
3FG
Disable
Select Pin 2 (SEL2)
The SEL2 pin can be used to select Enable/Disable of MLP and OVLO. In addition, the SEL2 pin is pulled up by VREG
through resistance of 100 kΩ ± 30 kΩ.
SEL2
MLP
OVLO
H (OPEN)
2.2 s (Typ)
28.5 V (Typ)
M1 (220 kΩ [±5 %] to GND)
Disable
28.5 V (Typ)
M2 (47 kΩ [±5 %] to GND)
2.2 s (Typ)
Disable
L (tied to GND)
Disable
Disable
8.
FG Output pin (FG)
FG signal is composed by a hall signal and is outputted by the FG pin. Changing between 1FG and 3FG can be done
with SEL1. In addition, the FG pin, which is an open drain output, should be externally pulled-up by a resistance of the
about 10 kΩ to 100 kΩ.
9.
Hall Input (Hall: HUP, HUN, HVP, HVN, HWP, HWN)
Hall comparator inside the IC is designed with hysteresis (±15 mV (Typ)) in order to prevent malfunction due to noise.
Always set correct bias current for the Hall element so that the amplitude of Hall input voltage will be the minimum input
voltage (VHALLMIN) or more. Furthermore, the output of the comparator has a digital filter of 2 µs (Typ). However, if it can’t
prevent the noise, it is recommended to connect a ceramic capacitor with about 100 pF to 0.01 µF value between the
input pins of the Hall comparator. The in-phase input voltage range (VHALLCM: 0 V to VREG-1.7 V (Typ)) is designed for
Hall comparator, set within this range when applying bias to the Hall element. When all Hall inputs become "H" or "L", all
external FETs will be "OFF" by the hall input abnormal detection circuit.
10. Booster Circuit
There is built-in booster circuit used to drive upper Nch MOS transistor. The VG pins can produce a boost voltage (the
VCC voltage+10 V (Typ) through connecting capacitors between CP1 - CP2 and between VG - VCC. We recommend
connected capacitors to be 0.1 µF or more. Because CP1 and CP2 are oscillated, the capacitors have to be located
near IC. If need, add GND line for the shield. In addition, because VG voltage are boosted from the voltage that based
on VCC, if VCC voltage is instability, it can be caused the malfunction such as VG voltage rise up. Therefore, add
capacitor between VCC and GND as necessary to stabilize VCC voltage when using large current and motor with large
BEMF. Because there is built-in protection circuit for insufficient booster, when VG voltage is V GUVON (VCC+7 V (Typ)) or
less, all external FETs will be "OFF".
11. Current Limit Circuit (CL Circuit)
Output current limit (Current Limit: CL) circuit can be formed by connecting a low resistance used for detecting current
between the RCL pin and the RCLS pin. When RCL voltage is detected 0.2 V (Typ) or more, all lower external FET will
be "OFF". It returns by itself after a set amount of time (32 µs (Typ)). This operation does not synchronize with PWM
signal input into the PWMB pin. In addition, in order to avoid misdetection of output current due to RCL noise, the IC sets
up a noise-masking period (1 µs to 2 µs (Typ)). During the noise-masking period, current detection is disabled. RCLS is
the sense line of RCL. If RCLS becomes OPEN, Current Limit may not be normally Function. Connect the RCLS pin to
the GND nearest to the current sense resistor’s pin.
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Description of Blocks - continued
12. Thermal Shutdown Circuit (TSD Circuit)
When chip temperature of driver IC rises and exceeds the set temperature (165 °C (Typ)), the thermal Shutdown circuit
(Thermal Shutdown: TSD) begins working. At this time, all external FETs will be "OFF". In addition, the TSD circuit is
designed with hysteresis (25 °C (Typ)), and will return to normal working condition when the chip temperature drops.
Moreover, the purpose of the TSD circuit is to protect the driver IC from thermal breakdown, therefore, temperature of
this circuit will be over working temperature when this circuit operates. Thus, thermal design should have sufficient
margin, so do not take continuous use and operation of the circuit as precondition.
13. Under Voltage Lock Out Circuit (UVLO Circuit)
There is a built-in under voltage lockout circuit (Under Voltage Lockout: UVLO circuit) used to ensure the minimum
power supply voltage for drive IC to work and to prevent error in the operation of IC. When VCC voltage declined to VUVL
(6 V (Typ)), all external FETs should be "OFF". At the same time, UVLO circuit is designed with hysteresis (1 V (Typ)), so
when VCC voltage reaches VUVH (7 V (Typ)) or more, it will enter normal operation.
14. Over Voltage Lock Out Circuit (OVLO Circuit)
There is built-in over voltage lockout circuit (Over Voltage Lockout: OVLO circuit) used to restrain the increase of VCC
voltage when motor is decelerating. When VCC voltage is 28.5 V (Typ) or more, short brake action will be conducted. In
order to avoid misdetection, the IC sets up a noise-masking period (2 µs to 3 µs (Typ)). The short brake operation is
released after a certain period of time (4 ms) when the VCC voltage is less than or equal to 27.5 V (Typ) and returns to
normal operation. OVLO function does not work in case of SEL2 = “Disable”
15. Motor Lock Protection Circuit (MLP Circuit)
There is built-in motor lock protection circuit (Motor Lock Protection: MLP), ON/OFF of MLP circuit can be set by the
SEL2 pin. When the MLP setting of SEL2 = "Enable" and the Hall signal logic does not change for 2.2 s (Typ) or more,
all external FETs will all be latched as "OFF". Latch can be released through switching BRKB/CW logic. Moreover, when
PWMB = "H" or OPEN state is detected for about 15 ms (Typ), latch can be released by the falling edges of subsequent
PWMB. However, the MLP circuit does not operate when the MLP setting of the SEL2 pin is "Disable" and when the
short brake (including when switching the direction of rotation) or the TSD circuit is in operation.
16. Predriver Output
The drive signal generated by the internal logic outputs the drive signal to the external output power transistor. Driving
voltage of upper gate is VG voltage (VCC+10 V (Typ)) and driving voltage of lower gate is the internal REG voltage (10 V
(Typ)). In addition, a dead time (0.2 µs (Typ)) is designed between the driving signals of upper gate and lower gate in
order to prevent the upper and lower FET from being set to ON at the same time during synchronous rectifier PWM
operation. Due to the influence of the motor’s counter electromotive force, the output feedback pin (U, V, W) might swing
under GND potential, which can cause malfunctions or destruction. When negative potential exceeds -2 V (min),
Schottky diode can be inserted to prevent malfunction or destruction.
17. Pre-driver Output Peak Current Setting Pin (IREF)
A current of the pre-driver output can be set by connecting a resistor between the IREF Pin and GND. Note that if the
IREF pin is connected with GND or open, it may cause malfunction. The range of the resistance is 27 kΩ [±5 %] to 150
kΩ [±5 %]. About the approximate value of the output current, refer to the following table.
Resistor Value [kΩ]
Output Source Current [mA]
Output Sink Current [mA]
150
16
27
120
18
33
100
22
40
82
26
48
68
31
58
56
36
68
47
42
84
39
48
96
33
55
113
27
63
136
Figure 5. The reference value of Pre-driver output current
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Description of Blocks - continued
18. Control Signal Sequence
Though we recommend you to input control signals of the CW, PWMB, and BRKB pins after inputting VCC, there won’t
be any problem if done otherwise. However, if MLP = "Enable" is set at startup, the MLP circuit will not be able to start
the motor if the rotation of the motor is not detected within the set time (the edge of the FG signal is not input). Moreover,
the control signal and the IC internal signal are given priority. Refer to the table below.
Priority of Control Signal
Priority
Input / Internal signals
1st
2nd
UVLO
BRKB(Note 2),
CW (Note 2), PWMB (Note 2)
3rd
TSD, MLP, HALLERR
4th
OVLO
5th
VG_UVLO, stand-by
6th
BRKB
7th
CL
8th
PWMB, CW,
(Note 2) means rising and falling edge of the signal.
Refer to a figure of in condition transition for the signal name.
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Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Symbol
Rating
Unit
Power Supply Voltage
VCC
-0.3 to +40.0
V
VG Voltage
VG
-0.3 to +52.0
V
V(U, V, W)
40
V
VFG
-0.3 to +7.0
V
RCL Voltage
VRCL
-0.3 to +5.5
V
RCLS Voltage
VRCLS
-0.3 to +0.3
V
Voltage of Input of Control and Hall Pins
VI/O
-0.3 to +7.0
V
FG Output Current
IFG
5
mA
IVREG
-30
mA
External FET Output Feedback Voltage
FG Voltage
VREG Output Current
VREG3 Output Current
IVREG3
-5
mA
Maximum Junction Temperature
Tjmax
150
°C
Tstg
-55 to +150
°C
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 3)
Parameter
Symbol
Thermal Resistance (Typ)
1s(Note 5)
2s2p(Note 6)
Unit
VQFN032V5050
Junction to Ambient
θJA
138.9
39.1
°C/W
Junction to Top Characterization Parameter(Note 4)
ΨJT
11
5
°C/W
(Note 3) Based on JESD51-2A (Still-Air).
(Note 4) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 5) Using a PCB board based on JESD51-3.
(Note 6) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
Thermal Via(Note 7)
Pitch
Diameter
1.20 mm
Φ0.30 mm
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 7) This thermal via connects with the copper pattern of all layers.
Recommended Operating Conditions
Parameter
Operating Temperature
Power Supply Voltage
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© 2020 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Symbol
Min
Typ
Max
Unit
Topr
VCC
-40
10.8
+25
24.0
+85
26.4
°C
V
11/21
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BD63003MUV
Electrical Characteristics (Unless otherwise specified VCC = 24 V, Ta = 25 °C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Whole
Circuit Electric Current
ICC
-
4.5
9
mA
The VREG Voltage
VREG
4.5
5.0
5.5
V
IVREG = -10 mA
The VREG3 Voltage
VREG3
3.0
3.3
3.6
V
IVREG3 = -1 mA
VG1
VCC+7
VCC+10
VCC+11.5
V
IVG = 15 mA
VGUVON
VCC+6
VCC+7
VCC+8
V
VGSH1
7
10
11.5
V
VGSL1
7
10
12.5
V
IRNG1
-
-
70
mA
RIREF = 27 kΩ
IRNG2
-
-
140
mA
RIREF = 27 kΩ
IOH
-
18
-
mA
RIREF = 120 kΩ
IOL
-
33
-
mA
RIREF = 120 kΩ
Booster Circuit
VG Voltage
VG UVLO Voltage
Driver Output
High Side
VGS Gate Drive Voltage
Low Side
VGS Gate Drive Voltage
Source Electric Current
Setting Range
Sink Electric Current
Setting Range
Output Peak Source Current
Output Peak Sink Current
IREF Voltage
VIREF
1.2
V
Hall Input
Input Bias Current
Range of
In-phase Input Voltage
Minimum Input Voltage
IHALL
-2.0
-0.1
+2.0
µA
VHALLCM
0
-
VREG-1.7
V
HYS Level +
VHALLMIN
50
-
-
mVp-p
VHALLHY+
5
15
25
mV
HYS Level -
VHALLHY-
-25
-15
-5
mV
VIN = 0 V
Input of Control: PWMB, CW, BRKB
Input Electric Current
IIN
-46
-33
-20
µA
The Input H Voltage
VINH
2.0
-
5.5
V
The Input L Voltage
VINL
0
-
0.8
V
tPLSMIN
1
-
-
ms
CW, BRKB
fPWM
10
-
50
kHz
PWMB
ISEL
-80
-50
-30
µA
VSEL = 0 V
Output Voltage L
VFGOL
0
0.1
0.3
V
IFG = 2 mA
Leak Current
IFGLEAK
-
0
1
µA
VFG = 5 V
The Detection Voltage
VCL
0.18
0.20
0.22
V
Input Bias Electric Current
IRCL
-32
-20
-12
µA
Input Voltage Range
VRCL
-0.3
-
+1.0
V
The Smallest Input Pulse Width
Input Frequency Range
VIN = 0 V
Input of Control: SEL1, SEL2
Input Current
FG Output
Current Limit
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TSZ22111 • 15 • 001
12/21
VRCL = 0V
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10.Jul.2020 Rev.001
BD63003MUV
Electrical Characteristics - continued (Unless otherwise specified VCC = 24 V, Ta = 25 °C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Release Voltage
VUVH
6.5
7.0
7.5
V
Lockout Voltage
VUVL
5.5
6.0
6.5
V
Release Voltage
VOVL
26.5
27.5
28.5
V
OVLO Enable
Lockout Voltage
VOVH
27.5
28.5
29.5
V
OVLO Enable
tMLP
1.54
2.20
2.86
s
MLP Enable
UVLO
OVLO
MLP
Motor Lock Protection
Detect Time
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TSZ22111 • 15 • 001
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BD63003MUV
Timing Chart
CW Direction (CW = "H" or OPEN)
HU
HV
HW
U
PWM
PWM
PWM
V
W
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
CCW Direction (CW = "L")
HU
HV
HW
U
PWM
V
W
PWM
PWM
PWM
PWM
PWM
PWM
PWM
FG Output
FG (3FG)
FG (1FG)
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TSZ22111 • 15 • 001
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BD63003MUV
I/O Equivalence Circuits
Pin
No
Pin
Name
Pin
No
Equivalence Circuit
Pin
Name
Equivalence Circuit
VREG
FG
1
2
3
4
FG
PWM
B
CW
BRKB
100 kΩ
PWMB
BRKB
CW
10 kΩ
1000 kΩ
VREG
100 kΩ
5
50 Ω
IREF
6
27
IREF
SEL1
SEL2
SEL1
SEL2
10 kΩ
VG
Internal Reg
8
13
14
UL
VL
WL
UL/VL/WL
200 kΩ
9
10
11
12
15
16
U
UH
VH
V
W
WH
19
20
21
22
23
24
HUP
HUN
HVP
HVN
HWP
HWN
UH/VH/WH
200 kΩ
U/V/W
VREG
250 kΩ
RCL
17
18
2 kΩ
2 kΩ
RCL
RCLS
RCLS
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TSZ22111 • 15 • 001
25 kΩ
15/21
HUP
HUN
HVP
HVN
HWP
HWN
2 kΩ
TSZ02201-0P1P0CZ02290-1-2
10.Jul.2020 Rev.001
BD63003MUV
I/O Equivalence Circuits - continued
VREG
VCC
25
VREG
26
VREG
145 kΩ
VREG3
50 kΩ
36 kΩ
VREG
28
TEST
TEST
VREG3
64 kΩ
VCC
29
10 kΩ
CP1
CP1
100 kΩ
VG
30
31
32
CP2
VG
VCC
CP2
VCC
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TSZ22111 • 15 • 001
16/21
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10.Jul.2020 Rev.001
BD63003MUV
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all
power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on
the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of
connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned OFF completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
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TSZ22111 • 15 • 001
17/21
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10.Jul.2020 Rev.001
BD63003MUV
Operational Notes – continued
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin A
N
P+
N
P
N
P+
N
Parasitic
Elements
N
P+
GND
E
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
Parasitic
Elements
Pin B
B
Parasitic
Elements
GND
GND
N Region
close-by
GND
Figure 6. Example of Monolithic IC Structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
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TSZ22111 • 15 • 001
18/21
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10.Jul.2020 Rev.001
BD63003MUV
Ordering Information
B
D
6
3
0
0
3
M
U
V
-
Package
MUV: VQFN032V5050
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
VQFN032V5050 (TOP VIEW)
Part Number Marking
D 6 3 0 0 3
LOT Number
Pin 1 Mark
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© 2020 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
19/21
TSZ02201-0P1P0CZ02290-1-2
10.Jul.2020 Rev.001
BD63003MUV
Physical Dimension and Packing Information
Package Name
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© 2020 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
VQFN032V5050
20/21
TSZ02201-0P1P0CZ02290-1-2
10.Jul.2020 Rev.001
BD63003MUV
Revision History
Date
Revision
10.Jul.2020
001
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© 2020 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Changes
New Release
21/21
TSZ02201-0P1P0CZ02290-1-2
10.Jul.2020 Rev.001
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001