Datasheet
Three-Phase Brushless Motor Driver
BD63007MUV
General Description
Key Specifications
BD63007MUV is a Three-Phase Brushless Motor Driver
with 33V power supply voltage rating and 3A (5A peak)
output current rating. It generates a driving signal from
the Hall sensor and drives PWM through the input
control signal. In addition, the power supply can use 12V
or 24V and it has various controls and built-in protection
functions, making it useful for variety of purposes. Since
the IC adopts small packages, it can be used on small
diameter motors.
Power supply voltage rating
33V
Output current rating (Continuous):
3A
Output current rating (Peak):
5(Note1)A
Operating temperature range:
-25°C to +85°C
Stand-by current:
1.7mA(Max)
Current limit detect voltage:
0.2V±10%
Output ON Resistance (top & bottom total):
0.17Ω(Typ)
UVLO lockout voltage:
6.0V(Typ)
(Note1) Pulse width tw≤1ms, duty=20% pulse
Features
Package
Built-in 120° Commutation Logic Circuit
Low ON Resistance DMOS Output
PWM Control Mode (low side arm switching)
Built-in Power-saving Circuit
CW/CCW Function
Short Brake Function
FG Output (1FG/3FG conversion)
Built-in Protection Circuit for Current Limiting (CL),
Overheating (TSD), Over Current (OCP), Under
Voltage (UVLO), Over Voltage (OVLO), Motor Lock
(MLP)
W(Typ) x D(Typ) x H(Max)
VQFN040V6060
6.00mm x 6.00mm x 1.00mm
Applications
OA machines
Other consumer products
Typical Application Circuit
24
VREG
VG
23
22
14
0.1µF
HUP
0.01µF
HUN
HVP
17
HV
0.01µF
HVN
18
HWP
19
HWN
20
HW
0.01µF
16
35
0.1µF
VCC
38 39
7 8
V
11 12
W
1
0.1µF
VCC
U
5 3
2 4
FGSW
0.1µF
CP1
25 27
26 28
15
HU
CP2
47µF
M
RNF
RNF
RCL
0.15Ω
PWMB
31
10kΩ
CW
33
FGO
32
CLNMT
36
BRKB
30
29
ENB
LPE
34
21
GND
10
PGND
Figure 1. Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Key Specifications........................................................................................................................................................................... 1
Package .......................................................................................................................................................................................... 1
Typical Application Circuit ............................................................................................................................................................... 1
Pin Configuration/Block Diagram .................................................................................................................................................... 3
Pin Description................................................................................................................................................................................ 3
Absolute Maximum Ratings ............................................................................................................................................................ 4
Recommended Operating Conditions ............................................................................................................................................. 4
Thermal Resistance ........................................................................................................................................................................ 5
Description of Blocks ...................................................................................................................................................................... 6
Protection Circuit .......................................................................................................................................................................... 10
Electrical Characteristics............................................................................................................................................................... 12
Timing Chart ................................................................................................................................................................................. 13
State Transition Diagram............................................................................................................................................................... 14
I/O Equivalence Circuits................................................................................................................................................................ 15
Application Operational Notes ...................................................................................................................................................... 15
Operational Notes ......................................................................................................................................................................... 16
Ordering Information ..................................................................................................................................................................... 19
Marking Diagrams ......................................................................................................................................................................... 19
Physical Dimension, Tape and Reel Information ........................................................................................................................... 20
Revision History ............................................................................................................................................................................ 21
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Pin Configuration
Block Diagram
24
(TOP VIEW)
VREG
14
CP1
CP2
VG
17
VCC
16
HVP
VCC
30 29 28 27 26 25 24 23 22 21
HUN
VCC
15
VCC
HUP
LPE
GND
BRKB
VG
VREG
PWMB 31
20 HWN
HVN
18
CW 32
19 HWP
HWP
19
FGO 33
18 HVN
HWN
20
ENB 34
17 HVP
FGSW 35
16 HUN
CLNMT 36
15 HUP
NC 37
14 VREG
U 38
31
CW
32
U 39
10
4
BRKB
30
8
5
2
3
4
VCC
V
W
RNF
RNF
1
RCL
33
FGO
36
CLNMT
29
LPE
OSC
Internal
Reg
PGND
9
NC
8
V
7
V
6
NC
5
RNF
4
RNF
RNF
RCL
RNF
3
38 39
U
7
11 W
2
VCC
TSD, OCP
UVLO, OVLO
12 W
1
CP1
25 27
26 28
35
PWMB
CP2
11 12
13 NC
NC 40
23
22
PRE
DRIVER
LOGIC
9
FGSW
CHARGE
PUMP
VREG
ENB
34
21
GND
10
PGND
Figure 2. Pin Configuration
Figure 3. Block Diagram
Pin Description
Pin
No.
Pin Name
Function
Pin
No.
Pin Name
Function
1
RCL
Detect voltage input for over current
21
GND
Ground
2
RNF
Detect resistance for over current
22
CP1
Charge pump setting 1
3
RNF
Detect resistance for over current
23
CP2
Charge pump setting 2
4
RNF
Detect resistance for over current
24
VG
Charge pump output
5
RNF
Detect resistance for over current
25
VCC
Power supply
6
NC
NC
26
VCC
Power supply
7
V
V phase output
27
VCC
Power supply
8
V
V phase output
28
VCC
Power supply
9
NC
NC
29
LPE
Setting about motor lock protection
(H/M/L input)
10
PGND
Ground
30
BRKB
Brake input (negative logic)
11
W
W phase output
31
PWMB
PWM input (negative logic)
12
W
W phase output
32
CW
CW/CCW input (H:CW, L:CCW)
13
NC
NC
33
FGO
FG output (1FG or 3FG)
14
VREG
Regulator output (OFF at stand-by)
34
ENB
Enable input (negative logic)
15
HUP
U phase Hall input +
35
FGSW
16
HUN
U phase Hall input -
36
CLNMT
17
HVP
V phase Hall input +
37
NC
18
HVN
V phase Hall input -
38
U
U phase output
19
HWP
W phase Hall input +
39
U
U phase output
20
HWN
W phase Hall input -
40
NC
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1FG/3FG switching (H:3FG, L:1FG)
Current limit mask time setting
(H/M/L input)
NC
NC
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Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Limit
Unit
Power Supply Voltage
VCC
-0.3 to +33.0
V
VG Voltage
VG
-0.3 to +38.0
V
Control Input Voltage
VIN,VIN2
-0.3 to +5.5
V
FGO Terminal Voltage
VFGO
-0.3 to +7.0
V
RNF Maximum Apply Voltage
VRNF
0.7
V
VREG Output Current
IVREG
-30(Note 1)
mA
FGO Output Current
IFGO
5(Note 1)
mA
Driver Output Current (continuous)
IOUT(DC)
3(Note 1)
A/Phase
Driver Output Current (peak)(Note2)
IOUT(PEAK)
5(Note 1)
A/Phase
Operating Temperature Range
TOPR
-25 to +85
°C
Storage Temperature Range
TSTG
-55 to +150
°C
Junction Temperature
Tjmax
150
°C
(Note 1) Do not exceed Tj=150°C.
(Note 2) Pulse width tw≤1ms, duty=20% pulse.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Recommended Operating Conditions (Ta= -25°C to +85°C)
Item
Supply Voltage
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Symbol
Min
Typ
Max
Unit
VCC
8
24
28
V
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Thermal Resistance (Note 1)
Parameter
Symbol
Thermal Resistance (Typ)
Unit
1s(Note 3)
2s2p(Note 4)
θJA
101.4
23.7
°C/W
ΨJT
5
3
°C/W
VQFN024V4040
Junction to Ambient
Junction to Top Characterization
Parameter(Note 2)
(Note 1) Based on JESD51-2A (Still-Air)
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
(Note 4)Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.6mmt
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
74.2mm x 74.2mm
70μm
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Description of Blocks
1. Commutation Logic
This IC adopts 120° commutation mode, and the truth table(Note 1) is as follows:
CW (CW="H" or OPEN)
HU
HV
CCW (CW="L")
FGO
HW
U
V
W
U
V
W
1FG
3FG
H
L
H
PWM
H
Hi-z
H
PWM
Hi-z
L
Hi-z
H
L
L
PWM
Hi-z
H
H
Hi-z
PWM
L
L
H
H
L
Hi-z
PWM
H
Hi-z
H
PWM
L
Hi-z
L
H
L
H
PWM
Hi-z
PWM
H
Hi-z
Hi-z
L
L
H
H
H
Hi-z
PWM
PWM
Hi-z
H
Hi-z
Hi-z
L
L
H
Hi-z
H
PWM
Hi-z
PWM
H
Hi-z
L
(Note 1) When PWMB=”L”, PWM="L", When PWMB=”H”, PWM="H".
2. Regulator Output Terminal (VREG)
This is constant voltage output terminal of 5V (Typ). Please connect capacitors of 0.01µF to 1µF.
Please be careful that VREG current does not exceed ratings in case of being used for bias power supply of hall
elements.
3. Enable Input Terminal (ENB)
Output of each phase can be set to ON/OFF(negative logic) through ENB terminal. When applied voltage is V ENA,
(Please see the table of Electrical Characteristics shown P12). the motor is driven(enable). When applied voltage is
VSTBY (Please see the table of Electrical Characteristics shown P12) or OPEN, the motor stops (stand-by). Stand-by
mode has precedence to other control input signal and VREG output is OFF. In addition, ENB terminal is pulled up
by internal power supply through a resistance of 100kΩ (Typ) ±30kΩ. With regard to the bias current, please see the
table of Electrical Characteristics shown P12.
ENB
Operation
H or OPEN
Stand-by
L
Enable
4. PWM Input Terminal (PWMB)
Speed can be controlled by inputting PWM signal into PWMB terminal (negative logic). Synchronous rectifier PWM
can be achieved through lower switching. When PWMB=" L", driver output that belongs to Hall input logic is “L”.
When PWMB="H" or open, driver output is "H". When PWMB="H" or OPEN status is detected 104µs (Typ), the
synchronous rectifier is OFF(all driver outputs "Hi-z”). Synchronous rectifier is ON through falling edges of
subsequent PWMB. Additionally, PWMB terminal is pulled up by VREG through a resistance of 100kΩ (Typ) ±30kΩ.
With regard to the bias current, please see the table of Electrical Characteristics shown P12.
PWMB
Driver Output
H or OPEN
H (Hi-z)
L
L
5. Brake Input Terminal (BRKB)
Motor rotation can be quickly stopped by BRKB terminal (negative logic). When BRKB="L", all driver outputs are
"L" (short brake). When BRKB="H" or OPEN, then short brake action is released. In addition, BRKB terminal is
pulled up by VREG through a resistance of 100kΩ (Typ) ±30kΩ. With regard to the bias current, please see the table
of Electrical Characteristics shown P12.
BRKB
Operation
H or OPEN
Normal
L
Short brake
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Description of Blocks – continued
6. CW/CCW Input Terminal (CW)
Rotation direction can be switched with CW terminal. When CW="H" or OPEN, the direction is Clockwise. When
CW="L", the direction is Counterclockwise. In addition, CW terminal is pulled up by VREG through resistance of
100kΩ (Typ) ±30kΩ. With regard to the bias current, please see the table of Electrical Characteristics shown P12.
CW
Direction
H or OPEN
Clockwise
L
Counterclockwise
7. 1FG/3FG Switching Terminal (FGSW)
FG signal that is output from FGO terminal can be switched to 1FG/3FG. It becomes 3FG by FGSW="H" or OPEN,
and 1 FG by FGSW="L". Moreover, FGSW terminal is pulled up by VREG through resistance of 100kΩ (Typ) ±30kΩ.
FGSW
FGO
H or OPEN
3FG
L
1FG
8. Hall Input (HALL: HUP, HUN, HVP, HVN, HWP, HWN)
Hall comparator inside the IC is designed with hysteresis (±15mV (Typ)) in order to prevent incorrect action due to
noise. Always set correct bias current for the Hall element so that the amplitude of Hall input voltage will be over the
minimum input voltage (VHALLMIN,please see the table of Electrical Characteristics shown P12). It is recommended to
connect a ceramic capacitor with about 100pF to 0.01µF value between the input terminals of the Hall comparator.
The in-phase input voltage range (VHALLCM1:0V to VREG-1.7V, VHALLCM2:0V to VREG) is designed for Hall comparator,
set within this range when applying bias to the Hall element.
“H” or “L” of HU, HV and HW in Commutation Logic means the following.
HU
HV
HW
HUP
HUN
HVP
HVN
HWP
HWN
H
L
H
H
L
L
H
H
L
H
L
L
H
L
L
H
L
H
H
H
L
H
L
H
L
L
H
L
H
L
L
H
H
L
L
H
L
H
H
L
H
H
L
H
L
L
L
H
L
H
L
H
H
L
When HU, HV and HW become all "H" or "L", all driver outputs "Hi-z"(HALLERR).
9. FG Output Terminal (FGO)
1FG or 3FG signal that is reshaped by hall signal is output from FGO terminal. It is does not have output in stand-by
mode. In addition, because FG terminal is output from open drain, please use resistance of about 10kΩ to 100kΩ
pulled up from outside. In that case, please be careful that FGO voltage or current never exceed rating.
10. Power Supply Terminal (VCC)
Please make low impedance thick and short since motor drive current flows. Please stabilize V CC by placing bypass
capacitor near terminal as much as possible because V CC might be changed considerably by motor BEMF and PWM
switching. Please add capacity of capacitor as necessary when using large current and motor with large BEMF.
Moreover, please to place laminated ceramic capacitor of around 0.01µF to 0.1µF in parallel on the purpose of
decreasing impedance of power supply broadband. Please be careful that VCC never exceeds ratings. VCC terminal
has clamp element for preventing ESD damage. If applying steep pulse signal and voltage such as surge more than
ratings, this clamp element operates, which might be a cause of destruction. It is effective to put zener diode that
corresponds to VCC absolute maximum ratings. Diode for preventing ESD damage is inserted between VCC and
GND terminals. Please note that IC might be destroyed when the backward voltage is applied to VCC and GND
terminals.
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Description of Blocks – continued
11. Ground Terminal (GND, PGND)
Wiring impedance from this terminal should be as low as possible for reducing noise of switching current and
stabilizing basic voltage inside of IC, and the impedance also should be the lowest potential in any operating
condition. In addition, please design the PCB pattern not to have common impedance as other GND pattern.
12. Driver Output Terminal (U, V, W)
When driver output converts "L"→"H" or "H"→"L", for example when synchronous rectification PWM is operating, a
dead time (1µs(Typ)) will be set to prevent simultaneous ON of output top & bottom MOS.
Please be careful about the following points in using driver output.
・ Wiring should be thick, short, and low Impedance due to motor drive current.
・ In applying steep pulse signal or voltage that will surge more than ratings, the clamp element which is built-in the
driver output terminal operates in order to prevent ESD damage. Then it might cause destruction of IC.
Do not exceed ratings.
When using large current, in case that driver current changes considerably toward positive and negative (when
BEMF is large), malfunction or destruction of IC might occur. Please add Schottky diode to the driver output terminal.
13. Capacitor Connection Terminal for Boosting, Boosting Output Terminal (CP1, CP2, VG)
Charge pump is built-in for upper Nch MOS drive signal of driver output. Boosting voltage of V CC+5V (Typ) occurs in
VG terminal by connecting capacitor between CP1 to CP2 terminals and VG to VCC terminals. Please use capacitor
more than 0.1µF. In addition, because there is built-in protection circuit for insufficient booster, when VG voltage is
below VCC+2V (Typ.), driver outputs all become “Hi-z”.
14. Resistance Connection Terminal for Detecting Output Current (RNF)
Please insert resistance for detecting current 0.075Ω to 0.5Ω between RNF and GND. When deciding resistance
value, it should be careful that consumption electricity of resistance for detecting current does not exceed rating of
resistance. In addition, please do not have common impedance as other GND patterns by using low impedance
wiring, since motor drive current flows into pattern of RNF terminal to resistance for detecting current to GND. In
case that RNF voltage goes over rating (0.7V), circuit malfunction might occur. Therefore please do not exceed
rating. When RNF terminal is shorted to GND, big current flows due to a lack of normal current limit operation.
Please be careful that OCP or TSD(Please see the Protection Circuit shown P.10) might operate in that case.
Similarly, if RNF terminal is OPEN, output current might not flow, which also becomes a cause of malfunction.
15. Comparator Input Terminal for Detecting Output Current (RCL)
RCL terminal is placed individually as input terminal of current detect comparator in order to avoid deterioration of
current detect accuracy by wire impedance inside IC of RNF terminal. Therefore, when operating current limit, please
be sure to connect RNF terminal and RCL terminal(Please see the Protection Circuit shown P.10). Moreover, it is
possible to reduce deterioration of current detect accuracy by impedance of board pattern between RNF terminal
and resistance for detecting current by connecting wiring from RCL terminal most adjacent to resistance for detecting
current. Please design pattern considering wiring that is less influenced by noise. Additionally, when RCL terminal is
shorted to GND, big current might flow due to a lack of normal current limit operation. Please be careful that OCP or
TSD(Please see the Protection Circuit shown P.10) might operate in that case.
16. Non-connection Terminal (NC)
It is not connected to internal circuit electrically.
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Description of Blocks – continued
17. Control Signal Sequence
Though we recommend you input control signals of ENB, PWMB, BRKB, FGSW, CW, CLNMT, LPE terminals after
inputting VCC, there is no problem if you input control signals before inputting V CC. If LPE terminal is set to "H" or "M"
when being started, please be informed that if motor rotation cannot be detected within the set time (edge of FGO
signal cannot be input), then the MLP(Please see the Protection Circuit shown P.10) circuit starts and motor fails to
start. Moreover, the order of priority is set to control signal and IC internal signal. Please refer to the following table.
Priority of Control Signal
Priority
Input / Internal Signals
1st
2nd
ENB, UVLO
BRKB,CW,PWMB(Note 1)
3rd
TSD, OCP, MLP, HALLERR
4th
OVLO
5th
VG_UVLO
6th
BRKB
7th
CL
8th
PWMB, CW
(Note 1) means rising and falling edges of signal. For signal name, please see state transition diagram.
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Protection Circuit
1. Current Limit Circuit (CL circuit)
Current limit of output (Current Limit: CL) can be achieved by changing voltage of output current with resistance
between RNF and GND, and then inputting the voltage into RCL terminal. In order to avoid error detection of current
detection comparator by RNF spike noise that occurs at output ON, using mask time(Please see the following table)
can be efficient. Current detection is invalid during mask time after RCL voltage becomes more than 0.2V (Typ).
Then please turn OFF all lower MOS of driver output, which is returned automatically after specified time (32µs
(Typ)). This operation is not synchronized with PWM signal that is input into PWMB terminal. Moreover, it is possible
to change mask time by CLNMT terminal. At CLNMT="H" or OPEN, 0.5µs (Typ). At CLNMT="M", 0.75µs (Typ). At
CLNMT="L", 0.25µs (Typ). CLNMT terminal is also pulled up by VREG through a resistance of 100kΩ (Typ) ±30k Ω.
With regard to the bias current, please see the table of Electrical Characteristics shown P12.
CLNMT
Mask time
H or OPEN
0.5µs (Typ) ±0.3µs
M
0.75µs (Typ) ±0.4µs
L
0.25µs (Typ) ±0.2µs
2. Thermal Shut Down Circuit (TSD Circuit)
When chip temperature of driver IC rises and exceeds the set temperature (175°C (Typ)), the thermal shut down
circuit (Thermal Shut Down: TSD) begins to work. At this time, the driver outputs all become "Hi-z". In addition, the
TSD circuit is designed with hysteresis (25°C (Typ)), therefore, when the chip temperature drops, it returns to normal
working condition. Moreover, the purpose of the TSD circuit is to protect driver IC from thermal breakdown, therefore,
temperature of this circuit will be over working temperature when it is started up. Thus, thermal design should have
sufficient margin, so do not take continuous use and action of the circuit as a precondition.
3. Over Current Protection Circuit (OCP Circuit)
Over current protection (Over Current Protection: OCP) is built-in in order to prevent from destruction when being
shorted between output terminals and also being VCC/GND shorted. Therefore output current exceeds ratings and
specified current flows. In that case, driver outputs are all latched to Hi-z condition. Latch can be released by going
through stand-by condition or switching BRKB/CW logic. However, output current rating is exceeded when this circuit
operates. Thus, please design sufficient margin not to take continuous use and action of the circuit as a precondition.
4. Under Voltage Lock Out Circuit (UVLO Circuit)
There is a built-in under voltage lock out circuit (Under Voltage Lock Out: UVLO) used to ensure the lowest power
supply voltage for drive IC to work and to prevent error action of IC. When V CC declines to VUVL (6V (Typ) ,please see
the table of Electrical Characteristics shown P12), all of the driver outputs should be "Hi-z". At the same time, UVLO
circuit is designed with hysteresis (1V (Typ)), so when VCC reaches more than VUVH (7V (Typ) ,please see the table of
Electrical Characteristics shown P12), it enters normal working condition.
5. Over Voltage Lock Out Circuit (OVLO circuit)
There is built-in over voltage lock out circuit (Over Voltage Lock Out: OVLO) used to restrain rise of V CC when motor
is decelerating. When LPE terminal is at "M" and VCC is over VOVH1 (16V (Typ) ,please see the table of Electrical
Characteristics shown P12), and when LPE terminal is at "H" or "L" and VCC is over VOVH2 (31V (Typ) ,please see the
table of Electrical Characteristics shown P12), a certain time (4ms (Typ)) of short brake action is conducted. What’s
more, because OVLO circuit is designed with hysteresis, therefore, when VOVH1 is below VOVL1 (15V (Typ) ,please
see the table of Electrical Characteristics shown P12) and when VOVH2 is below VOVL2 (30.5V (Typ) ,please see the
table of Electrical Characteristics shown P12), it can return to normal working condition after a certain time of short
brake action.
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Protection Circuit – continued
6. Motor Lock Protection Circuit (MLP circuit)
There is built-in motor lock protection circuit (Motor Lock Protection: MLP). The Enable/Disable of MLP circuit and
OVLO threshold can be set by the LPE terminal.
In monitoring Hall signals, when the LPE = "H" or "M" and Hall signal logic does not change to more than
1.1sec(Typ), all driver outputs are latched as "Hi-z".
There are three ways to release the latch.
・ The latch is released by putting IC in standby mode.
・ The latch is released by changing BRKB/CW logic.
・ After PWMB = "H" or OPEN state is detected for about 15ms, the latch is released by falling edge of
subsequent PWMB.
However, when LPE = "L", short brake action (including switching rotation direction) enables or TSD circuit works,
MLP circuit does not work.
LPE terminal is pulled up by VREG through a resistance of 100kΩ (Typ) ±30 kΩ. With regard to the bias current,
please see the table of Electrical Characteristics shown P12.
LPE
Monitoring Time
OVLO Threshold
H or OPEN
1.1sec(Typ) ±30%
VOVH2, VOVL2
M
1.1sec(Typ) ±30%
VOVH1, VOVL1
L
Disable
VOVH2, VOVL2
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Electrical Characteristics (Unless otherwise specified Ta=25°C, VCC=24V)
Item
Symbol
Limit
Unit
Condition
Min
Typ
Max
-
4.4
8.4
mA
VENB=0V
[Whole]
Circuit Current
ICC
Stand-by Current
ISTBY
-
1.1
1.7
mA
ENB=OPEN
VREG Voltage
VREG
4.5
5.0
5.5
V
IVREG=-10mA
RON
-
0.17
0.27
Ω
IOUT=±1.5A(Upper + Lower)
VHALL=0V
[Driver output]
Output On Resistance
[Hall input]
IHALL
-2.0
-0.1
+2.0
µA
Range of In-phase Input Voltage1
Input Bias Current
VHALLCM1
0
-
VREG-1.7
V
Range of In-phase Input Voltage2
VHALLCM2
0
-
VREG
V
Minimum Input Voltage
VHALLMIN
50
-
-
mVp-p
HYS Level +
VHALLHY+
5
15
25
mV
HYS Level -
VHALLHY-
-25
-15
-5
mV
IENB
-75
-45
-25
µA
Standby Voltage
VSTBY
2.0
-
VREG
V
Enable Voltage
VENA
0
-
0.8
V
When one hall Input is bias
[Input of Control: ENB]
Input Current
VENB=0V
[Input of Control: PWMB, CW, BRKB, FGSW]
Input Current
Voltage Input H
Voltage Input L
Minimum Input Pulse Width
IIN
-80
-50
-30
µA
VINH
2.0
-
VREG
V
VIN=0V
VINL
0
-
0.8
V
tPLSMIN
1
-
-
msec
CW, BRKB
[Input of Control: LPE, CLNMT]
Input Current
IIN2
-80
-50
-30
µA
Input Voltage "H"
VINH2
0.8×VREG
-
VREG
V
VIN2=0V
Input Voltage "M"
VINM2
0.4×VREG
-
0.6×VREG
V
Input Voltage "L"
VINL2
0
-
0.2×VREG
V
VFGOL
0
0.1
0.3
V
VCL
0.18
0.20
0.22
V
Release Voltage
VUVH
6.5
7.0
7.5
V
Lockout Voltage
VUVL
5.5
6.0
6.5
V
Release Voltage1
VOVL1
14.0
15.0
16.0
V
LPE="M"
Lockout Voltage1
VOVH1
15.0
16.0
17.0
V
LPE="M"
Release Voltage2
VOVL2
29.0
30.5
32.0
V
LPE="H" or "L"
Lockout Voltage2
VOVH2
29.5
31.0
32.5
V
LPE="H" or "L"
[FG Output: FGO]
Output Voltage L
IFGO=2mA
[Current Limit]
Detect Voltage
[UVLO]
[OVLO]
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Timing Chart
CW Direction (CW="H" or Open)
HU
HV
HW
U
PWM
V
PWM
PWM
W
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
CCW Direction (CW="L")
HU
HV
HW
U
PWM
V
W
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
FG Output
FGO (3FG)
FGO (1FG)
Figure 4. Timing Chart
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State Transition Diagram (Note 1)
BRKB
CW
Short brake
DIR change
(LPC=RESET)
Short brake
LPC
RESET
LPE
____
BRK
DIR
after 4ms
BRK
OVLO
TSD
LP timer
____
TSD
________ _________
Hall error & VG_UVLO
RUN
(LPC=RUN, LPE="H" or "M" only)
Detect hall edge &
LPE="H" or "M" within 1.1sec.
Hall error
+
VG_UVLO
DIR change
+
BRK
+
PWMB fall edge
after PWMB="H"
over 15ms.
LPC overflow
Both side drivers off
(LPC=RESET)
Hall edge undetected
& LPE="H" or "M"
ENB
+
UVLO
____
ENB
&
_____
UVLO
Both side drivers off
after
32μs
Over
current
Low side driver off
Both side drivers off
with latch
Stand-by
ENB + UVLO
Figure 5. State Transition Diagram
Legend:
DIR: motor rotational direction
LP: motor lock protection
LPC: internal counter for the motor lock protection (watch-dog timer)
fHALL: hall signal frequency
Hall error: HU=HV=HW
&: logical "AND"
+: logical "OR"
(LPC=RESET, driver off)
ENB="H"⇒VREG off
ENB
State transition
Command signal
(Note 1) All values are typical
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BD63007MUV
I/O Equivalence Circuits
Internal
Reg
VREG
VREG
100kΩ
FGSW
PWMB
BRKB
CW
10kΩ
100kΩ
100kΩ
CLNMT
LPE
10kΩ
10kΩ
10kΩ
VCC
VREG
VREG
145kΩ
VREG
FGO
HUP
HUN
HVP
HVN
HWP
HWN
250kΩ
5Ω
RCL
2kΩ
2kΩ
50kΩ
VG
VCC
Internal
Reg
25Ω
25Ω
500kΩ
100kΩ
CP2
CP1
U
V
W
VCC
RNF
Figure 6. I/O Equivalence Circuits
Application Operational Notes
1.
CP1-CP2 shorted
When CP1 (22pin) and CP2 (23pin) are incorrected shorted, they result in damaging the IC. Inter-pin shorts could be
due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder
bridge deposited in between pins during assembly to name a few.
2.
VCC-LPE shorted
When VCC (28pin) and LPE (29pin) are incorrected shorted, they result in damaging the IC. Inter-pin shorts could be
due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder
bridge deposited in between pins during assembly to name a few.
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately
but connected to a single ground at the reference point of the application board to avoid fluctuations in the
small-signal ground caused by large currents. Also ensure that the ground traces of external components do not
cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line
impedance.
5.
Thermal Consideration
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the
board size and copper area to prevent exceeding the maximum junction temperature rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
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Operational Notes – continued
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 7. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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Operational Notes – continued
14. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls
below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
15. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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Ordering Information
B
D
6
3
0
0
7
M
U
V
-
Package
MUV: VQFN040V6060
Part Number
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagrams
VQFN040V6060 (TOP VIEW)
Part Number Marking
BD63007
LOT Number
1PIN MARK
Part Number Marking
BD63007
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Package
Orderable Part Number
VQFN040V6060
BD63007MUV-E2
19/21
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8.Mar.2017 Rev.001
BD63007MUV
Physical Dimension, Tape and Reel Information
Package Name
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VQFN040V6060
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8.Mar.2017 Rev.001
BD63007MUV
Revision History
Date
Revision
8.Mar.2017
001
Changes
New Release
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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