BD7690FJ-E2

Datasheet DC/DC Driver Power Factor Correction Controller IC BD7690FJ Key Specifications General Description BD7690FJ is Power Factor Correction for AC/DC supplies the system which is suitable for all the products needing power factor improvement. The PFC adopts boundary conduction mode (BCM), and switching loss reduction and noise reduction are possible by Zero Current Detection (ZCD). ZCD is detected by auxiliary winding.     Input Voltage Range: 10V to 26V 310uA(Typ) Operating Current: Max Frequency: 220kHz(RT:220kΩ) Operating Temperature Range: -40°C to +105°C Package(s) W(Typ) x D(Typ) x H(Max) 4.90mm x 6.00mm x 1.65mm SOP-J8 Features            Boundary Conduction Mode Low Power consumption VCCUVLO The ZCD detection by auxiliary winding Switching loss reduction, noise reduction by ZCD Improving the efficiency by the max frequency control Dynamic and Static OVP by the VS pin High accuracy over current detection(±4%) Error amplifier input short protection Restart timer Stable MOSFET gate drive by the Clamper SOP-J8 Applications  AC adopter, TV, Lighting equipment, Refrigerator, etc. Typical Application Circuit(s) 400V Diode Bridge VS CS VCC 8 7 6 VCC OUT GND 5 ZCD BD7690FJ VS EO RT CS 1 2 3 4 VS CS Figure 1. Application Circuit 〇Product structure : Silicon monolithic integrated circuit .www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 14 • 001 〇This product has no designed protection against radioactive rays 1/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 Contents General Description ...................................................................................................................................................................... 1 Contents ........................................................................................................................................................................................ 2 Pin Configuration(s) ..................................................................................................................................................................... 3 Pin Description(s) ......................................................................................................................................................................... 3 Block Diagram(s) .......................................................................................................................................................................... 3 Description of Block(s)................................................................................................................................................................. 4 Operation mode of the protective circuit .................................................................................................................................... 9 Absolute Maximum Ratings (Ta = 25°C) ................................................................................................................................... 10 Thermal Resistance(Note 1) ........................................................................................................................................................... 10 Recommended Operating Conditions（Ta=25°C） ................................................................................................................. 10 Electrical Characteristics (Unless otherwise specified VCC=15V Ta=25°C) .......................................................................... 11 I/O Equivalence Circuits ............................................................................................................................................................. 14 Application Example................................................................................................................................................................... 14 Attention in the board design .................................................................................................................................................... 16 About parts placement ............................................................................................................................................................... 16 Operational Notes ....................................................................................................................................................................... 18 Ordering Information .................................................................................................................................................................. 20 Marking Diagrams ....................................................................................................................................................................... 20 Physical Dimension, Tape and Reel Information ..................................................................................................................... 21 Revision History ......................................................................................................................................................................... 22 〇Product structure : Silicon monolithic integrated circuit .www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 14 • 001 〇This product has no designed protection against radioactive rays 2/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ Pin Configuration(s) 8 7 6 VCC OUT GND 5 ZCD BD7690FJ VS EO RT CS 1 2 3 4 Figure 2. Pin Configuration（Top View） Pin Description(s) Table 1. Pin Description Pin Name I/O Pin No. VS EO RT CS ZCD GND OUT VCC I I/O I/O I I O I 1 2 3 4 5 6 7 8 ESD Diode VCC GND ○ ○ ○ ○ ○ ○ ○ ○ Function Feedback input Error amp output Max frequency setting Over current detection Zero current detection GND MOSFET gate control VCC Block Diagram(s) VOUT FUSE Diode Bridge Filter VS VCC GND + AC 85265Vac 1shot + - UVLO BGR 4.0V Reg 13.0V/ 9.0V out TSD VGUP Comp 0.3V + - 2.25V VS ErrAmp + EO RRT 1.15V 2.625V DOVP Comp + - 2.725V + - TSD SHORT Comp SP GCLAMP (12V) RT_L Comp + - SOVP AND OR S POUT OUT UVLO Q 2.5V UVLO RT_H RT Timer 30us reset SOVP Comp VS PWM Comp 1.9V + RT_H + RT_H Comp 0.65V + - ZCD Internal Supply BGRBUF + - 0.67V/1.80V SOVP OR R SP AND PRE Driver NOUT 100kΩ TSD OSC EN ISOCP Comp CS Figure 3. Block Diagram www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 3/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ Description of Block(s) (1) VCC protection This IC incorporates VCC UVLO (Under Voltage Lock Out) of the VCC pin. Switching stops at the time of VCC voltage drop. (2) Power Factor Correction The power factor improvement circuit is a voltage control method of Boundary Conduction Mode. The outline operation circuit diagram is shown in Figure 4. The switching operation is shown in Figure 5. Switching Operation 1. MOSFET is turned on, and IL increases 2. The IC compares VEO with Vramp, and MOSFET is off when the Vramp voltage higher than VEO 3. MOSFET is off, and IL decreases 4. The IC detects a zero point of the IL in ZCD and turns on MOSFET Auxiliary winding for zero current detection IL Diode Bridge PFC OUT ACIN FRD MOSFET OUT ZCD PFC OUT Feedback Resistance VS EO CS GND RCS GND OCP detected Resistance Figure 4. Operation circuit outline OUT (Gate) MOSFET (Vds) IL V EO Vramp (Internal) VZCD 1 2 3 4 Figure 5. Switching operation timing chart www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 4/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ (3) About ErrAMP (3-1) gmAMP The VS pin monitors a divided voltage of the output voltage. The ripple voltage of AC frequency (50Hz/60Hz) overlaps with VS pin. gmAMP removes this ripple voltage. gmAMP compares VAMP (2.5V typ.) with the divided voltage of the output voltage, gmAMP controls the EO voltage by this gap. When EO pin voltage rises, ON width of the OUT pin becomes wide. When the EO voltage less than about 0.7V, the IC stops switching. Therefore it can stop switching operation when EO pin connects to the GND. External parts value of EO pin should be set that the ripple voltage of AC frequency does not conduct to EO pin. And, please confirm it by real board. PFC Output VS + 2.50V EO_ VSEO Figure 6. gmAMP block diagram (3-2) VS short protection VS pin has a short protection function. A state of PFC output voltage < VSHORT (0.3V typ.) continues more than TVS_SH (150us typ.), it stops switching. It shows operation in Figure 7. PFC output Vout VS V SHORT T VS_SH OUT Switching stop Figure 7. Operation of VS short protection (3-3) VS low voltage gain increase function When output voltage decreases by output load sudden changes, an output voltage drop period becomes long because a voltage control loop is slow. VS pin voltage becomes lower than VGUP (2.25V typ.) (equivalent to -10% of output voltage), the error amplifier increases a gain. By this operation, ON width of OUT increases and prevents a long-term drop of the output voltage. When VS pin voltage rises from VGUP(2.25V typ.), this operation stops. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 5/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ (3-4) VS overvoltage gain increase function (Dynamic OVP) When output voltage rises by startup or a rapid change of the output load, output voltage rises for a long term because a voltage control loop is slow. VS pin voltage becomes higher than VOVP (2.625V typ.) (equivalent to +5% of output voltage), the error amplifier increases a gain. By this operation, it reduces ON width of OUT and prevents a long-term rise of the output voltage. When VS pin voltage decreases under VOVP(2.625V typ.), this operation stops. (3-5) VS overvoltage protection function (Static OVP) VS pin rises across VOVP, static OVP acts, and VS pin voltage rises from VOVP1(2.7V typ.), it stops switching immediately. VS pin voltage under than VOVP2(2.6V typ.), it starts switching. It shows operation in Figure 8. PFC Output VOVP1 VOVP2 VS Switching stop OUT Figure 8. VS overvoltage protection operation (4) CS overcurrent detection In operation, turn OFF of PFC is usually decided in EO pin voltage. However, when CS pin rises than overcurrent detection voltage (the CS pin threshold voltage) VCS(0.65V typ.), overcurrent protection works. For this protection, OUT pin turn off pulse by pulse. The overcurrent protection limits ON width. The PFC voltage is decrease when this OCP works. Please decide RCS value of PFC so that this protection does not work in rated load with the minimum input voltage at the time of the application design. OUT Control Logic CS Over Current Protection 0.65V CCS RCS Figure 9. CS overcurrent detection www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 6/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ (5) ZCD pin zero current detection The zero current detection circuit is a function to detect a zero cross of the inductor current (IL) (cf. Figure 10). In addition, it recommends that it adds CR filter for switching noise reduction. It inserts R1 for limit the current between auxiliary winding and ZCD pin to use ZCD pin in rating. In addition, Vds of Q1 performs free resonance when inductor current disappears. It can suppress a switching loss and the surge of Q1 by coordinating R1,C1 so that Q1 is turned on in the valley of the resonance wave pattern. D1 C0 OUT Q1 R1 RCS C1 ZCD 0.67/1.8V Control Logic OUT FMAX Figure 10. ZCD circuit Vds Time Figure 11. Drain wave patterns (6) RT pin This pin sets a slope wave pattern formed in the IC inside by external resistance. It shows RT resistor value and relations of the maximum frequency in Figure 12. The maximum ON width on the application is calculated in the following formula. It shows relations of RT resistor value and maximum ON width in Figure 13. TON _ MAX [ s]  VAC: Input voltage, L: Inductance, 2  L  PO 2 VACMin   Po: Max output power,  :Efficiency Necessary TON_MAX on application can be check as upper formula. Please set ON width in RT pin more than TONMAX. In addition, the high-speed frequency in the light load is limited in RT pin. The external resistance range of the RT pin is 51kΩ 390kΩ. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 7/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ VCC=15V Figure 12. VCC=15V Relations of RT resistor value and the Max frequency (reference value) Figure 13. Relations of RT resistor value and the Max ON width (reference value) *The graph mentioned above is reference value. After the confirmation of the actual board, please set the fixed number. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 8/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ Operation mode of the protective circuit It shows the operation mode of each protection function in Table 2. Table 2. Operation mode of each protective circuit Protection mode Parameter Contents VCCUVLO Detection method Detect operation Cancellation method Cancellation operation VCC pin low voltage protection VCC13.0V(typ.) （VCC rise） Startup operation VS short protection VS pin short protection VS0.30V(typ.) （VS rise） Normal operation VS gain increase VS pin low voltage gain increase VS2.25V(typ.) （VS rise） Normal operation VS Dynamic OVP VS pin overvoltage protection 1 VS>2.625V(typ.) （VS rise） GM amplifier GAIN increase VS2.700V(typ.) （VS rise） OUT stop VS Pin A and GND > Pin B, the P-N junction operates as a parasitic diode. When GND > Pin B, the P-N junction operates as a parasitic transistor. Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be avoided. Resistor Transistor (NPN) Pin A Pin B C E Pin A N P+ P N N P+ N Parasitic Elements N P+ N P N P+ B N C E Parasitic Elements P Substrate P Substrate Parasitic Elements Pin B B GND Parasitic Elements GND GND N Region close-by GND Figure xx. Example of monolithic IC structure 13. Ceramic Capacitor When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temperature and the decrease in nominal capacitance due to DC bias and others. 14. Area of Safe Operation (ASO) Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within the Area of Safe Operation (ASO). 15. Thermal Shutdown Circuit(TSD) This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the TSD threshold, the circuits are automatically restored to normal operation. Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat damage. 16. Over Current Protection Circuit (OCP) This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in applications characterized by continuous operation or transitioning of the protection circuit. 17. Disturbance light In a device where a portion of silicon is exposed to light such as in a WL-CSP, IC characteristics may be affected due to photoelectric effect. For this reason, it is recommended to come up with countermeasures that will prevent the chip from being exposed to light. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 19/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ Ordering Information B D 7 6 9 Part Number 0 F J - Package FJ:SOP-J8 E2 Packaging and forming specification E2: Embossed tape and reel Marking Diagrams SOP-J8(TOP VIEW) Part Number Marking D 7 6 9 0 LOT Number 1PIN MARK Part Number Marking D7690 www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Package SOP-J8 Orderable Part Number BD7690FJ-E2 20/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ Physical Dimension, Tape and Reel Information Package Name www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 SOP-J8 21/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 BD7690FJ Revision History Date Revision 23. Jan. 2017 27. Mar. 2017 001 002 Changes Release p.11 Add electrical characteristics www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 22/22 TSZ02201-0F2F0A200280-1-2 27. Mar. 2017 Rev.002 Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). 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