Design Information
STRUCTURE
Silicon Monolithic Integrated circuit
PRODUCT SERIES
Low ESR Capacitor Built in shut down SW, Low Dropout 1A Regulator IC
TYPE
㧮㧰㧣㧤㧞㧜㧲㧼
FEATURES
㨯Maximum Output Current : 1A
㨯High Precision Output Voltage : r1%
٤ABSOLUTE MAXIMUM RATINGS㧔Ta=25͠㧕
Parameter
Symbol
Limits
Unit
Supply Voltage
̪1
Vcc
-0.3㨪7.0
V
Control Input Voltage
VCTL
-0.3㨪Vcc
V
Power Dissipation ̪2
Pd
1300
MW
Operating temperature range
Topr
-40㨪+105
͠
Storage Temperature range
Tstg
-55㨪+150
͠
Junction temperature
Tjmax
150
͠
̪1 Do not however exceed Pd.
̪2 Mounted on 70mm70mm1.6mm Glass Epoxy PCB, Pd derated at 10.4㨙W/͠ for tempearture above Ta=25͠
٤RECOMMENDED OPERATING CONDITIONS㧔Ta=-40㨪105͠, Do not however exceed Pd.㧕
Parameter
Input Voltage
Output current
Output Voltage
Control Pin Input Voltage
Symbol
Vcc
Io
Vo
Vctl
Min
2.3
0
1.0
0
Max
6.0
1
5.0
Vcc
Unit
䌖
A
V
V
NOTE : The product described in this specification is a strategic product (and/or service) subject to COCOM regulations. It
should not be exported without authorization from the appropriate government.
NOTE : This product is not designed for protection against radioactive rays.
Status of this document
The Japanese version of this document is the formal specification.
A customer may use this translation version only for a reference to help reading the formal version.
If there are any differences in translation version of this document, formal version takes priority.
,WP
Design Information
٤ELECTRICAL CHARACTERISTICS
Unless otherwise specified, Ta=25͠, Vcc=2.5V, VCTL=2V, Vo=1.5V setting
Limit
Parameter
Symbol
Unit
Min
Typ
Max
Shut Down Current
Isd
㧙
0
1
ǴA
Bias Current
Ib
㧙
350
550
ǴA
Reference Voltage
VADJ
0.742 0.750 0.758
V
Dropout Voltage1 ̪3
ǍVd1
㧙
0.25
0.50
V
Dropout Voltage2 ̪3
ǍVd2
㧙
0.50
1.00
V
㧙
㧙
Peak Output Current
Io
1
A
Conditions
VCTL=0V, Io=0mA (OFFmode)
Io=0mA
Io=50mA
Io=500mA, Vcc=0.95*Vo
Io=1000mA, Vcc=0.95*Vo
Ripple Rejection
R.R.
㧙
50
㧙
dB
f=120Hz, ein̪6=-10dBV, Io=100mA
Line Regulation
Reg.I
㧙
10
35
mV
Vcc=Vo+0.5V→6.0V, Io=200mA
Load Regulation
Temperature Coefficient of
Output Voltage ̪4
CTL ON Mode Voltage
Reg.L
㧙
50
100
mV
Io=0mA→1A
Tcvo
㧙
r100
㧙
VCTLON
2.0
㧙
㧙
CTL OFF Mode Voltage
VCTLOFF
㧙
㧙
0.8
V
CTL Input Current
ICTL
20
40
60
ǴA
ppm/͠ Io=5mA,Tj=0㨪125͠
V
ACTIVE MODE, Io=0mA
OFF MODE, Io=0mA
Io=0mA
̪Vo҈2.5V
̪Designed Guarantee.㧔Outgoing inspection is not done on all products.㧕
̪6 ein : Input Voltage Ripple
䂾PHYSICAL DIMENSIONS, MARKING
Marking
㪙㪛㪎㪏㪉㪇㩷
Lot No.
TO252-5 㧔UNIT : mm㧕
Design Information
䂾BLOCK DIAGRAM
䂾PIN NO. , PIN NAME
)0&
(+0
8TGH
Pin Number
1
2
3
4
5
FIN
&TKXGT
65&
%6.
2+0 8EE
2+0
Pin Name
CTL
Vcc
N.C.
OUT
ADJ
GND
1%2
2+0 176
2+0
0%
#&,
2+0
̪ Please refer to technical note concerning application circuit, and etc.
䂾NOTES FOR USE
1. Absolute maximum range
Absolute Maximum Ratings are those values beyond which the life of a device may be destroyed we cannot be defined the failure
mode, such as short mode or open mode.
Therefore physical security countermeasure, like fuse, is to be given when a specific mode to be beyond absolute maximum ratings is
considered.
2. GND pin voltage
GND terminal should be connected the lowest voltage, under all conditions. And all terminals except GND should be under GND
terminal voltage under all conditions including transient situations.
3. Power dissipation
If IC is used on condition that the power loss is over the power dissipation, the reliability will become worse by heat up, such as
reduced output current capability.
Also, be sure to use this IC within a power dissipation range allowing enough of margin.
4. Electrical characteristics described in these specifications may vary, depending on temperature, supply voltage, external circuits
and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics.
5. Be sure to connect a capacitor between the output pin and GND to prevent oscillation. Note that if the capacity of the capacitor
changes due to factors such as changes in temperature, oscillation may occur. A ceramic capacitor or other low ESR (2.2㱘F)
capacitor is recommended to prevent oscillation. Ceramic capacitors generally have thermal and DC bias characteristics to
consider. In selecting a ceramic capacitor, high voltage X5R or X7R versions or better are recommended for their superior thermal
and DC bias characteristics. However, in situations such as rapid fluctuation of the input voltage or the load, please check the
operation in real application to determine the proper capacitor.
6.
Overcurrent protection circuit
The built-in overcurrent protection circuit is designed to respond to the output current and prevent destruction of the IC from load
short circuits; however, it is only effective in protecting the IC from destruction in sudden overcurrent accidents. The protection
circuit is not to be used continuously, or for transitions. In executing thermal design, bear in mind that overcurrent protection has
negative characteristic according with the temperature.
7.
Thermal shutdown circuit
A built-in internal shutdown (TSD) circuit is provided to protect the IC from heat destruction. Operation has to be done within the
allowable loss range, but in continuous use beyond the range, chip temperature Tj will increase to the threshold, activating the
TSD circuit and turning the output power Tr OFF. Once the chip temperature Tj returns to the normal range, the circuit is
automatically restored. Note that the TSD circuit is designed to operate over the maximum absolute rating. Therefore, make
absolutely certain not to use the TSD function in set design.
8.
Mounting Failures
Mounting failure, such as misdirection or mismount, may cause a malfunction in the device.
9.
Internal circuits or elements may be damaged when Vcc and pin voltage are reversed. For example, Vcc short circuit to GND
while a external capacitor is charged. Output pin capacitor is recommended no larger than 1000µF. In addition, inserting a Vcc
series countercurrent prevention diode, or a bypass diode between the various pins and the vcc, is recommended.
Design Information
10.
Malfunction may be happened when the device is used in the strong electromagnetic field.
11. We recommend to put Diode for protection purpose in case of output pin connected with large load of impedance or reserve
current occurred at initial and output off.
12. Precautions for board inspection
Connecting low-impedance capacitors to run inspections with the board may produce stress on the IC. Therefore, be certain to
use proper discharge procedure before each process of the test operation. To prevent electrostatic accumulation and discharge in
the assembly process, thoroughly ground yourself and any equipment that could sustain ESD damage, and continue observing
ESD-prevention procedures in all handling, transfer and storage operations. Before attempting to connect components to the test
setup, make certain that the power supply is OFF. Likewise, be sure the power supply is OFF before removing any component
connected to the test setup.
13. GND pattern
When both a small-signal GND and high current GND are present, single-point grounding (at the set standard point) is
recommended, in order to separate the small-signal and high current patterns, and to be sure the voltage change stemming from
the wiring resistance and high current does not cause any voltage change in the small-signal GND. In the same way, care must
be taken to avoid voltage fluctuations in any connected external component GND.
