Datasheet
Class-AB Speaker Amplifier Series
2.8 W High Power
Monaural Speaker Amplifier for Automotive
BD783xxEFJ-M BD783xxUEFJ-M Series
General Description
Key Specifications
BD783xxEFJ-M, BD783xxUEFJ-M Series are Class-AB
monaural speaker amplifiers designed for automotive.
Class-AB amplifiers have no requirements for care about
EMI noise. Adopting power package HTSOP-J8 achieves
high output power. Low quiescent current can reduce
battery consumption. Shutdown current is also very low
(0.1 µA Typ) and pop noise level when switching to
shutdown is very small, so this device is suitable for
applications in which the mode often changes between
“shutdown state” and “active state”.
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◼
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Features
◼
◼
◼
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◼
Output Power
1.2 W (Typ)
(VDD = 5 V, RL = 8 Ω, THD+N = 1 %)
Output Power
2.8 W (Typ)
(VDD = 5 V, RL = 4 Ω, THD+N = 10 %)
Quiescent Current
2.5 mA (Typ)
Shutdown Current
0.1 µA (Typ)
Total Harmonic Distortion + Noise
(RL = 8 Ω, f = 1 kHz)
0.05 % (Typ)(Note 2)
Output Noise Voltage
15 μVRMS (Typ)(Note 2)
Voltage Gain
6.0 dB to 26.0 dB (Typ)
Operating Temperature Range -40 ºC to +105 ºC
(Note 2) Characteristic of BD78306EFJ-M
AEC-Q100 Qualified(Note 1)
Pop Noise Reduction Function
Shutdown Function
Protection Functions
Over Current Protection
Thermal Shutdown
Under Voltage Lock Out (UVLO)
Power Package with Thermal Pad HTSOP-J8
Package
W (Typ) x D (Typ) x H (Max)
4.90 mm x 6.00 mm x 1.00 mm
HTSOP-J8
(Note 1) Grade2
Applications
◼
Automotive Instruments
HTSOP-J8
Typical Application Circuit
1 SDB
OUTN 8
2 BIAS
GND 7
From System
Control
C1
0.47 µF
Input
Signal
C4
10 µF
C2
3 INP
VDD 6
4 INN
OUTP 5
VDD
0.47 µF
C3
0.47 µF
Figure 1
〇Product structure : Silicon integrated circuit
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BD783xxEFJ-M BD783xxUEFJ-M Series
Pin Configuration
(TOP VIEW)
SDB
1
8
OUTN
BIAS
2
7
GND
INP
3
6
VDD
INN
4
5
OUTP
EXP-PAD
Caution:
VDD and GND pins adjoin each other. In case that these pins are shorted each other, it may make characteristics of power
supply device worse, or it may damage power supply device.
Considering this point, select power supply device which has protection functions as over current protection.
Pin Description
Pin No.
Pin Name
1
SDB
Shutdown
Function
2
BIAS
Bias
3
INP
Positive differential input
4
INN
Negative differential input
5
OUTP
Positive output
6
VDD
Power supply
7
GND
Ground
8
OUTN
-
EXP-PAD
Negative output
Connect the EXP-PAD to Ground
Control Pin’s Setting
SDB pin
Operating Mode
High
Active
Low
Shutdown
Block Diagram
6
VDD
Part Number
Rf
BD78306EFJ-M
Ri
OUTP
3
INP
5
Ri
BD78326EFJ-M
Rf
BD78326UEFJ-M
Ri
OUTN
INN
Ri
Rf
2
BIAS
BD78310EFJ-M
BD78310UEFJ-M
Rf
4
BD78306UEFJ-M
Ri[kΩ]
(Typ)
Rf[kΩ]
(Typ)
90
90
70
110
16
164
8
Over Current
Pro tection
Thermal
Shu tdo wn
Bias
SDB
1
GND
Under Vol tage
Lock O ut
7
Figure 2
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Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Symbol
Rating
Unit
VDDmax
7.0
V
Input Voltage
Vin
-0.3 to VDD+0.3
V
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
150
°C
Supply Voltage
Maximum Junction Temperature
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing
board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance(Note 1)
Parameter
Symbol
Thermal Resistance (Typ)
Unit
1s(Note 3)
2s2p(Note 4)
θJA
149.4
39.8
°C/W
ΨJT
11.0
9.0
°C/W
HTSOP-J8
Junction to Ambient
Junction to Top Characterization
Parameter(Note 2)
(Note 1) Based on JESD51-2A (Still-Air), using a BD78326EFJ-M Chip.
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
2 Internal Layers
Thermal Via(Note 5)
Pitch
Diameter
1.20 mm
Φ0.30 mm
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 5) This thermal via connects with the copper pattern of all layers.
Use a thermal design that has sufficient margin in consideration of power dissipation under actual operating conditions. This
IC exposes its frame at the backside of package. Note that this part is assumed to be used after providing heat dissipation
treatment to improve heat dissipation efficiency. Try to put heat dissipation pattern as wide as possible not only on the board
surface but also on the backside.
Under the insufficient heat dissipation and excessive large signal input condition, power dissipation (Pdiss) exceeds
maximum power dissipation (Pd) and thermal shutdown function may operate. Thermal design should be considered so that
Pdiss is lower than Pd. Reference data of Pdiss is listed on P.7.
(Tjmax : Maximum Junction Temperature = 150 °C, Ta : Operating Ambient Temperature[°C], θja : Package Thermal
Resistance[°C/W])
Power dissipation:
𝑃𝑑 = (𝑇𝑗𝑚𝑎𝑥 − 𝑇𝑎) / 𝜃𝑗𝑎
[W]
This IC has thermal shutdown function. Thermal shutdown operates when Tj (junction temperature, which is assumed to be
same as chip temperature) rises over about 180 °C (Typ) and be released when Tj fall about 160 °C (Typ) or less.
Thermal shutdown is designed to protect the IC from temperature condition that exceeds Tjmax = 150 °C, not to protect or
warrant application set.
Note that device reliability is affected if it is used under temperature thermal shutdown operates.
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BD783xxEFJ-M BD783xxUEFJ-M Series
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Operating Supply Voltage
VDD
4.0
5.0
5.5
V
Operating Temperature
Topr
-40
+25
+105
°C
RL
3.2
8.0
38.4
Ω
Load Resistance
Caution: Operating supply voltage and operating temperature are the ranges in which the IC is available for basic operation.
(Basic operation means that the IC operates without emitting unexpected noise or stopping signal.)
Characteristics and rating are not warranted in the whole operating supply voltage and operating temperature.
Electrical Characteristics 1
(Unless otherwise specified Ta = -40 °C to +105 °C, VDD = 5.0 V, f = 1 kHz, RL = 8 Ω, BTL(Note 1), Active)
Parameter
Symbol
Quiescent Current
ICC
Min
-
Shutdown Current
ISD
-
Input Impedance
ZIN
Limits
Typ
2.5
Max
6.0
0.1
25.0
Unit
mA
No load
Shutdown
SDB = Low
µA
VOFS
ZIN
x0.4
-30
High Level
VIH
2.0
-
VDD
V
Low Level
VIL
0
-
0.3
V
Detection
VUVLO_DET
-
3.43
3.80
V
Release
VUVLO_REL
-
3.58
3.95
V
Output Offset Voltage
Conditions
kΩ
Refer to the table below
0
ZIN
x1.6
+30
mV
OUTP-OUTN
ZIN
Control Pin (SDB)
Input Voltage
Under Voltage Lock Out (UVLO)
Threshold Supply
Voltage
(Note 1) "BTL" means the state that RL is connected between the OUTP pin (pin5) and the OUTN pin (pin8).
Part Number
BD78306EFJ-M
BD78306UEFJ-M
BD78310EFJ-M
BD78310UEFJ-M
BD78326EFJ-M
BD78326UEFJ-M
ZIN[kΩ]
(Typ)
45
35
8
Electrical Characteristics 2
(Unless otherwise specified Ta = 25 °C, VDD = 5.0 V, f = 1 kHz, RL = 8 Ω, BTL, Active)
Min
Limits
Typ
Max
PO
0.9
1.2
1.6
W
POMAX
-
1.6
-
W
THD+N
-
-
0.5
%
GV
GV - 1
GV
GV + 1
dB
Shutdown Attenuation
ATTSD
-
-90
-80
dB
Power Supply Rejection Ratio
PSRR
-
-60
-40
dB
VNO
-
-
100
µVRMS
Parameter
Rated Output Power(Note 2)
Maximum Output Power
Total Harmonic Distortion + Noise
Voltage Gain(Note 2)
Output Noise Voltage
Symbol
Unit
Conditions
THD+N = 1 %,
BW = 400 Hz to 30 kHz
Continuous output time
60 s
THD+N = 10 %,
BW = 400 Hz to 30 kHz
Continuous output time
90 s
PO = 1 W
BW = 400 Hz to 30 kHz
PO = 0.5 W
GV = 6 dB to 26 dB
Vin = 0.1 VRMS
BW = 400 Hz to 30 kHz
Vripple = 0.2 VP-P, C1 = 0.47 µF
BW = A-Weight
C1 = 0.47 µF
BW = A-Weight
(Note 2) The typical performance of device is shown Output Power and Voltage Gain. It largely depends on the board layout, parts, and power supply. The typical
values are measured with the device and parts mounting on surface of ROHM’s board directly and soldering thermal pad backside of package to top
layer cupper pattern of the board.
This IC is applicable to only dynamic speaker, not to other loads.
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Typical Performance Curves
2.0
4.0
RL = 8 Ω
SDB = 0 V
Shutdown Current : ISD [µA]
Quiescent Current : ICC [mA]
RL = No Load
3.0
VUVLO_DET
2.0
VUVLO_REL
1.0
1.5
1.0
0.5
0.0
0.0
3
4
5
6
0
7
1
VDD = 5 V
RL = 8 Ω
1
0.1
0.01
f = 100 Hz (30 kHz LPF)
f = 1 kHz (BW = 400 Hz to 30 kHz)
f = 10 kHz (BW = 400 Hz to 80 kHz)
0.1
1
10
Output Power : PO [W]
5
6
7
BD78326EFJ-M
10
1
0.1
VDD = 5 V
RL = 8 Ω
0.01
f = 100 Hz (30 kHz LPF)
f = 1 kHz (BW = 400 Hz to 30 kHz)
f = 10 kHz (BW = 400 Hz to 80 kHz)
0.001
0.001
0.01
0.1
1
10
Output Power : PO [W]
Figure 6. Total Harmonic Distortion + Noise vs Output Power
Figure 5. Total Harmonic Distortion + Noise vs Output Power
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Total Harmonic Distortion + Noise : THD+N [%]
Total Harmonic Distortion + Noise : THD+N [%]
BD78306EFJ-M
0.01
4
Figure 4. Shutdown Current vs Supply Voltage
Figure 3. Quiescent Current vs Supply Voltage
0.001
0.001
3
Supply Voltage : VDD [V]
Supply Voltage : VDD [V]
10
2
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BD783xxEFJ-M BD783xxUEFJ-M Series
10
Total Harmonic Distortion + Noise : THD+N [%]
Total Harmonic Distortion + Noise : THD+N [%]
Typical Performance Curves – continued
VDD = 5 V
RL = 8 Ω
f = 1 kHz
BW = 400 Hz to 30 kHz
BD78326EFJ-M
1
0.1
BD78306EFJ-M
BD78310EFJ-M
0.01
0.001
10
1
0.1
BD78306EFJ-M
0.01
BD78310EFJ-M
0.001
0.01
0.1
1
10
10
Figure 7. Total Harmonic Distortion + Noise vs Output Power
1k
10k
100k
Figure 8. Total Harmonic Distortion + Noise vs Frequency
2.0
VDD = 5 V
RL = 8 Ω
PO = 0.5 W
BD78326EFJ-M
THD+N = 1 %
1.8
THD+N = 10 %
Output Power : PO [W]
Voltage Gain : GV [dB]
100
Frequency [Hz]
Output Power : PO [W]
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
BD78326EFJ-M
VDD = 5 V
PO = 1 W
RL = 8 Ω
80 kHz LPF
BD78310EFJ-M
1.6
1.4
1.2
1.0
RL = 8 Ω
f = 1 kHz
0.8
BD78306EFJ-M
10
100
1k
10k
100k
4.0
4.5
5.0
5.5
Supply Voltage : VDD [V]
Frequency [Hz]
Figure 9. Voltage Gain vs Frequency
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0.6
Figure 10. Output Power vs Supply Voltage
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Typical Performance Curves - continued
4.0
0.8
3.0
0.6
Output Power : PO [W]
Power Dissipation : Pdiss [W]
VDD = 5 V
f = 1 kHz
0.4
0.2
THD+N = 1 %
THD+N = 10 %
2.0
1.0
VDD = 5 V
RL = 8 Ω
0.0
0.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
8
16
24
32
Load Resistor : RL [Ω]
Output Power : PO [W]
Figure 12. Output Power vs Load Resistor
Figure 11. Power Dissipation vs Output Power
0
0
Shutdown Attenuation : ATTSD [dB]
-20
-30
VDD = 5 V
RL = 8 Ω
Vripple = 0.2 VP-P
Power Supply Rejection Ratio : PSRR [dB]
VDD = 5 V
RL = 8 Ω
Vin = 0.1 VRMS
SDB = 0 V
30 kHz LPF
-10
-10
-20
-30
-40
-50
-40
-60
-70
-80
-50
BD78326EFJ-M
-60
BD78306EFJ-M
-70
-90
-100
10
100
1k
10k
100k
10
100
1k
10k
100k
Frequency [Hz]
Frequency [Hz]
Figure 13. Shutdown Attenuation vs Frequency
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-80
Figure 14. Power Supply Rejection Ratio vs Frequency
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BD783xxEFJ-M BD783xxUEFJ-M Series
Timing Chart
Power on/power down sequences of the VDD pin and the SDB pin are shown.
Follow the sequences below when power on and power down.
1.
Power on sequence
(1) Start up voltage of the VDD pin and the SDB pin in order
V
(1) Start up the VDD pin voltage to 4 V or more.
VDD
t
V
SDB
VIH
(2) Start up the SDB pin voltage from V IL to VIH.
2.0 V
0.3 V
t
VIL t1 t2
V
t2-t1≤200 μs
BIAS
VDD/2
VDD/2 × 90 %
t
t3
V
(Maximum Turn On Time) = t 3-t2 = 540 ms
C1 = 0.47 μF
t4-t3≥0 s
INP
Start input signal
VDD/2
t4
t
V
OUTP
VDD/2
t
V
OUTN
VDD/2
t
V
BTL
(OUTP-OUTN)
t
Figure 15. Power On Sequence
Caution:
Start to input signal after waiting maximum Turn On Time 540 ms (C1 = 0.47 μF) after setting the SDB pin voltage high.
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BD783xxEFJ-M BD783xxUEFJ-M Series
Timing Chart – continued
(2)
Start up voltage of the VDD pin and the SDB pin simultaneously
V
Start up the VDD pin and the SDB pin voltage simultaneously from 0.8 V or less to 4.0 V or more.
VDD,SDB
4.0 V
0.8 V
t0
V
t
t1
200 μs≤t1-t0≤1 s
BIAS
Turn On Time t2-t0 depends on time period t1-t0 in which
the VDD pin and the SDB pin voltage are started up.
t1-t0
t2-t0
200 µ s
200 ms
1s
540 ms (Max)
600 ms (Max)
1.35 s (Max)
VDD/2
VDD/2 × 90 %
V
t
t2
(Turn On Time)= t2-t0
C1 = 0.47 μF
INP
t3-t2≥0 s
Start input signal
VDD/2
t
t3
V
OUTP
VDD/2
t
V
When the VDD pin and the SDB pin voltage are started up simultaneously,
Under Voltage Lock Out is released at VDD = 3.95 V (Max) and outputs are started up.
OUTN
VDD/2
t
BTL
(OUTPOUTN)
V
t
Caution:
Start up waveforms in the figure above, are described in case the VDD pin and the SDB pin voltage are started up
from 0 V to 5 V in time period of 300 ms as an example.
Figure 16. Power On Sequence
Turn On Time t2 - t0 (Max) [ms]
1400
1200
1000
800
600
400
200
0
0
200
400
600
800
1000
t1 - t0 [ms]
Figure 17. Turn On Time t2 – t0 (Max) vs t1 - t0
Caution:
Start to input signal after waiting maximum Turn On Time after setting the VDD pin and the SDB pin voltage high.
Turn On Time depends on time period in which the VDD pin and the SDB pin voltage are started up.
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Timing Chart – continued
2.
Power down sequence
(1) Turn down voltage of the SDB pin and the VDD pin in order
V
(2)Turn down the VDD pin voltage.
VDD
t5
V
SDB
t
(1)Turn down the SDB pin voltage to VIL after input signal is stopped.
VIH
t5-t4≥0 s
2.0 V
0.3 V
t1
V
t2 t3
t
VIL
t3-t2≤200 μs
BIAS
VDD/2
VDD/2 × 10 %
t4
t1-t0≥0 s
V
t
(Maximum Turn Off Time) = t4-t3 = 660 ms
C1 = 0.47 μF
INP
Stop input signal
VDD/2
t
t0
V
OUTP
VDD/2
t
V
OUTN
VDD/2
t
V
BTL
(OUTP-OUTN)
t
Figure 18. Power Down Sequence
Caution:
Turn down the VDD pin voltage after waiting maximum Turn Off Time 660 ms (C1 = 0.47 μF) after setting the SDB pin
voltage low. Output waveform may be clipped if signal is still input after Turn Off starts.
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BD783xxEFJ-M BD783xxUEFJ-M Series
Timing Chart – continued
(2)
Turn down voltage of the VDD pin and the SDB pin simultaneously
VDD, SDB
4.0 V
Turn down the VDD pin and the SDB pin voltage simultaneously to 0.8 V or less.
Caution : Unless the VDD pin and the SDB pin voltage are turned down 0.8 V or less,
the state Over Current Protection is started may not be released.
0.8 V
t1
t2
t
t3
200 μs≤t3-t2≤60 s
BIAS
VDD/2
t
t1-t0≥0 s
INP
Stop input signal
t
VDD/2
t0
OUTP
VDD/2
t
When the VDD pin and the SDB pin voltage are turned down
simultaneously, Under Voltage Lock Out starts at VDD = 3.80 V
(Max) and outputs are pulled down by 10 kΩ.
OUTN
VDD/2
t
BTL
(OUTP-OUTN)
t
Caution:
Turn down waveforms in the figure above, are described in case the VDD pin and the SDB pin voltage are turned down
from 5 V to 0 V in time period of 300 ms as an example.
Figure 19. Power Down Sequence
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BD783xxEFJ-M BD783xxUEFJ-M Series
Application Examples
VDD
C4
10 µF
6
VDD
Input
Signal
C2
0.47 µF
OUTP
INP
3
C3
0.47 µF
OUTN
INN
4
5
8
Over Current
Pro tection
C1
0.47 µF
Thermal
Shu tdo wn
BIAS
2
Bias
SDB
Under Vol tage
Lock O ut
GND
7
1
From
System Control
Figure 20. Single-ended Input
VDD
C4
10 µF
6
VDD
Input
Signal
Input
Signal
C2
0.47 µF
OUTP
INP
3
C3
0.47 µF
OUTN
4
INN
5
8
Over Current
Pro tection
C1
0.47 µF
2
Thermal
Shu tdo wn
BIAS
Bias
SDB
GND
Under Vol tage
Lock O ut
7
1
From
System Control
Figure 21. Differential Input
Parts
Capacitor
Parts Symbol
C1, C2, C3
C4
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Value
0.47 µF
10 µF
Manufacturer
Product No.
MURATA
GCM188R71E474KA64
MURATA
GRT188C81C106ME13
(This is only example of components externally connected.)
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BD783xxEFJ-M BD783xxUEFJ-M Series
Selection of Components Externally Connected
1.
Input Coupling Capacitors (C2, C3)
The frequency characteristic of input composes high pass filter (Figure 22. HPF) by input impedance ZIN and input
coupling capacitor C2, C3 (= CIN).
Cut off frequency fC is determined in following equation, set CIN considering it.
𝑓𝐶 =
1
2𝜋×𝑍𝐼𝑁 ×𝐶𝐼𝑁
[Hz]
In case that ZIN = 45 kΩ and CIN = 0.47 µF, fC is 7.5 Hz (Typ).
GV
GV -3 dB
fC
Figure 22. HPF
The capacitance of C2 and C3 should be the same at the INP and INN pins.
If the capacitance is different, audio characteristics such as THD+N may get worse and pop noise may be large.
2.
Power Supply Decoupling Capacitor (C4)
Power supply decoupling capacitor influences audio characteristics such as THD+N. Locate low ESR capacitor close
to the VDD pin.
Capacitance of C4 should be 10 µF or more.
3.
The BIAS pin Capacitor (C1)
The BIAS pin capacitor influences audio characteristic such as PSRR and THD+N. Locate low ESR capacitor close to
the BIAS pin.
Determine capacitance of C1 included in the range below, including variation and temperature characteristic also.
Turn On Time and Turn Off Time are also determined by capacitance of the BIAS pin capacitor.
Refer to the following section "Turn On and Turn Off".
Capacitance
C1
Min
Typ
Max
0.35 µF
0.47 µF
0.59 µF
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Turn On and Turn Off
This IC has built-in circuit controls transition time of the OUTP pin and the OUTN pin when the operation mode is switched
between active (SDB = High) and shutdown (SDB = Low). It achieves reducing pop noise.
SDB
5 V/div
SDB
5 V/div
OUTP
1 V/div
OUTN
1 V/div
OUTP
1 V/div
OUTN
1 V/div
OUTP - OUTN
5 V/div
OUTP - OUTN
5 V/div
Turn Off Time
Turn On Time
Figure 23. Turn On Waveform
Figure 24. Turn Off Waveform
Following table shows Turn On Time and Turn Off Time with C1 = 0.47 µF.
C1
0.47 µF
Turn On Time
270 ms (Typ)
540 ms (Max)
Turn Off Time
330 ms (Typ)
660 ms (Max)
Turn On Time is defined as the time until the BIAS pin voltage rises to 90 % of VDD/2 after the SDB pin voltage is Low to
High.
Turn Off Time is defined as the time until the BIAS pin voltage falls to 10 % of VDD/2 after the SDB pin voltage is High to Low.
Turn On Time and Turn Off Time may vary from typical value as the table above.
Maximum value above is calculated assuming that variation of resistors in IC: ±60 % (-40 °C to +105 °C), accuracy of C1:
±25 % (including variation and temperature characteristic).
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Protection Functions
This IC has protection functions that detect several kinds of abnormal conditions and protect itself.
Protection
Functions
Detection and Release Condition
State of Output Pins
Detection
The OUTP pin or the OUTN pin is shorted to the
VDD pin / the GND pin.
Signal Output stopped
and
Latched to High-Z
Release
Over Current Protection is released after setting
SDB to Low and waiting Turn Off Time.
After that, the IC becomes normal operation state
by setting the SDB pin to High.
Signal Output available
Detection
Tj : 180 °C (Typ) or more
Signal Output stopped
and
Pulled down by 10 kΩ
(Typ)
Release
Tj : 160 °C (Typ) or less
(released automatically)
Signal Output available
Detection
VDD : 3.43 V (Typ) / 3.80 V (Max) or less
Ta = -40 °C to +105 °C
Signal Output stopped
and
Pulled down by 10 kΩ
(Typ)
Release
VDD : 3.58 V (Typ) / 3.95 V (Max) or more
Ta = -40 °C to +105 °C
(released automatically)
Signal Output available
Over Current
Protection
Thermal Shutdown
Under Voltage
Lock Out
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Protection Functions - continued
1.
Over Current Protection
(1) Over Current Protection (Short to the VDD pin)
In case that the OUTP pin or the OUTN pin is shorted to the VDD pin, Over Current Protection starts to stop output
signal and latch output pins to High-Z.
Once Over Current Protection is started, the latch state is not released automatically even if the OUTP pin and the
OUTN pin are not shorted to the VDD pin. Over Current Protection is released by shutdown.
Detection
Release
The OUTP pin or the OUTN pin is shorted to the VDD pin.
Over Current Protection is released after setting the SDB pin to Low and waiting Turn Off Time
(660 ms Max).
After that, it is possible that the IC outputs signal by setting the SDB pin to High.
The OUTP pin or the OUTN pin
is shorted to the VDD pin
V
The OUTP pin and the OUTN pin are not
shorted to the VDD pin
The voltage of the OUTP pin and the OUTN pin returns to bias
voltage (VDD/2),but signal output is still stopped.
OUTP
VDD/2
t
Signal Output is stopped
(Over Current Protection)
V
Over Current Protection
is released
OUTN
VDD/2
t
Signal Output is stopped
Over Current Protection
is released
(Over Current Protection)
V
BTL
(OUTP-OUTN)
t
Signal Output is stopped
(Over Current Protection)
Set the SDB pin to Low
V
SDB
After Over Current Protection is
released, the IC becomes
active by setting the SDB pin to
High again.
VIL=0.3 V (Max)
t
V
BIAS
VDD/2
VDD/2 × 10 %
t
660 ms (Max)
Figure 25. Over Current Protection (Short to the VDD pin)
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Protection Functions – continued
Over Current Protection (Short to the GND pin)
In case that the OUTP pin or the OUTN pin is shorted to the GND pin, Over Current Protection starts to stop output
signal and latch output pins to High-Z.
Once Over Current Protection is started, the latch state is not released automatically even if the OUTP pin and the
OUTN pin are not shorted to the GND pin, Over Current Protection is released by shutdown.
(2)
Detection
Release
The OUTP pin or the OUTN pin is shorted to the GND pin
Over Current Protection is released after setting the SDB pin to Low and waiting Turn Off Time
(660 ms Max).
After that, it is possible that the IC outputs signal by setting the SDB pin to High.
The OUTP pin or the OUTN pin is
shorted to the GND pin
V
The OUTP pin and the OUTN pin are not
shorted to the GND pin
The voltage of the OUTP pin and the OUTN pin returns to bias
voltage (VDD/2),but signal output is still stopped.
OUTP
VDD/2
t
Signal Output is stopped
Over Current Protection
is released
(Over Current Protection)
V
OUTN
VDD/2
t
Signal Output is stopped
Over Current Protection
is released
(Over Current Protection)
V
BTL
(OUTP-OUTN)
t
Signal Output is stopped
(Over Current Protection)
Set the SDB pin to Low
V
SDB
After Over Current Protection is
released, the IC becomes
active by setting the SDB pin to
High again.
VIL=0.3 V (Max)
t
V
BIAS
VDD/2
VDD/2 × 10 %
t
660 ms (Max)
Figure 26. Over Current Protection (Short to the GND pin)
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Protection Functions – continued
2.
Thermal Shutdown
In case that Tj rises to 180 °C (Typ) or more, Thermal Shutdown starts to stop output signal and pulls down output pins
by 10 kΩ (Typ).
Detection
Release
Tj : 180 °C (Typ) or more
Tj : 160 °C (Typ) or less
(released automatically)
˚C
180 °C (Typ)
Tj
160 °C (Typ)
t
V
SDB
t
V
OUTP
VDD/2
Signal Output is stopped
t
V
OUTN
VDD/2
Signal Output is stopped
t
V
BTL
(OUTP-OUTN)
Signal Output is stopped
t
Figure 27. Thermal Shutdown
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Protection Functions – continued
3.
Under Voltage Lock Out
In case that VDD drops to 3.43 V (Typ) or less, Under Voltage Lock Out starts to stop output signal and pulls down
output pins by 10 kΩ (Typ).
Detection
Release
VDD : 3.43 V (Typ) / 3.80 V (Max) or less
VDD : 3.58 V (Typ) / 3.95 V (Max) or more
(released automatically)
V
VDD
3.58 V (Typ)
3.43 V (Typ)
t
V
SDB
t
V
OUTP
VDD/2
Signal Output is stopped
t
V
OUTN
VDD/2
Signal Output is stopped
t
V
BTL
(OUTP-OUTN)
Signal Output is stopped
t
Figure 28. Under Voltage Lock Out
Caution:
In case that the voltage of VDD falls to 3.80 V (Max) or less by fluctuation of the power supply voltage, note that Under Voltage
Lock Out may start.
Under the condition that RL = 6 Ω, depending on output signal level, back electromotive force may occur because of the fluctuation
of load current when Under Voltage Lock Out starts and parasitic inductance inside the IC.
Similarly, IR voltage drop may occur because of load current and parasitic resistance of the VDD pin.
These back electromotive force or IR voltage drop may cause intermittent action between “Detection” and “Release”.
This action may be heard as noise under the condition the voltage of the VDD pin is near the threshold voltage of detection.
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I/O Equivalence Circuits
Pin
No.
Pin
Name
Pin
Voltage
Equivalent Circuit
Pin Description
VDD
1
SDB
-
SDB
Shutdown
High : Active
Low : Shutdown
GND
VDD
2
BIAS
2.5 V
BIAS
Bias
GND
VDD
3
4
INP
INN
2.5 V
INP
INN
Positive Differential Input
Negative Differential Input
GND
VDD
5
8
OUTP
OUTN
2.5 V
OUTP
OUTN
Positive Output
Negative Output
GND
6
VDD
5V
7
GND
0V
VDD
GND
Power Supply
GND
Pin voltage is the value when VDD is 5.0 V and the operating mode is active (The SDB pin is High).
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
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Operational Notes – continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Figure 29. Example of Monolithic IC Structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
13. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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Ordering Information
B
D
7
8
3
Part Number
x
x
Voltage
Gain
06: 6 dB
10: 10 dB
26: 26 dB
E
F
J
-
Package
EFJ:
HTSOP-J8,
Production Line A
UEFJ:
HTSOP-J8,
Production Line B
ME 2
Product Rank
M: for Automotive
Packaging and forming specification
E2: Embossed tape and reel
Lineup
Part Number
BD78306EFJ-M
BD78306UEFJ-M
BD78310EFJ-M
BD78310UEFJ-M
BD78326EFJ-M
BD78326UEFJ-M
Voltage Gain
6 dB
10 dB
26 dB
Part Number Marking
78306
78306U
78310
78310U
78326
78326U
Production Line(Note 1)
A
B
A
B
A
B
(Note 1) For the purpose of improving production efficiency, Production Line A and B have a multi-line configuration.
Electric characteristics noted in Datasheet does not differ between Production Line A and B.
Production Line B is recommended for new product.
Marking Diagram
HTSOP-J8(TOP VIEW)
Part Number Marking
LOT Number
Pin 1 Mark
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Physical Dimension and Packing Information
Package Name
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Revision History
Date
Revision
19.Jul.2019
001
28.Mar.2023
002
Changes
New Release
page 1 Changed the notation from typical output to the maximum output.
‘1.2 W’ → ‘2.8 W High Power’
Addition of part numbers corresponding to production line B
page 2 Addition of part numbers corresponding to production line B in the block diagram.
Deletion of part numbers under development.
page 4 Addition of part numbers corresponding to production line B
in Electrical Characteristics 1.
Deletion of part numbers under development in Electrical Characteristics 1.
page 6 Deletion of part numbers under development from characteristics data
page 23 Addition of part numbers corresponding to production line B
in Ordering Part Number Information.
Deletion of part numbers under development.
Add part numbers corresponding to production line B to the lineup.
Delete part numbers under development.
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001