User's Guide
Isolated DC/DC Converters ICs
Built-in Automotive Switching MOSFET
Isolated Flyback Converter ICs
BD7F105EFJ-C Evaluation Board
BD7F105EFJ-EVK-001
Overview
This evaluation board outputs an isolated 16.5 V voltage from an input of 8 V to 32 V, and can output a maximum output current
of 0.25 A.
BD7F105EFJ-C is an isolated flyback converter that does not require a photocoupler.
Feedback circuit by the transformer’s tertiary winding or photocouplers becomes unnecessary, contributing to reduction of set
parts.
It also has a number of built-in protection functions that enable the design of isolated power supply applications for high reliability.
Figure 1. BD7F105EFJ-EVK-001
Performance Specifications
This is a typical value and does not guarantee the characteristics.
Unless otherwise specified, VIN = 12 V, IOUT = 0.2 A, Ta = 25 °C
Parameter
Symbol
Min
Typ
Max
Units
VIN
8
12
32
V
Output voltage
VOUT
14.8
16.5
18.2
V
Output current
IOUT
0
0.25
A
Maximum output power
POUT
-
-
4
W
PINSTBY
-
40
100
mW
η
65
80
-
%
Input voltage range
Standby power
Power Supply Efficiency
© 2022 ROHM Co., Ltd.
1/22
Conditions
IOUT = 0 A VIN = 12 V
POUT = 2 W
No. 65UG016E Rev.001
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BD7F105EFJ-EVK-001
User's Guide
Operating Procedure
1.
Necessary equipment
(1) DC power supply with an output voltage of 32 V or more and an output power of 10 W / 5 A or more
(2) Load device of 5 W or more
(3) DC voltmeter
2.
Connecting the Equipment
(1) Preset the DC power supply to 8 V to 32 V and turn off the power output.
For power supplies with slow response, connect a large capacitor to the output of the power supply.
(2) Set the load to less than or equal to the rated current of each output and disable the load.
(3) Connect the positive terminal of the power supply to the VIN terminal and the negative terminal to the GND
terminal with a pair of wires.
(4) Connect the positive terminal of the load to VOUT1 terminal and the negative terminal to GND1 terminal with a
pair of wires.
(5) When connecting a wattmeter, connect as shown below. (Refer to your power meter User's Manual for more
information)
(6) Connect the positive terminal of the DC voltmeter to VOUT1 terminal and the negative terminal to GND1
terminal for measuring the output voltage.
(7) Turn on the output of the DC power supply.
(8) Check that the DC voltmeter display is at the set voltage (16.5 V).
(9) Activates the load.
Figure 2. Connection Diagram
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User's Guide
Application circuit
The evaluation board operates with an average frequency 363 kHz.
Monitoring the flyback voltage due to the voltage at the output (16.5 V) provides primary-side feedback control that eliminates
the need for photocouplers and auxiliary windings.
Operation starts when the VIN pin voltage exceeds UVLO detect voltage of 3.4 V (Typ) and SDXEN pin Enable pin voltage of
2.0 V (Typ).
The circuit diagram of the demonstration board is shown in the figure below, and the parts list is shown on page 9.
Figure 3. Circuit diagram
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User's Guide
Outline of BD7F105EFJ-C
Features
◼
◼
Critical Characteristics
AEC-Q100 (Grade-1)
◼
No Need for Optocoupler and Third Winding of
Input voltage range :
VIN terminal
Transformer
◼
SW pin
Output voltage is set by two external resistors and
transformer winding ratio.
◼
Uses
proprietary
adaptive
ON-time
control
technology
◼
Highly efficient light load mode (PFM operation)
◼
Shutdown and Enable control
◼
Burst voltage design possible
◼
60 Built-in V-switching MOSFET
◼
Spread frequency spectrum
◼
Soft start function
◼
Load current compensation function
◼
Various protection functions
3.4 V to 42.0 V
to 60 V
◼
Switching frequency :
363 kHz (Typ)
◼
Reference voltage accuracy:
◼
Shutdown current
◼
Operating temperature range
±2.8 % (Typ)
0 μA (Typ)
-40 °C to +125 °C
Package W (Typ) x D (Typ) x H (Max)
HTSOP-J8
4.9 mm x 6.0 mm x 1.0 mm
Undervoltage protection (UVLO)
Applications
Overcurrent protection (OCP)
Insulated power supply for automotive use (E-Comp, Inverter
Overheat protection (TSD)
etc)
REF pin open protection (REFOPEN)
Insulated power supply for industrial equipment
Short-circuit protection (SCP)
Battery short-circuit protection (BSP)
Pin Layout
(TOP VIEW)
GND 1
8 VIN
SDX/EN 2
7 SW
L_COMP 3
REF 4
5 FB
Figure 4. Pin layout drawing
PIN ASSIGNMENT
© 2022 ROHM Co., Ltd.
6 N.C.
EXP-PAD
No.
Pin name
Function
1
GND
GND terminal
2
SDX/EN
Shutdown/Enable control pin
3
L_COMP
Load current compensation value setting pin
4
REF
Output voltage setting pin
5
FB
Output voltage setting pin
6
N.C.
No Connect
7
SW
Switching output pin
8
VIN
Power input terminal
-
EXP-PAD
Rear heat dissipation pin
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User's Guide
Measurement data
1.
Load regulation
Figure 5. Output Voltage vs Output Current
2.
Figure 6 Efficiency vs Output Current
Line regulation
Figure 8. Efficiency vs Input Voltage
Figure 7. Output Voltage vs Input Voltage
© 2022 ROHM Co., Ltd.
Figure 8. Frequency vs Input Voltage
5/22
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User's Guide
Measured data-continued
3.
4.
Switching waveform
VSW (20V/div)
VSW (20V/div)
VOUT (10V/div)
VOUT (10V/div)
Figure 9. MOSFET Waveform
Figure 10. MOSFET Waveform
Vin = 12 V, IO = 0.1 A
Vin = 12 V, IO = 0.2 A
Load response waveform
VSW (20V/div)
VOUT (1Vac/div)
IOUT (200mA/div)
Figure 11. Load response
Vin = 12 V, IO = 50 mA to 200 mA
5.
Output voltage ripple waveform
*This ripple is due to spread spectrum.
VOUT (50mVac/div)
VOUT (50mVac/div)
IOUT (200mA/div)
IOUT (200mA/div)
Figure 12. Output Voltage ripple
Figure 13. Output Voltage ripple
VIN = 12 V / IO = 250 mA
VIN = 12 V / IO = 250 mA
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Measured data-continued
6.
Startup/stop waveform
VIN (5V/div)
VIN (5V/div)
VSW (20V/div)
VSW (20V/div)
VOUT (10V/div)
VOUT (10V/div)
Figure 14. Start Up Waveform
7.
Figure 15. Shut Down Waveform
Output short waveform
10ms/div
VIN (10V/div)
500us/div
VIN (10V/div)
VSW (20V/div)
VSW (20V/div)
V
(20V/div)
ISW
(2A/div)
SW
ISW (2A/div)
VOUT (20V/div)
VOUT (20V/div)
Figure 16. VOUT Short Waveform
Figure 17. VOUT Short Waveform (ZOOM)
Vin = 8 V
Vin = 8 V
500us/div
10ms/div
(10V/div)
VVININ (10V/div)
VIN (10V/div)
VSW (20V/div)
VSW (20V/div)
VSW (20V/div)
ISW (2A/div)
ISW (2A/div)
ISW (2A/div)
VOUT (20V/div)
VOUT
VOUT(20V/div)
(20V/div)
Figure 18. VOUT Short Waveform
Figure 19. VOUT Short Waveform (ZOOM)
Vin = 15 V
Vin = 15 V
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User's Guide
Measured data-continued
8.
Component surface temperature
VIN (10V/div)
30.3℃
VSW (20V/div)
ISW (2A/div)
VOUT (20V/div)
Figure 20. Surface Temperature
Figure 21. Surface Temperature Reference
Vin = 8 V, IO = 250 mA (Ta = 23.3℃)
Table 1. Tj Calculation
VSW (10V/div)
IOUT (500mA/div)
①
②
③
Figure 22. Peak Current Waveform
Vin = 8 V, IO = 250 mA
Tj calculation of IC is calculated using the above table.
Loss of IC is divided into 1: Turn on loss, 2: conduction loss, 3: Turn off loss, and 4: ICC.
Calculate the loss according to Table1 from the actual current waveform and power supply spec.
In this case, Tj is estimated to be 37.73 °C because Tc = 30.3 °C and ΔTj = 7.07 °C.
Tj should be designed to be 150 °C or less.
In this case, when Ta = 125 °C, Tj = 137.4 °C, and Tj = 150 °C is not reached, so it can be judged that there is no problem in the
whole temperature range.
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User's Guide
Circuit diagrams
(Condition) VIN = 8 V to 32 V, VOUT = 16.5 V, 0.2 A
Figure 23. BD7F105EFJ-EVK-001 Schematic
Bill of Materials
*Parts are subject to change without notice.
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User's Guide
Transformer specifications
Manufacturer : Sumida Electric Co., Ltd.
https://job.mynavi.jp/conts/n/sp/23/54430_23sumida/
Product name:
◼
External Dimensions
◼
Recommended Land
■
Terminal connection diagram
© 2022 ROHM Co., Ltd.
CEFD2010_00399_T379
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No. 65UG016E Rev.001
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User's Guide
Transformer Specifications-continued
■
Winding wire and linear/linear type
■
ELECTRICAL CHARACTERISTICS
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BD7F105EFJ-EVK-001
User's Guide
Application Design Example
1.
Transformer design
1.1
Determining the volume ratio NP/NS
The winding ratio is a parameter that sets the output voltage, maximum output power, duty, and SW terminal
voltage.
The duty of the flyback converter is calculated by the following equation:
𝑁𝑃
(𝑉
)
𝑁𝑆 × 𝑂𝑈𝑇 + 𝑉𝐹
𝐷𝑢𝑡𝑦 =
𝑁
𝑉𝐼𝑁 + 𝑁𝑃 × (𝑉𝑂𝑈𝑇 + 𝑉𝐹 )
𝑆
𝑁𝑃
: Primary transformer turns
𝑁𝑆
: Secondary transformer turns
[%]
𝑉𝑂𝑈𝑇 : Output voltage
𝑉𝐹
: Forward voltage of the output diode on the secondary side
𝑉𝐼𝑁
: VIN pin voltage
From the above formula, the winding ratio is calculated as follows.
𝑁𝑃
𝐷𝑇𝑌𝑃
𝑉𝐼𝑁
=
×
𝑁𝑆 1 − 𝐷𝑇𝑌𝑃 𝑉𝑂𝑈𝑇 + 𝑉𝐹
𝐷𝑡𝑦𝑝
: Duty at VIN Voltage (Typ)
It is recommended to set DTYP from 30% to 50% at the VIN voltage in the middle of the operating range.
Initially, set DTYP = 40 %.
In this case, the following formula is used. (Design VINtyp at battery voltage 12 V)
𝑁𝑃
0.4
12𝑉
=
×
= 0.47
𝑁𝑆 1 − 0.4 16.5𝑉 + 0.6𝑉
Therefore, we will proceed with designing with a Np/Ns of 0.5.
The turn ratio is also limited by the maximum duty DMAX determined from the minimum incoming voltage.
Make sure that DMAX given by the equation below does not exceed 70%. If this is the case, set DTYP so that it
becomes smaller. If it exceeds 70 %, the OFF time will be shortened. Therefore, the output voltage may deviate
due to deviations in the flyback voltage detection.
𝑉𝐼𝑁(𝑀𝑖𝑛)
𝑁𝑃
𝐷𝑀𝐴𝑋
=
×
𝑁𝑆 1 − 𝐷𝑀𝐴𝑋 𝑉𝑂𝑈𝑇(𝑀𝑎𝑥) + 𝑉𝐹(𝑀𝑎𝑥)
𝐷𝑀𝐴𝑋
: Maximum duty of VIN voltage (Min) condition
𝑉𝑂𝑈𝑇(𝑀𝑎𝑥)
: Maximum output voltage
𝑉𝐹(𝑀𝑎𝑥)
: Forward voltage of secondary diode (Max.)
𝐷𝑀𝐴𝑋 =
0.5
8𝑉
+ 0.5
16.5𝑉 + 0.6𝑉
= 0.52 < 0.70
For this reason, there is no problem in this design.
DMAX of this designer is 0.52 and 0.70 or less, so it is judged without any problem.
© 2022 ROHM Co., Ltd.
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No. 65UG016E Rev.001
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BD7F105EFJ-EVK-001
User's Guide
Determining the Volume Ratio NP/NS-continued
The flyback voltage VOR is calculated by the following equation.
𝑁𝑃
[V]
𝑁𝑆
= (16.5𝑉 + 0.6𝑉) × 0.5 = 8.6 𝑉
𝑉𝑂𝑅 = (𝑉𝑂𝑈𝑇 + 𝑉𝐹 ) ×
𝑉𝑂𝑅
Set so that the SW terminal voltage calculated below does not exceed the withstand voltage.
𝑉𝑆𝑊 = 𝑉𝐼𝑁(𝑀𝑎𝑥) + 𝑉𝑂𝑅 + 𝑉𝑆𝑈𝑅𝐺𝐸
For example, if the derating against the SW pin withstand voltage is 90 %, the SW terminal voltage,
60 𝑉 × (100 % − 10 %) = 54 𝑉
It should be designed to be within 54 V.
This is designed with VIN(Max) = 32 V, VOR = 8.6 V.
VSURGE at this time is as follows.
54 𝑉 − (32 𝑉 + 8.6 𝑉) = 13.4 𝑉
Therefore, the surge voltage must be less than 13.4 V.
VSURGE is caused by the leaking magnetic fluxes of the transformers.
If VSURGE is large, the transformer structure needs to be reviewed and the snubber circuitry needs to be adjusted.
Voltage
VSW
VSURGE
VOR
VIN
Figure 24. SW waveform
1.2
Time
Calculating LP, LS
Set LP, LS to enable continuous current mode operation.
Determine by using the current continuous-mode depth k to obtain LP, LS.
k is expressed from ISPK, ISB of Figure 22 by the following equation.
𝑘 = (𝐼𝑆𝑃𝐾 − 𝐼𝑆𝐵 )/𝐼𝑆𝑃𝐾
𝐼𝑠𝑝𝑘 : Secondary transformer peak current
𝐼𝑠𝑏 : Secondary transformer bottom current
𝛫 : Constant representing the depth of the current continuous mode (When designing, use k = 0.25 as a guide.)
Ipeak
Ippk
Primary current
Secondary current
Ipb
Ispk
Isb
Figure 25. SW waveform
time
𝐼𝑝𝑝𝑘 : Primary transformer peak current
𝐼𝑝𝑏 : Primary transformer bottom current
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User's Guide
Transformer design-continued
The maximum peak current on the primary side of the IC is determined by I LIMIT of electrical characteristics.
ILIMIT minimum-value determines the secondary min-peak current ISPK1(Min).
𝐼𝑆𝑃𝐾1(𝑀𝑖𝑛) = 𝐼𝐿𝐼𝑀𝐼𝑇(𝑀𝑖𝑛) ×
𝑁𝑃
𝑁𝑆
[A]
The secondary peak current ISPK2(Max) is calculated from the maximum output current I OUT(Max) by the following
equation.
𝐼𝑆𝑃𝐾2(𝑀𝑎𝑥) =
𝜂
2 × 𝐼𝑂𝑈𝑇(𝑀𝑎𝑥)
1
×
(1 − 𝐷𝑀𝐴𝑋 ) × (2 − 𝑘) 𝜂
[A]
: Use a power supply efficiency of 70 % as a guideline.
ISPK2(Max) < ISPK1(Min) must be met in order for IOUT(Max) to be printed.
If the conditions cannot be satisfied, change k to redesign. With higher k values in discontinuous mode
The operating load area becomes wider. When k = 1, discontinuous mode operation is performed in all areas.
This IC is continuous
A low k-value is recommended to achieve high-speed response and low EMI characteristics by mode operation.
Even if the k value is high, there is no problem with power supply operation.
The secondary-side index LS(Max) is calculated by the following equation.
𝐿𝑆(𝑀𝑎𝑥)
(2 − 𝑘) × (𝑉𝑂𝑈𝑇 + 𝑉𝐹 ) × (1 − 𝐷𝑀𝐴𝑋 )2
=
2 × 𝐼𝑂𝑈𝑇(𝑀𝑎𝑥) × 𝑓𝑠𝑤(𝑀𝑎𝑥) × 𝑘
𝐿𝑆(𝑀𝑎𝑥) =
[µH]
(2 − 0.2) × (16.5𝑉 + 0.6𝑉) × (1 − 0.52)2
= 165𝜇𝐻
2 × 0.25 × 430𝑘𝐻𝑧 × 0.2
𝑓𝑆𝑊(𝑀𝑎𝑥)
: Switching frequency This switching frequency should be calculated at 430 kHz.
𝐼𝑂𝑈𝑇(𝑀𝑎𝑥)
: Max. secondary output current
Ls is 160uH for this design
At this time, the primary inductance Lp is obtained by the following equation.
𝐿𝑃 = 𝐿𝑆 × (
𝑁𝑃 2
)
𝑁𝑆
[µH]
𝐿𝑃 = 160𝜇𝐻 × (0.5)2 = 40𝜇𝐻
From the above, we will proceed with the design as Lp:40μH, Ls:160μH in this design.
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BD7F105EFJ-EVK-001
User's Guide
Application Design Examples-continued
2.
Output voltage
When the built-in switching MOSFET is turned OFF, the SW pin voltage VSW becomes higher than the VIN pin voltage.
Since the difference between the SW pin voltage and the VIN pin voltage is equal to the primary flyback voltage, the
secondary output voltage is calculated from this voltage. The SW pin voltage V SW at turn-off is calculated by the
following equation.
𝑉𝑆𝑊 = 𝑉𝐼𝑁 +
𝑁𝑃
× (𝑉𝑂𝑈𝑇 + 𝑉𝐹 )
𝑁𝑆
[V]
𝑉𝑆𝑊 : SW pin voltage
𝑉𝐼𝑁
: VIN pin voltage
𝑁𝑃
: No. of primary transformer turns
𝑁𝑆
: Secondary transformer turns
𝑉𝑂𝑈𝑇 : Output voltage
𝑉𝐹
: Forward voltage of the output diode on the secondary side
VF
VOUT+
VIN
VIN
NP
NS
SDX/EN
VOUT-
SW
FB
L_COMP
RFB
REF
GND
RREF
Figure 26. Application Block Diagram
The primary flyback voltage is converted to the FB-pin inrush current IFB by the external resistor RFB between FB-SW
terminals. Since the FB pin voltage becomes almost equal to the VIN pin voltage by the IC's internal circuit, the FB
pin inrush current IRFB is calculated by the following equation.
𝐼𝐹𝐵
𝑁𝑃
𝑁𝑃
𝑉𝑆𝑊 − 𝑉𝐹𝐵 𝑉𝐼𝑁 + 𝑁𝑆 × (𝑉𝑂𝑈𝑇 + 𝑉𝐹 ) − 𝑉𝐹𝐵 𝑁𝑆 × (𝑉𝑂𝑈𝑇 + 𝑉𝐹 )
=
=
=
𝑅𝐹𝐵
𝑅𝐹𝐵
𝑅𝐹𝐵
𝐼𝐹𝐵
: FB pin inrush current
𝑉𝐹𝐵
: FB terminal voltage
[A]
𝑅𝐹𝐵 : External resistor between FB and SW pins
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1.
User's Guide
Output Voltage- continued
In addition, since the FB pin inrush current IRFB flows to the external resistor RREF between the REF terminal and GND
terminal, the REF terminal voltage is calculated by the following equation.
𝑉𝑅𝐸𝐹 =
𝑅𝑅𝐸𝐹 𝑁𝑃
×
× (𝑉𝑂𝑈𝑇 + 𝑉𝐹 )
𝑅𝐹𝐵 𝑁𝑆
[V]
𝑉𝑅𝐸𝐹 : REF pin voltage
𝑅𝑅𝐸𝐹 : External resistor between REF pin and GND pin
Because the current that flows to the REF pin becomes I REF when the REF pin voltage is VINTREF for RREF,
0.54𝑉
𝑅𝑅𝐸𝐹 = 200µ𝐴 = 2 .7 𝑘𝛺
The resistor must be set.
The REF pin voltage is input to the comparator with the reference voltage inside the IC. The REF pin voltage is equal
to the reference voltage by the internal circuit of the IC. Therefore, the output voltage and the REF pin voltage are
calculated by the following equations.
𝑉𝑂𝑈𝑇 =
𝑅𝐹𝐵 𝑁𝑆
×
× 𝑉𝐼𝑁𝑇𝑅𝐸𝐹 − 𝑉𝐹
𝑅𝑅𝐸𝐹 𝑁𝑃
[V]
As can be seen from this equation, the output voltage V OUT can be set by the transformer turn ratio (NP/NS) on the
primary and secondary sides and the resistance ratio between R FB and RREF.
From the above equation, the external resistor RFB between the FB pin and SW terminal can be calculated by the
following equation.
𝑅𝐹𝐵 =
𝑅𝑅𝐸𝐹
𝑁𝑃
×
× (𝑉𝑂𝑈𝑇 + 𝑉𝐹 )
𝑉𝐼𝑁𝑇𝑅𝐸𝐹 𝑁𝑆
[Ω]
In this designer, RFB is determined as follows.
𝑅𝐹𝐵 =
2.7𝑘𝛺
× 0.5 × (16.5𝑉 + 0.6𝑉) = 42.75 𝑘𝛺
0.54𝑉
RFB is set to 43kohm.
However, the ESR on the secondary side of the transformer is a factor that lowers the output voltage as in V F of the
above equation.
Also, when the transformer is not coupled, the number of turns of N P/NS is shifted, which causes the output voltage
to decrease.
Therefore, finally adjust the output voltage by checking the actual device.
© 2022 ROHM Co., Ltd.
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No. 65UG016E Rev.001
2022.7
BD7F105EFJ-EVK-001
User's Guide
Application Design Examples-continued
3.
Output Capacitor
Place the output capacitor as close to the secondary diode as possible.
The output capacitance value COUT is set from the output ripple voltage ΔVO and the start-up time.
The output ripple voltage generated by one switching is calculated as follows.
𝛥𝑉𝑂 =
𝐼𝑂𝑈𝑇(𝑀𝑎𝑥) × 𝐷𝑀𝐴𝑋
[V]
𝑓𝑆𝑊(𝑀𝑎𝑥) × 𝐶𝑂𝑈𝑇
On the other hand, when output capacitor is large, start-up time is long.
When SCP detection mask time (tMASKSCP) in start-up is passed, if REF voltage is lower than VSCP, power supply cannot
output. Therefore, COUT must be satisfied below condition.
𝐶𝑂𝑈𝑇
𝑁𝑃
1 𝑡𝑀𝐴𝑆𝐾𝑆𝐶𝑃(𝑀𝑖𝑛) × {(𝐼𝐿𝐼𝑀𝐼𝑇(𝑀𝑖𝑛) × 𝑁𝑆 ) × (1 − 𝐷𝑢𝑡𝑦) − 𝐼𝑂𝑈𝑇(𝑀𝑎𝑥) }
≤ ×
2
𝑉𝑆𝐶𝑃(𝑀𝑎𝑥)
𝑉𝑂𝑈𝑇 × (𝑉
)
[µF]
𝐼𝑁𝑇𝑅𝐸𝐹(𝑀𝑖𝑛)
Where = 0.762.
𝑉𝑆𝐶𝑃(𝑀𝑎𝑥)
𝑉𝐼𝑁𝑇𝑅𝐸𝐹(𝑀𝑖𝑛)
A large capacitor capacitance value is required to hold the output voltage during load response or power supply
voltage response.
A capacitance value of 20 μF or more is recommended as a guideline for the output voltage capacitance.
Ceramic capacitors are affected by temperature characteristics, capacitance variation, DC bias characteristics, etc.
The capacitance value may decrease. Pay attention to these points when selecting parts.
4. Input Capacitor
Use a ceramic capacitor for the input capacitor and place it as close to the IC as possible.
Capacitance of the capacitor should be 10 μF or more.
© 2022 ROHM Co., Ltd.
17/22
No. 65UG016E Rev.001
2022.7
BD7F105EFJ-EVK-001
User's Guide
Application Design Examples-continued
5.
Secondary output diode
A Schottky barrier diode or a fast recovery diode with low V F is recommended because the forward voltage VF of the
secondary output diode causes an error in the output voltage. When selecting a secondary output diode, the peak of
the secondary reverse voltage must not exceed the rating of the diode. The secondary RMS current ISRMS must also
be set so that it does not exceed the rating.
Generally, 30 % or more of the reverse-direction breakdown voltage VR is recommended.
𝑉𝑅 = (𝑉𝐼𝑁(𝑀𝑎𝑥) ×
𝑉𝑅
𝑁𝑆
+ 𝑉𝑂𝑈𝑇 ) × 1.3 + 𝑉𝑆𝑈𝑅𝐺𝐸
𝑁𝑃
[V]
: Reverse voltage of the secondary output diode
𝑉𝐼𝑁(𝑀𝑎𝑥) : VIN pin maximum voltage
𝑁𝑃
: No. of primary transformer turns
𝑁𝑆
: Secondary transformer turns
𝑉𝑂𝑈𝑇 : Output voltage
𝑉𝑆𝑈𝑅𝐺𝐸 : Transformer surge voltage generated in the diode
It is recommended that the rated current of the secondary output diode be at least twice that of I SRMS.
6.
Output Resistance and Zener Diode (Minimum Load Current)
The output voltage rises when no load is applied or when light load is applied. The reason for this is that the MAXIMUM
is in the OFF-time tOFF_MAX when the IC is under light load.
This is because switching is always performed at the minimum frequency determined by the minimum ON-time tON_MIN.
For the power PO_MIN determined by the switching frequency of this lowest frequency, when the secondary load is lighter
than this, the output voltage is
It moves up. PO_MIN is calculated by the following equation:
𝑃𝑂_𝑀𝐼𝑁 =
𝑉𝐼𝑁(𝑀𝑎𝑥) 2
2×𝐿𝑃
𝐼𝑂𝑈𝑇_𝑀𝐼𝑁 =
× 𝑡𝑂𝑁_𝑀𝐼𝑁(𝑀𝑎𝑥) 2 × 𝑡
1
𝑂𝑁_𝑀𝐼𝑁(𝑀𝑎𝑥) +𝑡𝑂𝐹𝐹_𝑀𝐴𝑋(𝑀𝑖𝑛)
𝑃𝑂_𝑀𝐼𝑁
𝑉𝑂𝑈𝑇
[W]
Because it is an expression, it can also be obtained from I OUT_MIN .
If the rise in the secondary output voltage becomes a problem, connect a secondary output zener diode to suppress
the rise in the voltage. It is also necessary to suppress the rise in the output voltage by adding a resistor to the
secondary output to provide a constant loss. The output resistor R OUT to be connected to the secondary side should
[W]
be as follows. The resistor-loss PLOSS is calculated as follows.
𝑃𝑙𝑜𝑠𝑠 =
𝑉𝑂𝑈𝑇 2
𝑅𝑂𝑈𝑇
𝑉
2
𝑅𝑜𝑢𝑡 ≦ 𝑃 𝑂𝑈𝑇 = 𝑉
𝑂_𝑀𝐼𝑁
𝐼𝑁(𝑀𝑎𝑥)
2×𝐿𝑃
𝑉𝑂𝑈𝑇 2
2
×𝑡𝑂𝑁_𝑀𝐼𝑁(𝑀𝑎𝑥) 2 ×
1
𝑡𝑂𝑁_𝑀𝐼𝑁(𝑀𝑎𝑥) +𝑡𝑂𝐹𝐹_𝑀𝐴𝑋(𝑀𝑖𝑛)
In practice, even if ROUT loads calculated by the above equation are used, the output voltage rises transiently during
secondary discharging. Therefore, it should be set lower enough than this R OUT. Adjust this resistance value in the
actual evaluation. When selecting a resistor, pay attention to the rated power of the resistor.
© 2022 ROHM Co., Ltd.
18/22
No. 65UG016E Rev.001
2022.7
BD7F105EFJ-EVK-001
User's Guide
Application Design Examples-continued
7.
Snubber circuit
Excessive on the SW pin at turn-off when the degree of coupling of the transformer is low or the large current line of
the board is long, etc.
Voltage may be applied.
To suppress this, use the snubber circuitry indicated by Figure 27.
This snubber circuit clamps the voltage when the flyback voltage + surge voltage exceeds this snubber voltage.
VF
Np
Ns
VOUT
Figure 27. Snubber Circuit
The clamping voltage is determined by the following equation.
[V]
𝑉𝐶𝐿𝐴𝑀𝑃 = 𝑉𝐹2 + 𝑉𝑧
𝑉𝐶𝐿𝐴𝑀𝑃
: Clamp setting voltage of snubber
𝑉𝐹2
: Forward voltage of the Schottky diode
𝑉𝑧
: Zener voltage of the zener diode
At turn-off if the clamp setting voltage is lower than the flyback voltage
𝑁𝑃
𝑁𝑆
× (𝑉𝑂𝑈𝑇 + 𝑉𝐹 )
A current flows through the zener. Therefore, be sure to set a voltage higher than the flyback voltage.
In addition, the snubber circuit may not be clamped at the set clamping voltage because of its operational
responsiveness.
Therefore, be sure to check the clamp voltage in actual operation.
8.
SDX/EN terminal resistor
8.1
Setting Enable Voltage
After releasing VIN UVLO, Enable voltage VIN_ENABLE can be set by the following equation.
𝑉𝐼𝑁_𝐸𝑁𝐴𝐵𝐿𝐸 = 𝑉𝐸𝑁1 ×
𝑅1 + (𝑅2 //𝑅𝑆𝐷𝑋/𝐸𝑁 )
𝑅2 //𝑅𝑆𝐷𝑋/𝐸𝑁
𝑉𝐼𝑁_𝐸𝑁𝐴𝐵𝐿𝐸
: Target operations start VIN voltage
𝑉𝐸𝑁1
: Enable volt1
[V]
𝑅2 //𝑅𝑆𝐷𝑋/𝐸𝑁 : Partial pressure resistance between R2 and RSDX/EN inside the ICs
© 2022 ROHM Co., Ltd.
19/22
No. 65UG016E Rev.001
2022.7
BD7F105EFJ-EVK-001
User's Guide
Application Design Examples-continued
8.2
Setting Disable Voltage
Disable voltage VIN_DISABLE when the VIN pin voltage falls can be set by the following equation.
𝑉𝐼𝑁_𝐷𝐼𝑆𝐴𝐵𝐿𝐸 = 𝑉𝐸𝑁2 ×
9
𝑅1 + (𝑅2 //𝑅𝑆𝐷𝑋/𝐸𝑁 )
𝑅2 //𝑅𝑆𝐷𝑋/𝐸𝑁
𝑉𝐼𝑁_𝐷𝐼𝑆𝐴𝐵𝐿𝐸
: Intended operation stop VIN voltage
𝑉𝐸𝑁2
: Enable volt2
[V]
Output voltage compensation function using L_COMP pin resistor
The IC can compensate for the voltage drop in the output voltage V OUT in response to the increase in IP of the primary
transformer peak current.
VOUT changes can be caused by VF variations in the secondary diodes or by leaking magnetic fluxes in the transformer.
An example of the output voltage compensation function is shown in Figure 26.
VOUT
With Load compensation
No load compensation
IOUT
Figure 28. L_COMP voltage compensation example
This function compensates the output voltage by adding a IREFCOMP current to the REF current that determines the
output voltage.
𝑉𝑂𝑈𝑇 = 𝑅𝐹𝐵 ×
𝑉𝐼𝑁𝑇𝑅𝐸𝐹
𝑅𝑅𝐸𝐹
𝑁𝑆
𝑁𝑃
𝑉𝐼𝑁𝑇𝑅𝐸𝐹
×(
𝑅𝑅𝐸𝐹
+ 𝐼𝑅𝐸𝐹𝐶𝑂𝑀𝑃 ) − 𝑉𝐹
[V]
= 200 𝜇𝐴 (𝑇𝑦𝑝)Fixed value. IREFCOMP is incremented relative to the primary current.
As a result, the output voltage is compensated according to the load current on the secondary side.
IREFCOMP is determined by the following equation.
𝐼𝑅𝐸𝐹𝐶𝑂𝑀𝑃 = 𝑅𝐿_𝐶𝑂𝑀𝑃 × 𝐾𝐿_𝐶𝑂𝑀𝑃 × 𝐼𝑆𝑊(𝐴𝑣𝑒)
𝑅𝐿_𝐶𝑂𝑀𝑃
:
Resistor connected to the L_COMP pin
𝐼𝑆𝑊(𝐴𝑣𝑒)
:
Average current flowing through the SW pin
K L_COMP :
© 2022 ROHM Co., Ltd.
[µA]
Fixed value inside the IC
20/22
No. 65UG016E Rev.001
2022.7
BD7F105EFJ-EVK-001
9
User's Guide
Output Voltage Compensation by L_COMP Pin Resistor-continued
The mean current ISW(Ave) of the SW pin can be converted into the following equation.
𝐼𝑆𝑊(𝐴𝑣𝑒) = 𝐼𝑆(𝐴𝑣𝑒) ×
𝜂:
𝑁𝑆
1 𝑁𝑆
= 𝐼𝑂𝑈𝑇 × ×
𝑁𝑃
𝜂 𝑁𝑃
[A]
Efficiency (Designed at about 70% and adjust RL_COMP in the application assessment.)
As shown in this equation, ISW(Ave) is proportional to IOUT, so you can compensate for the above.
The compensation amount can be adjusted by the resistance value of the L_COMP pin.
Since ISW is a triangle-wave current, always use a capacitor of 0.1 μF or more at the L_COMP pin to smooth this.
Please connect.
The resistor of the L_COMP pin is calculated by the following equation.
𝑅𝐿_𝐶𝑂𝑀𝑃 =
𝐼𝑅𝐸𝐹𝐶𝑂𝑀𝑃
1
×
𝐼𝑆𝑊(𝐴𝑣𝑒) 𝐾𝐿_𝐶𝑂𝑀𝑃
[kΩ]
Be sure to check the output voltage characteristics in the application evaluation and adjust the L_COMP terminal
resistor as necessary.
When compensation is not performed, short the L_COMP pin to GND.
© 2022 ROHM Co., Ltd.
21/22
No. 65UG016E Rev.001
2022.7
BD7F105EFJ-EVK-001
User's Guide
Revision history
Date
Plate
14.Jul.2022
001
© 2022 ROHM Co., Ltd.
Content of change
New
22/22
No. 65UG016E Rev.001
2022.7
Notice
Notes
1) The information contained herein is subject to change without notice.
2) Before you use our Products, please contact our sales representative and verify the latest specifications :
3) Although ROHM is continuously working to improve product reliability and quality, semiconductors can break down and malfunction due to various factors.
Therefore, in order to prevent personal injury or fire arising from failure, please take safety
measures such as complying with the derating characteristics, implementing redundant and
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responsibility for any damages arising out of the use of our Poducts beyond the rating specified by
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4) Examples of application circuits, circuit constants and any other information contained herein are
provided only to illustrate the standard usage and operations of the Products. The peripheral
conditions must be taken into account when designing circuits for mass production.
5) The technical information specified herein is intended only to show the typical functions of and
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