Datasheet
General Purpose CMOS Logic IC
Automotive Single Buffer
BD7LS34G-C
General Description
Key Specifications
The BD7LS34G-C is a Single Buffer and qualified for
automotive applications. This is designed for 1.65 V to
5.5 V power supply voltage operation.
When it is power down, the Output Tolerant circuit
protects the output circuit from the back flow current
through the connected system.
◼
◼
◼
◼
◼
Supply Voltage Range:
1.65 V to 5.5 V
Low Current Consumption (ICC):
10 μA (Max)
Operating Temperature Range: -40 °C to +125 °C
Max Propagation Delay Time:
11.0 ns (@3.0 V)
Output Drive Capability:
±24 mA (@3.0 V)
Package
Features
W(Typ) x D (Typ) x H (Max)
2.9 mm x 2.8 mm x 1.25 mm
SSOP5
◼ AEC-Q100 Qualified(Note 1)
➢ 4000 V Human-body Model
➢ 1000 V Charged-device Model
◼ Low Power Consumption
◼ 5.5 V Tolerant Inputs
◼ Output Tolerant Supports Partial Power Down Mode
Operation
◼ Package SSOP5 is Similar to SOT-23-5(JEDEC)
(Note 1) Grade 1
SSOP5
Applications
◼
Automotive
Pin Descriptions
Pin Configuration and Logic Diagram
Truth Table
〇Product structure : Silicon integrated circuit
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BD7LS34G-C
Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Symbol
Rating
Unit
Supply Voltage Range
VCC
-0.5 to +6.5
V
Input Voltage Range
VIN
-0.5 to +6.5
V
Input Diode Current (VIN < 0)
IIK
-50
mA
Output Diode Current (VO < 0)
IOK
-50
mA
Output Current
IO
±50
mA
VCC-GND Current
Maximum Junction Temperature
Storage Temperature Range
ICC
±50
mA
Tjmax
+150
°C
Tstg
-55 to +150
°C
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open
circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in
case the IC is operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration
of the properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into
consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 1)
Parameter
Thermal Resistance (Typ)
Symbol
Unit
1s(Note 3)
2s2p(Note 4)
θJA
376.5
185.4
°C/W
ΨJT
40
30
°C/W
SSOP5
Junction to Ambient
Junction to Top Characterization Parameter
Layer Number of
Measurement Board
(Note 2)
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Single
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
4 Layers
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 1) Based on JESD51-2A (Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the
outside surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-7.
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
1.65
-
5.5
V
Operating
1.5
-
5.5
V
Data Retention Only
Supply Voltage
VCC
Input Voltage
VIN
0
-
5.5
V
-
Output Voltage
VO
0
-
VCC
V
-
-
-
20
-
-
10
-
-
5
-40
-
+125
Input Transition Rise or Fall
Rate
Operating Temperature
Δt/Δv
Topr
VCC = 1.65 V to 1.95 V
ns/V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
°C
-
(Note) The recommended operating conditions are the range where operation is guaranteed. If this ranges are exceeded, operation is not guaranteed
even within the absolute maximum ratings. Unused inputs must be tied to either VCC or GND.
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BD7LS34G-C
Electrical Characteristics
(Unless otherwise specified VCC = 1.65 V to 5.5 V and Ta = -40 °C to +125 °C)
Parameter
Symbol
Min
Typ
Input “H” Voltage
VIH
VCC × 0.7
Input “L” Voltage
VIL
-
Output “H” Voltage
Output “L” Voltage
Input Current
Power Off
Output Pin Current
Quiescent Supply
Current
Supply Current
Increase
Input Capacitance
VOH
VOL
Conditions
Max
Unit
-
-
V
1.65 V to 5.5 V
-
-
VCC × 0.3
V
1.65 V to 5.5 V
-
VCC - 0.1
-
-
1.65 V to 5.5 V
IOH = -100 μA
1.2
-
-
1.65 V
IOH = -4 mA
1.8
-
-
2.3 V
IOH = -8 mA
2.3
-
-
3.0 V
IOH = -16 mA
2.1
-
-
3.0 V
IOH = -24 mA
3.4
-
-
4.5 V
IOH = -32 mA
-
-
0.10
1.65 V to 5.5 V
IOL = 100 μA
-
-
0.45
1.65 V
IOL = 4 mA
-
-
0.40
2.3 V
IOL = 8 mA
-
-
0.60
3.0 V
IOL = 16 mA
-
-
0.90
3.0 V
IOL = 24 mA
4.5 V
IOL = 32 mA
V
V
VCC
-
-
1.00
IIN
-
-
±2
μA
0 V to 5.5 V
IOFF
-
-
10
μA
0V
ICC
-
-
10
μA
1.65 V to 5.5 V
ΔICC
-
-
600
μA
3.0 V to 5.5 V
CI
-
4
-
pF
3.3 V
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VIN = 5.5 V or GND
VIN or VO = 5.5 V
Input:
VCC - 0.6 V
VIN = VCC or GND
Ta = 25 °C
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BD7LS34G-C
Switching Characteristics
(Unless otherwise specified VCC = 1.65 V to 5.5 V and Ta = -40 °C to +125 °C)
Parameter
Propagation
Delay Time
Power
Dissipation
Capacitance
Symbol
tPLH
tPHL
FROM
(Input)
TO
(Output)
A
Y
Min
Typ
Max
1.3
-
13.0
0.6
-
12.0
0.5
-
11.0
0.4
-
10.0
Unit
Conditions
VCC
1.65 V to 1.95 V
ns
2.3 V to 2.7 V
-
3.0 V to 3.6 V
-
4.5 V to 5.5 V
-
-
-
-
34
-
pF
3.3 V
-
-
-
38
-
pF
5.0 V
CPD
f = 10 MHz,
Ta = 25 °C
f = 10 MHz,
Ta = 25 °C
Parameter Measurement Conditions
Measurement Circuit and Timing Chart
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Typical Performance Curves
Figure 1. Propagation Delay Time: tPLH vs Supply
Figure 2. Propagation Delay Time: tPLH vs Ambient
Voltage: VCC
Temperature: Ta
(Ta = 25 °C)
(VCC = 3.3 V)
Figure 3. Propagation Delay Time: tPHL vs Supply
Figure 4. Propagation Delay Time: tPHL vs Ambient
Voltage: VCC
Temperature: Ta
(Ta = 25 °C)
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(VCC = 3.3 V)
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Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity
when connecting the power supply, such as mounting an external diode between the power supply and the IC’s
power supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to
ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when
using electrolytic capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed
separately but connected to a single ground at the reference point of the application board to avoid fluctuations
in the small-signal ground caused by large currents. Also ensure that the ground traces of external components
do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce
line impedance.
5. Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the
electrical characteristics.
6. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current
may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than
one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of
ground wiring, and routing of connections.
7. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
8. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power
supply should always be turned off completely before connecting or removing it from the test setup during the
inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar
precautions during transport and storage.
9. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may
result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply
and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very
humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few.
10. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The
small charge acquired in this way is enough to produce a significant effect on the conduction through the
transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be
connected to the power supply or ground line.
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Operational Notes – continued
11. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep
them isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements,
creating a parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin A
N
P+
N
P
N
P+
N
N
Parasitic
Elements
P+
E
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
Parasitic
Elements
Pin B
B
GND
Parasitic
Elements
GND
GND
N Region
close-by
GND
diodes to operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P
substrate) should be avoided.
Example of Monolithic IC Structure
12. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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BD7LS34G-C
Ordering Information
B
D
7
L
S
3
4
G
C T L
-
Package
G: SSOP5
Product Rank
C: for Automotive
Packaging and forming specification
TL: Embossed tape and reel
Marking Diagram
SSOP5 (TOP VIEW)
ak
Part Number Marking
LOT Number
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BD7LS34G-C
Physical Dimension and Packing Information
SSOP5
Package Name
Packing Information
Packing Form
Embossed carrier tape
Quantity
3000 pcs
Direction of feed
TL
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Revision History
Date
Revision
21.Apr.2020
001
Changes
New Release
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(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
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7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
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8.
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Precaution for Mounting / Circuit board design
1.
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For details, please refer to ROHM Mounting specification
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Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
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Datasheet
General Precaution
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