Datasheet
For Automotive 500 mA Adjustable Output
LDO Regulators
BD800M5WFPJ-C BD800M5WHFP-C BD800M5WFP2-C
General Description
Key Specifications
◼
◼
◼
◼
◼
◼
The BD800M5Wxxx-C series are linear regulators
designed as low current consumption products for power
supplies in various automotive applications.
These products are designed for up to 45 V as an absolute
maximum voltage and to operate until 500 mA for the
output current with low current consumption 17 μA (Typ).
These can regulate the output with a very high accuracy
(Note 1), ±2 % (BD800M5WFPJ-C, BD800M5WHFP-C) and
±2.6 % (BD800M5WFP2-C). The output voltage can be
adjusted between 1.2 V and 16 V by an external resistive
divider connected to the adjustment pin. These regulators
are therefore an ideal for any applications requiring a direct
connection to the battery and a low current consumption.
Wide Temperature Range (Tj):
Wide Operating Input Range:
Low Current Consumption:
Output Current Capability:
High Output Voltage Accuracy:
Output Voltage:
Packages
TO252-J5
HRP5
TO263-5
A logical “HIGH” at the EN pin turns on the device, and in
the other side, the devices are controlled to disable by a
logical “LOW” input to the EN pin.
The devices feature the integrated Over Current Protection
to protect the device from a damage caused by a shortcircuiting or an overload. These products also integrate
Thermal Shutdown Protection to avoid the damage by
overheating.
Furthermore, low ESR ceramic capacitors are sufficiently
applicable for the phase compensation.
TO252-J5
-40 °C to +150 °C
3 V to 42 V
17 μA(Typ)
500 mA
±2 % / ±2.6 %
1.2 V to 16 V
W(Typ) x D(Typ) x H(Max)
6.60 mm x 10.10 mm x 2.38 mm
9.395 mm x 10.540 mm x 2.005 mm
10.16 mm×15.10 mm×4.70 mm
TO263-5
HRP5
(Note 1) The tolerance of feedback resistor is not included.
Features
◼
◼
◼
◼
AEC-Q100 Qualified(Note 2)
EN Function (Output Shutdown Function)
Over Current Protection (OCP)
Thermal Shutdown Protection (TSD)
(Note 2) Grade 1
Applications
◼
◼
◼
◼
Power Train
Body
Audio System
Navigation System
FIN
BD800M5WHFP-C
Typical Application Circuit
◼ Components Externally Connected
Capacitor: 0.1 µF ≤ CIN, 1.47 µF ≤ COUT (Min) (Note 3)
Resistor: 5 kΩ ≤ R1 ≤ 200 kΩ (Note 4) (Note 5)
VADJ (Typ): 0.65 V
VIN
1
Input
Voltage
𝑉𝑂𝑈𝑇
𝑅2 = 𝑅1 (
− 1)
𝑉𝐴𝐷𝐽
EN
2
GND
ADJ
3
4
R2
CIN
Enable
Voltage R1
VOUT
5
Output
Voltage
(Note 6)
CADJ
COUT
(Note 3) Electrolytic, tantalum and ceramic capacitors can be used.
(Note 4) The tolerance of feedback resistor is not included in the accuracy of output voltage.
(Note 5) The value of a feedback resistor R1 must be within this range.
R2 value is defined by following the formula using the limitation of R1.
(Note 6) If it needs better transient characteristic, insert a capacitor between
the VOUT and ADJ pins. Refer to Typical Application and Layout Example for the details such as equations.
〇Product structure : Silicon integrated circuit
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Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Key Specifications .......................................................................................................................................................................... 1
Packages ........................................................................................................................................................................................ 1
Typical Application Circuit ............................................................................................................................................................... 1
Pin Configurations .......................................................................................................................................................................... 4
Pin Descriptions .............................................................................................................................................................................. 4
Block Diagram ................................................................................................................................................................................ 5
Description of Blocks ...................................................................................................................................................................... 5
Absolute Maximum Ratings ............................................................................................................................................................ 6
Thermal Resistance ........................................................................................................................................................................ 6
Operating Conditions ...................................................................................................................................................................... 7
Electrical Characteristics................................................................................................................................................................. 8
LDO Function .............................................................................................................................................................................. 8
Enable Function .......................................................................................................................................................................... 8
Typical Performance Curves........................................................................................................................................................... 9
Figure 1. Output Voltage vs Input Voltage ................................................................................................................................... 9
Figure 2. Output Voltage vs Input Voltage -Enlarged view .......................................................................................................... 9
Figure 3. Output Voltage vs Junction Temperature (IOUT = 0.5 mA) .......................................................................................... 9
Figure 4. Current Consumption + Enable Bias Current vs Input Voltage .................................................................................. 9
Figure 5. Current Consumption + Enable Bias Current vs Junction Temperature................................................................... 10
Figure 6. Current Consumption + Enable Bias Current vs Output Current ............................................................................. 10
Figure 7. Output Voltage vs Output Current (Over Current Protection) .................................................................................. 10
Figure 8. Shutdown Current vs Junction Temperature (VEN = 0 V) ......................................................................................... 10
Figure 9. Dropout Voltage vs Output Current (VIN = 4.75 V) ................................................................................................... 11
Figure 10. Output Voltage vs Junction Temperature (Thermal Shutdown Protection)............................................................. 11
Figure 11. Output Voltage vs EN Input Voltage ......................................................................................................................... 11
Figure 12. EN Input Voltage vs Junction Temperature .............................................................................................................. 11
Figure 13. Enable Bias Current vs Junction Temperature ......................................................................................................... 12
Figure 14. Ripple Rejection (Vripple = 1 Vrms, IOUT = 100 mA) .............................................................................................. 12
Figure 15. Line Regulation (VIN = 6 V → 28 V) ....................................................................................................................... 12
Figure 16. Load Regulation (IOUT = 0.5 mA → 400 mA) .......................................................................................................... 12
Figure 17. Line Transient Response (VIN = 0 V → 16 V) ........................................................................................................ 13
Figure 18. Line Transient Response (VIN = 6 V → 16 V) ........................................................................................................ 13
Figure 19. Load Transient Response (IOUT = 1 mA ↔ 500 mA) .............................................................................................. 14
Figure 20. Load Transient Response (IOUT = 10 mA ↔ 500 mA) ............................................................................................ 15
Figure 21. EN ON/OFF Sequence (VEN = 0 V ↔ 5 V, Tj = +25 °C) ......................................................................................... 16
Figure 22. EN ON/OFF Sequence (VEN = 0 V ↔ 5 V, Tj = +150 °C) ....................................................................................... 17
Figure 23. EN ON/OFF Sequence (VEN = 0 V ↔ 5 V, Tj = -40 °C).......................................................................................... 18
Figure 24. VIN ON/OFF Sequence (VIN = 0 V ↔ 13.5 V, Tj = +25 °C) ..................................................................................... 19
Figure 25. VIN ON/OFF Sequence (VIN = 0 V ↔ 13.5 V, Tj = +150 °C) ................................................................................... 20
Figure 26. VIN ON/OFF Sequence (VIN = 0 V ↔ 13.5 V, Tj = -40 °C) ...................................................................................... 21
Measurement Circuit for Typical Performance Curves ................................................................................................................. 22
Application and Implementation .................................................................................................................................................... 23
Selection of External Components ............................................................................................................................................ 23
Input Pin Capacitor ................................................................................................................................................................ 23
Output Pin Capacitor ............................................................................................................................................................. 23
Typical Application and Layout Example ................................................................................................................................... 25
Surge Voltage Protection for Linear Regulators ........................................................................................................................ 26
Positive Surge to the Input..................................................................................................................................................... 26
Negative Surge to the Input ................................................................................................................................................... 26
Reverse Voltage Protection for Linear Regulators .................................................................................................................... 26
Protection against Reverse Input/Output Voltage .................................................................................................................. 26
Protection against Input Reverse Voltage .............................................................................................................................. 27
Protection against Reverse Output Voltage when Output Connect to an Inductor................................................................. 28
Power Dissipation ......................................................................................................................................................................... 29
TO252-J5 .................................................................................................................................................................................. 29
HRP5 ....................................................................................................................................................................................... 29
TO263-5 .................................................................................................................................................................................... 30
Thermal Design ............................................................................................................................................................................ 31
I/O Equivalence Circuits................................................................................................................................................................ 32
Operational Notes ......................................................................................................................................................................... 33
1.
Reverse Connection of Power Supply ............................................................................................................................ 33
2.
Power Supply Lines ........................................................................................................................................................ 33
3.
Ground Voltage............................................................................................................................................................... 33
4.
Ground Wiring Pattern .................................................................................................................................................... 33
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5.
Recommended Operating Conditions............................................................................................................................. 33
6.
Inrush Current................................................................................................................................................................. 33
7.
Thermal Consideration ................................................................................................................................................... 33
8.
Testing on Application Boards ........................................................................................................................................ 33
9.
Inter-pin Short and Mounting Errors ............................................................................................................................... 33
10.
Unused Input Pins .......................................................................................................................................................... 33
11.
Regarding the Input Pin of the IC ................................................................................................................................... 34
12.
Ceramic Capacitor .......................................................................................................................................................... 34
13.
Thermal Shutdown Protection Circuit(TSD) .................................................................................................................... 34
14.
Over Current Protection Circuit (OCP) ........................................................................................................................... 34
15.
Enable Pin ...................................................................................................................................................................... 34
Ordering Information ..................................................................................................................................................................... 35
Marking Diagrams......................................................................................................................................................................... 35
Physical Dimension and Packing Information ............................................................................................................................... 36
Revision History ............................................................................................................................................................................ 39
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Pin Configurations
HRP5
(TOP VIEW)
TO252-J5
(TOP VIEW)
TO263-5
(TOP VIEW)
FIN
FIN
FIN
1
1 2 3 4 5
2
3
4
5
1 2
3 4
5
Pin Descriptions
Pin No.
Pin Name
Function
Descriptions
1
VIN
Input Supply Voltage Pin
It is necessary to use a capacitor with a capacitance of 0.1 μF or
higher between the VIN pin and GND. The detail of a selection is
described in Selection of External Components. If the inductance
of power supply line is high, please adjust input capacitor value.
2
EN
Control Output ON/OFF Pin
A logical “HIGH” (VEN ≥ 2.0 V) at the EN pin enables the device
and “LOW” (VEN ≤ 0.8 V) at the EN pin disables the device.
3
GND
Ground Pin
Ground
4
ADJ
Adjustment Pin
For Output Voltage
Connect an external resistor to adjust output voltage.
5
VOUT
Output Voltage Pin
Connect an external resistor to adjust output voltage.
It is necessary to use a capacitor with a capacitance of 1.47
μF(Min) or higher between the VOUT pin and GND. The detail of
a selection is described in Selection of External Components
FIN
GND
Ground Pin
Ground.
This pin should be connected to Analog ground / Power ground or
Heat Sink.
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Block Diagram
TO252-J5 / HRP5 / TO263-5
GND (FIN)
OCP
EN
EN
PREREG
VREF
AMP
DRIVER
TSD
DISCHARGE
EN
VIN (Pin 1)
EN (Pin 2)
GND (Pin 3)
ADJ (Pin 4)
VOUT (Pin 5)
Description of Blocks
Block Name
Function
Description of Blocks
Control Output Voltage ON/OFF
A logical “HIGH” (VEN ≥ 2.0 V) at the EN pin enables the device
and “LOW” (VEN ≤ 0.8 V) at the EN pin disables the device.
Internal Power Supply
Power supply for internal circuit.
Thermal Shutdown Protection
In case maximum power dissipation is exceeded or the ambient
temperature is higher than the Maximum Junction Temperature,
overheating causes the chip temperature (Tj) to rise. The TSD
protection circuit detects this and forces the output to turn off in order
to protect the device from overheating (Typ:175 °C). When the
junction temperature decreases to low, the output turns on
automatically.
VREF
Reference Voltage
Generate the reference voltage.
AMP
Error Amplifier
The error amplifier amplifies the difference between the feedback
voltage of the output voltage and the reference voltage.
Output MOSFET Driver
Drive the output MOSFET (Power Tr.)
Over Current Protection
If the output current increases higher than the maximum output
current, it is limited by Over Current Protection in order to protect the
device from a damage caused by an over current (Typ:1400 mA).
While this block is operating, the output voltage may decrease
because the output current is limited.
If an abnormal state is removed and the output current value returns
to normal, the output voltage also returns to normal state.
Output Discharge Function
Output pin is discharged when EN = Low input or TSD
detected.(Typ:4 kΩ)
EN
PREREG
TSD
DRIVER
OCP
DISCHARGE
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Absolute Maximum Ratings
Parameter
Symbol
Ratings
Unit
Supply Voltage(Note 1)
VIN
-0.3 to +45
V
Voltage(Note 2)
VEN
-0.3 to +45
V
Output Pin Voltage
VOUT
-0.3 to +20 (≤ VIN + 0.3)
V
ADJ Pin Voltage
VADJ
-0.3 to +7
V
Junction Temperature Range
Tj
-40 to +150
°C
Storage Temperature Range
Tstg
-55 to +150
°C
EN Pin
Maximum Junction Temperature
Tjmax
150
°C
ESD Withstand Voltage
(HBM)(Note 3)
VESD_HBM
±2000
V
ESD Withstand Voltage
(CDM)(Note 4)
VESD_CDM
±750
V
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance and power dissipation taken into
consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating.
(Note 1) Do not exceed Tjmax.
(Note 2) The start-up orders of power supply (VIN) and the VEN do not influence if the voltage is within the operation power supply voltage range.
(Note 3) ESD susceptibility Human Body Model “HBM”; base on ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF).
(Note 4) ESD susceptibility Charged Device Model “CDM”; base on JEDEC JESD22-C101.
Thermal Resistance (Note 5)
Parameter
Symbol
Thermal Resistance (Typ)
1s(Note 7)
2s2p(Note 8)
Unit
TO252-J5
Junction to Ambient
θJA
120.1
24.4
°C/W
(Note 6)
ΨJT
19
3
°C/W
Junction to Ambient
θJA
91.3
21.4
°C/W
Junction to Top Characterization Parameter(Note 6)
ΨJT
8
3
°C/W
Junction to Ambient
θJA
80.2
21.8
°C/W
Junction to Top Characterization Parameter(Note 6)
ΨJT
10
2
°C/W
Junction to Top Characterization Parameter
HRP5
TO263-5
(Note 5) Based on JESD51-2A(Still-Air). Using BD800M5WFPJ-C, BD800M5WHFP-C, BD800M5WFP2-C Chips.
(Note 6) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 7) Using a PCB board based on JESD51-3.
(Note 8) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
2 Internal Layers
Thermal Via(Note 9)
Pitch
Diameter
1.20 mm
Φ0.30 mm
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 9) This thermal via connects with the copper pattern of all layers.
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Operating Conditions(-40°C ≤ Tj ≤ +150°C)
Parameter
Symbol
Min
Max
Unit
VIN
VOUT(Max) + ΔVd(Max)
42
V
VIN Start-Up
3
-
V
VOUT
1.2
16.0
V
Feedback Resistor ADJ vs GND(Note 3)
R1
5
200
kΩ
Output Control Voltage
VEN
0
42
V
Output Current
IOUT
0
500
mA
Input Capacitor(Note4)
CIN
0.1
-
µF
COUT
1.47
1000
µF
ESR(COUT)
-
5
Ω
CADJ
-
1000
pF
Ta
-40
+125
°C
Input Voltage(Note 1)
Start-Up
Voltage(Note 2)
Output Voltage
Output
Capacitor(Note 5)
Output Capacitor Equivalent Series
Resistance
VOUT-ADJ Capacitor
Operating Temperature
(Note 1) Minimum Input Voltage must be 3.3 V or more.
Please consider that the output voltage would be dropped (Dropout voltage ΔVd) by the output current.
(Note 2) If VOUT setting is 3 V or less, VOUT (Min) = 90 % × VOUT (Typ) when VIN = 3 V, IOUT = 0 mA.
(Note 3) If it needs better transient characteristic, insert a capacitor between the VOUT and ADJ pins. Refer to Typical Application and Layout Example for the
details such as equations.
(Note 4) If the inductance of power supply line is high, please adjust input capacitor value.
(Note 5) Set the value of the capacitor so that it does not fall below the minimum value. Take into consideration the temperature characteristics and DC device
characteristics.
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Electrical Characteristics
LDO Function (VOUT setting = 5 V, R1 = 120 kΩ, R2 = 803 kΩ)
Unless otherwise specified, Tj = -40 °C to +150 °C, VIN = 13.5 V, VEN = 5 V, IOUT = 0 mA
Typical values are defined at Tj = 25 °C, VIN = 13.5 V
Limits
Parameter
Symbol
Unit
Min
Typ
Max
Shutdown Current
Current Consumption(Note 1)
Reference Voltage
Dropout Voltage
ISHUT
-
1
5
μA
-
17
34
μA
-
17
43
μA
-
17
46
μA
-
17
49
μA
-
17
53
μA
0.637
0.650
0.663
V
0.633
0.650
0.667
V
-
0.30
0.52
V
-
0.50
0.87
V
60
70
-
dB
-
0.02
0.40
% × VOUT
-
0.02
0.60
% × VOUT
-
0.02
0.40
% × VOUT
-
0.02
0.60
% × VOUT
IOUT(OCP)
750
1400
-
mA
Tj(TSD)
151
175
-
°C
ICC
VADJ
ΔVd
Ripple Rejection
R.R.
Line Regulation
Reg.I
Load Regulation
Overload Current Protection
Thermal Shutdown Temperature
Reg.L
Conditions
VEN = 0 V
Tj ≤ 125 °C
IOUT ≤ 500 mA
Tj ≤ 25 °C
IOUT ≤ 500 mA
Tj ≤ 85 °C
IOUT ≤ 500 mA
Tj ≤ 105 °C
IOUT ≤ 500 mA
Tj ≤ 125 °C
IOUT ≤ 500 mA
Tj ≤ 150 °C
TO252-J5, HRP5 package
6 V ≤ VIN ≤ 42 V
0.5 mA ≤ IOUT ≤ 400 mA
TO263-5 package
6 V ≤ VIN ≤ 42 V
0.5 mA ≤ IOUT ≤ 400 mA
VIN = VOUT × 0.95
IOUT = 300 mA
VIN = VOUT × 0.95
IOUT = 500 mA
f = 120 Hz
Vripple = 1 Vrms
IOUT = 100 mA
6 V ≤ VIN ≤ 28 V
Tj ≤ 125 °C
6 V ≤ VIN ≤ 28 V
Tj ≤ 150 °C
0.5 mA ≤ IOUT ≤ 400 mA
Tj ≤ 125 °C
0.5 mA ≤ IOUT ≤ 400 mA
Tj ≤ 150 °C
6 V ≤ VIN ≤ 42 V
VOUT = 90 % × VOUT(Typ)
-
(Note 1) It does not contain the current of R1 and R2.
Enable Function
Unless otherwise specified, Tj = -40 °C to +150 °C, VIN = 13.5 V, VEN = 5 V, IOUT = 0 mA
Typical values are defined at Tj = 25 °C, VIN = 13.5 V
Limits
Parameter
Symbol
Unit
Min
Typ
Max
Conditions
Enable Mode Voltage
VENH
2.0
-
42.0
V
-
Disable Mode Voltage
VENL
0
-
0.8
V
-
IEN
-
4
8
µA
-
Enable Bias Current
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Typical Performance Curves
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ
10.0
10.0
Tj = -40 °C
Tj = -40 °C
Tj = +25 °C
Tj = +25 °C
7.5
Output Voltage: VOUT [V]
Output Voltage: VOUT [V]
7.5
Tj = +150 °C
5.0
2.5
0.0
Tj = +150 °C
5.0
2.5
0.0
0
10
20
30
40
50
0
1
Input Voltage VIN [V]
2
3
5
6
Input Voltage VIN [V]
Figure 1.
Output Voltage vs Input Voltage
Figure 2.
Output Voltage vs Input Voltage -Enlarged view
5.100
100
Tj = -40 °C
5.075
Tj = +25 °C
80
5.050
Current Consumption: ICC
+ Enable Bias Current: IEN [μA]
Output Voltage: VOUT [V]
4
5.025
5.000
4.975
4.950
Tj = +125 °C
Tj = +150 °C
60
40
20
4.925
4.900
0
-40
0
40
80
120
160
0
Junction Temperature: Tj [°C]
20
30
40
50
Input Voltage VIN [V]
Figure 3.
Output Voltage vs Junction Temperature
(IOUT = 0.5 mA)
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Figure 4.
Current Consumption + Enable Bias Current
vs Input Voltage
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Typical Performance Curves - continued
100
100
90
90
80
80
Current Consumption: ICC
+ Enable Bias Current: IEN [μA]
Current Consumption: ICC
+ Enable Bias Current: IEN [μA]
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ
70
60
50
40
30
20
10
Tj = -40 °C
Tj = +25 °C
Tj = +125 °C
70
Tj = +150 °C
60
50
40
30
20
10
0
0
-40
0
40
80
120
Junction Temperature: Tj [°C]
160
0
Figure 5.
Current Consumption + Enable Bias Current
vs Junction Temperature
100
200
300
400
Output Current: IOUT [mA]
500
Figure 6.
Current Consumption + Enable Bias Current
vs Output Current
10.0
5
Tj = -40 °C
Output Voltage: VOUT [V]
Shutdown Current: ISHUT [µA]
Tj = +25 °C
7.5
Tj = +125 °C
5.0
2.5
4
3
2
1
0
0.0
0
500
1000
1500
2000
Output Current IOUT [mA]
0
40
80
120
Junction Temperature: Tj [°C]
160
Figure 8.
Shutdown Current vs Junction Temperature
(VEN = 0 V)
Figure 7.
Output Voltage vs Output Current
(Over Current Protection)
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ
1000
6
Tj = -40 °C
Tj = +25 °C
5
Tj = +150 °C
Output Voltage: VOUT [V]
Dropout Voltage: ΔVd [V]
800
600
400
200
4
3
2
1
0
0
0
100
200
300
400
Output Current: IOUT [mA]
500
100
120
140
160
180
Junction Temperature: Tj [°C]
200
Figure 10.
Output Voltage vs Junction Temperature
(Thermal Shutdown Protection)
Figure 9.
Dropout Voltage vs Output Current
(VIN = 4.75 V)
7
2.0
Tj = -40 °C
6
VENH
VENL
Tj = +25 °C
1.8
5
EN Voltage: VEN [V]
Output Voltage: VOUT [V]
Tj = +150 °C
4
3
1.6
1.4
1.2
2
1.0
1
0
0.8
1
1.2
1.4
1.6
1.8
EN Input Voltage: VEN [V]
2
-40
Figure 11.
Output Voltage vs EN Input Voltage
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0
40
80
120
Junction Temperature: Tj [°C]
160
Figure 12.
EN Input Voltage vs Junction Temperature
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ
4.0
90
80
70
Ripple Rejection: R.R. [dB]
Enable Bias Current: IEN [µA]
3.6
3.2
2.8
60
50
40
30
Tj = -40 °C
20
2.4
Tj = +25 °C
10
Tj = +150 °C
2.0
0
-40
0
40
80
120
Junction Temperature: Tj [°C]
160
0.01
0.6
0.6
0.5
0.5
0.4
0.3
0.2
0.1
0.0
-40
1
10
Frequency: f [kHz]
100
Figure 14.
Ripple Rejection
(Vripple = 1 Vrms, IOUT = 100 mA)
Lord Regulation: Reg.L [% x VOUT]
Line Regulation: Reg.I [% x VOUT]
Figure 13.
Enable Bias Current vs Junction Temperature
0.1
0.4
0.3
0.2
0.1
0.0
0
40
80
120
Junction Temperature: Tj [°C]
160
-40
40
80
120
160
Junction Temperature: Tj [°C]
Figure 15.
Line Regulation
(VIN = 6 V → 28 V)
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Figure 16.
Load Regulation
(IOUT = 0.5 mA → 400 mA)
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ, Tj = +25 °C
10.0
COUT = 2.2 μF
COUT = 10 μF
Output Overshoot Voltage [% x VOUT]
Output Overshoot Voltage [% x VOUT]
10.0
7.5
5.0
2.5
COUT = 2.2 μF
COUT = 10 μF
7.5
5.0
2.5
0.0
0.0
1
10
100
Input Voltage Rise Time [μs]
1
1000
(a. VIN = 0 V → 16 V, CADJ = None)
10
100
Input Voltage Rise Time [μs]
1000
(b. VIN = 0 V → 16 V, CADJ = 220 pF)
Figure 17. Line Transient Response
(VIN = 0 V → 16 V)
10.0
COUT = 2.2 μF
COUT = 10 μF
COUT = 2.2 μF
COUT = 10 μF
Output Overshoot Voltage [% x VOUT]
Output Overshoot Voltage [% x VOUT]
10.0
7.5
7.5
5.0
5.0
2.5
2.5
0.0
0.0
1
10
100
Input Voltage Rise Time [μs]
1000
1
10
100
1000
Input Voltage Rise Time [μs]
(c. VIN = 6 V → 16 V, CADJ = None)
(d. VIN = 6 V → 16 V, CADJ = 220 pF)
Figure 18. Line Transient Response
(VIN = 6 V → 16 V)
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ Tj = +25 °C
0
Output Undershoot Voltage [% x VOUT]
Output Undershoot Voltage [% x VOUT]
0
-5
-10
COUT = 2.2 μF
COUT = 10 μF
-5
-10
COUT = 2.2 μF
COUT = 10 μF
-15
-15
1
10
100
Output Current Rise Time [μs]
1
1000
(a. IOUT = 1 mA → 500 mA, CADJ = None)
1000
(b. IOUT = 1 mA → 500 mA, CADJ = 220 pF)
15
15
COUT = 2.2 μF
COUT = 10 μF
Output Overshoot Voltage [% x VOUT]
Output Overshoot Voltage [% x VOUT]
10
100
Output Current Rise Time [μs]
10
5
COUT = 2.2 μF
COUT = 10 μF
10
5
0
0
1
10
100
Output Current Fall Time [μs]
1000
1
(c. IOUT = 500 mA → 1 mA, CADJ = None)
10
100
Output Current Fall Time [μs]
1000
(d. IOUT = 500 mA → 1 mA, CADJ = 220 pF)
Figure 19. Load Transient Response
(IOUT = 1 mA ↔ 500 mA)
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ Tj = +25 °C
0
Output Undershoot Voltage [% x VOUT]
Output Undershoot Voltage [% x VOUT]
0
-5
-10
COUT = 2.2 μF
COUT = 10 μF
-5
-10
COUT = 2.2 μF
COUT = 10 μF
-15
-15
1
10
100
1
1000
Output Current Rise Time [μs]
(e. IOUT = 10 mA → 500 mA, CADJ = None)
100
1000
(f. IOUT = 10 mA → 500 mA, CADJ = 220 pF)
15
15
COUT = 2.2 μF
COUT = 10 μF
Output Overshoot Voltage [% x VOUT]
Output Overshoot Voltage [% x VOUT]
10
Output Current Rise Time [μs]
10
5
COUT = 2.2 μF
COUT = 10 μF
10
5
0
0
1
10
100
1000
1
Output Current Fall Time [μs]
10
100
1000
Output Current Fall Time [μs]
(g. IOUT = 500 mA → 10 mA, CADJ = None)
(h. IOUT = 500 mA → 10 mA, CADJ = 220 pF)
Figure 20. Load Transient Response
(IOUT = 10 mA ↔ 500 mA)
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ, IOUT = 0 mA, Tj = +25 °C
VEN = 2 V/div
VEN = 2 V/div
VOUT = 2 V/div
VOUT = 2 V/div
Time = 40 µs/div
(b. VEN = 5 V → 0 V, COUT = 2.2 µF)
(a. VEN = 0 V → 5 V, COUT = 2.2 µF)
VEN = 2 V/div
VOUT = 2 V/div
Time = 10 ms/div
VEN = 2 V/div
Time = 40 µs/div
VOUT = 2 V/div
Time = 20 ms/div
(d. VEN = 5 V → 0 V, COUT = 10 µF)
(c. VEN = 0 V → 5 V, COUT=10 µF)
Figure 21. EN ON/OFF Sequence
(VEN = 0 V ↔ 5 V, Tj = +25 °C)
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BD800M5WFPJ-C BD800M5WHFP-C BD800M5WFP2-C
Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ, IOUT = 0 mA, Tj = +150 °C
VEN = 2 V/div
VEN = 2 V/div
VOUT = 2 V/div
VOUT = 2 V/div
Time = 40 µs/div
(e. VEN = 0 V → 5 V, COUT = 2.2 µF)
(f. VEN = 5 V → 0 V, COUT = 2.2 µF)
VEN = 2 V/div
VOUT = 2 V/div
Time = 10 ms/div
VEN = 2 V/div
Time = 40 µs/div
VOUT = 2 V/div
(g. VEN = 0 V → 5 V, COUT = 10 µF)
Time = 20 ms/div
(h. VEN = 5 V → 0 V, COUT = 10 µF)
Figure 22. EN ON/OFF Sequence
(VEN = 0 V ↔ 5 V, Tj = +150 °C)
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ, IOUT = 0 mA, Tj = -40 °C
VEN = 2 V/div
VEN = 2 V/div
VOUT = 2 V/div
VOUT = 2 V/div
Time = 40 µs/div
(i. VEN = 0 V → 5 V, COUT = 2.2 µF)
(j. VEN = 5 V → 0 V, COUT = 2.2 µF)
VEN = 2 V/div
VOUT = 2 V/div
Time = 10 ms/div
VEN = 2 V/div
Time = 40 µs/div
VOUT = 2 V/div
(k. VEN = 0 V → 5 V, COUT = 10 µF)
Time = 20 ms/div
(l. VEN = 5 V → 0 V, COUT = 10 µF)
Figure 23. EN ON/OFF Sequence
(VEN = 0 V ↔ 5 V, Tj = -40 °C)
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ, IOUT = 0 mA, Tj = +25 °C
VIN = 5 V/div
VIN = 5 V/div
VOUT = 2 V/div
VOUT = 2 V/div
Time = 40 µs/div
(a. VIN = 0 V → 13.5 V, COUT = 2.2 µF)
(b. VIN = 13.5 V → 0 V, COUT = 2.2 µF)
VIN = 5 V/div
VIN = 5 V/div
VOUT = 2 V/div
Time = 20 ms/div
VOUT = 2 V/div
Time = 40 µs/div
(c. VIN = 0 V → 13.5 V, COUT = 10 µF)
Time = 20 ms/div
(d. VIN = 13.5 V → 0 V, COUT = 10 µF)
Figure 24. VIN ON/OFF Sequence
(VIN = 0 V ↔ 13.5 V, Tj = +25 °C)
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Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ, IOUT = 0 mA, Tj = +150 °C
VIN = 5 V/div
VIN = 5 V/div
VOUT = 2 V/div
VOUT = 2 V/div
Time = 40 µs/div
(e. VIN = 0 V → 13.5 V, COUT = 2.2 µF)
(f. VIN = 13.5 V → 0 V, COUT = 2.2 µF)
VIN = 5 V/div
VIN = 5 V/div
VOUT = 2 V/div
Time = 20 ms/div
VOUT = 2 V/div
Time = 40 µs/div
(g. VIN = 0 V → 13.5 V, COUT = 10 µF)
Time = 20 ms/div
(h. VIN = 13.5 V → 0 V, COUT = 10 µF)
Figure 25. VIN ON/OFF Sequence
(VIN = 0 V ↔ 13.5 V, Tj = +150 °C)
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BD800M5WFPJ-C BD800M5WHFP-C BD800M5WFP2-C
Typical Performance Curves - continued
Unless otherwise specified, VIN = 13.5 V, VOUT setting = 5 V, VEN = 5 V, R1 = 120 kΩ, R2 = 803 kΩ, IOUT = 0 mA, Tj = -40 °C
VIN = 5 V/div
VIN = 5 V/div
VOUT = 2 V/div
VOUT = 2 V/div
Time = 40 µs/div
(i. VIN = 0 V → 13.5 V, COUT = 2.2 µF)
(j. VIN = 13.5 V → 0 V, COUT = 2.2 µF)
VIN = 5 V/div
VIN = 5 V/div
VOUT = 2 V/div
Time = 20 ms/div
VOUT = 2 V/div
Time = 40 µs/div
(k. VIN = 0 V → 13.5 V, COUT = 10 µF)
Time = 20 ms/div
(l. VIN = 13.5 V → 0 V, COUT = 10 µF)
Figure 26. VIN ON/OFF Sequence
(VIN = 0 V ↔ 13.5 V, Tj = -40 °C)
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BD800M5WFPJ-C BD800M5WHFP-C BD800M5WFP2-C
Measurement Circuit for Typical Performance Curves
VIN
VOUT
CADJ
VIN
VOUT
803kΩ
0.1µF
EN
GND
ADJ
120kΩ
803kΩ
2.2µF
0.1µF
GND
VOUT
VIN
0.1µF
GND
ADJ
120kΩ
2.2µF
0.1µF
IOUT
EN
ADJ
GND
120kΩ
EN
VIN
VOUT
GND
ADJ
120kΩ
VOUT
803kΩ
0.1µF
2.2µF
EN
ADJ
120kΩ
VIN
VOUT
803kΩ
0.1µF
EN
GND
ADJ
120kΩ
CADJ
803kΩ
2.2µF
IOUT
0.1µF
Measurement Setup for
Figure 14
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2.2µF
Measurement Setup for
Figure 11, 12, 13, 21, 22, 23
VOUT
Vripple
GND
IOUT
Measurement Setup for
Figure 9
VIN
2.2µF
Measurement Setup for
Figure 7
803kΩ
0.1µF
2.2µF
803kΩ
Measurement Setup for
Figure 6
VIN
120kΩ
VOUT
803kΩ
EN
ADJ
Measurement Setup for
Figure 4, 5, 8, 24, 25, 26
Measurement Setup for
Figure 1, 2, 3, 10, 15, 17, 18
VIN
EN
EN
GND
ADJ
120kΩ
2.2µF
IOUT
Measurement Setup for
Figure 16, 19, 20
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Application and Implementation
Notice: The following information is given as a reference or hint for the application and the implementation. Therefore, it does
not guarantee its operation on the specific function, accuracy or external components in the application. In the
application, it shall be designed with sufficient margin by enough understanding about characteristics of the external
components, e.g. capacitor, and also by appropriate verification in the actual operating conditions.
Selection of External Components
Input Pin Capacitor
If the battery is placed far from the regulator or the impedance of the input-side is high, higher capacitance is required for
the input capacitor in order to prevent the voltage-drop at the input line. The input capacitor and its capacitance should be
selected depending on the line impedance which is between the input pin and the smoothing filter circuit of the power
supply. At this time, the capacitance value setting is different each application. Generally, the capacitor with capacitance
value of 0.1 µF with good high frequency characteristic is recommended for this regulator.
Moreover, when inserting filter as ISO7637 countermeasure, insertion of ceramic capacitor from 10 nF to 470 nF (for pulses
2a) and ceramic capacitor from 100 nF to 470 nF (for pulses 3a/b) between input pin and GND pin are effective.
In addition, the consideration should be taken as the output pin capacitor, to prevent an influence to the regulator’s
characteristic from the deviation or the variation of the external capacitor’s characteristic. All output capacitors mentioned
above are recommended to have a good DC bias characteristic and a temperature characteristic (approximately ±15 %,
e.g. X7R, X8R) with being satisfied high absolute maximum voltage rating based on EIA standard. These capacitors should
be placed close to the input pin and mounted on the same board side of the regulator not to be influenced by implement
impedance.
Output Pin Capacitor
The output capacitor is mandatory for the regulator in order to realize stable operation. The output capacitor with
capacitance value ≥ 1.47 µF (Min) and ESR up to 5 Ω (Max) must be required between the output pin and the GND pin.
A proper selection of appropriate both the capacitance value and ESR for the output capacitor can improve the transient
behavior of the regulator and can also keep the stability with better regulation loop. The correlation of the output capacitance
value and ESR is shown in the graph on the next page as the output capacitor’s capacitance value and the stability region
for ESR. As described in this graph, this regulator is designed to be stable with ceramic capacitors as of MLCC, with the
capacitance value from 1.47 µF to 1000 µF and with ESR value within almost 0 Ω to 5 Ω. The frequency range of ESR can
be generally considered as within about 10 kHz to 100 kHz.
Note that the provided the stable area of the capacitance value and ESR in the graph is obtained under a specific set of
conditions which is based on the measurement result in single IC on our board with a resistive load. In the actual
environment, the stability is affected by wire impedance on the board, input power supply impedance and also loads
impedance. Therefore, please note that a careful evaluation of the actual application, the actual usage environment and
the actual conditions should be done to confirm the actual stability of the system.
Generally, in the transient event which is caused by the input voltage fluctuation or the load fluctuation beyond the gain
bandwidth of the regulation loop, the transient response ability of the regulator depends on the capacitance value of the
output capacitor. Basically the capacitance value of ≥ 1.47 µF (Min) for the output capacitor is recommended as shown in
the table on Output Capacitance COUT, ESR Available Area. Using bigger capacitance value can be expected to improve
better the transient response ability in a high frequency. Various types of capacitors can be used for the output capacitor
with high capacity which includes electrolytic capacitor, electro-conductive polymer capacitor and tantalum capacitor. Noted
that, depending on the type of capacitors, its characteristics such as ESR (≤ 5 Ω) absolute value range, a temperature
dependency of capacitance value and increased ESR at cold temperature needs to be taken into consideration.
In addition, the same consideration should be taken as the input pin capacitor, to prevent an influence to the regulator’s
characteristic from the deviation or the variation of the external capacitor’s characteristic. All output capacitors mentioned
above are recommended to have a good DC bias characteristic and a temperature characteristic (approximately ±15 %,
e.g. X7R, X8R) with being satisfied high absolute maximum voltage rating based on EIA standard. These capacitors should
be placed close to the output pin and mounted on the same board side of the regulator not to be influenced by implement
impedance.
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Application and Implementation - continued
6
Unstable Available Area
5
ESR(COUT) [Ω]
4
3
Stable Available Area
1.47 μF ≤ COUT ≤ 1000 μF
ESR(COUT) ≤ 5 Ω
2
1
0
0.1
1
10
100
1000
Output Capacitance COUT [μF]
Figure 27. Output Capacitance COUT, ESR Stable Available Area
(-40 °C ≤ Tj ≤ +150 °C, 6 V ≤ VIN ≤ 42 V, VEN = 5 V, IOUT = 0 mA to 500 mA)
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Application and Implementation – continued
Typical Application and Layout Example
Power Ground
FIN
BD800M5WHFP-C
CIN
2: EN
4: ADJ
1: VIN
3: GND 5: VOUT
COUT
Input
Voltage
Output
Voltage
R1
Enable
Voltage
R2
CADJ
Figure 28. Typical Application and Layout Example
Parameter
Symbol
Reference Value for Application
Output Current Range
IOUT
IOUT ≤ 500 mA
Output Voltage Range
VOUT
1.2 V to 16 V
Feedback Resistor between the ADJ and GND Pins
R1
120 kΩ
Feedback Resistor between the ADJ and VOUT Pins
R2
Calc. (a) R2 = R1 × (VOUT / VADJ - 1) = 803 kΩ
5 V setting
ADJ Capacitor (Note 1)
CADJ
Calc. (b) CADJ = 1 / (2π × R2 × fZERO) = 220 pF
Output Capacitor
COUT
4.7 μF
VIN
13.5 V
CIN
0.1 µF
Input Voltage (Note 2)
Input Capacitor
(Note 3)
Enable Mode Voltage
VENH
2 V to 42V
Disable Mode Voltage
VENL
0 V to 0.8 V
(Note 1) For example, the CADJ’s value is defined at 220 pF based on the calculation (b) of the above table, if it is required to improve frequency characteristics
of regulator at around fZERO ≒ 1 kHz with the component of R2 ≒ 820 kΩ.
(Note 2) Minimum input voltage must be 3.3 V or more. For the output voltage, please consider the voltage dropping (the minimum dropout voltage) according to
the output current.
(Note 3) If the inductance of power supply line is high, please adjust input capacitor value.
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Application and Implementation - continued
Surge Voltage Protection for Linear Regulators
The following shows some helpful tips to protect ICs from possible inputting surge voltage which exceeds absolute
maximum ratings.
Positive Surge to the Input
If there is any potential risk that positive surges higher than absolute maximum ratings, it is applied to the input, a
Zener Diode should be inserted between the VIN pin and the GND to protect the device as shown in Figure 29.
VIN
VIN
D1
VOUT
VOUT
GND
CIN
COUT
Figure 29. Surges Higher than absolute maximum ratings is Applied to the Input
Negative Surge to the Input
If there is any potential risk that negative surges below the absolute maximum ratings, (e.g.) -0.3 V, is applied to the
input, a Schottky barrier diode should be inserted between the VIN and the GND to protect the device as shown in
Figure 30.
VIN
VIN
D1
VOUT
VOUT
GND
CIN
COUT
Figure 30. Surges Lower than -0.3 V is Applied to the Input
A Schottky barrier diode which has a characteristic of low forward voltage (V F) can meet to the requirement for the
external diode to protect the IC from the reverse current. However, it also has a characteristic that the leakage (IR)
caused by the reverse voltage is bigger than other diodes. Therefore, it should be taken into the consideration to
choose it because if IR is large, it may cause increase of the current consumption, or raise of the output voltage in
the light-load current condition. IR characteristic of Schottky diode has positive temperature characteristic, which the
details shall be checked with the datasheet of the products, and the careful confirmation of behavior in the actual
application is mandatory.
Reverse Voltage Protection for Linear Regulators
A linear regulator which is one of the integrated circuit (IC) operates normally in the condition that the input voltage is
higher than the output voltage. However, it is possible to happen the abnormal situation in specific conditions which is
the output voltage becomes higher than the input voltage. A reverse polarity connection between the input and the output
might be occurred or a certain inductor component can also cause a polarity reverse conditions. If the countermeasure
is not implemented, it may cause damage to the IC. The following shows some helpful tips to protect ICs from the reverse
voltage occasion.
Protection against Reverse Input/Output Voltage
In the case that MOSFET is used for the pass transistor, a parasitic body diode between the drain-source generally
exists. If the output voltage becomes higher than the input voltage and if its voltage difference exceeds VF of the body
diode, a reverse current flows from the output to the input through the body diode as shown in Figure 31. The current
flows in the parasitic body diode is not limited in the protection circuit because it is the parasitic element, therefore
too much reverse current may cause damage to degrade or destroy the semiconductor elements of the regulator.
IR
VOUT
VIN
Error
AMP.
VREF
Figure 31. Reverse Current Path in a MOS Linear Regulator
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Application and Implementation – continued
Protection against Reverse Input/Output Voltage – continued
An effective solution for this problem is to implement an external bypass diode in order to prevent the reverse current
flow inside the IC as shown in Figure 32. Note that the bypass diode must be turned on prior to the internal body
diode of the IC. This external bypass diode should be chosen as being lower forward voltage VF than the internal
body diode. It should to be selected a diode which has a rated reverse voltage greater than the IC’s input maximum
voltage and also which has a rated forward current greater than the anticipated reverse current in the actual
application.
D1
VIN
VIN
VOUT
VOUT
GND
CIN
COUT
Figure 32. Bypass Diode for Reverse Current Diversion
Even in the condition when the input/output voltage is inverted, if the VIN pin is open as shown in Figure 33, or if the
VIN pin becomes high-impedance condition as designed in the system, it cannot damage or degrade the parasitic
element. It's because a reverse current via the pass transistor becomes extremely low. In this case, therefore, the
protection external diode is not necessary.
ON→OFF
IBIAS
VIN
VIN
GND
CIN
VOUT
VOUT
COUT
Figure 33. Open VIN
Protection against Input Reverse Voltage
When the input of the IC is connected to the power supply, accidentally if plus and minus are routed in reverse, or if
there is a possibility that the input may become lower than the GND pin, it may cause to destroy the IC because a
large current passes via the internal electrostatic breakdown prevention diode between the input pin and the GND
pin inside the IC as shown in Figure 34.
The simplest solution to avoid this problem is to connect a Schottky barrier diode or a rectifier diode in series to the
power supply line as shown in Figure 35. However, it increases a power loss calculated as VF × ICC, and it also causes
the voltage drop by a forward voltage VF at the supply voltage while normal operation.
Generally, since the Schottky barrier diode has lower VF, so it contributes to rather smaller power loss than rectifier
diodes. If IC has load currents, the required input current to the IC is also bigger. In this case, this external diode
generates heat more, therefore select a diode with enough margin in power dissipation. On the other hand, a reverse
current passes this diode in the reverse connection condition, however, it is negligible because its small amount.
VIN
VIN
VOUT
VOUT
D1
VIN
CIN
GND
COUT
VIN
CIN
VOUT
GND
VOUT
COUT
+
GND
GND
Figure 34. Current Path in Reverse Input Connection
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Figure 35. Protection against Reverse Polarity 1
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Application and Implementation - continued
Protection against Input Reverse Voltage - continued
Figure 36 shows a circuit in which a P-channel MOSFET is connected in series to the power. The body diode (parasitic
element) is located in the drain-source junction area of the MOSFET. The drop voltage in a forward connection is
calculated from the on state resistance of the MOSFET and the output current IO. It is smaller than the drop voltage
by the diode as shown in Figure 35 and results in less of a power loss. No current flows in a reverse connection where
the MOSFET remains off in Figure 36.
If the gate-source voltage exceeds maximum rating of MOSFET gate-source junction with derating curve in
consideration, reduce the gate-source junction voltage by connecting resistor voltage divider as shown in Figure 37.
Q1
VIN
Q1
VIN
VIN
CIN
VOUT
GND
VOUT
VOUT
VIN
R1
R2
COUT
Figure 36. Protection against Reverse Polarity 2
CIN
VOUT
GND
COUT
Figure 37. Protection against Reverse Polarity 3
Protection against Reverse Output Voltage when Output Connect to an Inductor
If the output load is inductive, electrical energy accumulated in the inductive load is released to the ground at the
moment that the output voltage is turned off. IC integrates ESD protection diodes between the IC output and ground
pins. A large current may flow in such condition finally resulting on destruction of the IC. To prevent this situation,
connect a Schottky barrier diode in parallel to the integrated diodes as shown in Figure 38.
Further, if a long wire is in use for the connection between the output pin of the IC and the load, confirm that the
negative voltage is not generated at the VOUT pin when the output voltage is turned off by observation of the
waveform on an oscilloscope, since it is possible that the load becomes inductive. An additional diode is required for
a motor load that is affected by its counter electromotive force, as it produces an electrical current in a similar way.
VIN
VIN
VOUT
VOUT
GND
CIN
COUT
GND
D1
XLL
GND
Figure 38. Current Path in Inductive Load (Output: Off)
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Power Dissipation
TO252-J5
(1) : 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
Board material: FR-4
Board size: 114.3 mm × 76.2 mm × 1.57 mmt
Top copper foil: Footprint and Trace, 70 μm copper.
10.0
Power Dissipation: Pd[W]
8.0
6.0
(2) : 4-layer PCB
(Copper foil area on the reverse side of PCB: 74.2 mm × 74.2 mm)
Board material: FR-4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
Top copper foil: Footprint and Traces, 70 μm copper.
2 inner layers copper foil area of PCB:
74.2 mm × 74.2 mm, 35 μm copper.
Bottom copper foil area of PCB:
74.2 mm × 74.2 mm, 70 μm copper.
(2)5.12 W
4.0
2.0
(1)1.04 W
Condition (1) : θJA = 120.1 °C/W, ΨJT (top center) = 19 °C/W
Condition (2) : θJA = 24.4. °C/W, ΨJT (top center) = 3 °C/W
0.0
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 39. Power Dissipation Graph(TO252-J5)
HRP5
(1) : 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
Board material: FR-4
Board size: 114.3 mm × 76.2 mm × 1.57 mmt
Top copper foil: Footprint and Trace, 70 μm copper.
10.0
Power Dissipation: Pd[W]
8.0
(2) : 4-layer PCB
(Copper foil area on the reverse side of PCB: 74.2 mm × 74.2 mm)
Board material: FR-4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
Top copper foil: Footprint and Traces, 70 μm copper.
2 inner layers copper foil area of PCB:
74.2 mm × 74.2 mm, 35 μm copper.
Bottom copper foil area of PCB:
74.2 mm × 74.2 mm, 70 μm copper.
(2)5.84 W
6.0
4.0
2.0
(1)1.36 W
Condition (1) : θJA = 91.3 °C/W, ΨJT (top center) = 8 °C/W
Condition (2) : θJA = 21.4 °C/W, ΨJT (top center) = 3 °C/W
0.0
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 40. Power Dissipation Graph(HRP5)
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Power Dissipation - continued
TO263-5
(1) : 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
Board material: FR-4
Board size: 114.3 mm × 76.2 mm × 1.57 mmt
Top copper foil: Footprint and Trace, 70 μm copper.
10.0
Power Dissipation: Pd[W]
8.0
(2) : 4-layer PCB
(Copper foil area on the reverse side of PCB: 74.2 mm × 74.2 mm)
Board material: FR-4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
Top copper foil: Footprint and Traces, 70 μm copper.
2 inner layers copper foil area of PCB:
74.2 mm × 74.2 mm, 35 μm copper.
Bottom copper foil area of PCB:
74.2 mm × 74.2 mm, 70 μm copper.
(2)5.73 W
6.0
4.0
(1)1.55 W
2.0
Condition (1) : θJA = 80.2 °C/W, ΨJT (top center) = 10 °C/W
Condition (2) : θJA = 21.8 °C/W, ΨJT (top center) = 2 °C/W
0.0
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 41. Power Dissipation Graph(TO263-5)
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Thermal Design
This product exposes a frame on the back side of the package for thermal efficiency improvement. The power consumption
of the IC is decided by the dropout voltage condition, the load current and the current consumption. Refer to power dissipation
curves illustrated in Figure 39 to 41 when using the IC in an environment of Ta ≥ 25 °C. Even if the ambient temperature Ta
is at 25°C, chip junction temperature (Tj) can be very high depending on the input voltage and the load current. Consider the
design to be Tj ≤ Tjmax = 150 °C in whole operating temperature range.
Should by any condition the maximum junction temperature Tjmax = 150 °C rating be exceeded by the temperature increase
of the chip, it may result in deterioration of the properties of the chip. The thermal impedance in this specification is based on
recommended PCB and measurement condition by JEDEC standard. Therefore, need to be careful because it might be
different from the actual use condition. Verify the application and allow sufficient margins in the thermal design by the following
method to calculate the junction temperature Tj. Tj can be calculated by either of the two following methods.
1. The following method is used to calculate the junction temperature Tj with ambient temperature Ta.
𝑇𝑗 = 𝑇𝑎 + 𝑃𝐶 × 𝜃𝐽𝐴 [°C]
Where:
Tj
Ta
PC
θJA
is the Junction Temperature
is the Ambient Temperature
is the Power Consumption
is the Thermal Resistance (Junction to Ambient)
2. The following method is also used to calculate the junction temperature Tj with top center of case’s (mold) temperature TT.
𝑇𝑗 = 𝑇𝑇 + 𝑃𝐶 × 𝛹𝐽𝑇 [°C]
Where:
Tj
TT
PC
ΨJT
is the Junction Temperature
is the Top Center of Case’s (mold) Temperature
is the Power consumption
is the Thermal Resistance (Junction to Top Center of Case)
3. The following method is used to calculate the power consumption Pc (W).
𝑃𝑐 = (𝑉𝐼𝑁 − 𝑉𝑂𝑈𝑇 ) × 𝐼𝑂𝑈𝑇 + 𝑉𝐼𝑁 × 𝐼𝐶𝐶 [W]
Where:
PC
VIN
VOUT
IOUT
ICC
is the Power Consumption
is the Input Voltage
is the Output Voltage
is the Load Current
is the Current Consumption
Calculation Example (TO263-5)
If VIN = 13.5 V, VOUT = 5.0 V, IOUT = 200 mA, ICC = 17 μA, the power consumption Pc can be calculated as follows:
𝑃𝐶 = (𝑉𝐼𝑁 − 𝑉𝑂𝑈𝑇 ) × 𝐼𝑂𝑈𝑇 + 𝑉𝐼𝑁 × 𝐼𝐶𝐶
= (13.5 𝑉 – 5.0 𝑉) × 200 𝑚𝐴 + 13.5 𝑉 × 17 𝜇𝐴
≂ 1.7 𝑊
At the maximum ambient temperature Tamax = 85 °C,
the thermal impedance (Junction to Ambient) θJA = 21.8 °C/W (4-layer PCB)
𝑇𝑗 = 𝑇𝑎𝑚𝑎𝑥 + 𝑃𝐶 × 𝜃𝐽𝐴
= 85 °𝐶 + 1.7 𝑊 × 21.8 °𝐶/𝑊
≂ 122.1 °𝐶
When operating the IC, the top center of case’s (mold) temperature TT = 100 °C, ΨJT = 10 °C/W (1-layer PCB)
𝑇𝑗 = 𝑇𝑇 + 𝑃𝐶 × 𝛹𝐽𝑇
= 100 °𝐶 + 1.7 𝑊 × 10 °𝐶/𝑊
= 117.0 °𝐶
If it is difficult to ensure the margin by the calculations above, it is recommended to expand the copper foil area of the
board, increasing the layer and thermal via between thermal land pad for optimum thermal performance.
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I/O Equivalence Circuits(Note 1)
VIN Pin
EN Pin
EN
VIN
1 kΩ
800 kΩ
Internal
Circuit
1300 kΩ
2600 kΩ
1300 kΩ
ADJ Pin
VOUT Pin
VIN
10 kΩ
ADJ
4 kΩ
VOUT
PREREG
4 kΩ
10 MΩ
(Note 1) Resistance value is Typical.
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7.
Thermal Consideration
The power dissipation under actual operating conditions should be taken into consideration and a sufficient margin
should be allowed in the thermal design. On the reverse side of the package this product has an exposed heat pad for
improving the heat dissipation. The amount of heat generation depends on the voltage difference between the input
and output, load current, and bias current. Therefore, when actually using the chip, ensure that the generated heat
does not exceed the Pd rating. If Junction temperature is over Tjmax (=150 °C), IC characteristics may be worse due
to rising chip temperature. Heat resistance in specification is measurement under PCB condition and environment
recommended in JEDEC. Ensure that heat resistance in specification is different from actual environment.
8.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
9.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
10. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
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Operational Notes – continued
11. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
GND
GND
N Region
close-by
12. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
13. Thermal Shutdown Protection Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
14. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
15. Enable Pin
The EN pin is for controlling ON/OFF the output voltage. Do not make voltage level of chip enable keep floating level,
or between VENH and VENL. Otherwise, the output voltage would be unstable or indefinite.
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Ordering Information
B
D
8
Parts
Number
0
0
M
5
Output Voltage Output Current
00: Adjustable Capability
5: 500 mA
W
x
Enable Input
W: Includes
Enable
Input
x
x
Package
FPJ: TO252-J5
HFP: HRP5
FP2: TO263-5
-
C x x
Product Rank
C: for Automotive
Packaging and Forming Specification
TR: Embossed Tape and Reel
(HRP5)
E2: Embossed Tape and Reel
(TO252-J5, TO263-5)
Marking Diagrams
TO252-J5 (TOP VIEW)
Part Number Marking
800M5WJ
LOT Number
HRP5 (TOP VIEW)
Part Number Marking
BD800M5W
LOT Number
Pin 1 Mark
TO263-5
(TOP VIEW)
Part Number Marking
BD800M5W
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Physical Dimension and Packing Information
Package Name
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Physical Dimension and Packing Information
Package Name
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Physical Dimension and Packing Information
Package Name
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Revision History
Date
Revision
Changes
29.Mar.2019
001
02.Mar.2020
002
22.Mar.2021
003
New Release
Add TO252-J5 Package.
Add Output Voltage Accuracy ±2.5 %
Add DISCHARGE block in Block Diagram and change OCP and PREREG.
Change Y-axis from ICC to ICC+IEN in Figure 4 and 6.
Change from monochrome to color for Figure 17 to 20.
Change Measurement Circuit for Figure 6.
Change Figure in Typical Application and Layout Example.
Delete Item of Output Capacitor ESR for stability in Typical Application and Layout Example.
Change resistance of VOUT pin from 40 kΩ to 4 kΩ in I/O Equivalence Circuits.
Modified error in processing significant figures of output voltage accuracy. (corrected from
±2.5 % to ±2.6 %)
However, guarantee value of electrical characteristic does not change.
Modified error of thickness tolerance in dimension diagram of TO252-J5 from (-0.08, -0.10)
to (+0.08, -0.10).
Modified error of DEPTH tolerance in dimension diagram of TO263-5 from (+0.1, 0.05) to
(+0.1, -0.05).
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
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