BD8112EFV-M_11

Power Management ICs for Automotive Body Control White Backlight LED Drivers for Medium to Large LCD Panels (Switching Regulator Type) BD8112EFV-M No.11039ECT11 ●Description BD8112EFV-M is a white LED driver with the capability of withstanding high input voltage (36V MAX). This driver has 2ch constant-current drivers integrated in 1-chip, which each channel can draw up to 150mA max, so that high brightness LED driving can be realized. Furthermore, a current-mode buck-boost DC/DC controller is also integrated to achieve stable operation against voltage input and also to remove the constraint of the number of LEDs in series connection. The brightness can be controlled by either PWM or VDAC techniques. ●Features 1) Input voltage range 5.0 -30 V 2) Integrated buck-boost current-mode DC/DC controller 3) Two integrated LED current driver channels (150 mA max. each channel) 4) PWM Light Modulation (Minimum Pulse Width 25µs) 5) Oscillation frequency accuracy ±5% 6) Built-in protection functions (UVLO, OVP, TSD, OCP, SCP) 7) LED abnormal status detection function (OPEN/ SHORT) 8) HTSSOP-B24 package ●Applications Backlight for display audio, small type panels, etc. ●Absolute maximum ratings (Ta=25℃) Parameter Power supply voltage BOOT , OUTH Voltage SW, CS Voltage BOOT-SW Voltage LED output voltage VREG, OVP, OUTL, FAIL1, FAIL2, LEDEN, ISET, VDAC, PWM, SS, COMP, RT, SYNC, EN voltage Power Consumption Operating temperature range Storage temperature range LED maximum output current Junction temperature Symbol VCC VBOOT, VOUTH VSW, VCS VBOOT-SW VLED1,2 VVREG, VOVP, VOUTL, VFAIL1, VFAIL2, VLEDEN, VISET, VVDAC, VPWM, VSS, VCOMP, VRT, VSYNC, VEN Pd Topr Tstg ILED Tjmax Ratings 36 41 36 7 36 -0.3～7 < VCC 1.10 *1 Unit V V V V V V W ℃ ℃ mA ℃ -40～+105 -55～+150 150 *2 *3 150 *1 IC mounted on glass epoxy board measuring 70mm × 70mm × 1.6mm, power dissipated at a rate of 8.8mw/℃ at temperatures above 25℃. *2 Dispersion figures for LED maximum output current and VF are correlated. Please refer to data on separate sheet. *3 Amount of current per channel. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/22 2011.08 - Rev.C BD8112EFV-M ●Operating conditions (Ta=25℃) Parameter Power supply voltage Oscillating frequency range External synchronization frequency range *4 *5 External synchronization pulse duty range *4 *5 Technical Note Symbol VCC FOSC FSYNC FSDUTY Limits 5.0～30 250～600 fosc～600 40～60 Unit V kHz kHz % Connect SYNC to GND or OPEN when not using external frequency synchronization. Do not switch between internal and external synchronization when an external synchronization signal is input to the device. ●Electrical characteristics (Unless otherwise specified, VCC=12V Ta=25℃) Limits Parameter Symbol Min Typ Max. Circuit current Standby current [VREG Block (VREG)] Reference voltage [OUTH Block] OUTH high-side ON resistance OUTH low-side ON resistance Over-current protection operating voltage [OUTL Block] OUTL high-side ON resistance OUTL low –side ON resistance [SW Block] SW low -side ON resistance [Error Amplifie Block] LED voltage COMP sink current COMP source current [Oscillator Block] Oscillating frequency FOSC 285 300 315 VLED ICOMPSINK ICOMPSOURCE 0.9 15 -35 1.0 25 -25 1.1 35 -15 RON_SW 2.0 4.5 9.0 RONLH RONLL 2.0 1.0 4.0 2.5 8.0 5.0 RONHH RONHL VOLIMIT 1.5 1.0 VCC -0.66 3.5 2.5 VCC -0.6 7.0 5.0 VCC -0.54 VREG 4.5 5 5.5 ICC IST 7 4 14 8 Unit mA µA Conditions EN=Hi, SYNC=Hi, RT=OPEN PWM=Low, ISET=OPEN, CIN=10µF EN=Low V IREG=-5mA, CREG=2.2µF Ω Ω V ION=-10mA ION=10mA Ω Ω ION=-10mA ION=10mA Ω ION_SW=10mA V µA µA VLED=2V, Vcomp=1V VLED=0V, Vcomp=1V KHz RT=100kΩ ◎This product is not designed for use in radioactive environments. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/22 2011.08 - Rev.C BD8112EFV-M Technical Note Parameter [OVP Block] Over-voltage detection reference voltage OVP hysteresis width SCP Latch OFF Delay Time [UVLO Block ] UVLO voltage UVLO hysteresis width [LED Output Block] LED current relative dispersion width LED current absolute dispersion width ISET voltage PWM minimum pulse width PWM maximum duty PWM frequency VDAC gain Open detection voltage LED Short detection Voltage LED Short Latch OFF Delay Time PWM Latch OFF Delay Time Symbol Limits Min Typ Max. Unit Conditions VOVP VOHYS TSCP 1.9 0.45 70 2.0 0.55 100 2.1 0.65 130 V V ms VOVP=Sweep up VOVP=Sweep down RT=100kΩ VUVLO VUHYS 4.0 50 4.3 150 4.6 250 V mV VCC : Sweep down VCC : Sweep up △ILED1 △ILED2 VISET Tmin Dmax FPWM GVDAC VOPEN VSHORT TSHORT TPWM -3 -5 1.96 25 0.2 4.2 70 70 2.0 25 0.3 4.5 100 100 +3 +5 2.04 100 20 0.4 4.8 130 130 % % V µs % KHz mA/V V V ms ms ILED=50mA, ΔILED1=(ILED/ILED_AVG-1)×100 ILED=50mA, ΔILED2=(ILED/50mA-1)×100 RISET=120kΩ FPWM=150Hz, ILED=50mA FPWM=150Hz, ILED=50mA Duty=50%, ILED=50mA VDAC=0～2V, RISET=120kΩ ILED=VDAC÷RISET×Gain VLED= Sweep down VOVP= Sweep up RT=100kΩ RT=100kΩ [Logic Inputs (EN, SYNC, PWM, LEDEN)] Input HIGH voltage Input LOW voltage Input current 1 Input current 2 [FAIL Output (open drain) ] FAIL LOW voltage VOL 0.1 0.2 V IOL=0.1mA VINH VINL IIN IEN 2.1 GND 20 15 35 25 5.5 0.8 50 35 V V µA µA VIN=5V (SYNC, PWM, LEDEN) VEN=5V (EN) ◎This product is not designed for use in radioactive environments. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/22 2011.08 - Rev.C BD8112EFV-M ●Electrical characteristic curves (Reference data) 5.5 SWITCHING FREQUENCY:FOSC [kHz] 400 Technical Note (Unless otherwise specified, Ta=25℃) 400 Vcc= 12V 360 SWITCHING FREQUENCY:FOSC [kHz] OUTPUT VOLTAGE:VREG [V] 5.3 Vcc= 12V 360 Vcc= 12V 320 5.1 320 4.9 280 280 4.7 240 240 Fig.3 OSC 温度特性 200 -40 -15 10 35 60 85 TEMPERATURE:Ta [℃] 4.5 -40 -15 10 35 60 85 TEMPERATURE:Ta [℃] 200 -40 -15 10 35 60 85 TEMPERATURE:Ta [℃] Fig.1 VREG temperature characteristic 55 OUTPUTCURRENT :ILED [mA] OUTPUTCURRENT :ILED [mA] Fig.2 OSC temperature characteristic 50 OUTPUTCURRENT :ILED [mA] Fig.3 ILED depend on VLED 5 53 40 4 Vcc= 12V 51 30 3 49 20 2 47 10 1 45 -40 -15 10 35 60 TEMPERATURE:Ta [℃] 85 0 0 0.5 1 1.5 VDAC VOLTAGE:VDAC[V] 2 0 0 0.02 0.04 0.06 0.08 VDAC VOLTAGE:VDAC[V] 0.1 Fig.4 ILED temperature characteristic 100 100 Fig.5 VDAC Gain① Fig.6 VDAC Gain② 85 VCC=12V EFFICIENCY [%] 70 EFFICIENCY [%] 70 OUTPUT CARRENT:Icc [mA] 85 6.0 VCC=30V 55 4.0 55 Vcc=12V 2.0 40 40 25 50 100 150 200 Total_Io [mA] 250 25 50 100 150 200 250 OUTPUT CURRENT [mA] 0.0 0 6 12 18 24 30 36 SUPPLY VOLTAGE:Vcc [V] Fig.7 Efficiency (LED2 Parallel 5 step) 0.66 0.64 0.62 0.60 0.58 VCC=12V 0.56 0.54 -40 -15 10 35 60 TEMPERATURE:Ta [℃] 85 10 Fig.8 Efficiency (LED2 Parallel 7 step) 10 OUTPUTCURRENT :ILED [mA] Fig.9 Circuit Current (Switching OFF) OUTPUT VOLTAGE:Vcc-Vcs [V] OUTPUT VOLTAGE:VREG [V] 8 8 6 6 4 4 2 2 0 0 1 2 3 4 EN VOLTAGE:VEN [V] 5 0 0 1 2 3 4 PWM VOLTAGE:VEN [V] 5 Fig.10 Overcurrent detecting voltage temperature characteristic Fig.11 EN threshold voltage Fig.12 PWM threshold voltage www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/22 2011.08 - Rev.C BD8112EFV-M ●Block diagram and pin configuration Technical Note Vin CIN VCC VREG UVLO VREG Timer Latch COUT OVP OVP OCP ＋ － TSD CS FAIL1 BOOT EN PWM Control Logic DRV － OUTH SW CTL SYNC RT CRT RT OSC PWM SLOPE ＋ VREG DGND OUTL ERR AMP COMP － － GND RPC Ccomp CPC OCP OVP SS CSS ＋ LED1 SS LED2 PWM Current driver VDAC ISET Open Short Detect Open Det PGND ISET RISET Timer Latch Short Det FAIL2 LEDEN Fig.13 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/22 2011.08 - Rev.C BD8112EFV-M ●Pin layout BD8112EFV-M(HTSSOP-B24) COMP SS VCC EN RT SYNC GND PWM FAIL1 FAIL2 LEDEN LED1 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VREG BOOT CS OUTH SW DGND OUTL PGND ISET VDAC OVP LED2 Technical Note Fig.14 ●Pin function table Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol COMP SS VCC EN RT SYNC GND PWM FAIL1 FAIL2 LEDEN LED1 LED2 OVP VDAC ISET PGND OUTL DGND SW OUTH CS BOOT VREG Error amplifier output Soft start time-setting capacitance input Input power supply Enable input Oscillation frequency-setting resistance input External synchronization signal input Small-signal GND PWM light modulation input Failure signal output LED open/short detection signal output LED output enable pin LED output 1 LED output 2 Over-voltage detection input DC variable light modulation input LED output current-setting resistance input LED output GND Low-side external MOSFET Gate Drive out put Low-side internal MOSFET Source out put High-side external MOSFET Source pin High-side external MOSFET Gate Drive out pin DC/DC Current Sense Pin High-side MOSFET Power Supply pin Internal reference voltage output Function www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/22 2011.08 - Rev.C BD8112EFV-M Technical Note ●5V voltage reference (VREG) 5V (Typ.) is generated from the VCC input voltage when the enable pin is set high. This voltage is used to power internal circuitry, as well as the voltage source for device pins that need to be fixed to a logical HIGH. UVLO protection is integrated into the VREG pin. The voltage regulation circuitry operates uninterrupted for output voltages higher than 4.45 V (Typ.), but if output voltage drops to 4.3 V (Typ.) or lower, UVLO engages and turns the IC off. Connect a capacitor (Creg = 2.2µF Typ.) to the VREG terminal for phase compensation. Operation may become unstable if Creg is not connected. ●Constant-current LED drivers If less than four constant-current drivers are used, unused channels should be switched off via the LEDEN pin configuration. The truth table for these pins is shown below. If a driver output is enabled but not used (i.e. left open), the IC’s open circuit-detection circuitry will operate. Please keep the unused pins open. The LEDEN terminals are pulled down internally in the IC, so if left open, the IC will recognize them as logic LO. However, they should be connected directly to VREG or fixed to a logic HI when in use. LED 1 ON ON 2 ON OFF LED EN L H ・Output current setting LED current is computed via the following equation: ILED = min[VDAC , VISET(=2.0V)] / RSET x GAIN [A] (min[VDAC , 2.0V] = the smaller value of either VDAC or VISET; GAIN = set by internal circuitry.) In applications where an external signal is used for output current control, a control voltage in the range of 0.0 to 2.0 V can be connected on the VDAC pin to control according to the above equation. If an external control signal is not used, connect the VDAC pin to VREG (do not leave the pin open as this may cause the IC to malfunction). Also, do not switch individual channels on or off via the LEDEN pin while operating in PWM mode. The following diagram illustrates the relation between ILED and GAIN. ILED vs GAIN 3150 3100 3050 3000 2950 2900 2850 0 20 40 60 80 100 120 140 160 GAIN ILED[mA] In PWM intensity control mode, the ON/OFF state of each current driver is controlled directly by the input signal on the PWM pin; thus, the duty ratio of the input signal on the PWM pin equals the duty ratio of the LED current. When not controlling intensity via PWM, fix the PWM terminal to a high voltage (100%). Output light intensity is greatest at 100% input. PWM PWM ILED(50mA/div) ILED PWM=150Hz Duty=0. PWM=150Hz Duty=50% www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/22 2011.08 - Rev.C BD8112EFV-M Technical Note ●Buck-Boost DC/DC controller ・Number of LEDs in series connection Output voltage of the DCDC converter is controlled such that the forward voltage over each of the LEDs on the output is set to 1.0V (Typ.). DCDC operation is performed only when the LED output is operating. When two or more LED outputs are operating simultaneously, the LED voltage output is held at 1.0V (Typ.) per LED over the column of LEDs with the highest VF value. The voltages of other LED outputs are increased only in relation to the fluctuation of voltage over this column. Consideration should be given to the change in power dissipation due to variations in VF of the LEDs. Please determine the allowable maximum VF variance of the total LEDs in series by using the description as shown below: VF variation allowable voltage 3.7V (Typ.) = short detecting voltage 4.5V (Typ.)－LED control voltage 1.0V (Typ.) The number of LEDs that can be connected in series is limited due to the open-circuit protection circuit, which engages at 85% of the set OVP voltage. Therefore, the maximum output voltage of the under normal operation becomes 30.6 V (= 36 V x 0.85, where (30.6 V – 1.0 V) / VF > N [maximum number of LEDs in series]). ・Over-voltage protection circuit (OVP) The output of the DCDC converter should be connected to the OVP pin via a voltage divider. In determining an appropriate trigger voltage of for OVP function, consider the total number of LEDs in series and the maximum variation in VF. Also, bear in mind that over-current protection (OCP) is triggered at 0.85 x OVP trigger voltage. If the OVP function engages, it will not release unless the DCDC voltage drops to 72.5% of the OVP trigger voltage. For example, if ROVP1 (output voltage side), ROVP2 (GND side), and DCDC voltages VOUT are conditions for OVP, then: VOUT ≥ (ROVP1 + ROVP2) / ROVP2 x 2.0 V. OVP will engage when VOUT ≧ 32 V if ROVP1 = 330 kΩ and ROVP2 = 22 kΩ. ・Buck-boost DC/DC converter oscillation frequency (FOSC) The regulator’s internal triangular wave oscillation frequency can be set via a resistor connected to the RT pin (pin 5). This resistor determines the charge/discharge current to the internal capacitor, thereby changing the oscillating frequency. Refer to the following theoretical formula when setting RT: fosc = 30 × 106 RT [Ω] x α [kHz] 6 30 x 10 (V/A/S) is a constant (±5%) determined by the internal circuitry, and α is a correction factor that varies in relation to RT: { RT: α = 50kΩ: 0.94, 60kΩ: 0.985, 70kΩ: 0.99, 80kΩ: 0.994, 90kΩ: 0.996, 100kΩ: 1.0, 150kΩ: 1.01, 200kΩ: 1.02, 300kΩ: 1.03, 400kΩ: 1.04, 500kΩ: 1.045} A resistor in the range of 47kΩ～523kΩ is recommended. Settings that deviate from the frequency range shown below may cause switching to stop, and proper operation cannot be guaranteed. 600k 500k 400k 300k 200k 100k k 0 100 200 300 400 RT[kΩ] 500 600 700 800 Frequency [kHz] Fig.15 RT versus switching frequency ・External DC/DC converter oscillating frequency synchronization (FSYNC) Do not switch from external to internal oscillation of the DC/DC converter if an external synchronization signal is present on the SYNC pin. When the signal on the SYNC terminal is switched from high to low, a delay of about 30 µs (typ.) occurs before the internal oscillation circuitry starts to operate (only the rising edge of the input clock signal on the SYNC terminal is recognized). Moreover, if external input frequency is less than the internal oscillation frequency, the internal oscillator will engage after the above-mentioned 30 µs (typ.) delay; thus, does not input a synchronization signal with a frequency less than the internal oscillation frequency. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/22 2011.08 - Rev.C BD8112EFV-M Technical Note ・Soft Start Function The soft-start (SS) limits the current and slows the rise-time of the output voltage during the start-up, and hence leads to prevention of the overshoot of the output voltage and the inrush current. ・Self-diagnostic functions The operating status of the built-in protection circuitry is propagated to FAIL1 and FAIL2 pins (open-drain outputs). FAIL1 becomes low when UVLO, TSD, OVP, or SCP protection is engaged, whereas FAIL2 becomes low when open or short LED is detected. FAIL1 OPEN SHORT MASK FAIL2 UVLO TSD OVP OCP S R Q SCP Counter S R Q EN=Low UVLO/TSD EN=Low UVLO/TSD ・Operation of the Protection Circuitry ・Under-Voltage Lock Out (UVLO) The UVLO shuts down all the circuits other than REG when VREG ≦ 4.3V (TYP). ・Thermal Shut Down (TSD) The TSD shuts down all the circuits other than REG when the Tj reaches 175℃ (TYP), and releases when the Tj becomes below 150℃ (TYP). ・Over Current Protection (OCP) The OCP detects the current through the power-FET by monitoring the voltage of the high-side resistor, and activates when the CS voltage becomes less than VCC-0.6V (TYP). When the OCP is activated, the external capacitor of the SS pin becomes discharged and the switching operation of the DCDC turns off. ・Over Voltage Protection (OVP) The output voltage of the DCDC is detected with the OVP-pin voltage, and the protection activates when the OVP-pin voltage becomes greater than 2.0V (TYP). When the OVP is activated, the external capacitor of the SS pin becomes discharged and the switching operation of the DCDC turns off. ・Short Circuit Protection (SCP) When the LED-pin voltage becomes less than 0.3V (TYP), the internal counter starts operating and latches off the circuit approximately after 100ms (when FOSC = 300 kHz). If the LED-pin voltage becomes over 0.3V before 100ms, then the counter resets. When the LED anode (i.e. DCDC output voltage) is shorted to ground, then the LED current becomes off and the LED-pin voltage becomes low. Furthermore, the LED current also becomes off when the LED cathode is shorted to ground. Hence in summary, the SCP works with both cases of the LED anode and the cathode being shorted. ・LED Open Detection When the LED-pin voltage  0.3V (TYP) as well as OVP-pin voltage  1.7V (TYP) simultaneously, the device detects as LED open and latches off that particular channel. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/22 2011.08 - Rev.C BD8112EFV-M Technical Note ・LED Short Detection When the LED-pin voltage  4.5V (TYP) as well as OVP-pin voltage  1.6V (TYP) simultaneously the internal counter starts operating, and approximately after 100ms (when FOSC = 300 kHz) the only detected channel (as LED short) latches off. With the PWM brightness control, the detecting operation is processed only when PWM-pin = High. If the condition of the detection operation is released before 100ms (when FOSC = 300 kHz), then the internal counter resets. * The counter frequency is the DCDC switching frequency determined by the RT. The latch proceeds at the count of 32770. Protection UVLO TSD OVP OCP SCP LED open LED short Detecting Condition [Detect] VREG175℃ VOVP>2.0V VCS≦VCC-0.6V VLED4.45V Tj4.5V & VOVP4.5V and VOVP IL_MAX When investigating the margin, it is worth noting that the L value may vary by approximately ±30%. 3. The selection of the L In order to achieve stable operation of the current-mode DC/DC converter, we recommend selecting the L value in the range indicated below: 0.05 [V/µs] < Vout×Rcs < 0.3 [V/µs] L The smaller Vout×Rcs L allows stability improvement but slows down the response time. 4. Selection of coil L, diode D1 and D2, MOSFET M1 and M2, and Rcs Current rating Coil L Diode D1 Diode D2 MOSFET M1 MOSFET M2 Rcs * * Voltage rating ― > VIN_MAX > Vout > VIN_MAX > Vout ― Heat loss > IL_MAX > Iocp > Iocp > Iocp > Iocp ― > Iocp2 × Rcs Allow some margin, such as the tolerance of the external components, when selecting. In order to achieve fast switching, choose the MOSFETs with the smaller gate-capacitance. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/22 2011.08 - Rev.C BD8112EFV-M 5. Selection of the output capacitor Select the output capacitor Cout based on the requirement of the ripple voltage Vpp. Vpp = Iout × Cout Vout × Vout+VIN 1 Fosc + IL_MIN × RESR Technical Note Choose Cout that allows the Vpp to settle within the requirement. Allow some margin also, such as the tolerance of the external components. 6. Selection of the input capacitor A capacitor at the input is also required as the peak current flows between the input and the output in DC/DC conversion. We recommend an input capacitor greater than 10µF with the ESR smaller than 100m. The input capacitor outside of our recommendation may cause large ripple voltage at the input and hence lead to malfunction. 7. Phase Compensation Guidelines In general, the negative feedback loop is stable when the following condition is met: ・Overall gain of 1 (0dB) with a phase lag of less than 150º (i.e. a phase margin of 30º or more) However, as the DC/DC converter constantly samples the switching frequency, the gain-bandwidth (GBW) product of the entire series should be set to 1/10 the switching frequency of the system. Therefore, the overall stability characteristics of the application are as follows: ・Overall gain of 1 (0dB) with a phase lag of less than 150º (i.e. a phase margin of 30º or more) ・GBW (frequency at gain 0dB) of 1/10 the switching frequency Thus, to improve response within the GBW product limits, the switching frequency must be increased. The key for achieving stability is to place fz near to the GBW. Vout Phase-lead fz = 1 [Hz] 2πCpcRpc [Hz] LED FB A COMP Rpc Cpc 1 Phase-lag fp1 = 2πRLCout Good stability would be obtained when the fz is set between 1kHz～10kHz. In buck-boost applications, Right-Hand-Plane (RHP) Zero exists. This Zero has no gain but a pole characteristic in terms of phase. As this Zero would cause instability when it is in the control loop, so it is necessary to bring this zero before the GBW. fRHP= Vout+VIN/(Vout+VIN) 2πILOADL [Hz] ILOAD: Maximum Load Current It is important to keep in mind that these are very loose guidelines, and adjustments may have to be made to ensure stability in the actual circuitry. It is also important to note that stability characteristics can change greatly depending on factors such as substrate layout and load conditions. Therefore, when designing for mass-production, stability should be thoroughly investigated and confirmed in the actual physical design. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/22 2011.08 - Rev.C BD8112EFV-M 8. Setting of the over-voltage protection We recommend setting the over-voltage protection Vovp 1.2V to 1.5V greater than Vout which is adjusted by the number of LEDs in series connection. Less than 1.2V may cause unexpected detection of the LED open and short during the PWM brightness control. For the Vovp greater than 1.5V, the LED short detection may become invalid. 9. Setting of the soft-start The soft-start allows minimization of the coil current as well as the overshoot of the output voltage at the start-up. Vo Technical Note － ＋ ROVP2 2.0V/1.45V OVP － ＋ 1.7V/1.6V ROVP1 For the capacitance we recommend in the range of 0.001  0.1µF. For the capacitance less than 0.001µF may cause overshoot of the output voltage. For the capacitance greater than 0.1µF may cause massive reverse current through the parasitic elements of the IC and damage the whole device. In case it is necessary to use the capacitance greater than 0.1µF, ensure to have a reverse current protection diode at the Vcc or a bypass diode placed between the SS-pin and the Vcc. Soft-start time TSS TSS = CSSX0.7V / 5µA [s] CSS: The capacitance at the SS-pin 10.Verification of the operation by taking measurements The overall characteristic may change by load current, input voltage, output voltage, inductance, load capacitance, switching frequency, and the PCB layout. We strongly recommend verifying your design by taking the actual measurements. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/22 2011.08 - Rev.C BD8112EFV-M ●Power Dissipation Calculation Power dissipation can be calculated as follows: Pc(N) = ICC*VCC + 2*Ciss*VREG*Fsw*Vcc+[VLED*N+△Vf*(N-1)]*ILED ICC VCC Ciss Vsw Fsw VLED N ΔVf ILED Maximum circuit current Supply power voltage External FET capacitance SW gate voltage SW frequency LED control voltage LED parallel numeral LED Vf fluctuation LED output current Technical Note Sample Calculation: Pc(2) = 10mA × 30V + 500pF × 5V × 300kHz × 30V + [1.0V × 2 + △Vf × 1] × 100mA When △Vf = 3.0V, Pc (2) = 0.82W 2.0 Power Dissipation Power Dissipation Pd [W] 1.5 1.1W 1.0 0.5 0 25 50 75 100 105 125 150 Ambient Temperature Ta[℃] Note 1: Power dissipation calculated when mounted on 70mm X 70mm X 1.6mm glass epoxy substrate (1-layer platform/copper thickness 18µm) Note 2: Power dissipation changes with the copper foil density of the board. This value represents only observed values, not guaranteed values. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/22 2011.08 - Rev.C BD8112EFV-M Technical Note VCC VCC CPC2 CIN1 CIN2 CPC1 RPC1 CCS RCS1 RCS2 RCS3 VREG 1. COMP CSS 24. VREG 23. BOOT 22. CS 21. OUTH 20. SW 19. DGND 18. OUTL FIN. FIN FIN. FIN CISET G M1 S 2. SS 3. VCC EN SW1 RCS 5 D CBT CREG 4. EN 5. RT VOUT L1 D G M2 S COUT1 COUT2 D2 SYNC CRT RRT CIN3 6. SYNC 7. GND FIN. FIN D1 ROVP2 ROVP1 VREG PWM RFL2 RFL1 FAIL1 FAIL2 VREG SW2 8. PWM 9. FAIL1 10. FAIL2 11. LEDEN 12. LED1 17. PGND 16. ISET RISET RDAC VREG VDAC 15. VDAC 14. OVP 13. LED2 LED2 LED1 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 17/22 2011.08 - Rev.C BD8112EFV-M ●How to select parts of application serial No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 component name CIN1 CIN2 CIN3 CPC1 CPC2 RPC1 CSS RRT CRT RFL1 RFL2 CCS RCS1 RCS2 RCS3 RCS5 CREG CBT M1 M2 D1 D2 L1 COUT1 COUT2 ROVP1 ROVP2 RISET CISET RDAC component value 10µF － － 0.1µF － 510Ω 0.1µF 100kΩ － 100kΩ 100kΩ － 620mΩ 620mΩ － 0Ω 2.2µF 0.1µF － － － － 33µH 10µF 10µF 30kΩ 360kΩ 120kΩ － 0Ω GRM188B31A225KE33 GRM188B31H104KA92 RSH070N05 RSH070N05 RB050L-40 RF201L2S CDRH105R330 GRM31CB31E106KA75B GRM31CB31E106KA75B MCR03 Series MCR03 Series MCR03 Series MCR100JZHFLR620 MCR100JZHFLR620 MCR03 Series MCR03 Series GRM188B31H104KA92 MCR03 Series product name GRM31CB31E106KA75B Technical Note Manufacturer murata murata murata Rohm Rohm Rohm Rohm Rohm murata murata Rohm Rohm Rohm Rohm Sumida murata murata Rohm Rohm Rohm When performing open/short tests of the external components, the open condition of D1 or D2 may cause permanent damage to the driver and/or the external components. In order to prevent this, we recommend having parallel connections for D1 and D2. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 18/22 2011.08 - Rev.C BD8112EFV-M ●Input/output Equivalent Circuits (terminal name follows pin number) 1. COMP VREG VREG Technical Note 2. SS 4. EN Vcc VREG Vcc 2K COMP 2K 1K EN SS 10k 175k 135k 5. RT 6. SYNC, 8. PWM 3.3V 10K 167 RT 150K 9. FAIL1, 10. FAIL2 VREG FAIL1 1K SYNC PWM FAIL2 11. LEDEN 3.3V Vcc 12. LED1, 13. LED2 14. OVP Vcc 5K 10K 150K 10K LEDEN 2.5K LED1,2 10k OVP 15. VDAC 16. ISET 18. OUTL VREG Vcc VREG Vcc VREG VREG 500 VDAC 500 12.5 ISET OUTL 100K *All values typical. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 19/22 2011.08 - Rev.C BD8112EFV-M Technical Note 20. SW Vcc 21. OUTH BOOT BOOT 22. CS Vcc 5K SW 100K SW SW SW OUTH CS 23. BOOT 24. VREG VREG Vcc VREG BOOT 205K 100K SW VREG *All values typical. ●Notes for use 1. Absolute maximum ratings We are careful enough for quality control about this IC. So, there is no problem under normal operation, excluding that it exceeds the absolute maximum ratings. However, this IC might be destroyed when the absolute maximum ratings, such as impressed voltages or the operating temperature range (Topr) is exceeded, and whether the destruction is short circuit mode or open circuit mode cannot be specified. Please take into consideration the physical countermeasures for safety, such as fusing, if a particular mode that exceeds the absolute maximum rating is assumed. 2. Reverse polarity connection Connecting the power line to the IC in reverse polarity (from that recommended) will damage the part. Please utilize the direction protection device as a diode in the supply line. 3. Power supply line Due to return of regenerative current by reverse electromotive force, using electrolytic and ceramic suppress filter capacitors (0.1µF) close to the IC power input terminals (Vcc and GND) are recommended. Please note the electrolytic capacitor value decreases at lower temperatures and examine to dispense physical measures for safety. And, for ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. Therefore, give special consideration to power coupling capacitance, width of power wiring, GND wiring, and routing of wiring. Please make the power supply lines (where large current flow) wide enough to reduce the resistance of the power supply patterns, because the resistance of power supply pattern might influence the usual operation. 4. GND line The ground line is where the lowest potential and transient voltages are connected to the IC. 5. Thermal design Do not exceed the power dissipation (Pd) of the package specification rating under actual operation, and please design enough temperature margins. 6. Short circuit mode between terminals and wrong mounting Do not mount the IC in the wrong direction and be careful about the reverse-connection of the power connector. Moreover, this IC might be destroyed when the dust short the terminals between them or power supply, GND. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 20/22 2011.08 - Rev.C BD8112EFV-M 7. Radiation Strong electromagnetic radiation can cause operation failures. 8. ASO(Area of Safety Operation.) Do not exceed the maximum ASO and the absolute maximum ratings of the output driver. Technical Note 9. TSD(Thermal shut-down) The TSD is activated when the junction temperature (Tj) reaches 175℃(with 25℃ hysteresis), and the output terminal is switched to Hi-z. The TSD circuit aims to intercept IC from high temperature. The guarantee and protection of IC are not purpose. Therefore, please do not use this IC after TSD circuit operates, nor use it for assumption that operates the TSD circuit. 10. Inspection by the set circuit board The stress might hang to IC by connecting the capacitor to the terminal with low impedance. Then, please discharge electricity in each and all process. Moreover, in the inspection process, please turn off the power before mounting the IC, and turn on after mounting the IC. In addition, please take into consideration the countermeasures for electrostatic damage, such as giving the earth in assembly process, transportation or preservation. 11. IC terminal input + This IC is a monolithic IC, and has P isolation and P substrate for the element separation. Therefore, a parasitic PN junction is firmed in this P-layer and N-layer of each element. For instance, the resistor or the transistor is connected to the terminal as shown in the figure below. When the GND voltage potential is greater than the voltage potential at Terminals A or B, the PN junction operates as a parasitic diode. In addition, the parasitic NPN transistor is formed in said parasitic diode and the N layer of surrounding elements close to said parasitic diode. These parasitic elements are formed in the IC because of the voltage relation. The parasitic element operating causes the wrong operation and destruction. Therefore, please be careful so as not to operate the parasitic elements by impressing to input terminals lower voltage than GND (P substrate). Please do not apply the voltage to the input terminal when the power-supply voltage is not impressed. Moreover, please impress each input terminal lower than the power-supply voltage or equal to the specified range in the guaranteed voltage when the power-supply voltage is impressing. Resistor Terminal-A Terminal-A Terminal-B C B E B Parasitic element C E P + Transistor(NPN) Terminal-B P + P P + P P + P-Substrate Parasitic element Parasitic element P-Substrate Surrounding elements Parasitic element GND GND GND GND Simplified structure of IC 12. Earth wiring pattern Use separate ground lines for control signals and high current power driver outputs. Because these high current outputs that flows to the wire impedance changes the GND voltage for control signal. Therefore, each ground terminal of IC must be connected at the one point on the set circuit board. As for GND of external parts, it is similar to the above-mentioned. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 21/22 2011.08 - Rev.C BD8112EFV-M ●Ordering part number Technical Note B Part No. D 8 Part No. 1 1 2 E F V -M E 2 Package EFV: HTSSOP-B24 Packaging and forming specification E2: Embossed tape and reel HTSSOP-B24 7.8±0.1 (MAX 8.15 include BURR) (5.0) 24 13 +6° 4° −4° 0.53±0.15 Tape Quantity 1.0±0.2 Embossed carrier tape (with dry pack) 2000pcs E2 The direction is the 1pin of product is at the upper left when you hold 7.6±0.2 5.6±0.1 Direction of feed (3.4) ( reel on the left hand and you pull out the tape on the right hand ) 1 12 0.325 0.85±0.05 1PIN MARK S +0.05 0.17 -0.03 1.0MAX 0.08±0.05 0.65 +0.05 0.24 -0.04 0.08 S 0.08 M 1pin Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 22/22 2011.08 - Rev.C Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. R1120A