Datasheet
4-Channel Buck-Boost
White LED Driver
for up to 32 LEDs
Under development
BD81A34MUV-M
●General Description
BD81A34MUV-M is a white LED driver with the capability
of withstanding high input voltage (40V Max).
This driver has 4ch constant-current drivers integrated in
1-chip, which each channel can draw up to 120mA Max,
so that high brightness LED driving can be realized.
Furthermore, a current-mode buck-boost DC/DC controller
is also integrated to achieve stable operation against
unstable car-battery voltage input and also to remove the
constraint of the number of LEDs in series connection.
The brightness can be controlled by PWM techniques.
●Key Specifications
■ Power supply voltage
■ LED output current accuracy
■ Oscillation frequency
■ Operating temperature range
■ PWM Minimum pulse width
■ LED Maximum output current
●Packages
W
× L × H
5.0 ㎜×5.0 ㎜×1.0 ㎜
VQFN28SV5050
●Features
■ Integrated buck-boost current-mode DC/DC controller
■ Four integrated LED current driver channels
(120 mA Max. each channel)
■ PWM Light Modulation
■ DCDC external synchronization
■ Built-in protection functions (UVLO, OVP, TSD, OCP,
SCP)
■ Abnormal status detection function (OPEN/ SHORT)
■ Integrated VOUT discharge function
4.5 to 35 [V]
±3.0 % @50mA
200 to 2200 kHz
-40 to 125 ℃
1usec
120mA/ch
VQFN28SV5050
●Applications
For display audio, Small and medium-sized Type
LCD panel
●Typical Application Circuits
CIN
(GND)
VDISC
VREG
Vin
COUT
OVP
(GND)
FB
(GND)
(DGND)
VCC
CS
(DGND) (DGND)
EN
FAIL1
BOOT
OUTH
SW
SYNC
(DGND)
RT
OUTL
RRT
DGND
(GND)
BD81A34MUV-M
(DGND)
(DGND)
COMP
RPC
LED1
CPC
(GND)
SS
LED2
CSS
LED3
(GND)
LED4
PWM
PGND
ISET
(PGND)
RISET
(GND)
FAIL2
Fig.1 Buck Boost application circuit
GND
(GND)
LEDEN1 LEDEN2
○Product structure：Silicon monolithic integrated circuit
○This product is not designed protection against radioactive rays.
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Datasheet
BD81A34MUV-M
●Pin Configuration
●Pin Description
VQFN28SV5050 (Top view)
28
LEDEN1
27
26
25
24
23
VQFN28
SV5050
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
22
1
21
COMP
2
20
SS
3
19
VCC
4
18
CS
5
17
EN
6
16
7
15
LEDEN2
LED1
LED2
LED3
VREG
LED4
BOOT
OVP
8
9
10
11
12
13
14
Fig.2 Pin configuration
Symbol
Function
LED output enable input 1
LED output enable input 2
LED output 1
LED output 2
LED output 3
LED output 4
Over voltage detection input
FB voltage detection input
LED output GND
Low-side MOSFET Gate output
DCDC output GND
VOUT discharge signal
High-side external MOSFET Source pin
High-side external MOSFET Gate output
High-side external MOSFET power supply pin
Internal reference voltage output
Enable input
DC/DC current sence pin
Input power supply
Soft start time-setting capacitance input
Error amplifier output
Oscillation frequency-setting resistance input
External synchronization signal input
LED output current-setting resistance input
Small-signal GND
PWM light modulation input
Failure signal output
Failure signal output
LEDEN1
LEDEN2
LED1
LED2
LED3
LED4
OVP
FB
PGND
OUTL
DGND
VDISC
SW
OUTH
BOOT
VREG
EN
CS
Vcc
SS
COMP
RT
SYNC
ISET
GND
PWM
FAIL1
FAIL2
●Block Diagram
VREG
VDISC
UVLO
OVP
TSD
OVP
FB
FB
VCC
VREG
OCP
＋
－
CS
Timer
PWM
Latch
FAIL1
EN
BOOT
Control Logic
DRV
OUTH
CTL
SW
SLOPE
SYNC
－
PWM
＋
OSC
VREG
RT
OUTL
ERR AMP
－
－
－
－
－
＋
COMP
DGND
OCP OVP
LED1
SS
SS
LED2
LED3
Current driver
PWM
LED4
PGND
ISET
Open Short Detect
ISET
Open Det
Timer
Latch
Short Det
FAIL2
GND
LEDEN1 LEDEN2
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Fig.3 Internal block circuit
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Datasheet
BD81A34MUV-M
● Absolute Maximum ratings (Ta=25℃)
Parameter
Power supply voltage
BOOT ,OUTH Voltage
SW,CS,OUTL Voltage
BOOT-SW Voltage
LED output, VDISC voltage
VREG, OVP, FAIL1, FAIL2,
LEDEN1, LEDEN2
ISET, PWM, SS, COMP, RT,
SYNC, EN, OUTL Voltage
Power Consumption
Operating temperature range
Storage temperature range
LED Maximum output current
Junction temperature
Symbol
Vcc
VBOOT, VOUTH
VSW, VCS
VBOOT-SW
VLED1,2,3,4, VVDISC
VVREG, VOVP, VFAIL1, VFAIL2,
VLEDEN1, VLEDEN2, VISET, VPWM,
VSS, VCOMP, VRT, VSYNC, VEN,
VFB,VOUTL
Pd
Topr
Tstg
ILED
TjMax
Rating
40
45
40
7
40
Unit
V
V
V
V
V
-0.3～7 < Vcc
V
1
1.45 ※
-40～+125
-55～+150
2 3
120 ※ ※
150
※1
IC mounted on glass epoxy board measuring 70mm×70mm×1.6mm, power dissipated at a rate of 11.6mw/℃ at temperatures above 25℃.
※2
Dispersion figures for LED Maximum output current and VF are correlated. Please refer to data on separate sheet.
W
℃
℃
mA
℃
※3 Amount of current per channel.
● Operating conditions (Ta=25℃)
Parameter
Power supply voltage
Oscillating frequency range
External synchronization frequency range
External synchronization pulse duty range
※4 ※5
Symbol
Vcc
FOSC
FSYNC
FSDUTY
Limits
4.5～35
200～2200
fosc～2200
40～60
Unit
V
kHz
kHz
%
※4 Connect SYNC to GND or OPEN when not using external frequency synchronization.
※5 Do not switch between internal and external synchronization when an external synchronization signal is input to the device.
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Datasheet
BD81A34MUV-M
●Electrical Characteristics (unless otherwise specified, Vcc=12V Ta=25℃)
Target value
Parameter
Symbol
Min
Typ
Max.
Conditions
Unit
Circuit current
ICC
-
-
10
mA
Standby current
[VREG Block (VREG)]
Reference voltage
[OUTH Block]
OUTH high-side ON resistance
OUTH low-side ON resistance
IST
-
-
10
A
EN=High, SYNC=High,
RT=OPEN, PWM=Low,
ISET=OPEN, CIN=10 F
EN=Low
VREG
4.5
5
5.5
V
IREG=-5mA, CREG=2.2 F
RONHH
RONHL
Over-current protection operating voltage
VOLIMIT
1.5
1.0
Vcc0.66
3.5
2.5
Vcc
-0.6
7.0
5.0
Vcc
-0.54
RONLH
RONLL
1.5
1.0
5.0
2.5
10.0
5.0
ION=-10mA
ION=10mA
RON_SW
5.0
10.0
15.0
ION_SW=10mA
VLED
ICOMPSINK
ICOMP
SOURCE
0.9
20
1.0
80
1.1
160
V
A
VLED=2V, VCOMP=1V
-160
-80
-20
A
VLED=0V, VCOMP=1V
FOSC1
FOSC2
285
1800
300
2000
315
2200
kHz
kHz
RT=27k
RT=3.9k
VOVP
VOHYS
TSCP
1.9
0.45
70
2.0
0.55
100
2.1
0.65
130
V
V
ms
VOVP=Sweep up
VOVP=Sweep down
RT=27k
VFB
VFBHYS
0.9
0.33
1.0
0.43
1.1
0.53
V
V
VUVLO
VUHYS
3.2
250
3.5
500
3.8
750
V
mV
[OUTL Block]
OUTL high-side ON resistance
OUTL low-side ON resistance
[SW Block]
SW low -side ON resistance
[Error Amplifie Block]
LED voltage
COMP sink current
COMP source current
[Oscillator Block]
Oscillating frequency
Oscillating frequency
[OVP Block]
Over-voltage detection reference voltage
OVP hysteresis width
SCP Latch OFF Delay Time
[FB Block]
FB detection reference voltage
FB hysteresis width
[UVLO Block ]
UVLO voltage
UVLO hysteresis width
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ION=-10mA
ION=10mA
V
VFB=Sweep up
VFB=Sweep down
Vcc : Sweep down
Vcc :Sweep up,VREG>3.5V
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Datasheet
BD81A34MUV-M
[LED Output Block]
ILED=50mA,
∆ILED1=(ILED/ILED_AVG-1)
×100
ILED=50mA,
∆ILED2=(ILED/50mA-1)×100
RISET=100k
FPWM=150Hz, ILED=100mA
FPWM=150Hz, ILED=50mA
Duty=2%, ILED=50mA
VLED= Sweep down
VLED= Sweep up
RT=27k
RT=27k
LED current relative dispersion
△ILED1
-3
-
+3
%
LED current absolute dispersion
△ILED2
-3
-
+3
%
0.9
1
0.2
4.2
70
70
1.0
0.3
4.5
100
100
1.1
100
20
0.4
4.8
130
130
V
s
%
kHz
V
V
ms
ms
2.1
GND
-
5.5
0.8
V
V
IIN
25
50
100
A
VIN=5V(EN,SYNC,PWM,
LEDEN1, LEDEN2)
VOL
-
0.1
0.2
V
IOL=0.1ｍA
ISET voltage
VISET
PWM Minimum pulse width
TMin
PWM Maximum duty
DMax
PWM frequency
FPWM
Open detection voltage
VOPEN
LED Short detection Voltage
VSHORT
LED Short Latch OFF Delay Time
TSHORT
PWM Latch OFF Delay Time
TPWM
[Logic Inputs (EN, SYNC, PWM, LEDEN1, LEDEN2)]
Input High voltage
VINH
Input Low voltage
VINL
Input current
[FAIL Output (open drain) ]
FAIL Low voltage
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Datasheet
BD81A34MUV-M
● Reference data (unless otherwise specified, Ta=25℃)
5.5
Vcc=SWEEP
EN=4V
PWM=0V
Ta=25℃
6
Vcc=12V, 35V
Output Voltage ： VREG[V]
Output Current ： ICC [mA]
8
4
2
0
5.0
4.5
Vcc=4.5V
4.0
3.5
0
10
20
30
Supply Voltage ：VCC[V]
40
-60
20
60
100
Tempurature ： Ta[℃]
140
Fig.5 VREG temperature characteristic
Fig.4 Circuit Current
(Switching OFF)
3000
400
Vcc=12V
EN=4V
RT=27kΩ
350
Swiching frequency ： fosc[KHz]
Swiching frequency ： fosc[KHz]
-20
300
250
200
Vcc=12V
EN=4V
RT=3.9kΩ
2500
2000
1500
1000
-60
-20
20
60
100
Temperature ： Ta[℃]
140
-60
-20
20
60
100
140
Temperature ： Ta[℃]
Fig.7 OSC temperature characteristic
(@ 2000 kHz)
Fig.6 OSC temperature characteristic
(@ 300 kHz)
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Datasheet
BD81A34MUV-M
52
Output Current ： ILED[mA]
52
Output Current ： ILED[mA]
51
50
Vcc=12V,EN=4V
VLED=SWEEP
Ta=25℃
49
Vcc=12V
EN=4V
VLED＝2V
PWM＝VREG
51
50
49
48
48
0
1
2
3
4
Supply Voltage ： VLED[V]
5
-60
100
95
95
90
90
Vcc=12V
EN=4V
PWM=VREG
Ta=25℃
LED4 4ch mode
75
70
65
EFFICIENCY [%]
EFFICIENCY [%]
100
80
20
60
100
Temperature ： Ta[℃]
140
Fig.9 ILED temperature characteristic
Fig.8 VLED vs ILED
85
-20
85
Vcc=12V
EN=4V
PWM=VREG
Ta=25℃
LED7 4ch mode
80
75
70
65
60
60
80
130
180
230
Output current ： ILED[mA]
80
Fig.10 Efficiency (Buck-boost application)
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130
180
230
Output current ： ILED[mA]
Fig.11 Efficiency (Boost application)
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BD81A34MUV-M
● Description of Blocks
1. Voltage reference (VREG)
5V (Typ.) is generated from the Vcc input voltage when the enable pin is set HI. This voltage is used to power internal
circuitry, as well as the voltage source for device pins that need to be fixed to a logical HI.
UVLO protection is integrated into the VREG pin. The voltage regulation circuitry operates uninterrupted for VREG
voltages Vcc>4.0V (Typ.) and VREG>3.5V(Typ.), but if output voltage drops to Vcc 32 V if ROVP1 = 22 k
and ROVP2 = 330 k .
(3) Buck-boost DC/DC converter oscillation frequency (Fosc)
RRT vs Fosc
Fosc [kHz]
10000
1000
100
1
10
RRT[kΩ]
100
Fig.15 RRT VS Fosc
The regulator’s internal triangular wave oscillation frequency can be set via a resistor connected to the RT pin (pin 4). This
resistor deterMines the charge/discharge current to the internal capacitor, thereby changing the oscillating frequency.
Refer to the above graph and following expression when setting RT.
5
Fosc[kHz] = ( 81×10 / RRT [k ] ) x α
5
81×10 is constant value in IC (+-5%) and α is adjustment factor.
(RT :α = 43k : 1.01, 27k : 1.00 , 18k : 0.99, 10 k : 0.98, 4.7k : 0.97, 3.9k : 0.96 )
A resistor in the range of 3 k ～33 k is recommended. Settings that deviate from the frequency range shown below may
cause switching to stop, and proper operation cannot be guaranteed.
(4) External DC/DC converter oscillating frequency synchronization (FSYNC)
Do not switch from external to internal oscillation of the DC/DC converter if an external synchronization signal is present on
the SYNC pin. When the signal on the SYNC terminal is switched from high to low, a delay of about 30 µS (Typ.) occurs
before the internal oscillation circuitry starts to operate (only the rising edge of the input clock signal on the SYNC terminal
is recognized). Moreover, if external input frequency is less than the internal oscillation frequency, the internal oscillator
will engage after the above-mentioned 30 µS (Typ.) delay; thus, do not input a synchronization signal with a frequency less
than the internal oscillation frequency.
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Datasheet
BD81A34MUV-M
(5)Soft Start Function
The soft-start (SS) limits the current and slows the rise-time of the output voltage during the start-up, and hence leads to
prevention of the overshoot of the output voltage and the inrush current. If you don’t use soft-start function, please set SS
terminal open. About SS time calculation, please refer P.15.
4. LED Short Detection
Table2 Detecting condition and operation after detect about each protection
Detecting Condition
Protection
Operation after detect
[Detect]
[Release]
UVLO
Vcc3.5V
TSD
Tj>175℃
Tj2.0V
VOVPVcc-0.6V
SS discharged
EN or UVLO
Counter starts and then latches off all
blocks (but except VREG)
EN or UVLO
The only detected channel latches off
EN or UVLO
The only detected channel latches off
(after the counter sets)
SCP
LED open
LED short
VLED IL_Max
> Iocp
―
> VIN_Max
Diode D2
MOSFET M1
> Iocp
> Iocp
> Vout
> VIN_Max
MOSFET M2
Rcs
> Iocp
―
> Vout
―
※
Allow some margin, such as the tolerance of the external components, when selecting.
※
In order to achieve fast switching, choose the MOSFETs with the smaller gate-capacitance.
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Heat loss
2
> Iocp × Rcs
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Datasheet
BD81A34MUV-M
5.
Selection of the output capacitor
Select the output capacitor Cout based on the requirement of the ripple voltage Vpp.
Vpp[V] =
6.
7.
Iout[A]
Cout[F]
Vout[V]
×
×
Vout[V]+VIN[V]
1
+ ∆IL[A] × RESR[Ω]
Fosc[Hz]
Choose Cout that allows the Vpp to settle within the requirement. Allow some margin also, such as the tolerance of the
external components.
Selection of the input capacitor
A capacitor at the input is also required as the peak current flows between the input and the output in DC/DC conversion.
We recommend an input capacitor greater than 10µF with the ESR smaller than 100mΩ. The input capacitor outside of our
recommendation may cause large ripple voltage at the input and hence lead to malfunction.
Phase Compensation Guidelines
Vout
LED
FB
A
COMP
Rpc
Cpc
Fig.20 COMP part application circuit diagram
In general, the negative feedback loop is stable when the following condition is met
• Overall gain of 1 (0dB) with a phase lag of less than 150º (i.e., a phase margin of 30º or more)
• The switching frequency more than unity gain frequency (frequency at gain 0dB) of 1/10.
※
RL is the load impedance. ( RL = VOUT / IOUT )
The key for achieving stability is to place fz near to the unity gain frequency.
1
[Hz]
2πCpc[F]Rpc[Ω]
Phase-lead
fz[Hz] =
Phase-lag
fp1[Hz] =
1
2πRLCout
[Hz]
Good stability would be obtained when the fz is set between 1kHz～10kHz.
In buck-boost applications, Right-Hand-Plane (RHP) Zero exists. This Zero has zero characteristic for gain and pole
characteristic in terms of phase. As this Zero would cause instability when it is in the control loop, so it is necessary to keep
RHP frequency more than GBW frequency.
Vout[V]×{VIN[V]/(Vout[V]+VIN[V])}
fRHP[Hz]=
2πILOAD[A]L [H]
2
ILOAD: MAXIMUM LOAD CURRENT
It is important to keep in Mind that these are very loose guidelines, and adjustments may have to be made to ensure
stability in the actual circuitry. It is also important to note that stability characteristics can change greatly depending on
factors such as substrate layout and load conditions. Therefore, when designing for mass-production, stability should be
thoroughly investigated and confirmed in the actual physical design.
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Datasheet
BD81A34MUV-M
8.
Setting of the over-voltage protection
Vout
Internal IC
－
＋
ROVP2
OVP
2.0V/1.45V
－
＋
ROVP1
1.7V/1.6V
Fig.21 OVP part application circuit diagram
* We recommend setting the over-voltage protection Vovp
1.2V to 1.5V greater than Vout which is adjusted by the
number of LEDs in series connection. Less than 1.2V may
cause unexpected detection of the LED open and short during
the PWM brightness control. For the Vovp greater than 1.5V,
the LED short detection may become invalid.
9.
Setting of Pre-Boost (FB)
Vout
Internal IC
RFB2
FB
－
＋
RFB1
1.0V/0.57V
Fig.22 FB part application circuit diagram
DC/DC is FB terminal detects below 1.0V
During FB terminal is below 1.0V that means the detection that output voltage has not boosted to setting voltage.
DC/DC is switching without regarding PWM for fast start-up of DC/DC during FB is below 1.0V. This condition is called “Pre-boost”.
Therefore the voltage of divided resistance at minimum condition ( LED VF minimum) should be over VFB(1.1V max) for operating
normal switching DC/DC (not Pre-boost).
RFB1、RFB2 resistances are set as follows
Vout (Min.)×(RFB1/(RFB1+RFB2)) > VFB(Max.) ･･･(2)
Vout：DCDC output Voltage、 VFB：FB detection voltage
For example1) In case of 8 strings LEDs Vf=3.2V±0.3VLED
Vout (Min.) = 0.9V (LED regulated min Voltage) + (3.2V – 0.3V) × 8 = 24.1V
FB detection voltage for Pre-boost : VFB (Max.) = 1.1V
When deciding RFB1=20kΩ → getting RFB2 < 418.2kΩ referring to (2)
The detection of pre-Boost voltage is 21.9V (typ)
For example2) In case of 4 strings LEDs Vf=3.2V±0.3VLED
Vout (Min.) = 0.9V (LED regulated min Voltage) + (3.2V – 0.3V) × 4 = 12.5V
FB detection voltage for Pre-boost : VFB (Max.) = 1.1V
When deciding RFB1=20kΩ → getting RFB2 < 207.3kΩ referring to (2)
The detection of pre-Boost voltage is 11.4V (typ)
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Datasheet
BD81A34MUV-M
10.
Setting of the soft-start
The soft-start allows Minimization of the coil current as well as the overshoot of the output voltage at the start-up.
For the capacitance we recommend in the range of 0.001 to 0.1uF. For the capacitance less than 0.001uF may cause
overshoot of the output voltage. For the capacitance greater than 0.1uF may cause massive reverse current through the
parasitic elements of the IC and damage the whole device. In case it is necessary to use the capacitance greater than
0.1uF, ensure to have a reverse current protection diode at the Vcc or a bypass diode placed between the SS-pin and the
Vcc.
Soft-start time (The time of EN input and PWM input to DCDC switching start)
TSS[sec] = CSS[F]X0.7[V] / 5[uA]
TSS (Typ.)
CSS: The capacitance at the SS-pin
There is the possibility of SCP error detection hang on CSS setting and Oscillating frequency setting.
Please check the following condition.
Trise[sec] = CSS[F] X V1[V] / Iss[A]
Trise : DCDC start up time, V1 : IC constant voltage(Max 2.5V), Iss : SS source current(Min 2.0uA)
Tscp[sec] = 32770 X (1/Fosc)[Hz]
Tscp : SCP Latch OFF Delay Time, Fosc : Oscillating frequency
SCP error detection avoid condition : Trise < Tscp
11. Verification of the operation by taking measurements
The overall characteristic may change by load current, input voltage, output voltage, inductance, load capacitance,
switching frequency, and the PCB layout. We strongly recommend verifying your design by taking the actual
measurements.
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Datasheet
BD81A34MUV-M
●Recommended operating range
The following data is recommended operating range of BD81A14EFV-M (Vcc vs Vout). Please use above the border line.
The following data is reference data in Rohm evaluation board. So please check the behavior of practice board
and use this IC.
Boost
Fosc=300kHz
ILEDtotal=360ｍA
Boost
Fosc=300kHz
ILEDtotal=200ｍA
Recommended
operating range
Recommended
operating range
Fig.23 Boost operating range (1)
Boost
Fosc=2200kHz
ILEDtotal=360ｍA
Fig.24 Boost operating range (2)
Boost
Fosc=2200kHz
ILEDtotal=200ｍA
Recommended
operating range
Recommended
operating range
Fig.25 Boost operating range (3)
Buckboost
Fosc=300kHz
ILEDtotal=360ｍA
Recommended
operating range
Fig.26 Boost operating range (4)
Buckboost
Fosc=300kHz
ILEDtotal=200ｍA
Fig.27 Buckboost operating range (1)
Recommended
operating range
Fig.28 Buckboost operating range (2)
VCC [V]
Buckboost
Fosc=2200kHz
ILEDtotal=360ｍA
Recommended
operating range
Buckboost
Fosc=2200kHz
ILEDtotal=200ｍA
35
Recommended
operating range
13
4.5
12
Fig.29 Buckboost operating range (3)
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VOUT [V]
Fig.30 Buckboost operating range (4)
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Datasheet
BD81A34MUV-M
●PCB application circuit diagram
T.B.D
Fig.31 PCB application circuit diagram
•
•
•
•
•
•
•
The RRT resister should be mounted as close as possible to the RT pin.
The coupling capacitors CVcc and CREG should be mounted as close as possible to the IC’s pins.
Large currents may pass through DGND and PGND, so each should have its own low-impedance routing to the
system ground.
Noise should be Minimized as much as possible on pins PWM, ISET, RT and COMP.
PWM, OUTH, OUTL, SW, SYNC and LED1-4 carry switching signals, so ensure during layout that surrounding traces
are not affected by crosstalk.
VQFN28SV505 package has heat dissipation PAD behind it. The dissipation PAD needs to be connected to PCB with
solder.
Capacitance of LED1～LED4 terminals should be reduced to eliminate flickering at starting DC/DC without PWM.
If the flickering occurs despite reduce capacitance, start-up sequence should be changed as follows to avoid
flickering.
1. Input SYNC = High
2. Input EN =High and PWM after SYNC is high.
3. Input SYNC = Low →DC/DC starts-up when SYNC becoming High to Low.
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Datasheet
BD81A34MUV-M
● Application Board Diagram
When using it as Step-up DCDC converter
Fig.32 Step-up application circuit diagram
When using it as Step-down DCDC converter
Fig.33 Step-down application circuit diagram
Note：When VOUT and the LED terminal are shorted to GND, the overcurrent from VIN cannot be obstructed when
using it as stated above as the Step-up DCDC converter. Therefore, please do measures of the insertion of the fuse
between Vcc and RCS etc.
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Datasheet
BD81A34MUV-M
●PCB board external part list
serial No.
component name
component value
1
CIN1
10 F
product name
Manufacturer
GRM31CB31E106KA75B
murata
2
CIN2
－
－
－
3
CPC1
0.1 F
GRM188B31H104KA92
murata
4
CPC2
－
5
RPC1
510
6
CSS
7
RRT
27k
8
RFL1
9
RFL2
－
－
MCR03 Series
Rohm
GRM188B31H103KA92
murata
MCR03 Series
Rohm
100k
MCR03 Series
Rohm
100k
MCR03 Series
Rohm
0.01 F
10
CCS
－
－
11
RCS1
620m
MCR100 Series
Rohm
12
RCS2
620m
MCR100 Series
Rohm
13
RCS3
0
－
－
14
CREG
2.2 F
GRM188B31A225KE33
murata
15
CPC3
0.1 F
GRM188B31H104KA92
murata
16
M1
－
RSH070N05
Rohm
17
M2
－
RSH070N05
Rohm
18
D1
－
RB050L-40
Rohm
19
D2
－
RF201L2S
Rohm
20
L1
33 H
SLF10145T-330M1R6-H
TDK
－
21
L2
-
－
－
22
COUT1
10 F
GRM31CB31E106KA75B
murata
23
COUT2
10 F
GRM31CB31E106KA75B
murata
24
COUT3
-
－
－
25
ROVP1
30k
MCR03 Series
Rohm
26
ROVP2
360k
MCR03 Series
Rohm
27
RISET
100k
MCR03 Series
Rohm
28
RG1
0
－
－
29
RG2
0
－
－
30
LED1
0
－
Rohm
31
LED2
0
－
Rohm
32
JP1
0
－
－
33
JP2
－
－
－
34
JP3
0
－
－
35
JP4
－
－
－
36
JP5
－
－
37
RFB1
30k
MCR03 Series
Rohm
38
RFB2
360k
MCR03 Series
Rohm
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Datasheet
BD81A34MUV-M
● Power Dissipation Calculation
Pc
= Icc×Vcc
＋ Ciss1×VREG×Fsw×VREG
＋ Ciss2×VREG×Fsw×VREG
＋ { VLED×M + △Vf×(M-1) }×ILED
IL_AVG =
IFET=
Iout =
Vout =
・・・①Power of circuit
・・・②Boost FET drive power
・・・③Buck FET drive power
・・・④Power of current driver
(Vcc+Vout)/Vcc×Iout/n
IL_AVG×Vout/(Vcc+Vout)
ILED×1.03×M
(Vf +∆Vf)×N ＋ VLED
Pc[w] : power consumption
Ciss1[F] : Boost FET gate capacitance
Fsw[Hz] : Switching frequency
N : LED number
△Vf[V] : LED Vf difference
・・・⑤Inductance average current
・・・⑥Current that flows to Boost FET
・・・⑦LED output current
・・・⑧DCDC output voltage
Icc[A] : Current of the Maximum circuit
Ciss2[F] : Buck FET gate capacitance
VLED[V] : LED control voltage
M : Parallel number of LED
n : Efficiency
Vcc[V] : power-supply voltage
REG[V] : VREG voltage
LED[A] : LED output current
f[V] : LED forward voltage
＜Calculation example＞
When assuMing Icc=10 ｍ A, Vcc=12V, Ciss1=65pF, Ciss2=2000pF, VREG=5V, Fsw=2200kHz, VLED=1V,
ILED=50mA, N=7steps, M=4 row, Vf=3.5V, ∆Vf=0.5V, n=80%
Vout =
(3.5V+0.5V)×7 steps＋1V = 29V
Iout =
50mA×1.03×4 row = 0.206A
IL_AVG= (12+29V)/12V×0.206A/0.8 = 0.88A
IFET=
0.88A×29V/ (12V+29V)=0.622A
Pc (4) = 10mA×12V + 65pF×5V×2200kHz×5V + 2000pF×5V×2200kHz×5V +
｛1.0V×4+0.5V×(4-1)｝×50mA = 0.509[W]
● Power Dissipation of packaging
6.0
(1)θja=27.4℃/W (4 layer board, and area of cupper foil is 100%)
5.5
(2)θja=38.3℃/W (4 layer board, and area of cupper foil is 0.37%)
Power dissipation Pd [W]
5.0
(1) 4.56W
(3)θja=142℃/W (1 layer board, and area of cupper foil is 0.37%)
4.5
4.0
(2) 3.26W
3.5
3.0
2.5
2.0
1.5
(3) 0.88W
1.0
0.5
0.0
0
25
50
75
100
125
150
Temp Ta [℃]
Fig.34 VQFN28SV5050 Power dissipation
Note 1: Power dissipation calculated when mounted on 70mm X 70mm X 1.6mm glass epoxy substrate (1-layer platform/copper thickness 18 m)
Note 2: Power dissipation changes with the copper foil density of the board. This value represents only observed values, not guaranteed values.
● VQFN28SV5050
Pd=0.88W (0.176W)： Board copper foil area 20.2ｍ㎡
Pd=3.26W (0.652W)： Board copper foil area 5505ｍ㎡
Pd=4.56W (0.912W)： Board copper foil area 5505ｍ㎡
(Value within parentheses represents power dissipation when Ta=125°C)
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Datasheet
BD81A34MUV-M
● Input/output Equivalent Circuits (terminal name follows pin number)
※All values Typical.
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Datasheet
BD81A34MUV-M
● Operating Notes
1) Absolute Maximum ratings
Use of the IC in excess of absolute Maximum ratings (such as the input voltage or operating temperature range) may result in
damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode) when such
damage is suffered. If operational values are expected to exceed the Maximum ratings for the device, consider adding
protective circuitry (such as fuses) to eliMinate the risk of damaging the IC.
2) Reverse connection of power supply connector
IC might be destroyed because of reverse connection of power supply connector. Please take some measures to put a diode
between external power supply and IC power supply terminal as a protection against destroy due to reverse connection.
3) Power supply line
Due to current return generated by back electromotive force of external coil, it is recommended to put a capacitor between
power supply and GND as a channel of regenerative current. When deciding capacitor value, please be careful that
electrolytic capacitor value decreases at lower temperatures.
Moreover, rush current might flow momentarily by the order of turning on power supply and delay in IC with two or more
power supplies. Please pay attention to capacity of power supply coupling, width and drawing of power supply and GND
pattern wiring. Please make power supply lines, where large current flows, wide enough to reduce resistance of power supply
patterns since resistance of power supply pattern might influence usual operation.
4) GND potential
Ensure that the GND pin is held at the Minimum potential in all operating conditions.
5) Thermal Design
Use a thermal design that allows for a sufficient margin for power dissipation (Pd) under actual operating conditions.
6) Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by poor
soldering or foreign objects may result in damage to the IC.
7) Operation in strong electromagnetic fields
Exercise caution when using the IC in the presence of strong electromagnetic fields as doing so may cause the IC to
malfunction.
8) ASO (Area of Safety Operation)
When using this IC, do not exceed the absolute Maximum ratings and ASO of output Tr.
9) Thermal shutdown circuit (TSD)
This IC also incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the
specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power
dissipation limits, the rise in the chip's junction temperature Tj will trigger the TSD circuit, shutting off all output power
elements. The circuit automatically resets itself once the junction temperature Tj drops down to normal operating temperatures.
The TSD protection will only engage when the IC's absolute Maximum ratings have been exceeded; therefore, application
designs should never attempt to purposely make use of the TSD function.
10) Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to
stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off
completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent damage from
static discharge, ground the IC during assembly and use similar precautions during transport and storage.
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Datasheet
BD81A34MUV-M
11) IC input pins and parasitic elements
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes
and/or transistors. For example (refer to the figure below):
Transistor (NPN)
Resistance
Pin A
Pin B
C
E
Pin A
N
N
P
P
+
Parasitic Element
N
P
+
GND
P
+
N
P
Substrate
Pin B
B
B
B
N
P
R
Parasitic Element
Parasitic Elements
P
+
GND
N
P
substr
GND
C
E
Parasitic Elements
GND
Other Adjacent Elements
Fig.35 Example of IC Structure
•
When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
•
When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
12) Ground wiring patterns
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused by
large currents. Also ensure that the GND traces of external components do not cause variations on GND voltage.
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a
reference to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority
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Datasheet
BD81A34MUV-M
●Ordering Information
B
D
8
1
A
3
4
M
U
V
-
Package
MUV:VQFN28SV5050
ME2
Packaging
M: high reliability
E2: Embossed carrier tape
●Physical Dimension Tape and Reel Information
VQFN28SV5050
VQFN028V5050
5.0±0.1
5.0±0.1
Tape
Direction
of feed
1.0MAX
1PIN MARK
2.7±0.1
C0.2
1
7
2500pcs
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
(0.22)
0.02 +0.03
-0.02
S
0.08 S
8
2.7±0.1
28
0.4±0.1
Embossed carrier tape
Quantity
22
14
21
1.0 0.5
15
+0.05
0.25 -0.04
1pin
Reel
(Unit : mm)
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
●Marking Diagram
VQFN28SV5050(TOP VIEW)
Part Number Marking
BD81A34MUV
LOT Number
1PIN MARK
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Datasheet
BD81A34MUV-M
●Revision History
Date
Revision
13 Feb. 2013
001
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