BD8312HFN-TR

Single-chip Type with Built-in FET Switching Regulator Series Output 1.5A or Less High-efficiency Step-down Switching Regulator with Built-in Power MOSFET BD8312HFN No.10027ECT04  Description BD8312HFN produces step-down output including 1.2, 1.8, 3.3, or 5 V from 4 batteries, batteries such as Li2cell or Li3cell, etc. or a 5V/12V fixed power supply line. This IC allows easy production of small power supply by a wide range of external constants, and is equipped with an external coil/capacitor downsized by high frequency operation of 1.5 MHz, built-in synchronous rectification SW capable of withstanding 15 V, and flexible phase compensation system on board. Features 1) Incorporates Pch/Nch synchronous rectification SW capable of withstanding 1.0 A/15V. 2) Incorporates phase compensation device between input and output of Error AMP. 3) Small coils and capacitors to be used by high frequency operation of 1.5MHz 4) Input voltage 3.5 V – 14 V Output current 1.2A(7.4V input, 3.3V output) 0.8A(4.5V input, 3.3V output) 5) Incorporates soft-start function. 6) Incorporates timer latch system short protecting function. 7) As small as 2.9mm×3 mm, SON 8-pin package HSON8 Application For portable equipment like DSC/DVC powered by 4 dry batteries or Li2cell and Li3cell, or general consumer-equipment with 5 V/12 V lines Operating Conditions (Ta = 25℃) Parameter Power supply voltage Output voltage Symbol VCC VOUT Voltage circuit 3.5 to 14 1.2 to 12 Unit V V Absolute Maximum Ratings Parameter Maximum applied power voltage Maximum input current Power dissipation Operating temperature range Storage temperature range Junction temperature Symbol VCC, PVCC Iinmax Pd Topr Tstg Tjmax Rating 15 1.0 630 －25 to +85 －55 to +150 +150 Unit V A mW ℃ ℃ ℃ *1 When used at Ta = 25℃ or more installed on a 70×70×1.6tmm board, the rating is reduced by 5.04mW/℃. * These specifications are subject to change without advance notice for modifications and other reasons. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/14 2010.06- Rev.C BD8312HFN Electrical Characteristics （Unless otherwise specified, Ta = 25 ℃, VCC = 7.4 V） Parameter Symbol Target Value Min 100 1.38 4.65 0.99 -50 3.2 -1 2.5 -0.3 250 ISTB1 ISTB2 Typ 2.9 200 1.5 5.0 1.00 0 5.3 450 300 0 400 600 30 Max 3.2 300 1.62 5.35 1.01 50 7.4 (※)100 600 420 1 11 0.3 700 1 1 900 50 Unit Technical Note Conditions [Low voltage input malfunction preventing circuit] Detection threshold voltage Hysteresis range [Oscillator] Oscillation frequency [Regulator] Output voltage [Error AMP] INV threshold voltage Input bias current Soft-start time [PWM comparator] LX Max Duty [Output] PMOS ON resistance NMOS ON resistance Leak current [STB] STB pin control voltage [Circuit current] Standby current VCC pin PVCC pin VUV ΔVUVhy Fosc VREG VINV IINV Tss Dmax RONP RONN Ileak V mV MHz V V nA msec % mΩ mΩ uA V V kΩ uA uA uA uA VREG monitor VCC=12.0V , VINV=6.0V Operation No-operation VSTBH VSTBL STB pin pull-down resistance Circuit current at operation VCC Circuit current at operation PVCC VINV=1.2V VINV=1.2V (※1)100% is MAX Duty as behavior of a PWM conparetor. Using in region where High side PMOS is 100% on state as application circuit causes detection of SCP then DC/DC converter stops.  Not designed to be resistant to radiation www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/14 2010.06- Rev.C BD8312HFN Description of Pins Pin No. GND VCC VREG PGND INV STB PVCC Lx 1 2 3 4 5 6 Fig.1 Terminal layout 7 8 Pin Name GND VCC VREG PGND Lx PVCC STB INV Technical Note Function Ground terminal Control part power input terminal 5 V output terminal of regulator for internal circuit Power transistor ground terminal Coil connecting terminal DC/DC converter input terminal ON/OFF terminal Error AMP input terminal Block Diagram ON/OFF STB VREG VCC PVCC STBY_IO DC/DC converter 100% High Duty STOP 5V REG Reference VREF UVLO OSC 1.0MHz SCP OSC×4000 ｃount PRE DRIVER 450mΩ PWM CONTROL Step down TIMMING CONTROL LX VREG + + - PRE DRIVER ERROR_AMP Soft Start OSC×8000 ｃount 300mΩ GND VREF PGND INV Fig.2 Block diagram www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/14 2010.06- Rev.C BD8312HFN Description of Blocks 1. Reference This block produces ERROR AMP standard voltage. The standard voltage is 1.0 V. Technical Note 2. 5 V Reg 5 V low saturation regulator for internal analog circuit BD8312HFN is equipped with this regulator for the purpose of protecting the internal circuit from high voltage. Therefore, this output is reduced when VCC is less than 5 V, then PMOS ON resistance increases and Power efficiency and Maximum output current of DC/DC converter decreases in this region. Please see attached data (fig14,15,16,17) about increasing of PMOS ON resistance in this region. 3 UVLO Circuit for preventing low voltage malfunction Prevents malfunction of the internal circuit at activation of the power supply voltage or at low power supply voltage. Monitors VCC pin voltage to turn off all output FET and DC/DC converter output when VCC voltage is lower than 2.9 V, and reset the timer latch of the internal SCP circuit and soft-start circuit. This threshold contains 200 mV hysteresis. 4 SCP Timer latch system short-circuit protection circuit When DC/DC converter is 100% High Duty , the internal SCP circuit starts counting. The internal counter is in synch with OSC, the latch circuit is activated about 2.7 msec after the counter counts about 4000 oscillations to turn off DC/DC converter output. To reset the latch circuit, turn off the STB pin once. Then, turn it on again or turn on the power supply voltage again. 5 OSC Circuit for oscillating sawtooth waves with an operation frequency fixed at 1.5 MHz 6 ERROR AMP Error amplifier for detecting output signals and output PWM control signals The internal standard voltage is set at 1.0 V. A primary phase compensation device of 200 pF, 62 kΩ is built in-between the inverting input terminal and the output terminal of this ERROR AMP. 7 PWM COMP Voltage-pulse width converter for controlling output voltage corresponding to input voltage Comparing the internal SLOPE waveform with the ERROR AMP output voltage, PWM COMP controls the pulse width to the output to the driver. 8 SOFT START Circuit for preventing in-rush current at startup by bringing the output voltage of the DC/DC converter into a soft-start Soft-start time is in synch with the internal OSC, and the output voltage of the DC/DC converter reaches the set voltage after about 8000 oscillations. 9 PRE DRIVER/TIMING CONTROL CMOS inverter circuit for driving the built-in synchronous rectification SW The synchronous rectification OFF time for preventing feedthrough is about 25 nsec. 10 STBY_IO Voltage applied on STB pin (7 pin) to control ON/OFF of IC Turned ON when a voltage of 2.5 V or higher is applied and turned OFF when the terminal is open or 0 V is applied. Incorporates approximately 400 kΩ pull-down resistance. 11 Pch/Nch FET SW Built-in synchronous rectification SW for switching the coil current of the DC/DC converter Incorporates a 450 mΩ PchFET SW capable of withstanding 15 V.and 300 mΩ SW capable of withstanding 15 V. Since the current rating of this FET is 1.0A, it should be used within 1.0A including the DC current and ripple current of the coil. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/14 2010.06- Rev.C BD8312HFN Reference data （Unless otherwise specified, Ta = 25℃, VCC = 7.4 V） 1.02 1.02 Technical Note 5.3 5.2 1.01 1.01 VREG VOLTAGE [V] INV THRESHOLD [V] INV THRESHOLD [V] 5.1 1.00 1.00 5.0 4.9 0.99 0.99 4.8 0.98 -40 -20 0 20 40 60 80 100 120 TEMPERATURE [℃] 0.98 0 2 4 6 8 10 12 14 4.7 -40 0 40 80 120 VCC [V] TEMPERATURE [℃] Fig.3. INV threshold temperature property Fig.4. INV threshold power supply property 1.7 Fig.5. VREG output temperature property 8 7 6 5 4 3 2 1 0 0 2 4 6 8 10 12 14 1.7 1.6 1.6 1.5 1.4 1.3 FREQUENCY [ MHz ] FREQUENCY [MHz] VREG[V] 1.5 1.4 1.3 -40 0 40 80 120 3 6 9 12 15 VCC [V] TEMPERATURE [℃] VCC [V] Fig.6. VREG output power supply property 500 Fig.7. fosc temperature property 600 Fig.8. fosc voltage property 3.50 Hysteresis width UVLO release voltage 0.25 ID=500mA 500 ID=500mA Hysteresis VoltageVhys [V] ヒステリシス電圧 Vhys[V] 3.30 0.20 400 ON RESISTANCE [ mΩ ] 3.10 0.15 300 2.90 0.10 UVLO detection voltage 2.70 0.05 200 ON RESISTANCE [ mΩ] 400 300 200 100 2.50 -40 0 40 80 0.00 120 100 -40 0 40 80 120 0 3 6 9 12 15 TEMPARATURE [℃] VCC [V] Environmental temperature Ta [°C] 環境温度 Ta [℃] Fig.9. UVLO threshold temperature property Fig.10. Nch FET ON resistance temperature property Fig.11. Nch FET ON resistance power supply property www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/14 2010.06- Rev.C BD8312HFN Technical Note 800 1000 3.0 ID=500mA 800 ID=500mA SWOUT ON Resistance [Ω ] 2.5 Ta=85℃ Ta=25℃ SWOUT ON Resistance [Ω ] PMOS ON Resistance (Ω) 600 2.0 600 400 1.5 400 1.0 Ta=-25℃ 200 200 0.5 0 -40 0 40 80 120 0 3 6 9 12 15 0.0 0.0 1.0 2.0 TEMPARATURE [℃] VCC [V] Io [A] Fig.12. Pch FET ON resistance temperature property Fig.13. Pch FET ON resistance power supply property Fig.14.PchFET ON resistance Io property [VCC=3.5V] 3.0 3.0 3.0 2.5 2.5 2.5 PMOS ON Resistance (Ω) PMOS ON Resistance (Ω) PMOS ON Resistance (Ω) 2.0 Ta=85℃ Ta=25℃ 2.0 2.0 Ta=85℃ 1.5 Ta=25℃ Ta=85℃ 1.5 Ta=25℃ 1.5 1.0 1.0 1.0 Ta=-25℃ 0.5 0.5 Ta=-25℃ 0.5 Ta=-25℃ 0.0 0.0 1.0 2.0 0.0 0.0 1.0 2.0 0.0 0.0 1.0 2.0 Io [A] Io [A] Io [A] Fig.15.PchFET ON resistance Io property [VCC=4.0V] Fig.16.PchFET ON resistance Io property [VCC=4.5V] Fig.17.PchFET ON resistance Io property [VCC=5.0V] 2.5 1000 1000 800 800 STB Voltage [V] 2.0 ON ICC [uA] 600 600 ICC [uA] 400 400 1.5 OFF 1.0 -50 0 50 100 150 200 200 0 -40 0 40 80 120 0 0 2 4 6 8 10 12 14 Ta [℃] TEMPARATURE [℃] VCC [V] Fig.18. STB threshold temperature property Fig.19. Circuit current temperature property Fig.20. Circuit current voltage property www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/14 2010.06- Rev.C BD8312HFN Example of Application Input: 4.5 to 10 V, output: 3.3 V / 500mA Technical Note VBAT=4.5～10V 1μF GRM188B11A105KA61 （Murata） GND INV VCC STB PVCC ON/OFF 10pF VREG 1μF GRM188B11A105KA61 （Murata） 3.3V/500mA 10kΩ 200kΩ PGND Lx 4.7μH 1098AS-4R7M（TOKO） 51kΩ 10μF GRM31CB11A106KA01 （Murata） 22kΩ Fig.21 Reference application diagram Reference application data 1 100 3.35 80 3.33 VCC=7.5V VCC=5.5V 60 OUTPUT VOLTAGE [V] VCC=4.5V EFFICIENCY [%] VCC=7.5V VCC=5.5V 3.31 VCC=4.5V 3.29 40 20 3.27 0 1 10 100 1000 3.25 1 10 100 1000 OUTPUT CURRENT [mA] OUTPUT CURRENT [mA] Fig.22 Power conversion efficiency (VOUT = 3.3 V) Fig.23 Load regulation (VOUT = 3.3 V) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/14 2010.06- Rev.C BD8312HFN Reference application data 2 (Input 4.5 V, 6.0 V, 8.4 V, 10 V, output 3.3 V ） Technical Note 60 180 60 40 20 Gain [dB] 0 Gain -20 -40 -60 100 1000 10000 Phase 40 20 Gain [dB] 0 120 60 Phase [deg] 0 Phase 180 120 60 Phase [deg] Gain [dB] 0 -60 -120 -180 60 40 20 0 -20 -40 -60 100 1000 10000 周波数 [Hz] Frequency [Hz] Gain Phase 180 120 60 0 -60 -120 -180 100000 1000000 Phase [deg] Phase [deg] Gain -20 -40 -60 100 1000 10000 周波数 [Hz] Frequency [Hz] -60 -120 -180 100000 1000000 100000 1000000 Frequency [Hz] 周波数 [Hz] Fig.24 Frequency response 1 (VCC=4.5V, Io=250mA) 60 180 60 40 20 Phase [deg] Gain [dB] 0 -20 -40 -60 100 Fig.25 Frequency response 2 (VCC=6.0V, Io=250mA) 180 Fig.26 Frequency response 3 (VCC=8.4V, Io=250mA) 60 180 Phase 40 20 Gain [dB] 0 120 60 0 Phase Phase 120 60 Phase [deg] 40 20 Gain [dB] 0 120 60 0 0 Gain -20 -40 -60 100 1000 10000 100000 -60 -120 -180 1000000 Gain Gain -20 -40 -60 100 1000 10000 100000 周波数 [ [Hz] FrequencyHz] -60 -120 -180 1000000 -60 -120 -180 1000 10000 100000 1000000 Frequency[Hz] 周波数 [Hz] FrequencyHz] 周波数 [ [Hz] Fig.27 Frequency response 4 (VCC=10V, Io=250mA) 60 Phase Fig.28 Frequency response 5 (VCC=4.5V, Io=500mA) 60 40 20 180 Fig.29 Frequency response 6 (VCC=6.0V, Io=500mA) 180 120 60 Phase [deg] Gain [dB] 40 20 Gain [dB] 0 Gain Phase 120 60 0 -60 -120 -180 Phase [deg] 0 -60 -120 -180 100 1000 10000 100000 1000000 0 -20 -40 -60 100 1000 Gain -20 -40 -60 10000 100000 1000000 Frequency[Hz] 周波数 [Hz] Frequency [[Hz] 周波数 Hz] Fig.30 Frequency response 7 (VCC=8.4V, Io=500mA) Fig.31 Frequency response 8 (VCC=10V, Io=500mA) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/14 2010.06- Rev.C BD8312HFN Reference board pattern Technical Note VOUT Lx VBAT GND ・The radiation plate on the rear should be a GND flat surface of low impedance in common with the PGND flat surface. ・It is recommended to install a GND pin in another system as shown in the drawing without connecting it directly to this PNGD. ・Produce as wide a pattern as possible for the VBAT, Lx and PGND lines in which large current flows. Selection of Part for Applications (1) Inductor A shielded inductor that satisfies the current rating (current value, Ipecac as shown in the drawing below) and has a low DCR (direct resistance component) is recommended. Inductor values affect inductor ripple current, which will cause output ripple. Ripple current can be reduced as the coil L value becomes larger and the switching frequency becomes higher. Ipeak =Iout ＋ ⊿IL/2 [A] 1 × f [A] (2) (1) Δ IL Fig.32 Inductor current ⊿IL= Vin－Vout L × Vout Vin (η: Efficiency, ⊿IL: Output ripple current, f: Switching frequency) As a guide, inductor ripple current should be set at about 20 to 50% of the maximum input current. *Current over the coil rating flowing in the coil brings the coil into magnetic saturation, which may lead to lower efficiency or output oscillation. Select an inductor with an adequate margin so that the peak current does not exceed the rated current of the coil. (2) Output capacitor A ceramic capacitor with low ESR is recommended for output in order to reduce output ripple. There must be an adequate margin between the maximum rating and output voltage of the capacitor, taking the DC bias property into consideration. Output ripple voltage is acquired by the following equation. ＋ ⊿IL×RESR [V] ・・・ (3) 2π×f×Co Setting must be performed so that output ripple is within the allowable ripple voltage. Vpp=⊿IL× 1 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/14 2010.06- Rev.C BD8312HFN (3) Output voltage setting The internal standard voltage of the ERROR AMP is 1.0 V. VOUT ERROR AMP INV R2 VREF 1.0V Vo= Technical Note Output voltage is acquired by Equation (4). R1 (R1+R2) R2 ×1.0 [V] ・・・ (4) Fig.33 Setting of voltage feedback resistance (4) DC/DC converter frequency response adjustment system Condition for stable application The condition for feedback system stability under negative feedback is that the phase delay is 135 °or less when gain is 1 (0dB). Since DC/DC converter application is sampled according to the switching frequency, the bandwidth GBW of the whole system (frequency at which gain is 0 dB) must be controlled to be equal to or lower than 1/10 of the switching frequency. In summary, the conditions necessary for the DC/DC converter are: - Phase delay must be 135°or lower when gain is 1 (0 dB). - Bandwidth GBW (frequency when gain is 0 dB) must be equal to or lower than 1/10 of the switching frequency. To satisfy those two points, R1, R2, R3, DS and RS in Fig. 34 should be set as follows. [1] R1, R2, R3 BD8313HFN incorporates phase compensation devices of R4=62kΩ and C2=200pF. These C2 and R1, R2, and R3 valuesdecide the primary pole that determines the bandwidth of DC/DC converter. Primary pole point frequency 1 2π A×( DC/DC converter DC Gain DC Gain =A× 1 B × VOUT R1 Cs Rs R2 R3 FB Inside of IC R4 C2 fp= R1×R2 +R3)×C2 R1+R2 ・・・・(1) Fig.34 Example of phase compensation setting A: Error AMP Gain 5 About 100dB = 10 B: Oscillator amplification = 0.5 VIN: Input voltage Output voltage VOUT: VIN VO ・・・・(2) By Equations (1) and (2), the frequency fsw of point 0 dB under limitation of the bandwidth of the DC gain at the primary pole point is as shown below. 1 (R1・R2) 2πC2×( +R3 ) (R1+R2) fSW = fp×DC Gain = × 1 B × VIN VO ・・・・(3) It is recommended that fsw should be approx.10 kHz. When load response is difficult, it may be set at approx. 20 kHz. By Equation (3), R1 and R2, which determine the voltage value, will be in the order of several hundred kΩ. If an appropriate resistance value is not available since the resistance is so high and routing may cause noise, the use of R3 enables easy setting. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/14 2010.06- Rev.C BD8312HFN [2] Cs and Rs setting For DC/DC converter, equation. Technical Note the 2nd dimension pole point is caused by the coil and capacitor as expressed by the following fLC= 1 2π√(LC) ・・・・(4) This secondary pole causes a phase rotation of 180°. To secure the stability of the system, put a zero point in 2 places to perform compensation. Zero point by built-in CR fZ1= 1 2πR4C2 1 2π(R1+R3)CS = 13kHz ・・・・(5) Zero point by Cs fZ1= ・・・・(6) Setting fZ2 to be half to 2 times a frequency as large as fLC provides an appropriate phase margin. It is desirable to set Rs at about 1/20 of (R1+R3) to cancel any phase boosting at high frequencies. Those pole points are summarized in the figure below. The actual frequency property is different from the ideal calculation because of part constants. If possible, check the phase margin with a frequency analyzer or network analyzer. Otherwise, check for the presence or absence of ringing by load response waveform and also check for the presence or absence of oscillation under a load of an adequate margin. (5) (6) (3) (4) Fig.35 Example of DC/DC converter frequency property （Measured with FRA5097 by NF Corporation） www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/14 2010.06- Rev.C BD8312HFN I/O Equivalence Circuit Technical Note STB VCC INV VCC VREG STB INV Lx, PGND, PVCC VREG VCC PVCC VCC VREG Lx PGND www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/14 2010.06- Rev.C BD8312HFN Technical Note Notes for use 1) Absolute Maximum Rating We dedicate much attention to the quality control of these products, however the possibility of deterioration or destruction exists if the impressed voltage, operating temperature range, etc., exceed the absolute maximum ratings. In addition, it is impossible to predict all destructive situations such as short-circuit modes, open circuit modes, etc. If a special mode exceeding the absolute maximum rating is expected, please review matters and provide physical safety means such as fuses, etc. 2) GND Potential Keep the potential of the GND pin below the minimum potential at all times. 3) Thermal Design Work out the thermal design with sufficient margin taking power dissipation (Pd) in the actual operation condition into account. 4) Short Circuit between Pins and Incorrect Mounting Attention to IC direction or displacement is required when installing the IC on a PCB. If the IC is installed in the wrong way, it may break. Also, the threat of destruction from short-circuits exists if foreign matter invades between outputs or the output and GND of the power supply. 5) Operation under Strong Electromagnetic Field Be careful of possible malfunctions under strong electromagnetic fields. 6) Common Impedance When providing a power supply and GND wirings, show sufficient consideration for lowering common impedance and reducing ripple (i.e., using thick short wiring, cutting ripple down by LC, etc.) as much as you can. 7) Thermal Protection Circuit (TSD Circuit) This IC contains a thermal protection circuit (TSD circuit). The TSD circuit serves to shut off the IC from thermal runaway and does not aim to protect or assure operation of the IC itself. Therefore, do not use the TSD circuit for continuous use or operation after the circuit has tripped. 8) Rush Current at the Time of Power Activation Be careful of the power supply coupling capacity and the width of the power supply and GND pattern wiring and routing since rush current flows instantaneously at the time of power activation in the case of CMOS IC or ICs with multiple power supplies. 9) IC Terminal Input This is a monolithic IC and has P+ isolation and a P substrate for element isolation between each element. P-N junctions are formed and various parasitic elements are configured using these P layers and N layers of the individual elements. For example, if a resistor and transistor are connected to a terminal as shown on Fig.36: ○ The P-N junction operates as a parasitic diode when GND > (Terminal A) in the case of a resistor or when GND > (Pin B) in the case of a transistor (NPN) ○ Also, a parasitic NPN transistor operates using the N layer of another element adjacent to the previous diode in the case of a transistor (NPN) when GND > (Pin B). The parasitic element consequently rises under the potential relationship because of the IC’s structure. The parasitic element pulls interference that could cause malfunctions or destruction out of the circuit. Therefore, use caution to avoid the operation of parasitic elements caused by applying voltage to an input terminal lower than the GND (P board), etc. Resistor (Pin A) (Pin B) Transistor (NPN) ～ ～ C B E GND N P＋ N P N P Substrate P＋ N Ｎ P＋ N N GND Parasitic Element Parasitic Element P Substrate GND Parasitic Element Fig.36 Example of simple structure of Bipolar IC www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/14 2010.06- Rev.C ～ ～ P P＋ (Pin A) BD8312HFN  Ordering part number Technical Note B D 8 Part No. 3 1 2 H F N - T R Part No. Package HFN:HSON8 Packaging and forming specification TR: Embossed tape and reel HSON8 2.9 ± 0.1 (MAX 3.1 include BURR) (0.2) (2.2) (0.05) Tape Quantity Embossed carrier tape 3000pcs TR The direction is the 1pin of product is at the upper right when you hold 0.475 3.0 ± 0.2 2.8 ± 0.1 8 765 (0.15) (0.3) 5678 (0.45) (0.2) (1.8) Direction of feed +0.1 0.13 –0.05 ( reel on the left hand and you pull out the tape on the right hand 1pin ) 1234 4321 1PIN MARK 0.6MAX S +0.03 0.02 –0.02 0.1 0.65 0.32±0.1 S 0.08 M Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/14 2010.06- Rev.C Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A