System Power Supply for TV Series
FET Controller Type 3ch System Power Supply ICs
BD8606FV
No.09034EAT02
●Description BD8606FV has realized the high performance and reliability required as a power supply for thin-screen TV. Due to the high-speed load response, it is most suitable for TV-purpose processors with increasingly high performance, and due to the wide phase margin it leaves a good margin for board pattern & constant setting and so facilitates its application design. As a high-reliability design, it has various built-in protection circuits (overcurrent protection, output voltage abnormal protection, thermal protection, and off-latch function at the time of abnormality etc.), therefore as an advantage it does not easily damage in every possible abnormal condition such as all-pin short circuit test etc. and hence most suitable for thin-screen TV which requires the high reliability. ●Features 1) 3ch synchronous rectification step-down system DC/DC converter controller 2) 3ch independent ON/OFF. controllable 3) Soft start, soft off function 4) Concentrated protection control with built-in sequencer 5) Built-in low voltage protection function 6) Built-in overvoltage protection function 7) Built-in overcurrent protection function 8) Built-in RT terminal open/short protection function 9) Frequency setting by external resistance is available. 10) Protection condition is output from PDET terminal. 11) Built-in external reset output function
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1/22
2009.05 - Rev.A
BD8606FV
● Electric characteristic (Ta=25℃, VIN1, VIN2, VIN3=5.0V, VCC=5.0V, and GND=0V unless otherwise specified.) specification value UNIT Parameter Symbol MIN TYP MAX Circuit current 1 IQ1 2.5 5 mA Circuit current 2 IQ2 5.0 10 mA < Error amplifier part Ch1,Ch2,Ch3 > Standard voltage (VREF) VREF 0.792 0.8 0 100 -2.5 1.1 1.72 0.15 50 70 1.1 100 0.808 1 0.2 -70 600 -1.0 1.2 2.0 0.19 100 91 1.2 200 V μA V V mA μA dB kHz μA V V V mV kΩ V mV Terminal FB Input bias current IFBB -1 Terminal FC Clamping voltage H VFCH 1.8 Terminal FC Clamping voltage L VFCL Terminal FC Sink current IFCSINK 0.5 Terminal FC Source current IFCSOURCE Open loop gain AVERR < OSC part > Oscillation frequency FOSC 100 < Soft start part Ch1,Ch2,Ch3 > Charging current ISS -4.0 Terminal SS Threshold voltage VSSTH 1.0 Terminal SS Clamping voltage VSSCLM 1.44 Terminal SS Standby voltage VSSSTB 0.11 Terminal SS Standby voltage 5 VSSSTB_HYS Maximum hysteresis error Terminal SS Discharge resistance RSS 49 Terminal SS Protection circuit start 1.0 VSSPON voltage Terminal SS Protection circuit start voltage VSSPON_HYS 10 Maximum hysteresis error < Low voltage, over voltage detection part Ch1,Ch2,Ch3 > Terminal FB Low voltage detection 0.27 VLVP voltage Terminal FB Low voltage detection VLVP_HYS 10 Maximum hysteresis error Terminal FB Overvoltage detection 1.08 VOVP voltage < Over current detection part Ch1,Ch2,Ch3 > Terminal LX input bias current ILXB -1 Terminal OCP input bias current IOCPB 20 < Reset detection part > Terminal MONVCC reset detection 0.98 VRSTO voltage Terminal MONVCC input bias -1 IMONVCCB current Terminal RSTDLY charging current IRSTDLY -15 Terminal RESET L output voltage VOL_RST < Others > Terminal PDET L output voltage VOL_RDET Terminal CTL input voltage H level 2.0 VIH_CTL voltage Terminal CTL input voltage L level VIL_CTL voltage Terminal CTL input current II_CTL -
Technical Note
Condition CTL1,2,3=0V CTL1,2,3=VCC Terminal FB and FC terminal short VFB=0.9V VFB=0.7V VFB=0.9V VFB=0.9V, VFC=0.4V VFB=0.7V, VFC=1.6V
VSS=1.0V VSS voltage, VFC=0.8V VSS voltage (L→H)
VSS voltage (L→H) VSS voltage
0.32 100 1.2 0 50 1.0 0 -10 -
0.37 200 1.32 1 80 1.02 1 -5 0.4 0.4 VCC 0.5 70
V mV V uA uA V uA uA V V V V
VFB voltage VFB voltage VFB voltage
VMONVCC voltage (H→L)
IOL=100uA IOL=100uA Terminal CTL1,2,3
Terminal CTL1,2,3 Terminal CTL1,2,3, CTL=VCC Terminal Terminal DRV H output voltage VOH_DRV 4.5 V DRV1A,2A,3A,1B,2B,3B Terminal Terminal DRV L output voltage VOL_DRV 0.5 V DRV1A,2A,3A,1B,2B,3B VFB : FB terminal voltage, VFC : FC terminal voltage, VSS : SS terminal voltage, VMONVCC : MONVCC terminal voltage Not designed for radiation resistance. Current capability should not exceed Pd. 40 uA
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2/22
2009.05 - Rev.A
BD8606FV
● Block diagram
MONVCC RSTDLY
Technical Note
PGND3
RESET
DRV3A
DRV3B
TEST2
TEST1
OCP3
PDET PGND1
CTL3
CTL2
CTL1
GND
VIN3
VCC
SS3
FC3
FB3
LX3
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VRSTO VREF Delay OVP1.5 LVP0.4
SYSTEM CONTROL SEQUENCER
Driver Control
SS1 SS2 SS3 Driver Control OVP1.5 LVP0.4 OVP1.5 LVP0.4 VREF VREF OSC Driver Control
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GND
VIN2
LX2
LX1
VIN1
FC1
SS1
RT
FB2
● Terminal explanation Table 1 terminal explanation No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Symbol PGND1 Description No. 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Symbol PGND3 DRV3B LX3 DRV3A VIN3 OCP3 FB3 FC3 SS3 GND TEST1 TEST2 CTL1 CTL2 CTL3 VCC RESET Description Ch3 power GND (same potential as terminal GND) Ch3 Nch drive output terminal Ch3 overcurrent detection terminal Ch3 Pch drive output terminal Ch3 power supply input terminal Ch3 overcurrent detection level resistance Ch3 voltage detection terminal Ch3 phase compensation terminal Ch3 soft start adjustment capacity connection terminal GND (0V connection) Test terminal (Connect to GND) Test terminal (connect to GND) Ch1 control terminal Ch2 control terminal Ch3 control terminal Ch1 power GND (same potential as GND terminal) DRV1B Ch1 Nch drive output terminal LX1 Ch1 overcurrent detection terminal
DRV1A Ch1 Pch drive output terminal VIN1 Ch1 power supply input terminal Ch1 overcurrent detection level OCP1 resistance connection terminal FB1 Ch1 voltage detection terminal FC1 Ch1 phase compensation terminal Ch1 soft start adjustment capacity SS1 connection terminal GND GND (0V connection) Frequency adjustment resistance RT connection terminal Ch2 soft start adjustment capacity SS2 connection terminal FC2 Ch2 phase compensation terminal FB2 Ch2 voltage detection terminal Ch2 overcurrent detection level resistance OCP2 connection terminal VIN2 Ch2 power supply input terminal DRV2A Ch2 Pch drive output terminal LX2 Ch2 overcurrent detection terminal
DRV2B Ch2 Nch drive output terminal 39 Ch2 power GND 20 PGND2 40 PDET Off latch signal output (same potential as terminal GND) ※Please give to VCC+0.3V as an operation condition in all input terminals. However, please do not exceed the absolute maximum rating as VCC=VIN1=VIN2=VIN3.
DRV1B
OCP2
OCP1
DRV2A
DRV2B
PGND2
DRV1A
FB1
FC2
Figure 1 Block char
Power supply input terminal Reset output terminal Reset delay adjustment capacity RSTDLY connection terminal MONVCC VCC monitor terminal
SS2
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3/22
2009.05 - Rev.A
BD8606FV
● Terminal equivalent circuit chart Terminal Terminal No. name 1 20 21 PGND1 PGND2 PGND3
Technical Note
Explanation
Terminal equivalent circuit chart
Ch1 Power GND (GND Terminal and this potential) Ch2 Power GND (GND Terminal and this potential) Ch3 Power GND (GND Terminal and this potential)
2
DRV1B
Ch1 Nch Driving output terminal
VIN
VIN
19
DRV2B
Ch2 Nch Driving output terminal
② ⑲
22
22
DRV3B
Ch3 Nch Driving output terminal
PGND
PGND
VIN VIN
3
LX1
Ch1 Over current detection terminal
VIN
18
LX2
Ch2 Over current detection terminal
③ ⑱
23
23
LX3
Ch3 Over current detection terminal
PGND
VIN1
4 DRV1A Ch1 Pch Driving output terminal
VIN1
17
DRV2A
Ch2 Pch Driving output terminal
④ ⑰
24
24
DRV3A
Ch3 Pch Driving output terminal
PGND
5 VIN1 Ch1 Power supply input terminal
PGND
16
VIN2
Ch2 Power supply input terminal
25
VIN3
Ch3 Power supply input terminal
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4/22
2009.05 - Rev.A
BD8606FV
Terminal No. Terminal name
Technical Note
Explanation Ch1 Over current detection level Set resistance connection terminal
Terminal equivalent circuit chart
VCC
VIN1
6
OCP1
⑥ ⑮
15 OCP2 Ch2 Over current detection level Set resistance connection terminal
26
GND
26 OCP3 Ch3 Over current detection level Set resistance connection terminal
7
FB1
Ch1 Voltage detection terminal
VCC
14
FB2
Ch2 Voltage detection terminal
⑦ ⑭
27
27
FB3
Ch3 Voltage detection terminal
GND
VCC
8
FC1
Ch1 Phase amends terminal
⑧ ⑬
28
13
FC2
Ch2 Phase amends terminal
GND
28
FC3
Ch3 Phase amends terminal
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5/22
2009.05 - Rev.A
BD8606FV
Terminal No.. Terminal name
Technical Note
Explanation
Terminal equivalent circuit chart
9
SS1
Ch1 Soft start Adjustment capacity connection terminal
VCC
12
SS2
Ch2 Soft start Adjustment capacity connection terminal
⑨ ⑫
29
29
SS3
Ch3 Soft start Adjustment capacity connection terminal
GND
10 30
GND GND
GND (0V Connection) GND (0V Connection)
VCC
11
RT
Frequency adjustment resistance connection terminal
⑪
GND
31
TEST1
Test terminal
VCC
32 TEST2 Test terminal
31 32 33 34 35
33
CTL1
Ch1 Control terminal
34
CTL2
Ch2 Control terminal
GND
35 CTL3 Ch3 Control terminal
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6/22
2009.05 - Rev.A
BD8606FV
Terminal No. 36 Terminal name VCC
Technical Note
Explanation
Terminal equivalent circuit chart
Power supply input terminal
VCC
37
RESET
Reset output terminal
37
GND
VCC
38
RSTDLY
Reset Delay Adjustment capacity connection terminal
38
GND
VCC
39
MONVCC
VCC Monitor terminal
39
GND
VCC
40
PDET
Off latch output terminal
40
GND
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7/22
2009.05 - Rev.A
BD8606FV
● Circuit chart
Technical Note
PGND3
PGND2
DRV3B
21
Driver Control
Driver Control
LX3
23
DRV3A
24
VIN3
25
OCP3
26
FB3
VREF
VREF
FC3
27
28
SS3
29
GND OSC OVP1.5 LVP0.4 SYSTEM CONTROL SEQUENCER SS1 SS2 SS3 VREF
TEST1
30
TEST2
31
32
CTL1
33
CTL2
34
CTL3
35
VCC
36
RESET
5
DRV1A
6
VIN1
7
OCP1
8
FB1
9
FC1
10
SS1
11
GND
12
RT
OVP1.5 LVP0.4
OVP1.5 LVP0.4
13
SS2
14
FC2
15
FB2
16
OCP2
17
VIN2
18
DRV2A
19
LX2
22
20
DRV2B
37
PWM Counter
RSTDLY Delay
38
MONVCC
39
PDET
VRSTO
40
※ ※
It measures it by the static test mode. The circuit chart of CH2 and CH3 is omitted.
Figure 2 Circuit chart
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1
2
Driver Control
3
DRV1B
4
LX1
PWM Counter
PGND1
8/22
2009.05 - Rev.A
BD8606FV
● Application circuit chart
VCC 40uF
Technical Note
VIN
PGND3
21 22
Driver Control Driver Control
20
PGND2
19 22μF×2 4.7μH
VO 2 : 2.5V
VO 3 : 3.3V
22μF×2 4.7μH
10μF
DRV3B
DRV2B
10μF
LX3
DRV3A
23 24 25
18
LX2
17
DRV2A
16
VIN
4.7KΩ
175KΩ
VIN3
VIN2
26
15
0Ω 39pF 1000pF 180KΩ
OCP3
VREF
VREF
OCP2
4.7KΩ 153 KΩ
0Ω 47pF 72KΩ
27
14
56KΩ
FB3
FB2
FC3
28
OVP1.5 LVP0.4 OVP1.5 LVP0.4
13
FC2
110KΩ1000pF 6800pF 27KΩ
29
SS3 GND
12
6800pF
SS2
OSC OVP1.5 LVP0.4 SYSTEM CONTROL SEQUENCER
TEST1
TEST2
30 31 32
11
RT
10
GND
9
SS1
0Ω 0Ω 0Ω
6800pF 24KΩ5600pF 66KΩ 33KΩ 180pF 0Ω
CTL1
SS1 SS2 SS3
CTL2
CTL3
External PullUp VCC 100KΩ
Delay
0.1μF
RESET
RSTDLY
33 34 35 36 37 38
8
FC1
7
FB1
VREF
4.7KΩ
6
OCP1
VIN
5
VIN1
4
DRV1A
10μF 4.7μH
VO 1 : 1.2V
3
LX1
100KΩ 33KΩ 100KΩ
MONVCC
VRSTO
Driver Control
22μF×2
TEST3
39 40
2
DRV1B
1
PGND1
Figure 3 Application circuit chart
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9/22
2009.05 - Rev.A
BD8606FV
●Each characteristic reference data
Technical Note
0.900
ERROR AMP REFERENCE VOLTAGE : VREF[V]
0.875 0.850 0.825 0.800 0.775 0.750 0.725 0 .700 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80
AMBIENT TEMPERATURE : Ta[℃]
SWITCHING FREQUENCY : fosc[kHz]
600 550 500 450 400 350 300 250 200 150 1 00 -40 -30 -20 -10 0 10 20 30 40
RT=27kΩ
50 60 70 80
AMBIENT TEMPERATURE : Ta[℃]
Figure 4 Standard voltage-temperature characteristic
100 80 60 40 GAIN [dB] 20 0 -20 -40 -60 -80 - 100 1000 10000 100000
f [H z] Gain Phase
Figure 5 Switching frequency-temperature characteristic
4.0
SS CHARGE CURRENT : Iss[μA]
180 135 90 45 0 -45 -90 -135 -180
1000000 10000000
3.5 3.0 2.5 2.0 1.5 1 .0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80
Ph ase [de g]
AMBIENT TEMPERATURE : Ta[℃]
Figure 6 Open loop characteristic
80 OCP INPUT CURRENT : Iocp[μA]
Figure 7 Terminal SS charge current-temperature characteristic
15
RSTDLY CHARGE CURRENT : Irstdly[μA]
14 13 12 11 10 9 8 7 6 5 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80
70 60 50 40 30 20
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
AMBIENT TEMPERATURE : Ta[℃]
AMBIENT TEMPERATURE : Ta[℃]
Figure 8 Terminal OCP inflow current-temperature characteristic
1.10
Figure 9 Terminal RSTDLY charge current-temperature characteristic
1000
1.05
Vrsto[V]
1.00
PWM FREQUENCY [kHz]
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
100
0.95
0 .90
10 10 100 1000
AMBIENT TEMPERATURE : Ta[℃]
RT RESISTANCE [kΩ]
Figure 10 MONVCC reset detection voltage-temperature characteristic
5V C TL
Figure 11 Switching frequency-terminal RT resistance characteristic
100 90 POWER EFFICIENCY[%] 80 70 60 50 40 30 20 10 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
3.4ms
1.72V
SS 3.3V
VIN=5.0V Vo=3.3V External FET:SP8M4 Drive
Vo
Css=6800pF
LOAD CURRENT[A]
Figure 12 Soft start crimp
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Figure 13 Efficiency
10/22
2009.05 - Rev.A
BD8606FV
Reference data of dead time
90% DRVA (Pch Gate)
Technical Note
10% 90%
DRVB (Nch Gate)
10%
Trdeat
Tfdeat
Figure 14 Dead time (VCC=5.0V,VIN=5.0V,Ta=25℃) Parameter PchMOS OFF→NchMOS ON Dead time NchMOS OFF→PchMOS ON Dead time
200
Symbol Trdeat Tfdeat
200
min 90 100
typ 120 140
max 160 190
UNIT ns ns
VCC=4.0V
VCC=4.0V
150 150
VCC=5.0V
Trdeat [nsec]
VCC=5.0V
Tfdeat [nsec]
VCC=7.0V
VCC=7.0V
100
100
50 -40 -20 0 20 40 60 80
50 -40 -20 0 20 40 60 80
AMBIENT TEMPERATURE : Ta[℃]
AMBIENT TEMPERATURE : Ta[℃]
Figure 15 Dead time Trdeat - Temperature characteristic
Figure 16 Dead time Tfdeat - Temperature characteristic
(pcs) 7 6 5 4 3 2 1 0 2 4 6 VCC=VIN=5.0V Ta=25℃ n=12(2lot)
(pcs) 7 6 5 4 3 2 1 0 1 5 6 VCC=VIN=5.0V Ta=25℃ n=12(2lot)
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90
98 95 93
Figure 17 Dead time Trdeat - Difference
105 103 100
113 110 108
120 118 115
Trdeat[ns]
128 125 123
135 133 130
143 140 138
150 148 145
158 155 153
160
11/22
190 188 185 183 180 178 175 173 170 168 165 163 160 158 155 153 150 148 145 143 140 138 135 133 130 128 125 123 120 118 115 113 110 108 105 103 100
Tfdeat[ns]
Figure 18 Dead time Tfdeat - Difference
2009.05 - Rev.A
BD8606FV
Reset detection data
VCC
Technical Note
100kΩ
RESET
MONVCC 1.235V (typ) 1.0V (typ)
RSTDLY
Figure 19 Circuit chart
RESET[V]
VRST_HYS
VOL_RST VRSTO
Figure 20 Reset detection (VCC=5V,Ta=25℃) Parameter Terminal MONVCC reset detection voltage Terminal MONVCC reset detection voltage Maximum hysteresis error
MONVCC[V]
Symbol VRSTO VRST_HYS
min 0.98 20
typ 1.0 72
max 1.02 180
UNIT V mV
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12/22
2009.05 - Rev.A
BD8606FV
Permissible loss T cmax θ jc [ ℃ /W] θ ja [ ℃ /W] T STGmin [℃ ] T STGmax [℃ ] T a min [℃ ] T a max [℃ ] T j max
Technical Note
Destruction Destruction temperature temperature [℃ ] [℃ ] 150.0
28.0
111.1
-50.0
150.0
-45.0
85.0
150.0
1.2 1 Permissible loss : Pd [W] 0.8 0.6 0.4 0.2 0
ROHM standard substrate mounting θja=111.1℃/W
0
25
50
75
100
125
150
Ambient temperature : Ta [℃]
ROHM standard substrate specification Material The glass epoxy Size 70mm×70mm×1.6mmt Figure 21Heat decrease curve ※These values are the example values, and no guarantee values.
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13/22
2009.05 - Rev.A
BD8606FV
Technical Note
● Operation description ON/OFF control DC/DC converter controller ON/OFF function DC/DC converter controller of each Ch can be independently controlled ON/OFF by CTL1, CTL2, and CTL3 terminal. Analog circuit of Ch interlocked to each CTL terminal starts operation at ON control (on mode), and goes down to setting output voltage. Analog circuit of Ch interlocked to each CTL terminal should be standby at OFF control (off mode), and output voltage becomes 0V. Table 2 DC/DC converter controller ON/OFF function CTL1 terminal voltage Ch1 CTL2 terminal voltage Ch2 CTL3 terminal voltage Ch3 >VIHCTL1 ON control >VIHCTL2 ON control >VIHCTL3 ON control VIHCTL VIHCTL OFF 1.95V(typ) < 1.0V(typ) < 0.62V(typ) ON Disable < VIHCTL OFF ※Terminal FC abnormality protection function is enabled when SS terminal voltage of each Ch becomes more than 1.1V (typ) in the transition to ON control (during soft start). RT terminal open/short protection function RT terminal open/shot protection function off-latches all DC/DC converter controller by detecting open/short condition internally from RT terminal to prevent from output voltage error caused by abnormal oscillation of internal triangular wave at RT terminal open/short. RT terminal open/short protection function is regularly enabled after boot-up. RT terminal open/short protection function operates when error detection condition continues about more than 400μsec (typ).
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20/22
2009.05 - Rev.A
BD8606FV
Technical Note
Soft start time-out function Each Ch DC/DC converter controller off-latch-controls when VSS does not exceed VSSPON from VSS > VSSSTB+VSSSTB_HYS after 50msec (typ) passed from soft start.
VSSCLM
VSSPON
SS terminal
VSSSTB+VSSSTB_HYS
0V
about 50msec( typ)
Figure 28 At soft start time-out Error detection (off latch) release method Each Ch DC/DC converter controller comes into off latch condition when protection function operates. Off latch can be released by the following method. Each Ch DC/DC converter controller becomes able to do ON control transition by releasing off latch. 1. Set all Ch CTL terminal voltage as < VILCTL and continue that condition about more than 200usec (typ). 2. Drop down power supply VCC to below 3.7V.
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21/22
2009.05 - Rev.A
BD8606FV
●Ordering part number
Technical Note
B
D
8
Part No.
6
0
6
F
V
-
E
2
Part No.
Package FV: SSOP-B40
Packaging and forming specification E2: Embossed tape and reel
SSOP-B40
Tape Quantity
13.6 ± 0.2
40 21
Embossed carrier tape 2000pcs E2
(The direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand)
7.8 ± 0.3 5.4 ± 0.2
Direction of feed
0.3Min.
1
20
1.8 ± 0.1
0.15 ± 0.1 0.1
0.1
1234
1234
1234
1234
1234
1234
1234
1234
0.65
0.22 ± 0.1
0.08 M
(Unit:mm)
Reel
1pin
Direction of feed
※When you order , please order in times the amount of package quantity.
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22/22
2009.05 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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