BD8621EFV_09

System Power Supply for TV Series FET Controller Type 3ch System Power Supply ICs BD8621EFV No.09034EAT03 ●Description BD8621EFV has realized the high performance and reliability required as a power supply for thin-screen TV. With built-in FET 1ch current mode control, the DC/DC Converter series has the advantage of high-speed load response and wide phase margin. Due to the high-speed load response, it is most suitable for TV-purpose processors with increasingly high performance, and due to the wide phase margin it leaves a good margin for board pattern & constant setting and so facilitates its application design. As a high-reliability design, it has various built-in protection circuits (overcurrent protection, output voltage abnormal protection, thermal protection, and off-latch function at the time of abnormality etc.), therefore as an advantage it does not easily damage in every possible abnormal condition such as all-pin short circuit test etc. and hence most suitable for thin-screen TV which requires the high reliability. ●Features 1) 3A output current 2) Low RDS(ON) internal switches (PchMOS:75mΩ，NchMOS:55mΩ) 3) ±1% reference voltage accuracy 4) Programmable frequency : 250kHz-1MHz 5) (Frequency in programmable by adjusting RT resistance or synchronizing with SYNCLK terminal.) 6) Terminal RT OPEN/SHORT detecting function 7) Over current protection function 8) Output over voltage/low voltage protection function (over : FB > VREF +60mV , low : FB < VREF -60mV) 9) Timer off latch function in abnormal circumstances 10) Thermal shutdown function 11) Under voltage protection 12) Soft start/start delay circuit 13) Soft start time out function 14) Protecting BUS function with terminal PDET 15) HTSSOP-B20 package www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/14 2009.05 - Rev.A BD8621EFV ●Electrical characteristics (Unless otherwise noted Ta=25℃, VIN=3.3V, GND=0V) Specification value Parameter Symbol MIN TYP VIN supply current (operating) IQ_active 220 VIN supply current (standby) IQ_stby 0 Reference voltage (VREF) VREF 0.792 0.8 60 Output rise detection voltage VOVP 30 Output decrease detection voltage VLVP -90 -60 Technical Note MAX 350 1 0.808 90 -30 UNIT μA μA V mV mV Condition VFB = 0.83V, VFC = 1V VEN = 0V Monitoring FB terminal Monitoring FB terminal VPDET< 0.3V RRT= 220kΩ ISW = 1A ISW = 1A Terminal PDET output current IPDET 0.4 mA Oscillation frequency fOSC 500 550 600 kHz Pch FET ON resistance RPFET 75 110 mΩ mΩ Nch FET ON resistance RNFET 55 90 UVLO voltage VUVLO 2.35 2.50 2.65 V SW leak current ILSW 0 1 μA VEN= 0V, VIN = 5.5V EN terminal H threshold voltage VENH 1.1 V EN terminal L threshold voltage VENL 0.4 V FC sink current IFCSI 10 20 μA FC source current IFCSO -20 -10 μA SS/DELAY terminal source current ISSSO 2 4 6 μA Terminal PDET pull-up resistor RPDET 100 170 250 kΩ VFB :FB terminal voltage, VEN :EN terminal voltage, VFC :FC terminal voltage, VPDET: PDET terminal voltage Current capability should not exceed Pd. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/14 2009.05 - Rev.A BD8621EFV ●Block Diagram Technical Note Fig1 Block diagram ●Pin Description No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol SGND FB PDET SW SW PGND PGND PGND SW SW VIN VIN VIN VIN REG Description Signal GND terminal Feed back terminal Off latch signal output Output terminal Power GND terminal Output terminal Explanation Small signal system GND Output voltage detection Protecting BUS communication terminal Switching output GND for power MOSFET Power Mos output Power supply input terminal Power supply input. The decoupling is done to PGND Synchronizable switching output terminal frequency with external clock EN Enable input ON/OFF control for device operation TEST Terminal for test SGND short in the set. Soft start adjustment capacity connection The soft start time is adjusted with the connected SS/DELAY terminal capacitor FC Error amplifier output Error amplifier phase compensation point Frequency adjustment resistance connection The switching frequency is set by the connected RT terminal resistance Internal Regulator www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/14 2009.05 - Rev.A BD8621EFV ●Pin equivalence circuit diagram No. Symbol 1 SGND Explanation Technical Note Terminal equivalent circuit diagram GND (connected 0V) VIN 2 FB Output voltage detection terminal 2 SGND 3 PDET Protecting BUS I/O terminal VIN 4,5,9,10 SW Output terminal 4 5 5 6 9 7 10 PGND 6,7,8 PGND Power GND (Same voltage as SGND) 11,12,13,14 VIN Power supply input terminal www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 4/14 2009.05 - Rev.A BD8621EFV No. Symbol Explanation Technical Note Terminal equivalent circuit diagram 15 REG Internal Regulator output voltage 16 EN Enable terminal 17 TEST Using at test mode www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 5/14 2009.05 - Rev.A BD8621EFV No. Symbol Explanation Technical Note Terminal equivalent circuit diagram 18 SS /DELAY Soft start time adjustment terminal 19 FC Error amplifier compensation terminal 20 RT Oscillator frequency adjustment terminal www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/14 2009.05 - Rev.A BD8621EFV ●Operation description Enable control The device can be controlled ON/OFF by EN terminal (16 pin) voltage. An internal circuit starts when VEN reaches 1.1V. Technical Note EN terminal voltage SS terminal voltage Output setting voltage Fig.2 ON/OFF transition wave form in EN controlling www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/14 2009.05 - Rev.A BD8621EFV Technical Note Soft start time set function As for BD8621EFV, output can do soft start without overshoot by charging soft start capacity (CSS) connected between SS and SGND terminal. Also, soft start time (tss) can be set by setting soft start capacity (CSS) arbitrarily. OSC oscillation frequency setting function The output oscillation frequency can be set by connecting resistance between terminal RT (20 pins) and SGND (range = 250kHz - 1MHz) The relation between RT terminal resistance and the oscillation frequency follows Fig.3. 1000 Frequency　[kHz] 10 10 100 1000 10000 RT terminal resistance　[kΩ] Fig.3 RT resistance-oscillation frequency Switching frequency synchronization An internal transmitter of BD8621EFV can be synchronized with the external clock signal connected with the terminal SYNCLK (15 pins). The frequency of external clock can be set within the range of 250kHz-1MHz. In this case, please set the RT resistance that may become about -20% value of the external clock frequency. * Be short-circuited SYNCLK terminal to SGND when a frequency synchronous function is not used. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/14 2009.05 - Rev.A BD8621EFV ●Protection function Technical Note Protection circuit is effective for destruction prevention due to accident so that avoid using under continuous protection operation. Low voltage protection function (LVP) The voltage of the terminal FB (2 pins) is compared with internal reference voltage VREF. If FB terminal voltage falls below VLVP(= VREF -60mV) and the state continues for 500us, output changes to low voltage and the state is fixed. In that case , PDET (3pin) output changes to L. Table 1 output low voltage protection function Low voltage protection Low voltage protection EN terminal SS terminal FB terminal function operation >VENH ＜VLVP >1.4V(typ) ON Effective ＞VLVP OFF 1.4V(typ) ＞VOVP ON Effective ＜VOVP OFF