BD87A29FVM

Power Management ICs for Automotive Body Control Voltage Detector ICs with Watchdog Timer BD37A19FVM,BD37A41FVM,BD87A28FVM,BD87A29FVM BD87A34FVM,BD87A41FVM,BD99A41F No.10039EAT12 ●Description The BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM and BD99A41F are watchdog timer reset ICs. It delivers a high precision detection voltage of 1.5% and a super-low current consumption of 5 µA (Typ.). It can be used in a wide range of electronic devices to monitor power supply voltages and in system operation to prevent runaway operation. ●Features 1) High precision detection voltage: 1.5%, 2.5% (Ta = −40℃ to 105℃) 2) Super-low current consumption: 5 µA (Typ.) 3) Built-in watchdog timer 4) Reset delay time can be set with the CT pin's external capacitance. 5) Watchdog timer monitor time and reset time can be set with the CTW pin's external capacitance. 6) Output circuit type: N-channel open drain 7) Package: MSOP8 (BD37A□□FVM, BD87A□□FVM) / SOP8 (BD99A41F) ●Applications All devices using microcontrollers or DSP, including vehicle equipment, displays, servers, DVD players, and telephone systems. ●Product line INH logic Model Detection voltage BD37A□□FVM 1.9 V/4.1V H: Active BD99A41F 4.1 V L: Active BD87A□□FVM 2.8V/2.9V/3.4 V/4.1V www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F ●Absolute maximum ratings (Ta = 25℃) Parameter Power supply voltage CT pin voltage CTW pin voltage RESET pin voltage INH pin voltage CLK pin voltage Power dissipation Operating ambient temperature Storage temperature Maximum junction temperature Symbol VDD VCT VCTW VRESET VINH VCLK Pd Topr Tstg Tjmax Ratings −0.3 to 10 −0.3 to VDD + 0.3 −0.3 to VDD + 0.3 −0.3 to VDD + 0.3 −0.3 to VDD + 0.3 −0.3 to VDD + 0.3 470*1 550*2 −40 to + 105 −55 to + 125 125 Unit V V V V V V mW ℃ ℃ ℃ Technical Note *1 MSOP8 : Reduced by 4.70 mW/℃ over 25℃, when mounted on a glass epoxy board (70 mm × 70 mm × 1.6 mm). *2 SOP8 : Reduced by 5.50 mW/℃ over 25℃, when mounted on a glass epoxy board (70 mm × 70 mm × 1.6 mm). ●Recommended operating ranges (Ta = −40℃ to 105℃) Parameter RESET power supply voltage WDT power supply voltage Symbol VDD RESET VDD WDT Min. 1.0 2.5 Max. 10 10 Unit V V www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F ●Electrical characteristics (Unless otherwise specified, Ta = −40℃ to 105℃, VDD = 5 V) Limits Parameter Symbol Unit Min. Typ. Max. [Overall] Total supply current 1 (during WDT operation) Total supply current 2 (when WDT stopped) Output leak current Output current capacity [RESET] 1.9V Detect 2.8V Detect Detection voltage 1 2.9V Detect 3.4V Detect 4.1V Detect 1.9V Detect 2.8V Detect Detection voltage 2 2.9V Detect 3.4V Detect 4.1V Detect 1.9V Detect 2.8V Detect Hysteresis width 2.9V Detect 3.4V Detect 4.1V Detect RESET transmission delay time: low  high Delay circuit resistance Delay pin threshold voltage Delay pin output current Min. operating voltage [WDT] WDT monitor time WDT reset time Clock input pulse width CLK high threshold voltage CLK low threshold voltage CLK high threshold voltage CLK low threshold voltage CTW charge current CTW discharge current *1 *2 *3 ○ Technical Note Conditions IDD1 IDD2 Ileak IOL VDET1 VDET1 VDET1 VDET1 VDET1 VDET2 VDET2 VDET2 VDET2 VDET2 Vrhys Vrhys Vrhys Vrhys Vrhys TPLH Rrst VCTH ICT VOPL TwH TwL TWCLK VCLKH VCLKL VINHH VINHL ICTWC ICTWO — — — 0.7 1.871 2.758 2.886 3.349 4.039 1.852 2.730 2.857 3.315 4.007 5 5 — — 1.900 2.800 2.930 3.400 4.100 1.900 2.800 2.930 3.400 4.100 14 14 1 — 1.929 2.842 2.974 3.451 4.162 1.948 2.870 3.003 3.485 4.202 µA µA µA mA V V V V V V V V V V V V V V V ms MΩ V µA V ms ms ns V V V V µA µA INH : WDT ON Logic Input CTW = 0.1 µF INH : WDT OFF Logic Input VDD = VDS = 10 V VDD = 1.2 V, VDS = 0.5 V Ta = 25℃ Ta = 25℃ Ta = 25℃ Ta = 25℃ Ta = 25℃ Ta = −40 to 105℃ Ta = −40 to 105℃ Ta = −40 to 105℃ Ta = −40 to 105℃ Ta = −40 to 105℃ Ta = −40 to 105℃ Ta = −40 to 105℃ Ta = −40 to 105℃ Ta = −40 to 105℃ Ta = −40 to 105℃ CT = 0.001 µF*1 When VDD = VDET 0.5 V VCT = GND RL = 470 KΩ VDD = 1.50 V, VCT = 0.5 V VOL ≤ 0.4 V, RL = 470 KΩ CTW = 0.01 µF*2 CTW = 0.01 µF*3 VDET × 0.03 VDET × 0.13 VDET × 0.19 VDET × 0.018 VDET × 0.045 VDET × 0.060 VDET × 0.02 VDET × 0.05 VDET × 0.06 VDET × 0.02 VDET × 0.05 VDET × 0.07 VDET × 0.018 VDET × 0.035 VDET × 0.050 3.9 5.8 VDD × 0.3 150 1.0 7.0 2.4 500 VDD × 0.8 0 VDD × 0.8 0 0.25 0.75 6.9 10.0 VDD × 0.45 — — 10.0 3.3 — — — — — 0.50 1.50 (Typ.) (Typ.) (Typ.) 10.1 14.5 VDD × 0.6 — — 20.0 7.0 — VDD VDD × 0.3 VDD VDD × 0.3 0.75 2.00 VCTW = 0.2 V VCTW = 0.8 V TPLH can be varied by changing the CT capacitance value. TPLH (s)  0.69 × Rrst (MΩ) × CT (µF) Rrst = 10 MΩ TwH can be varied by changing the CT capacitance value. TwH (s)  (0.5 × CTW (µF))/ICTWC (µA) ICTWC = 0.5 µA TwL can be varied by changing the CTW capacitance value. TwL (s)  (0.5 × CTW (µF))/ICTWO (µA) ICTWO = 1.5 µA Note: This IC is not designed to be radiation-resistant. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F ●Reference data (Unless otherwise specified, Ta = 25℃) : 4.1V Detection 12 CIRCUIT CURRENT: IDD [µA] 10 1400 Technical Note OUTPUT VOLTAGE: VOUT [V] CT PIN CURRENT: ICT [µA] 10 8 6 4 2 0 0 2 4 6 8 10 SUPPLY VOLTAGE: VDD [V] 8 Ta=105℃ 1200 1000 800 600 400 200 0 6 4 Ta=25℃ Ta=-40℃ 2 0 0 2 4 6 8 10 SUPPLY VOLTAGE: VDD [V] 0 1 2 3 4 5 SUPPLY VOLTAGE: VDD [V] Fig.1 Detection Voltage Fig.2 Total Supply Current Fig.3 Delay Pin Current vs Power Supply Voltage 2 CTW PIN CURRENT: ICTW [µA] 1.5 1 0.5 0 -0.5 -1 0 1 2 3 4 5 CTW PIN VOLTAGE: VCTW [V] 2 Ta=105℃ 1.5 OUTPUT DELAY TIME: TPLH [ms] 10000 RESET CURRENT: IRESET [mA] 1000 1 Ta=-40℃ Ta=25℃ 100 0.5 10 0 0 2 4 6 8 10 RESET VOLTAGE: VRESET [V] 1 0.0001 0.001 0.01 0.1 CT PIN CAPACITY: CT [µF] Fig.4 CTW Charge Discharge Current Fig.5 Output Current Fig.6 RESET Transmission Delay Time vs Capacitance 1 OPERATING VOLTAGE: VOPL [V] 10000 DETECTION VOLTAGE: VDET [V] 5 4.75 4.5 WDT RESET TIME: Tw [ms] 1000 0.75 100 Moniter Time L→H 4.25 4 3.75 3.5 -40 0.5 10 Reset Time 1 H→L 0.25 0.1 0.001 0.01 0.1 1 10 0 40 80 0 -40 0 40 80 CTW PIN CAPACITY: CTW [V] AMBIENT TEMPERATURE: Ta [℃] AMBIENT TEMPERATURE: Ta [℃] Fig.7 WDT Time vs Capacitance Fig.8 Detection Voltage vs Temperature Fig.9 Operating Marginal Voltage vs Temperature OUTPUT DELAY RESISTANCE: Rrst [MΩ] 13 OUTPUT DELAY TIME: TPLH [ms] 10 15 12 9 WDT RESET TIME: Tw [ms] 12 Moniter Time 11 8 9 10 7 6 Reset Time 9 6 3 8 -40 0 40 80 5 -40 0 40 80 0 -40 0 40 80 AMBIENT TEMPERATURE: Ta [℃] AMBIENT TEMPERATURE: Ta [℃] AMBIENT TEMPERATURE: Ta [℃] Fig.10 CT Pin Circuit Resistance vs Temperature www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Fig.11 RESET Transmission Delay Time vs Temperature Fig.12 WDT Time vs Temperature 4/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F ●Block diagram BD37A□□FVM Technical Note BD87A□□FVM / BD99A41F VDD RESET CLK 1 R 8 CTW 1 R Q Vref INH 2 VDD 7 CT 2 VDD VDD 8 RESET + Vref CT S + S Q N.C. 7 CTW 3 Pulse generation circuit + + VthH VthL R S Q 6 GND CLK 3 + + VthH VthL R S Q INH 6 Pulse generation circuit GND 4 VDD N.C. 4 5 VDD 5 CT pin capacitor: 470 pF to 3.3 µF CTW pin capacitor: 0.001 µF to 10 µF Fig.13 ●Pin assignments 8765 1234 Fig.14 BD37A□□FVM No. 1 2 3 4 5 6 7 8 Pin name CLK CT CTW VDD N.C. GND INH Function Clock input from microcontroller Reset delay time setting capacitor connection pin WDT time setting capacitor connection pin Power supply pin NC pin GND pin WDT on/off setting pin INH=H/L:WDT=ON/OFF No. 1 2 3 4 5 6 7 Pin name CTW CT CLK GND VDD INH N.C. BD87A□□FVM / BD99A41F Function WDT time setting capacitor connection pin Reset delay time setting capacitor connection pin Clock input from microcontroller GND pin Power supply pin WDT on/off setting pin INH=H/L:WDT=OFF/ON(BD87A□□FVM) INH=H/L:WDT=ON/OFF(BD99A41F) NC pin RESET Reset output pin 8 RESET Reset output pin www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F ●I/O Circuit diagram CT INH CT Technical Note VDD VDD VDD VDD 10Ω(Typ.) CLK INH CT CTW VDD VDD RESET RESET CTW Fig.15 ●Timing chart V DETH V DD V DET 0 INH (BD37A□□FVM／BD99A41F) WDT circuit turns off when INH is low. V DETH = VDET + Vrhys 0 INH (BD87A□□FVM) WDT circuit turns off when INH is high. 0 CLK 0 *4 TWCLK TWCLK V CT V CTH 0 VthH V CTW 0 VthL *2 *1 T PLH TWH *3 TWL R ESET 0 (1)( 2) (3) (4) (5) ( 4) (5) (6) (7) (7) (4) (5)(8) (9) (4) (5) (10) (2)(3) (4) (5) (10) (2) (3) (4) (5) (10)(11) Fig.16 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F Technical Note ●Explanation 1) The RESET pin voltage (RESET) switches to low when the power supply voltage (VDD) falls to 0.8 V. 2) The external capacitor connected to the CT pin begins to charge when VDD rises above the reset detection voltage (VDETH). The RESET signal stays low until VDD reaches the VDETH voltage and switches to high when VDD reaches or exceeds the VDETH voltage. The RESET transmission delay time TPLH allowed to elapse before RESET switches from low to high is given by the following equation: TPLH (s)  0.69 × Rrst × CT (µF)   [1] Rrst denotes the IC's built-in resistance and is designed to be 10 MΩ (Typ.). CT denotes the external capacitor connected to the CT pin. The external capacitor connected to the CTW pin begins to charge when RESET rises, triggering the watchdog timer. The CTW pin state switches from charge to discharge when the CTW pin voltage (VCTW) reaches VthH, and RESET switches from high to low. The watchdog timer monitor time TWH is given by the following equation: TWH (s)  (0.5 × CTW (µF))/(ICTWC)   [2] ICTWC denotes the CTW charge current and is designed to be 0.50 µA (Typ.). CTW denotes the external capacitor connected to the CTW pin. 3) 4) 5) The CTW pin state switches from charge to discharge when VCTW reaches VthL, and RESET switches from low to high. The watchdog timer reset time TWL is given by the following equation: TWL (s)  (0.5 × CTW (µF))/(ICTWO)   [3] ICTWO denotes the CTW discharge current and is designed to be 1.50 µA (Typ.). 6) The CTW pin state may not switch from charge to discharge when the CLK input pulse width TWCLK is short. Use a TWCLK input pulse width of at least 500 ns. TWCLK ≥ 500 ns (Min.) When a pulse (positive edge trigger) of at least 500 ns is input to the CLK pin while the CTW pin is charging, the CTW state switches from charge to discharge. Once it discharges to VthL, it will charge again. Watchdog timer operation is forced off when the INH pin switches to low:BD37A □□ FVM (Switches to high: BD87A□□FVM, BD97A41F). At that time, only the watchdog timer is turned off. Reset detection is performed normally. The watchdog timer function turns on when the INH pin switches to high. The external capacitor connected to the CTW pin begins to charge at that time. 7) 8) 9) 10) RESET switches from high to low when VDD falls to the RESET detection voltage (VDET) or lower. 11) When VDD falls to 0 V, the RESET signal stays low until VDD reaches 0.8 V. ●Heat reduction curve MSOP8 800 When mounted on a glass epoxy board (70 mm  70 mm  1.6mm) ja = 212.8 (°C /W) 800 When mounted on a glass epoxy board (70 mm  70 mm  1.6mm) ja = 181.8 (°C /W) SOP8 POWER DISSIPATION: Pd [mW] 600 470mW 400 POWER DISSIPATION: Pd [mW] 600 550mW 400 200 105℃ 200 105℃ 0 0 25 50 75 100 125 0 0 25 50 75 100 125 AMBIENT TEMPERATURE: Ta [℃] AMBIENT TEMPERATURE: Ta [℃] Fig.17 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F Technical Note ●External settings for pins and precautions 1) Connect a capacitor (0.001 µF to 1,000 µF) between the VDD and GND pins when the power line impedance is high. Use of the IC when the power line impedance is high may result in oscillation. 2) External capacitance A capacitor must be connected to the CTW pin. When using a large capacitor such as 1 µF, the INH pin must allow a CTW discharge time of at least 2 ms. The power-on reset time is given by equation [1] on page 5. The WDT time is given by equations [2] and [3] on page 5, 6. The setting times are proportional to the capacitance value from the equations, so the maximum and minimum setting times can be calculated from the electrical characteristics according to the capacitance. Note however that the electrical characteristics do not include the external capacitor's temperature characteristics. ●Notes for use 1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2) GND voltage The potential of GND pin must be minimum potential in all operating conditions. 3) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4) Inter-pin shorts and mounting errors Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if pins are shorted together. 5) Actions in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 6) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting or storing the IC. 7) Regarding input pin of the IC This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor. For example, the relation between each potential is as follows: ○When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode. ○When GND > Pin B, the P-N junction operates as a parasitic transistor. Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used. Resistor (Pin A) (Pin B) C Transistor (NPN) B E (Pin B) B C E P+ N N P P P+ N Parasitic element N P+ N P P+ N (Pin A) GND Parasitic element or transistor P substrate Parasitic element or transistor GND GND Parasitic element Fig. 18 Example of IC structure www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F Technical Note 8) Ground Wiring Pattern When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. 9) Applications or inspection processes with modes where the potentials of the VDD pin and other pins may be reversed from their normal states may cause damage to the IC’s internal circuitry or elements. Use an output pin capacitance of 1000 µF or lower in case VDD is shorted with the GND pin while the external capacitor is charged. It is recommended to insert a diode for preventing back current flow in series with VDD or bypass diodes between Vcc and each pin. Back current prevention diode Bypass diode VDD Pin Fig.19 10) When VDD falls below the operating marginal voltage, output will be open. When output is being pulled up to input, output will be equivalent to VDD. 11) Input pin The CLK and INH pins comprise inverter gates and should not be left open. (These pins should be either pulled up or down.) Input to the CLK pin is detected using a positive edge trigger and does not affect the CLK signal duty. Input the trigger to the CLK pin within the TWH time. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/10 2010.12 - Rev.A BD37A19FVM, BD37A41FVM, BD87A28FVM, BD87A29FVM, BD87A34FVM, BD87A41FVM, BD99A41F ●Ordering part number Technical Note B D 3 7 A 1 9 F V M - T R Part No. BD Part No. 37A19, 37A41, 87A28, 87A29, 87A34, 87A41 99A41 Package FVM : MSOP8 F : SOP8 Packaging and forming specification TR: Embossed tape and reel (MSOP8) E2: Embossed tape and reel (SOP8) MSOP8 2.9±0.1 (MAX 3.25 include BURR) 8765 Tape 0.29±0.15 0.6±0.2 Embossed carrier tape 3000pcs TR The direction is the 1pin of product is at the upper right when you hold +6° 4° −4° Quantity Direction of feed 4.0±0.2 2.8±0.1 ( reel on the left hand and you pull out the tape on the right hand 1pin ) 1 234 1PIN MARK 0.475 0.9MAX +0.05 0.145 −0.03 S 0.75±0.05 0.08±0.05 +0.05 0.22 −0.04 0.08 S 0.65 Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. SOP8 5.0±0.2 (MAX 5.35 include BURR) 8 7 6 5 +6° 4° −4° 0.9±0.15 0.3MIN Tape Quantity Direction of feed Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold 6.2±0.3 4.4±0.2 ( reel on the left hand and you pull out the tape on the right hand ) 12 3 4 0.595 1.5±0.1 +0.1 0.17 -0.05 S 0.1 0.11 S 1.27 0.42±0.1 1pin Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/10 2010.12 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. 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The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. 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More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A