BD8P250MUF-CE2

Datasheet 2.7 V to 36 V Input, 2 A Single Buck DC/DC Converter with Boost Function For Automotive BD8P250MUF-C General Description Key Specifications BD8P250MUF-C is a synchronous rectification buck DC/DC converter with a boost control function. This DC/DC converter enables a common design that can meet a variety of demands, including the use as a buck DC/DC converter if a drop of the output voltage is acceptable during the input voltage drop such as a cold cranking, and the use as a buck-boost DC/DC with an exclusive boost-FET connected if the output voltage must be maintained. The Quick Buck Booster® technology realizes a high-speed response even during buck-boost operations, allowing reduction in the capacitance value of the output capacitor. Package Features                  Input Voltage A: 3.5 V to 36 V (Buck DC/DC Converter, Initial startup is over 4.8 V)  Input Voltage B: 2.7 V to 36 V (Buck-Boost DC/DC Converter, Initial startup is over 7.5 V)  Output Voltage: 5.0 V(Typ)  Output Current in Buck Operation: 2 A(Max)  Output Current in Buck-Boost Operation: 0.8 A(Max)  Switching Frequency: 2.2 MHz(Typ)  Shutdown Circuit Current: 3.5 µA(Typ)  Quiescent Current: 8 µA(Typ)  Operating Temperature: -40 °C to +125 °C Quick Buck Booster® Nano Pulse Control™ AEC-Q100 Qualitied (Note 1) Boost Control Function LLM(Light Load Mode) Spread Spectrum Function Power Good Function Soft Start Function Current Mode Control Phase Compensation Included Over Current Protection Input Under Voltage Lockout Protection Thermal Shutdown Protection Output Over Voltage Protection Short Circuit Protection Wettable Flank QFN Package W(Typ) x D(Typ) x H(Max) 4.00 mm x 4.00 mm x 1.00 mm VQFN24FV4040 Enlarged View VQFN24FV4040 Wettable Flank Package (Note 1) Grade 1 Applications  Automotive Equipment (Cluster Panel, Infotainment Systems)  Other Electronic Equipment Typical Application Circuit BD8P250MUF-C VIN VIN BD8P250MUF-C CBOOT VIN BOOT L1 SW PVIN VIN L1 VOUT VCC_EX RCTL MODE COUT CTLOUT RPGOOD RPGOOD SSCG PGOOD PGND A. Buck DC/DC Converter COUT MODE PGOOD VREG GND PGND VCC_EX VMODE VOUT PVOUT CTLIN EN CIN CTLOUT SSCG SW2 VOUT EN VMODE Exclusive Boost-FET BD90302NUF-C SW PVIN VOUT CIN CBOOT BOOT VREG GND CREG PGND CREG B. Buck-Boost DC/DC Converter (Use Exclusive Boost-FET) Figure 1. Application Circuit Quick Buck Booster® is a registered trademark of ROHM Co., Ltd. Nano Pulse Control™ is a trademark of ROHM Co., Ltd. 〇Product structure : Silicon integrated circuit www.rohm.com © 2018 ROHM Co., Ltd. All rights reserved. TSZ22111 • 14 • 001 〇This product has no designed protection against radioactive rays 1/42 TSZ02201-0J1J0AL01400-1-2 11.Sep.2018 Rev.001 BD8P250MUF-C GND VCC_EX VOUT PGOOD 22 21 20 19 MODE VREG 24 23 Pin Configuration EN 1 18 CTLOUT VIN 2 17 SSCG PVIN 3 16 N.C PVIN 4 15 BOOT PVIN 5 14 SW N.C 6 13 SW 9 10 11 12 N.C N.C N.C SW 7 8 PGND PGND EXP-PAD (TOP VIEW) Figure 2. Pin Configuration Pin Descriptions Pin No. Pin Name Function 1 EN Enable pin. Apply Low-level (0.8 V or lower) to turn this device off. Apply High-level (2.0 V or higher) to turn this device on. This pin must be terminated. 2 VIN Power supply input pin of the internal circuitry. Connect this pin to PVIN pin. 3to5 PVIN Power supply input pins that are used for the output stage of the switching regulator. Connecting input ceramic capacitors with values of 4.7 µF(Typ) and 0.1 µF to this pin is recommended. 6 N.C No connection pin. Leave these pins open, or connect to PVIN pin. 7,8 PGND 9to10 N.C. No connection pin. Leave these pins open, or connect to PGND pin. 11 N.C. No connection pin. Leave this pin open. 12to14 SW 15 BOOT 16 N.C. 17 SSCG 18 CTLOUT 19 PGOOD 20 VOUT 21 VCC_EX 22 GND 23 VREG 24 MODE - EXP-PAD Ground pins for the output stage of the switching regulator. Switching node pins. These pins are connected to the source of the High Side FET and drain of the Low Side FET. Connect a bootstrap capacitor of 0.1 µF between this pin and the SW pins. The voltage of this capacitor is the gate drive voltage of the High Side FET. No connection pin. Leave this pin open. Pin to select Spread Spectrum function. Connect this pin to VREG pin or GND pin. Connect to VREG pin to enable Spread Spectrum function and connect to GND pin to disable Spread Spectrum function. Pin used to control the exclusive Boost-FET. When using the exclusive Boost-FET, connect this pin to CTLIN pin of the exclusive Boost-FET. Connect this pin to GND pin through a pull-down 1 kΩ resistor when not using the exclusive Boost-FET. Power Good pin, an open drain output. Connect to VREG pin or suitable voltage supply through a pull-up resistor. Using a 10 kΩ to 100 kΩ resistance is recommended. Sense pin of output voltage. This pin is controlled to become 5.0 V(Typ). Internal power supply pin. Connect this pin to VOUT pin. Ground pin. Internal power supply output pin. This node supplies power 5.0 V(Typ) to other blocks which are mainly responsible for the control function of the switching regulator. Connect a ceramic capacitor with value of 1.0 µF(Typ) to ground. Pin for setting switching control mode. Turning this pin’s signal to Low-level (0.8 V or lower) enables the LLM control and the mode is automatically switched between the LLM control and PWM (Pulse Wide Modulation) control. Turning this pin’s signal to High-level (2.0 V or higher) enables the forced PWM control.This pin must be terminated. A backside heat dissipation pad. Connecting to the internal PCB ground plane by using via provides excellent heat dissipation characteristics. www.rohm.com © 2018 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 2/42 TSZ02201-0J1J0AL01400-1-2 11.Sep.2018 Rev.001 BD8P250MUF-C Block Diagram VCC_EX VREG VIN VREF VREG tsdout tsdout VREF TSD GND VIN uvloout UVLO VREF porout POR pgout OSC SSCG clk BOOST Comp MODE MODE mode clk Boost Duty VO UT CTLOUT VIN pgout EN VREF scpout VOUT VREG porout SCP HOCP Comp uvloout scpout ovpout mode FB GmAmp1 BOOT VREG Clamper PVIN GmAmp2 PWM Comp VREF Vc Control Logic Soft Start clk SLEEP Comp Ramp Driver SW Vr ZX Comp sleep VREF Current Sense VREF PGOOD pgout PGND PGOOD VREF OVP ovpout Figure 3. Block Diagram www.rohm.com © 2018 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 3/42 TSZ02201-0J1J0AL01400-1-2 11.Sep.2018 Rev.001 BD8P250MUF-C Description of Blocks •GmAmp1 This block is an error amplifier and its inputs are the reference voltage VREF and the division voltage FB of VOUT pin. It controls the GmAmp1 output such that the VREF voltage and the FB voltage equal. •GmAmp2 This block sends the signal Vc which is composed of the GmAmp1 output and the current sense signal to PWM Comp. •Soft Start It is a function to prevent overshoot of inrush current and the output voltage by gradually raising the input reference voltage of GmAmp1 upon power supply ON. Soft start time is 1.0 ms(Typ). •OSC This block generates the clock frequency. Connect SSCG pin to GND pin to disable Spread Spectrum function and connect SSCG pin to VREG pin to enable it. This function becomes invalid when PGOOD output is Low or during Buck-Boost operation. •Ramp This block generates the saw tooth waveform Vr from the clock signal generated by OSC. •Current Sense This block detects the amount of change in inductor current through the Low Side FET and sends a current sense signal to GmAmp2. •Clamper This block clamps GmAmp1 output voltage and inductor current. It works as over current protection and LLM control current. •PWM Comp This block compares the saw tooth waveform Vr with the GmAmp2 output Vc and controls the duty cycle of the output switching pulse. •Control Logic This block receives the signal generated by the PWM Comp and outputs the control signal to the output MOSFET. In addition, it controls ON/OFF of the switching during light load and upon abnormal detection. •TSD This block is a thermal shutdown circuit. It will shut down the device to prevent thermal damage or a thermal-runaway of the device when the chip temperature reaches to approximately 175 °C(Typ) or more. When the chip temperature falls below the TSD threshold, the circuits are automatically restored to normal operation with hysteresis of 25 °C(Typ). Note that the thermal shutdown circuit is intended to prevent destruction of the device. Therefore, it is highly recommended to always keep the device temperature within Tjmax = 150 °C. Operation above operating temperature range will reduce the lifetime of the device. The restart need the input voltage like the startup. The regulator restarts the operation with soft start. •SCP This is the short circuit protection circuit. Turns OFF the output stage MOSFET for 15.4 ms (Typ) if it detects the VOUT pin voltage to be 55 % (Typ) or lower for 0.1 ms (Typ) or longer. Then, a restart is performed with the soft start. The SCP functions is masked for 1.4 ms (Typ) after the soft start. The input voltage required for the restoration is the same as that for the startup. •OVP This is the output over voltage protection circuit. When it detects the VOUT pin voltage is 120 % (Typ) or more for 1 µs (Typ) or longer, the output MOSFET are turned OFF. When it detects the VOUT pin voltage is less than 120 % (Typ) for 7 µs (Typ) or longer, it returns to normal operation. •UVLO The UVLO block is for under voltage lockout protection. It will shut down the device when the VIN falls to 2.4 V(Typ) or lower. The release voltage is 4.45 V(Typ) when the exclusive Boost-FET is not used, and is 7.15 V(Typ) when used with the exclusive Boost-FET. The regulator restarts the operation with soft start when the release voltage is satisfied. •VREG This block is the internal power supply circuit. It outputs 5.0 V(Typ) and is the power supply to the control circuit and driver. The input of this block during startup is the VIN pin voltage. When the PGOOD output becomes High, the VCC_EX pin voltage becomes its input supply, and consequently, high efficiency is achieved. •VREF The VREF block generates the internal reference voltage. www.rohm.com © 2018 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 4/42 TSZ02201-0J1J0AL01400-1-2 11.Sep.2018 Rev.001 BD8P250MUF-C Description of Blocks – continued •MODE When MODE pin is 2.0 V or more, the device works by forced PWM control. When MODE pin is 0.8 V or less, the device enables the LLM control and the mode is automatically switched between the LLM control and PWM control. However, during Buck-Boost operation, the device works on forced PWM control. •Driver This circuit drives the gates of the output MOSFET. •PGOOD When the VOUT pin voltage reaches within ±5 %, the built-in Nch MOSFET turns OFF and the PGOOD output turns High. In addition, the PGOOD output turns Low when the VOUT pin voltage reaches outside ±10 %. •POR The POR block is the input under voltage lockout protection for the internal power supply. It will shut down the device when the VREG voltage falls to 2.85 V (Typ) or less. When the release voltage of 3.0 V (Typ) is satisfied, the regulator restarts the operation with soft start. •SLEEP Comp This block controls the VOUT pin voltage in PFM control from 101 % of PWM control to 102 % of PWM control. •ZX Comp This block stops the switching by detecting the reverse SW output current at LLM control. •BOOST Comp, Boost Duty This is the control circuit of the Boost signal. When used with the exclusive Boost-FET, PGOOD output is High and the VIN pin voltage becomes 140 % (Typ) or less of the VOUT pin voltage, an ON pulse with 70 % (Typ) duty is output by CTLOUT pin and putting the device in Buck-Boost operation. It returns to Buck operation with 10 % (Typ) of hysteresis. •HOCP Comp This block limits current of the High Side FET. When it detects current of 4 A (Min) or more, High Side FET is turned OFF. This function works only in abnormal situations such as when the SW pin is shorted to GND. www.rohm.com © 2018 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 5/42 TSZ02201-0J1J0AL01400-1-2 11.Sep.2018 Rev.001 BD8P250MUF-C Absolute Maximum Ratings (Ta=25°C) Parameter Input Voltage Symbol Rating Unit VVIN, VPVIN -0.3 to +42 V EN Voltage VEN -0.3 to +42 V VBOOT -0.3 to +49 V ΔVBOOT -0.3 to +7 V VMODE, VSSCG, VVOUT, VVCC_EX, VVREG, VPGOOD, VCTLOUT -0.3 to +7 V Tjmax 150 ˚C Tstg -55 to +150 ˚C BOOT Voltage Voltage from SW to BOOT MODE, SSCG, VOUT, VCC_EX, VREG, PGOOD, CTLOUT Voltage Maximum Junction Temperature Storage Temperature Range Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating. Thermal Resistance (Note 1) Parameter Symbol Thermal Resistance (Typ) Unit 1s(Note 3) 2s2p(Note 4) θJA 107.4 32.6 °C/W ΨJT 9 4 °C/W VQFN24FV4040 Junction to Ambient Junction to Top Characterization Parameter (Note 2) (Note 1) Based on JESD51-2A(Still-Air). (Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface of the component package. (Note 3) Using a PCB board based on JESD51-3. (Note 4) Using a PCB board based on JESD51-5, 7. Layer Number of Measurement Board Single Material Board Size FR-4 114.3 mm x 76.2 mm x 1.57 mmt Top Copper Pattern Thickness Footprints and Traces 70 μm Layer Number of Measurement Board 4 Layers Material Board Size FR-4 114.3 mm x 76.2 mm x 1.6 mmt Top 2 Internal Layers Thermal Via(Note 5) Pitch Diameter 1.20 mm Φ0.30 mm Bottom Copper Pattern Thickness Copper Pattern Thickness Copper Pattern Thickness Footprints and Traces 70 μm 74.2 mm x 74.2 mm 35 μm 74.2 mm x 74.2 mm 70 μm (Note 5) This thermal via connects with the copper pattern of all layers. www.rohm.com © 2018 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 6/42 TSZ02201-0J1J0AL01400-1-2 11.Sep.2018 Rev.001 BD8P250MUF-C Recommended Operating Conditions Parameter Input Voltage A (Not use Exclusive Boost-FET) Input Voltage B (Use Exclusive Boost-FET) Operating Temperature Output Current in Buck Operation Output Current in Buck-Boost Operation SW Minimum ON Time(Note1) Input Capacitor (Note2) VREG Capacitor(Note2) Symbol Min Typ Max Unit VINA 3.5 - 36 V VINB 2.7 - 36 V Topr -40 - +125 ˚C IOUTBUCK - - 2.0 A IOUTBOOST - - 0.8 A tONMIN - 45 - ns CIN 2.3 4.7 - µF CREG 0.48 1.0 2.1 µF (Note 1) This parameter is for 1A output. Not 100 % tested. (Note 2) Ceramic capacitor is recommended. The capacitor value including temperature change, DC bias change, and aging change must be considered. Electrical Characteristics (Unless otherwise specified Ta = -40 ˚C to +125 ˚C, VIN = 12 V, VEN = 5 V) Parameter Symbol Limit Min Typ Max Unit Conditions VIN Shutdown Circuit Current ISDN - 3.5 7.0 µA Quiescent Current (VIN) IQVIN - 1.4 2.8 µA Quiescent Current (VOUT) IQVOUT - 16 32 µA UVLO Detection Voltage VUVLOL 2.2 2.4 2.6 V UVLO Release Voltage A VUVLOHA 4.25 4.45 4.65 V UVLO Release Voltage B VUVLOHB 6.9 7.15 7.4 V EN Threshold Voltage High VENH 2.0 - VIN V EN Threshold Voltage Low VENL 0 - 0.8 V IEN - 0 1.0 µA MODE Threshold Voltage High VMODEH 2.0 - 5.5 V MODE Threshold Voltage Low VMODEL 0 - 0.8 V IMODE - 0 1.0 µA SSCG Threshold Voltage High VSSCGH 2.0 - 5.5 V SSCG Threshold Voltage Low VSSCGL 0 - 0.8 V ISSCG - 0 1.0 µA VREG Voltage VREG 4.80 5.00 5.20 V POR Detection Voltage VPORL 2.70 2.85 3.00 V VEN=0 V, Ta