BD91361MUV

Single-chip Type with Built-in FET Switching Regulators Output 2A More High-efficiency Step-down Switching Regulator with Built-in Power MOS FET BD91361MUV No.10027EAT44 ●Description ROHM’s high efficiency step-down switching regulator BD91361MUV is a power supply designed to produce a low voltage including 0.8 volts from 5.5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control technology and synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in load. ●Features 1) Offers fast transient response with current mode PWM control system. 2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Nch FET) TM and SLLM (Simple Light Load Mode) 3) Incorporates soft-start function. 4) Incorporates thermal protection and ULVO functions. 5) Incorporates short-current protection circuit with time delay function. 6) Incorporates shutdown function Icc=0µA(Typ.) 7) Employs small surface mount package: VQFN020V4040 ●Applications Power supply for LSI including DSP, Micro computer and ASIC ●Absolute maximum rating (Ta=25℃) Parameter VCC Voltage PVCC Voltage BST Voltage BST_SW Voltage EN Voltage SW,ITH Voltage Power Dissipation 1 Power Dissipation 2 Power Dissipation 3 Power Dissipation 4 Operating temperature range Storage temperature range Maximum junction temperature *1 *2 *3 *4 *5 Symbol VCC PVCC VBST VBST-SW VEN VSW, VITH Pd1 Pd2 Pd3 Pd4 Topr Tstg Tj Ratings -0.3～+7 *1 -0.3～+7 *1 -0.3～+13 -0.3～+7 -0.3～+7 -0.3～+7 0.34 *2 0.70 *3 2.21 *4 3.56 *5 -40～+105 -55～+150 +150 Unit V V V V V V W W W W ℃ ℃ ℃ Pd should not be exceeded. IC only 1-layer. mounted on a 74.2mm×74.2mm×1.6mm glass-epoxy board, occupied area by copper foil : 10.29mm2 4-layer. mounted on a 74.2mm×74.2mm×1.6mm glass-epoxy board, 1st and 4th copper foil area : 10.29mm2 , 2nd and 3rd copper foil area : 5505mm2 4-layer. mounted on a 74.2mm×74.2mm×1.6mm glass-epoxy board, occupied area by copper foil : 5505mm2, in each layers www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/17 2010.06 - Rev.A BD91361MUV ●Operating conditions (Ta=-40～+105℃) Parameter Symbol VCC Power Supply Voltage PVCC EN Voltage Logic input voltage Output voltage Setting Range SW average output current VEN VID VOUT ISW 2.7 0 0 0.8 3.3 5.5 5.5 5.5 3.3*6 4.0*7 V V V V A Ratings Min. 2.7 Typ. 3.3 Max. 5.5 V Unit Technical Note *6 In case set output voltage 1.6V or more, VCCMin = Vout+1.2V. *7 Pd should not be exceeded. ●Electrical characteristics ◎BD91361MUV (Ta=25℃ VCC=PVCC=3.3V, EN=VCC, R1=10kΩ, R2=5kΩ, unless otherwise specified.) Limits Parameter Symbol Unit Conditions Min. Typ. Max. Standby current Active current EN Low voltage EN High voltage EN input current VID Low voltage VID High voltage VID input current Oscillation frequency High side FET ON resistance Low side FET ON resistance ADJ Voltage ITH SInk current ITH Source Current UVLO threshold voltage UVLO release voltage Soft start time Timer latch time Output Short circuit Threshold Voltage ISTB ICC VENL VENH IEN VVIDL VVIDH IVID FOSC RONH RONL VADJ ITHSI ITHSO VUVLO1 VUVLO2 TSS TLATCH VSCP 2.0 2.0 0.8 0.788 10 10 2.400 2.425 0.5 0.5 0 250 GND Vcc 3 GND Vcc 3 1 60 55 0.800 18 18 2.500 2.550 1 1 0.40 10 500 0.8 10 0.8 10 1.2 90 85 0.812 2.600 2.700 2 2 0.56 MHz mΩ mΩ V µA µA V V ms ms V VADJ =0.8V→0V PVCC=3.3V PVCC=3.3V VID=(0,0) VADJ=1V VADJ=0.6V VCC=3.3V→0V VCC=0V→3.3V VVID=3V µA µA V V µA Standby mode Active mode VEN=3.3V EN=GND www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/17 2010.06 - Rev.A BD91361MUV ●Block Diagram, Application Circuit 【BD91361MUV】 4.0±0.1 Technical Note 4.0±0.1 D9136 1 V CC EN VCC 1.0Max. Lot No. VREF BST Current Comp Current Sense/ Protect + Driver Logic PVCC PGND GND PVCC Input S VID SELECTOR VID Gm Amp + Soft Start 0.02 +0.03 -0.02 (0.22) + SLOPE OSC VCC UVLO TSD SCP RQ S CLK 0.08 S SW Output C0.2 2.1±0.1 1 5 0.4±0.1 16 15 11 10 1.0 2.1±0.1 20 6 0.5 0.25 +0.05 -0.04 ADJ R2 R1 ITH R ITH CITH VQFN020V4040 (Unit : mm) Fig.1 TOP View Fig.2 Block Diagram ●Pin No. & function table Pin No. 1 2 3 4 5 6 7 8 9 10 Pin name SW SW SW SW SW PVCC PVCC PVCC BST VCC SW pin SW pin SW pin SW pin SW pin Highside FET source pin Highside FET source pin Highside FET source pin Bootstrapped voltage input pin VCC power supply input pin Function Pin No. 11 12 13 14 15 16 17 18 19 20 Pin name GND ADJ ITH VID VID N.C. EN PGND PGND PGND Ground Output voltage detect pin GmAmp output pin/Connected phase compensation capacitor Output voltage control pin Output voltage control pin Non Connection Enable pin(High Active） Lowside FET source pin Lowside source pin Lowside source pin Function www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/17 2010.06 - Rev.A BD91361MUV ●Characteristic curves (Reference data) 2.0 Technical Note 2.0 2.0 【VOUT=1.2V】 OUTPUT VOLTAGE:VOUT[V] OUTPUT VOLTAGE:VOUT[V] 【VOUT=1.2V】 OUTPUT VOLTAGE:VOUT[V] 【VOUT=1.2V】 1.6 1.6 1.6 Ta=25℃ 1.2 1.2 1.2 VCC=2.7V 0.8 0.8 0.8 0.4 Ta=25℃ Io=3A 0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5 0.4 VCC=5V Ta=25℃ Io=0A 0 1 2 3 EN VOLTAGE:VEN[V] 4 5 0.4 0.0 VCC= 5.5V 0 2 4 6 8 OUTPUT CURRENT:IOUT[A] 10 0.0 0.0 Fig.3 Vcc-VouT Fig.4 VEN-VOUT Fig.5 IOUT-VOUT 1.25 1.24 OUTPUT VOLTAGE:VOUT[V] 100 1200 【VOUT=1.2】 【VOUT=1.2V】 90 EFFICIENCY:η[%] 1.23 1.22 1.21 1.20 1.19 1.18 1.17 1.16 1.15 -40 -20 0 20 40 60 80 TEMPERATURE:Ta[℃] 100 1000 FREQUENCY:FOSC[kHz] 800 600 400 200 0 10 100 1000 OUTPUT CURRENT:IOUT[mA] 10000 -40 -20 0 20 40 60 80 100 80 70 60 50 40 30 VCC=5V Io=0A VCC=5V Ta=25℃ VCC=5V TEMPERATURE:Ta[℃] Fig. 6 Ta-VOUT Fig.7 Efficiency Fig.8 Ta-Fosc 80 400 2.0 High side ON RESISTANCE:R ON [Ω] 1.8 CIRCUIT CURRENT:Icc[μA] 350 300 250 200 150 100 50 0 -40 -20 0 20 40 60 80 100 70 EN VOLTAGE:VEN[V] 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -40 -20 0 20 40 60 80 100 60 Low side 50 VCC=3.3V 40 -40 -20 0 20 40 60 TEMPERATURE:Ta[℃] 80 100 VCC=5V VCC=5V TEMPERATURE:Ta[℃] TEMPERATURE:Ta[℃] Fig.9Ta-RONN,RONP Fig.10 Ta-VEN Fig.11 Ta-ICC www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/17 2010.06 - Rev.A BD91361MUV Technical Note 1.1 【VOUT=1.2V】 FREQUENCY:FOSC[MHz] 1 【SLLMTM control SW VOUT=1.2V】 VCC=PVCC =EN 0.9 0.8 Ta=25℃ VOUT VOUT VCC=5V Ta=25℃ Io=0A VCC=5V Ta=25℃ 0.7 2.7 3.4 4.1 4.8 INPUT VOLTAGE:VCC[V] 5.5 Fig.12 Power supply voltageOperating frequency Fig.13 Soft start waveform Fig.14 SW waveform Io=0mA 【PWM control VOUT=1.2V】 【VOUT=1.2V】 【VOUT=1.2V】 SW VOUT VOUT IOUT VCC=5V Ta=25℃ VCC=5V Ta=25℃ IOUT VCC=5V Ta=25℃ Fig.15 SW waveform Io=4A Fig. 16 Transient Response Io=1A→4A(20µs) Fig.17 Transient Response Io=4A→1A(20µs) 【VOUT=1.2V】 VID[1:0]=(1,1)→(0,0) 【VOUT=1.2V】 VID[1:0]=(0,0)→(1,1) 1.44V 1.2V 1.44V 1.2V Fig.18 Change Response Fig.19 Change Response www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/17 2010.06 - Rev.A BD91361MUV ●Information on advantages Technical Note Advantage 1 : Offers fast transient response with current mode control system. BD91361MUV (Load response IO=1A→3A) Conventional product (Load response IO=1A→3A) VOUT 145mV VOUT 62mV IOUT IOUT Voltage drop due to sudden change in load was reduced by about 50%. Fig.20 Comparison of transient response Advantage 2 : Offers high efficiency for all load range. ・For lighter load: Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as switching dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load. Achieves efficiency improvement for lighter load. ・For heavier load: Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor. ON resistance of High side MOS FET : 82mΩ(Typ.) ON resistance of Low side MOS FET : 70mΩ(Typ.) Efficiency η[%] 100 SLLMTM ② 50 ① PWM ①inprovement by SLLM system ②improvement by synchronous rectifier Achieves efficiency improvement for heavier load. Offers high efficiency for all load range with the improvements mentioned above. 0 0.001 0.01 0.1 Output current Io[A] 1 Fig.21 Efficiency Advantage 3 : ・Supplied in smaller package due to small-sized power MOS FET incorporated. ・Output capacitor Co required for current mode control: 22µF ceramic capacitor ・Inductance L required for the operating frequency of 1 MHz: 2.2µH inductor ・Incorporates FET + Boot strap diode Reduces a mounting area required. EN V CC VCC VREF 20mm BST VID SELECTOR Current Comp + SLOPE VCC RQ S Gm Amp Current Sense/ Protect + Driver Logic PVCC PVCC Input Rf Output VID SW CLK + Soft Start 15mm PGND GND R1 R2 Cf C BST R ITH CITH CIN L UVLO TSD SCP Co ADJ ITH R2 R1 R ITH CITH Fig.22 Example application www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/17 2010.06 - Rev.A BD91361MUV Technical Note ●Operation BD91361MUV is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency. ○Synchronous rectifier It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. ○Current mode PWM control Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback. ・PWM (Pulse Width Modulation) control The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a highside MOS FET (while a lowside MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the highside MOS FET (while a lowside MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation. ・SLLMTM (Simple Light Load Mode) control When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching dissipation and improves the efficiency. SENSE Current Comp RESET Level Shift Gm Amp. ITH OSC RQ FB SET S Driver Logic SW Load IL VOUT VOUT Fig.23 Diagram of current mode PWM control Current Comp SET PVCC SENSE FB GND GND GND IL(AVE) Current Comp SET PVCC SENSE FB GND GND RESET SW IL RESET SW GND IL 0A VOUT VOUT(AVE) VOUT VOUT(AVE) Not switching Fig.24 PWM switching timing chart Fig.25 SLLM TM switching timing chart www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/17 2010.06 - Rev.A BD91361MUV ●Description of operations Technical Note ・Soft-start function EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. ・Shutdown function With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0µF (Typ.). ・UVLO function Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of 50mV (Typ.) is provided to prevent output chattering. Hysteresis 50mV VCC EN VOUT Tss Soft start Standby mode Operating mode Standby mode UVLO Tss Tss Operating mode Standby mode EN Operating mode Standby mode UVLO UVLO Fig.26 Soft start, Shutdown, UVLO timing chart ・Short-current protection circuit with time delay function Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO. EN 1msec VOUT Output Current in non-control 1/2VOUT Until output voltage goes up the half of Vo or over, timer latch is not operated. (No timer latch, only limit to the output current) Output voltage OFF Latch Limit IL Output Current in control by limit value (With fall of the output voltage, limit value goes down) Standby mode Operated mode Standby mode Operated mode EN Timer Latch EN Fig.27 Short-current protection circuit with time delay timing chart www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/17 2010.06 - Rev.A BD91361MUV ●Switching regulator efficiency Efficiency ŋ may be expressed by the equation shown below: Technical Note ×100[%] Vin×Iin Pin POUT+PDα Efficiency may be improved by reducing the switching regulator power dissipation factors PDα as follows: Dissipation factors: 1) ON resistance dissipation of inductor and FET : PD(I2R) 2) Gate charge/discharge dissipation : PD(Gate) 3) Switching dissipation : PD(SW) 4) ESR dissipation of capacitor : PD(ESR) 5) Operating current dissipation of IC : PD(IC) 2 2 1)PD(I R)=IOUT ×(RCOIL+RON) (RCOIL[Ω] : DC resistance of inductor, RON[Ω] : ON resistance of FET, IOUT[A] : Output current.) 2)PD(Gate)=Cgs×f×V (Cgs[F] : Gate capacitance of FET, f[H] : Switching frequency, V[V] : Gate driving voltage of FET) 2 Vin ×CRSS×IOUT×f 3)PD(SW)= (CRSS[F]:Reverse transfer capacitance of FET, IDRIVE[A]:Peak current of gate.) IDRIVE 2 4)PD(ESR)=IRMS ×ESR (IRMS[A] : Ripple current of capacitor, ESR[Ω] : Equivalent series resistance.) 5)PD(IC)=Vin×ICC (ICC[A] : Circuit current.) η= VOUT×IOUT ×100[%]= POUT ×100[%]= POUT www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/17 2010.06 - Rev.A BD91361MUV Technical Note ●About setting the output voltage Output voltage shifts step by step as often as bit setting to control the overshoot/undershoot that happen when changing the setting value of output voltage. From the bit switching until output voltage reach to setting value, 8 steps(max) delay will occur. VID (0,1) (1,1) 0.96V VOUT 0.72V tVID (max)=0.04ms ⅰ) Switching 2 bit synchronously VID VID ⅲ) Switching the bit during counting Count STOP VOUT Count STOP VOUT 5µs(max) About 10µs from bit switching About 10µs from bit switching ⅱ) Switching 2 bit with the time lag VID VID Count STOP VOUT About 10µs from switching the last bit Fig.28 Timing chart of setting the output voltage It is possible to set output voltage, shown the diagram 1 below, by setting VID～ 0 or 1. VID terminal is set to VID=(0,0) originally by the pull down resistor with high impedance inside IC. By pulling up/ pulling down about 10kΩ, the original value is changeable optionally. Diagram 1. Table of output voltage setting VID 0 1 0 1 VID 0 0 1 1 VOUT VOUT 0.9*VOUT 1.1*VOUT 1.2*VOUT *After 10µs(max) from the bit change, VOUT change starts. *Requiring time for one step (10% shift of VOUT) of VOUT is 10µs(max). *From the bit switching until output voltage reach to setting value, tVID(max)=0.04ms delay will occur. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/17 2010.06 - Rev.A BD91361MUV Technical Note ●Consideration on permissible dissipation and heat generation As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully considered. For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered. Because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation. 4 ①3.56W Power dissipation:Pd [W] 3 ① 4 layers (Copper foil area : 5505mm ) copper foil in each layers. θj-a=35.1℃/W st th 2 ② 4 layers (1 and 4 copper foil area : 10.29m ) nd rd 2 (2 and 3 copper foil area: 5505m ) θj-a=56.6℃/W 2 ③ 1 layer (Copper foil area : 10.29m ) θj-a=178.6℃/W ④ IC only. θj-a=367.6℃/W 2 2 P=IOUT ×RON RON=D×RONP+(1-D)RONN ②2.21W 2 D : ON duty (=VOUT/VCC) RONH : ON resistance of Highside MOS FET RONL : ON resistance of Lowside MOS FET IOUT : Output current 1 ③0.70W ④0.34W 0 0 25 50 75 100 105 125 150 Ambient temperature:Ta [℃] Fig.29 Thermal derating curve (VQFN020V4040) If VCC=3.3V, VOUT=1.8V, RONH=60mΩ, RONL=55mΩ IOUT=4A, for example, D=VOUT/VCC=1.8/3.3=0.545 RON=0.545×0.06+(1-0.545)×0.055 =0.0327+0.0250 =0.0577[Ω] 2 P=4 ×0.0577=0.2309[W] As RONH is greater than RONL in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/17 2010.06 - Rev.A BD91361MUV ●Selection of components externally connected 1. Selection of inductor (L) IL ΔIL Technical Note The inductance significantly depends on output ripple current. As seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. ΔIL= (VCC-VOUT)×VOUT L×VCC×f [A]・・・(1) VCC IL VOUT L Co Appropriate ripple current at output should be 20% more or less of the maximum output current. ΔIL=0.2×IOUTmax. [A]・・・(2) L= (VCC-VOUT)×VOUT ΔIL×VCC×f [H]・・・(3) Fig.30 Output ripple current (ΔIL: Output ripple current, and f: Switching frequency) ※Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. If VCC=5.0V, VOUT=1.2V, f=1MHz, ΔIL=0.2×3A=0.6A, for example,(BD91361MUV) (5-1.2)×1.2 L= =1.52µ → 2.0[µH] 0.6×5×1M ※Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better efficiency. 2. Selection of output capacitor (CO) VCC Output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. Output ripple voltage is determined by the equation (4) : VOUT L ESR Co ΔVOUT=ΔIL×ESR [V]・・・(4) (ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor) ※Rating of the capacitor should be determined allowing sufficient margin against output voltage. A 22µF to 100µF ceramic capacitor is recommended. Less ESR allows reduction in output ripple voltage. Fig.31 Output capacitor 3. Selection of input capacitor (Cin) VCC Cin Input capacitor to select must be a low ESR capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. The ripple current IRMS is given by the equation (5): VOUT L IRMS=IOUT× √ OUT(VCC-VOUT) V VCC IOUT [A]・・・(5) Co < Worst case > IRMS(max.) 2 If VCC=3.3V, VOUT=1.8V, and IOUTmax.=3A, (BD91361MUV) IRMS=2× √ .8(3.3-1.8) 1 3.3 =1.49[ARMS] When Vcc=2×VOUT, IRMS= Fig.32 Input capacitor A low ESR 22µF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/17 2010.06 - Rev.A BD91361MUV Technical Note 4. Determination of RITH, CITH that works as a phase compensator As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier. fp(Min.) A Gain [dB] fp(Max.) 0 fz(ESR) IOUTMin. 0 IOUTMax. fp= 1 2π×RO×CO 1 fz(ESR)= 2π×ESR×CO Pole at power amplifier When the output current decreases, the load resistance Ro increases and the pole frequency lowers. fp(Min.)= 1 [Hz]←with lighter load 2π×ROMax.×CO 1 2π×ROMin.×CO [Hz] ←with heavier load Phase [deg] -90 Fig.33 Open loop gain characteristics fp(Max.)= A Gain [dB] 0 0 Phase [deg] -90 fz(Amp.) Zero at power amplifier Increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (This is because when the capacitance is doubled, the capacitor ESR reduces to half.) fz(Amp.)= 1 2π×RITH×CITH Fig.34 Error amp phase compensation characteristics Rf VCC VOUT Cin EN ADJ ITH RITH CITH Cf PVCC VCC CBST L SW ESR RO VOUT R2 R1 VID VID GND,PGND VCC VCC CO Fig.35 Typical application Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance with CR zero correction by the error amplifier. fz(Amp.)= fp(Min.) 1 2π×RITH×CITH = 1 2π×ROMax.×CO www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/17 2010.06 - Rev.A BD91361MUV 5. Determination of output voltage The output voltage VOUT is determined by the equation (6): VOUT=(R2/R1+1)×VADJ・・・(6) VADJ: Voltage at ADJ terminal (0.8V Typ.) With R1 and R2 adjusted, the output voltage may be determined as required. Adjustable output voltage range : 0.8V～3.3V L 6 SW 1 ADJ Technical Note Output Co R2 R1 Fig.36 Determination of output voltage Use 1 kΩ～100 kΩ resistor for R1. If a resistor of the resistance higher than 100 kΩ is used, check the assembled set carefully for ripple voltage etc. 3.7 INPUT VOLTAGE : VCC[V] The lower limit of input voltage depends on the output voltage. Basically, it is recommended to use in the condition : VCCmin = VOUT+1.2V. Fig.37. shows the necessary output current value at the lower limit of input voltage. (DCR of inductor : 20mΩ) This data is the characteristic value, so it’ doesn’t guarantee the operation range, 3.5 3.3 Vo=2.5V Vo=2.0V Vo=1.8V 3.1 2.9 2.7 0 1 2 3 OUTPUT CURRENT : IOUT[A] Fig.37 minimum input voltage in each output voltage ●BD91361MUV Cautions on PC board layout Fig.38 Layout diagram ①Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin PGND. ②Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring. ※VQFN020V4040 (BD91361MUV) has thermal PAD on the reverse of the package. The package thermal performance may be enhanced by bonding the PAD to GND plane which take a large area of PCB. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/17 2010.06 - Rev.A BD91361MUV ●Recommended components Lists on above application Symbol L CIN CO CITH RITH Cf Rf CBST Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor VOUT=1.2V Resistance Ceramic capacitor Resistance Ceramic capacitor 1000 pF 10Ω 0.1uF 6.8kΩ Rohm Murata Rohm Murata Part Value 2.0uH 22uF 22uF 1000pF Manufacturer Sumida Murata Murata Murata Technical Note Series CDR6D28MNNP-2R0NC GRM32EB11A226KE20 GRM31CB30J226KE18 CRM18 Series MCR03 Series GRM18 Series MCR03 Series GRM18 Series ※The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode or snubber established between the SW and PGND pins. ●I/O equivalence circuit ・EN pin ・SW pin PVCC PVCC PVCC EN SW ・ADJ pin ・ITH pin VCC ADJ ITH ・BST pin PVCC ・VID pin ( VID, VID are the same composition PVCC BST VID SW Fig.39 I/O equivalence circuit www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/17 2010.06 - Rev.A BD91361MUV ●Notes for use Technical Note 1. Absolute Maximum Ratings While utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken, short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. Electrical potential at GND GND must be designed to have the lowest electrical potential In any operating conditions. 3. Short-circuiting between terminals, and mismounting When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and power supply or GND may also cause breakdown. 4. Thermal shutdown protection circuit Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 5. Inspection with the IC set to a pc board If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the inspection process, be sure to turn OFF the power supply before it is connected and removed. 6. Input to IC terminals + This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the N-layer of each element form a P-N junction, and various parasitic elements are formed. If a resistor is joined to a transistor terminal as shown in Fig 40. ○P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or GND>Terminal B (at transistor side); and ○if GND>Terminal B (at NPN transistor side), a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode. The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of parasitic elements. Resistor Pin A Pin A Pin B C Transistor (NPN) B E B P P+ N C E Parasitic element GND Other adjacent elements Pin B N P+ N P P+ N N Parasitic element P+ N Psubstrate Parasitic element GND Parasitic element P substrate GND GND Fig.40 Simplified structure of monorisic IC 7. Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. 8 . Selection of inductor It is recommended to use an inductor with a series resistance element (DCR) 50mΩ or less. Especially, in case output voltage is set 1.6V or more, note that use of a high DCR inductor will cause an inductor loss, resulting in decreased output voltage. Should this condition continue for a specified period (soft start time + timer latch time), output short circuit protection will be activated and output will be latched OFF. When using an inductor over 50mΩ, be careful to ensure adequate margins for variation between external devices and this IC, including transient as well as static characteristics. Furthermore, in any case, it is recommended to start up the output with EN after supply voltage is within operation range. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/17 2010.06 - Rev.A BD91361MUV ●Ordering part number Technical Note B D 9 Part No. 91361 1 3 6 1 M U V - E 2 Part No. Package MUV : VQFN020V4040 Packaging and forming specification E2: Embossed tape and reel (36: Adjustable (0.8 ~ 3.3V)) VQFN020V4040 4.0±0.1 Tape 4.0±0.1 Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold Quantity Direction of feed 1PIN MARK 1.0MAX S ( reel on the left hand and you pull out the tape on the right hand ) 0.08 S 2.1±0.1 0.5 1 20 16 15 11 5 6 10 C0.2 0.4±0.1 1.0 +0.05 0.25 -0.04 2.1±0.1 +0.03 0.02 -0.02 (0.22) 1pin (Unit : mm) Direction of feed Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 17/17 2010.06 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A