D atasheet
4.5V to 13.2V, 2A 1ch Synchronous Buck Converter integrated FET
BD9141MUV
●General Description ROHM’s high efficiency step-down switching regulator BD9141MUV is a power supply designed to produce a low voltage including 5.0/3.3 volts from 2 lithium cell power supply line. Offers high efficiency with our original pulse skip control technology and synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in load. ●Features ■ Offers fast transient response with current mode PWM control system. ■ Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) and SLLM (Simple Light Load Mode) ■ Incorporates soft-start function. ■ Incorporates thermal protection and ULVO functions. ■ Incorporates short-current protection circuit with time delay function. ■ Incorporates shutdown function ●Applications Power supply for LSI including DSP, Micro computer and ASIC VQFN020V4040 ●Typical Application Circuit ●Key Specifications Input voltage range: Output voltage range: Output current: Switching frequency: Pch FET ON resistance: Nch FET ON resistance: Standby current: Operating temperature range: ●Package VQFN020V4040: 4.5V to 13.2V 2.5V to 6.0V 2.0A(Max.) 500KHz(Typ.) 150mΩ(Typ.) 80mΩ(Typ.) 0µA (Typ.) -40℃ to +105℃
(Typ.) (Typ.) (Max.) 4.00mm x 4.00mm x 1.00mm
Fig.1 Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･14･001
○This product is not designed protection against radioactive rays.
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●Pin Configuration (TOP VIEW) N.C. VREG ITH GND ADJ
Datasheet
15 14 13 12 11
N.C. 16 EN PGND
17 18 19 20 1 2 3 4 5
10 Vcc 9 N.C. 8 7 6
PVcc
SW Fig.2 Pin Configuration ●Pin Description Pin No. 1,2,3,4,5 6,7,8 9 10 11 12 13 14 15,16 17 18,19,20 ●Block Diagram
Pin Name SW PVCC N.C. Vcc GND ADJ ITH VREG N.C. EN PGND
Pin Function Pch/Nch FET drain output pin Pch FET source pin Non connection VCC power supply input pin Ground Output voltage detect pin GmAmp output pin/Connected phase compensation capacitor Reference Voltage Non connection Enable pin(Active High) Nch FET source pin
Fig.3 Block Diagram
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●Absolute Maximum Ratings Parameter VCC Voltage PVCC Voltage EN Voltage SW Voltage ITH,VREG,ADJ Voltage Power Dissipation 1 Power Dissipation 2 Power Dissipation 3 Power Dissipation 4 Operating temperature range Storage temperature range Maximum junction temperature
*1 *2 *3 *4 *5
Datasheet
Symbol VCC PVCC VEN VSW VITH,VREG, VADJ, Pd1 Pd2 Pd3 Pd4 Topr Tstg Tjmax
Limits -0.3 to +15 -0.3 to +15
*1 *1
Unit V V V V V W W W W ℃ ℃ ℃
-0.3 to +15 -0.3 to +15 -0.3 to +7 0.34 0.70 2.21 3.56
*2 *3 *4 *5
-40 to +105 -55 to +150 +150
Pd should not be exceeded. IC only. 1 layer, mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB (Copper foil area : 10.29mm2) 4 layers, mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB (1st ,4th Copper foil area : 10.29mm2 2nd ,3rd Copper foil area : 5505mm2) ,. 4 layers, mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB (Copper foil area : 5505mm2) , copper foil in each layers.
●Recommended Operating Ratings Parameter VCC Voltage PVCC Voltage EN Voltage SW average output current Output voltage Setting Range
*6 *7
(Ta=-40 to +105℃) Symbol VCC PVCC VEN Isw
*6 *7 *6 *6
Min. *7 4.5 4.5 0 2.5
*7
Limits Typ. 8.0 8.0 -
Unit Max. 13.2 13.2 VCC 2.0 6.0 V V V A V
VOUT
Pd should not be exceeded. VccMin. = Vout + 1.3V.
●Electrical Characteristics (Ta=25℃, VCC=PVCC=8.0V, EN=VCC, R1=8.2kΩ, R2=43kΩ, unless otherwise specified.) Limits Parameter Symbol Unit Conditions Min. Typ. Max. Standby current ISTB 0 10 µA EN=GND Bias current EN Low voltage EN High voltage EN input current Oscillation frequency Pch FET ON resistance Nch FET ON resistance ADJ Voltage ITH SInk current ITH Source Current UVLO threshold voltage UVLO release voltage Soft start time Timer latch time Output Short circuit Threshold Voltage ICC VENL VENH IEN FOSC RONP RONN VADJ ITHSI ITHSO VUVLO1 VUVLO2 TSS TLATCH VSCP 2.0 400 0.788 10 10 3.90 3.95 0.5 1 300 GND VCC 1.6 500 150 80 0.800 20 20 4.10 4.20 1 2 0.4 500 0.8 10 600 300 160 0.812 4.30 4.50 2 3 0.56 µA V V µA KHz mΩ mΩ V µA µA V V ms ms V SCP/TSD operated VADJ=0.8V→0V VADJ=1.0V VADJ=0.6V VCC=8V→0V VCC=0V→8V PVCC=8V PVCC=8V Standby mode Active mode VEN=8V
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BD9141MUV
●Typical Performance Curves
Datasheet
Fig.4 VCC-VOUT
Fig.5 VEN-VOUT
Fig.6 IOUT-VOUT
Fig.7 Ta-VOUT
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Datasheet
Fig.8 Efficiency
Fig.9 Ta-FOSC
Fig.10 Ta-RONN, RONP
Fig.11 Ta-VEN
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Datasheet
Fig.12 Ta-Icc
Fig.13 VCC-FOSC
Fig.14 Soft start waveform
Fig.15 SW waveform Io=10mA
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Datasheet
Fig.16 SW waveform Io=2000mA
Fig.17 Transient response Io=0.5A→1A(10µs)
Fig.18 Transient response Io=1A→0.5A(10µs)
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BD9141MUV
Application Information
Datasheet
●Operation BD9141MUV is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency. ○Synchronous rectifier It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. ○Current mode PWM control Synthesizes a PWM control signal with a inductor current feedback loop added to the v oltage feedback. ・PWM (Pulse Width Modulation) control The oscillation frequency for PWM is 500kHz. SET signal form OSC turns ON a P-channel MOS FET (while a N-channel MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two signals, a current feedback control signal (SENSE: Voltage converted from I L) and a voltage feedback control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the P -channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation. ・SLLM (Simple Light Load Mode) control When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Curren t Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching dissipation and improves the efficiency.
SENSE Current Comp RESET Level Shift Gm Amp. ITH OSC RQ FB SET S Driver Logic SW Load IL VOUT
VOUT
Fig.19 Diagram of current mode PWM control
PVCC SENSE FB SET GND GND GND IL(AVE) SET PVCC SENSE FB GND GND
Current Comp
Current Comp
RESET SW IL
RESET SW
GND IL 0A
VOUT
VOUT(AVE)
VOUT
VOUT(AVE)
Fig.20 PWM switching timing chart
Fig.21 SLLM
TMNot switching
switching timing chart
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Datasheet
●Description of Operations ・Soft-start function EN terminal shifted to “High” activates a soft -starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. ・Shutdown function With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0µA (Typ.). ・UVLO function Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. of 100mV (Typ.) is provided to prevent output chattering.
Hysteresis 100mV
And the hysteresis width
VCC
EN
VOUT
Tss Soft start Standby mode Operating mode Standby mode
Tss
Tss
Operating mode
Standby mode
Operating mode
Standby mode
UVLO
UVLO
EN
UVLO
Fig.22 Soft start, Shutdown, UVLO timing chart
・Short-current protection circuit with time delay function Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re -unlocking UVLO.
EN Output OFF latch
Output Short circuit Threshold Voltage VOUT IL Limit IL
Standby mode
t1 IRMS(max.) 2 If VCC=8V, VOUT=5V, and IOUTmax.=2A, (BD9140MUV) IRMS=2× √ 5(8-5) 3 .3 3 . 3 =0.97[ARMS] When Vcc is twice the VOUT, IRMS=
Fig.30 Input capacitor
A low ESR 22µF/25V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency. 4. Determination of RITH, CITH that works as a phase compensator As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a CR filter consisting of a output capaci tor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier.
fp(Min.) A Gain [dB] fp(Max.) 0 fz(ESR) IOUTMin. 0 IOUTMax.
1 2π×RO×CO 1 fz(ESR)= 2π×ESR×CO fp= Pole at power amplifier When the output current decreases, the load resistance Ro increases and the pole frequency lowers. fp(Min.)= 1 [Hz]←with lighter load 2π×ROMax.×CO 1 2π×ROMin.×CO [Hz] ←with heavier load
Phase [deg]
-90
Fig.31 Open loop gain characteristics fp(Max.)=
A Gain [dB] 0 0 Phase [deg] -90
fz(Amp.)
Zero at power amplifier
Increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. reduces to half.) (This is because when the capacitance is doubled, the capacitor ESR
fz(Amp.)= Fig.32 Error amp phase compensation characteristics
1 2π×RITH×CITH
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BD9141MUV
VCC Cin EN VOUT VOUT ITH RITH CITH GND,PGND L SW ESR CO RO VOUT
Datasheet
VCC,PVCC
Fig.33 Typical application
Stable feedback loop may be achieved by cancelin g the pole fp (Min.) produced by the output capacitor and the load resistance with CR zero correction by the error amplifier. fz(Amp.)= fp(Min.) 1 2π×RITH×CITH = 1 2π×ROMax.×CO
5. Determination of output voltage The output voltage VOUT is determined by the equation (6): VOUT=(R2/R1+1)×VADJ・・・(6) VADJ: Voltage at ADJ terminal (0.8V Typ.) With R1 and R2 adjusted, the output voltage may be determined as required.
L SW Co R2
Output
ADJ
Adjustable output voltage range : 2.5V to 6.0V
R1
Fig.34 Determination of output voltage
Use 1 kΩ to 100 kΩ resistor for R1. if you can use the resistance more than 100kΩor they have a big range between the setting value of output voltage and input voltage.
8 7.5
Vo=6.0V The minimum input voltage depends on the setting output voltage. Basically, it is recommended to use in the condition : VCCmin = VOUT+1.3V. It is shown the necessary output current value at the minimum input voltage. (DCR of inductor : 0.1Ω)See Fig.35. This data is the characteristic value, so it doesn ’t guarantee the operation range.
INPUT VOLTAGE : VCC[V]
7 6.5 6 5.5 5
Vo=5.0V
Vo=4.0V Vo=3.3V
0 0.5 1 1.5 2
6.Selection of the reference voltage capacitor (CVREG) VREG voltage is the reference voltage created by Input voltage (Vcc Voltage). CVREG capacitor should be selected 0.1µF or more.
4.5
OUTPUT CURRENT : IOUT[A]
Fig.35 minimum input voltage in each output voltage
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●Cautions on PC Board Layout VCC R2 ADJ R1 VCC VREG CVREG RITH ③ CITH ITH GND SW PGND CIN ② Co EN EN
Datasheet
PVCC L ① VOUT
GND Fig.36 Layout diagram ① For the sections drawn with heavy line, use thick conductor pattern as short as possible. ② Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin PGND. ③ Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring. ④ The Non connection pin must be left open or connected to GND. ※VQFN020V4040 (BD9141MUV) has thermal FIN on the reverse of the package. The package thermal performance may be enhanced by bonding the FIN to GND plane which take a large area of PCB. ●Recommended Components Lists on Above Application Symbol L CIN CO CVREG CITH RITH Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor Ceramic capacitor Resistance Vo=5V Vo=3.3V Vo=5V Part Value 4.7µH 22µF 22µF 0.1µF Vo=3.3V 1000pF 1000pF 20kΩ 47kΩ Manufacturer TDK kyocera kyocera murata murata murata Rohm Rohm Series RLF7030T-4R7M3R4 CM32X5R226M25A CM32X5R226M10A GRM188B31H104KA92 GRM1882C1H102JA01 GRM1882C1H102JA01 MCR03 Series MCR03 Series
※The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins . When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode established between the SW and PGND pins.
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BD9141MUV
●I/O Equivalence Circuit
・EN pin ・SW pin
PVCC PVCC PVCC
Datasheet
EN SW
・ADJ pin
・ITH pin
VCC
ADJ ITH
・VREG pin
VCC
VCC
VREG
Fig.37 I/O equivalence circuit
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BD9141MUV
Datasheet
●Operational Notes 1. Absolute Maximum Ratings While utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken, short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. Electrical potential at GND GND must be designed to have the lowest electrical potential In any operating conditions . 3. Short-circuiting between terminals, and mismounting When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and power supply or GND may also cause breakdown. 4. Operation in Strong electromagnetic field Be noted that using the IC in the strong electromagnetic radiation can cause operation failures. 5. Thermal shutdown protection circuit Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. Inspection with the IC set to a pc board If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storag e. When connecting to jigs in the inspection process, be sure to turn OFF the power supply before it is connected and removed. 7. Input to IC terminals + This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the N-layer of each element form a P-N junction, and various parasitic element are formed. If a resistor is joined to a transistor terminal as shown in Fig 38. ○P-N junction works as a parasitic diode if the following relationship is sat isfied; GND>Terminal A (at resistor side), or GND>Terminal B (at transistor side); and ○if GND>Terminal B (at NPN transistor side), a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode. The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of parasitic elements.
Resistor Pin A Pin A
N N P+ P P+ N N
Transistor (NPN) Pin B
C B E B P P+ N C E
Pin B
Parasitic element
P+
N
P substrate Parasitic element
GND
P substrate Parasitic element
GND GND
Parasitic element Other adjacent elements
GND
Fig.38 Simplified structure of monorisic IC 8. Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large -current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large c urrent will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. 9. Selection of inductor It is recommended to use an inductor with a series resistance elem ent (DCR) 0.1Ω or less. When using an inductor over 0.1Ω, be careful to ensure adequate margins for variation between external devices and this IC, including transient as well as static characteristics. Furthermore, in any case, it is recommended to start up the output with EN after supply voltage is within operation range Status of this document The Japanese version of this document is formal specification. A customer may use this translation version only for a referen ce to help reading the formal version. If there are any differences in translation version of this document formal version takes priority.
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BD9141MUV
●Ordering Information
Datasheet
B
D
9
1
4
1
M
U
V
E2
Packaging and forming specification E2: Embossed tape and reel
Part Number
Package MUV: VQFN020V4040
●Physical Dimension Tape and Reel Information
●Marking Diagram VQFN020V4040 (TOP VIEW) Part Number Marking
D9141
LOT Number
1PIN MARK
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●Revision History Date 17.Jan.2012 Revision 001 New Release Changes
Datasheet
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Datasheet Datasheet
Notice
●Precaution for circuit design 1) The products are designed and produced for application in ordinary electronic equipment (AV equipment, OA equipment, telecommunication equipment, home appliances, amusement equipment, etc.). If the products are to be used in devices requiring extremely high reliability (medical equipment, transport equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or operational error may endanger human life and sufficient fail-safe measures, please consult with the ROHM sales staff in advance. If product malfunctions may result in serious damage, including that to human life, sufficient fail-safe measures must be taken, including the following: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits in the case of single-circuit failure 2) The products are designed for use in a standard environment and not in any special environments. Application of the products in a special environment can deteriorate product performance. Accordingly, verification and confirmation of product performance, prior to use, is recommended if used under the following conditions: [a] Use in various types of liquid, including water, oils, chemicals, and organic solvents [b] Use outdoors where the products are exposed to direct sunlight, or in dusty places [c] Use in places where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use in places where the products are exposed to static electricity or electromagnetic waves [e] Use in proximity to heat-producing components, plastic cords, or other flammable items [f] Use involving sealing or coating the products with resin or other coating materials [g] Use involving unclean solder or use of water or water-soluble cleaning agents for cleaning after soldering [h] Use of the products in places subject to dew condensation The products are not radiation resistant. Verification and confirmation of performance characteristics of products, after on-board mounting, is advised. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. Confirm that operation temperature is within the specified range described in product specification. Failure induced under deviant condition from what defined in the product specification cannot be guaranteed.
3) 4) 5)
6) 7) 8)
●Precaution for Mounting / Circuit board design 1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the remainder of flux may negatively affect product performance and reliability. 2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the Company in advance.
Regarding Precaution for Mounting / Circuit board design, please specially refer to ROHM Mounting specification ●Precautions Regarding Application Examples and External Circuits 1) If change is made to the constant of an external circuit, allow a sufficient margin due to variations of the characteristics of the products and external components, including transient characteristics, as well as static characteristics. 2) The application examples, their constants, and other types of information contained herein are applicable only when the products are used in accordance with standard methods. Therefore, if mass production is intended, sufficient consideration to external conditions must be made.
Notice - Rev.001
Datasheet Datasheet
●Precaution for Electrostatic This product is Electrostatic sensitive product, which may be damaged due to Electrostatic discharge. Please take proper caution during manufacturing and storing so that voltage exceeding Product maximum rating won't be applied to products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). ●Precaution for Storage / Transportation 1) Product performance and soldered connections may deteriorate if the products are stored in the following places: [a] Where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] Where the temperature or humidity exceeds those recommended by the Company [c] Storage in direct sunshine or condensation [d] Storage in high Electrostatic 2) Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using products of which storage time is exceeding recommended storage time period . Store / transport cartons in the correct direction, which is indicated on a carton as a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. Use products within the specified time after opening a dry bag.
3) 4)
●Precaution for product label QR code printed on ROHM product label is only for internal use, and please do not use at customer site. It might contain a internal part number that is inconsistent with an product part number. ●Precaution for disposition When disposing products please dispose them properly with a industry waste company. ●Precaution for Foreign exchange and Foreign trade act Since concerned goods might be fallen under controlled goods prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. ●Prohibitions Regarding Industrial Property 1) Information and data on products, including application examples, contained in these specifications are simply for reference; the Company does not guarantee any industrial property rights, intellectual property rights, or any other rights of a third party regarding this information or data. Accordingly, the Company does not bear any responsibility for: [a] infringement of the intellectual property rights of a third party [b] any problems incurred by the use of the products listed herein. 2) The Company prohibits the purchaser of its products to exercise or use the intellectual property rights, industrial property rights, or any other rights that either belong to or are controlled by the Company, other than the right to use, sell, or dispose of the products.
Notice - Rev.001
