BD9611MUV-E2

High Performance Switching Regulator 60V Synchronous Step-down Switching Regulator (Controller Type) BD9611MUV ● General Description The BD9611MUV is a high-resistance, wide voltage input (10V to 56V), synchronous step-down switching regulator. BD9611MUV offers design flexibility through user-programmable functions such as soft-start, operating frequency, high-side current limit, and loop compensation. BD9611MUV uses voltage pulse width modulation, and drives 2 external N-channel FETs. The Under-Voltage Locked Output (EXUVLO) protection connected to its CTL terminal has high accuracy reference voltage. Its threshold voltage can be adjusted by the resistance ratio between VCC and GND as seen by pin CTL. BD9611MUV is safe for pre-biased outputs. It does not turn on the synchronous rectifier until the internal high-side FET has already started switching ● Key Specifications ■ Input Supply Voltage ■ Output Voltage ■ Reference Voltage Accuracy ■ Gate Drive Voltage (REG10) ■ Operating frequency ● Package VQFN020V4040 ● Features ■ High Resistance and Wide Range Voltage Input : VCC=10V to 56V ■ Regulated Voltage Output to Drive External FET gate: REG10=10V ■ Internal Reference Voltage Accuracy: 0.8V±1.0% ■ Safe for Pre-biased Outputs ■ Adjustable Operating Frequency and Soft-start ■ Master/Slave Synchronization ■ Over Current Protection (OCP) ■ Under Voltage Locked Output (UVLO, EXUVLO) ■ Thermal Shut-down (TSD) 10 to 56 [V] 1.0 to (Vin×0.8) [V] ±1.0 [%] 9 to 11 [V] 50 to 500 [kHz] 4.00 ㎜×4.00 ㎜×1.00 ㎜ ● Applications ■ Amusement machines ■ Factory Automation Equipment ■ Office Automation Equipment ■ LED lighting ■ General equipment that require 24V or 48V supply ● Typical Application Circuit (Vo=12V, Io=10A) ● Efficiency Curve 200kΩ 1μF 28.26kΩ CTL FB 1kΩ 15kΩ 180pF 2200pF 140kΩ 10kΩ VIN =15Vto56V 5mΩ 90 BST SS HG Nch 0.01μF 0.1μF 100 20kΩ INV REG5 VIN 10μF×4 CLH CLL RCL 0.47μF BD9611MUV SUD23N06-31L (Vishay Siliconix) LX RTSS 10μF×4 Vo VOUT =12V 5μH (DCR=3mΩ) 0.01μF RT REG10 220μF Efficiency [%] Vo Efficiency: η=95% (VIN=34V, IOUT=10A, fOSC=250kHz) VCC 80 70 Vin=34V,Vo=12V 60 75kΩ SYNC LG Nch 1μF CLKOUT 50 RSD221N06 (ROHM) 0 5 10 15 Iout [A] GND PGND ○ STRUCURE: Silicon Monolithic Integrated Circuit www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 ○ Not designed to operate under radioactive environments 1/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Pin Configuration (Top View) 15 14 13 ● Pin Description 12 11 Pin no. 16 10 17 9 Thermal Pad 18 (＊) 8 19 7 20 6 1 2 3 4 Pin Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 GND SS INV FB RCL RT RTSS CLKOUT PGND SYNC LG REG10 LX HG BST CLL CLH VCC CTL REG5 Description Ground Programmable Soft-start Inverting input to the error amplifier Output of the error amplifier Programmable current limit setting Programmable frequency setting Reference voltage pin for RT Internal clock pulse output Ground Synchronization input for the device Gate driver for external Low-side, N-channel FET Output of 10V internal regulator Connect to switching node of the converter Gate driver for external High-side, N-channel FET Gate drive voltage input for the High-side N-channel FET Inverting input to current detector Input to current detector Power supply Shutdown pin Output of 5V internal regulator 5 ( * ) Connecting the thermal pad to GND is recommended to improve thermal dispersion characteristic. ● Block Diagram VCC VCC CTL VCC 20uA±25% REG5 stb ocp EXUVLO FB Pulse by pulse Hiccup After 2count 2.6V ±3% exuvlo UVLO uvlo (VCC,REG5, REG10) TSD REG5 stb ocp exuvlo uvlo tsd tsd REG5 REG5 INV REG5 LOGIC PWM ERR BST DRV VCC (Internal/Synchronize) REG5 REG5 stb OSC 5V REG GND www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 LX VCC REG5 0.8V±1% REG10 10V REG DRV stb RTSS RT SYNC 2/37 HG uvlo Low-side Min. ON SS CLH CLL RCL OCP CLKOUT LG PGND TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Functional Description of Blocks 1. 5VREG Supplies regulated 5V to internal circuits (5V ± 2%). It is available as an external supply for applications requiring a maximum current of 2mA or less. 2. ERR (Error Amp) Error amplifier output depends on detected VOUT output and is used as PWM control signal. Internal reference voltage is 0.8V (Accuracy: ±1%). Connect capacitor and resistor between inverting pin (INV) and output pin (FB) as phase compensation elements. 3. Soft Start A circuit that prevents in-rush current during startup through soft start operation of DC-DC comparator output voltage. The external capacitor of pin SS is charged with an internal source current (1uA). This produces a voltage slope input to the error amplifier and performs as the start-up reference voltage. 4. OSC This is an oscillator that serves as reference of the PWM modulation. The frequency of the internally generated triangle wave is controlled by an external resistor RRT connected to RT pin, and can vary within 50kHz to 500kHz. RT pin outputs the RTSS voltage buffer. CLKOUT outputs the oscillator-generated square wave. OSC can be synchronized to an external clock through the SYNC pin. 5. PWMCOMP This is a comparator for PWM modulation which compares the output of the error amplifier and ramp wave from OSC to decide the switching duty. Switching duty is limited by HG min OFF time (350ns) because of the charging of BST-LX capacitor. 6. DRV It drives the external FETs. High side DRV in particular has built in UVLO. 7. 10VREG It outputs a regulated 10V that is used as supply voltage for the low-side driver. It is also used to charge the capacitor between BST and LX through an internal switch. 8. UVLO This is a low voltage error prevention circuit. It prevents internal circuit error during changes in the power supply voltage by monitoring VCC, REG5 and REG10. Its operation turns off both external FETs and resets the soft-start function whenever a threshold is met for any of the monitored voltages. 9. EXUVLO This is a low voltage error prevention circuit with adjustable VCC detect and release threshold voltages. The threshold voltages can be adjusted through external resistances between VCC and GND. When the CTL input voltage is greater than the EXUVLO threshold voltage of 2.6V (±3%), a 20uA (±25%) constant current flows to the CTL terminal. Once the CTL input voltage becomes lower than this threshold, both the high-side and low-side FETs are turned off and the SS terminal capacitor is discharged. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 3/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV 10. TSD This is a circuit which protects the IC from excessive heat by executing thermal shut down. When it detects an abnormal temperature exceeding the Maximum Junction Temperature (TJ=150℃), it turns off both external FETs. TSD employs hysteresis and the IC automatically resumes normal operation once the temperature is less than the release threshold. 11. OCP This is an Over Current Protection circuit that uses a two-tier approach. The first tier is a pulse-by-pulse protection scheme. Current limit is implemented on the high-side FET by sensing the CLH-CLL voltage when the gate is driven high. The CLH-CLL voltage is compared to the threshold voltage configured by the RCL resistor. If the CLH-CLL voltage exceeds the threshold, the switching pulse is immediately terminated. The FET remains off until the next switching cycle is initiated. The second tier consists of a fault counter. The fault counter is incremented whenever an over-current pulse is detected. When the counter reaches two within three successive pulses, both FETs, FB and SS are all turned off for a specified time. Afterwards, both FETs, FB and SS are released and automatically restarted with soft-start. 12. CTL The voltage applied to pin CTL (VCTL) can control the ON / OFF state of the IC. When VCTL > 2.4V is applied, internal regulators turn on. DRV turns on next when VCTL > 2.8V is applied. A current value of approximately (VCTL - 5.6V) / 100kΩ sink to CTL whenever VCTL > 5.6V because of a 5.6V clamping circuit connected after a 100kΩ internal resistance and the CTL terminal. If the CTL terminal becomes open after reaching the release voltage of EXUVLO, the IC is unable to turn off because of the internal constant current source at CTL. The IC turns off when VCTL < 0.3V is applied. In this condition, the stand-by current is approximately 0uA. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 4/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Absolute Maximum Ratings Item *1 Symbol Rating Unit Supply voltage VCC 60 V CTL pin VCTL VCC V BST pin VBST 70 V LX pin VLX VCC V Between BST pin – LX pin VBSTLX 15 V HG pin VHG VLX to VBST V LG pin VLG 0 to VREG10 V REG10 pin VREG10 15 V REG5 pin VREG5 7 V SYNC pin VSYNC 7 V INV pin VINV VREG5 V CLH pin VCLH VLX V CLL pin VCLL VLX V 3.56 *1 Power Dissipation PD W Operating Temperature Range TOPR -40 to +105 ℃ Storage Temperature Range TSTG -55 to +150 ℃ Junction Temperature TJMAX 150 ℃ When mounting on a 70×70×1.6 mm 4-layer board (Copper area: 70mm×70mm). Pd is reduced by 28.5mW for every 1℃ increase in temperature above 25℃. ● Operating Ratings Item Symbol Range Power supply voltage VCC 10 to 56 Configurable output voltage VOUT CTL input voltage CTL Unit V 1.0 to (Vin×0.8V) 0 to VCC *3 *2 V V Frequency FOSC 50 to 500 kHz RT resistor RRT 33 to 470 kΩ RTSS capacitor CRTSS 0.01 to 1.0 uF Synchronization frequency SYNCFRQ FOSC ± 10% kHz SYNC input duty SYNCDTY 40 to 60 % OCP program resistor RRCL 3.3 to 20 kΩ *2 Please refer to p.25 (13) regarding programmed output voltage (for output voltage dependent on *3 CTL remains at “H” state due to hysteresis constant current, whenever CTL terminal is opened after EXUVLO release voltage had been detected. Please refer to p.26 (14). input voltage, frequency, load current etc.) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 5/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Electrical Characteristics (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) LIMIT PARAMETER SYMBOL MIN TYP MAX UNIT CONDITION 【OSCILLATOR】 Frequency FOSC 93 100 107 kHz RT=200kΩ RTSS maximum current (sink/source) IRTSS 2.5 5 10 uA VRTSS=0V/1.0V VRTSSTH 0.45 0.5 0.55 V IRTSSP 50 100 200 uA VRTSS=0.3V ISSSO 0.7 1 1.3 uA SS=1.0V UVLO threshold (VCC) VUTHVCC 8.5 9.0 9.5 V VCC rise-up UVLO threshold (REG10) VUTHR10 7.9 8.7 9.5 V REG10 rise-up UVLO threshold (REG5) VUTHR5 4.2 4.5 4.8 V REG5 rise-up UVLO hysteresis (VCC) VUHSVCC - 0.5 1.0 V VCC pin UVLO hysteresis (REG10) VUHSR10 - 0.5 1.0 V REG10 pin UVLO hysteresis (REG5) VUHSR5 - 0.2 0.4 V REG5 pin UVLO threshold (CTL) VEXUTH 2.522 2.6 2.678 V CTL rise-up UVLO hysteresis current IUVHYS -25 -20 -15 uA CTL=5V VNON 0.792 0.8 0.808 V INV=FB INV=0.8V RTSS pre-charge threshold RTSS pre-charge current 【SOFT START】 SS source current 【UVLO】 【ERROR AMPLIFIER】 Reference voltage INV input bias current IBINV - 0.01 1.0 uA FB max voltage VFBH REG5-0.5 - REG5 V FB min voltage VFBL - 0 0.5 V FB sink current IFBSI 0.5 2 - mA FB=1.25V, INV=1.5V FB source current IFBSO 60 120 - uA FB=1.25V, INV=0V VT0 1.4 1.5 1.6 V 0% Duty, FB pin vol. HGMIN 150 350 450 ns FB=3V Output driver PchFET Ron RONH - 6 10 Ω Iout=0.1A Output driver NchFET Ron RONL - 1 3 Ω Iout=0.1A 【PWM COMPARATOR】 Input threshold voltage HG min OFF pulse width 【OUTPUT DRIVER】 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 6/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Electrical Characteristics (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) LIMIT PARAMETER SYMBOL UNIT CONDITION 240 mV Between CLH and CLL (RCL=7.5kΩ) 200 300 ns - 2 - counts In series or in every other cycle THICCUP - 32768 - cycles T=1/FOSC, Hold time=T×THICCUP REG10 output voltage VREG10 9 10 11 V REG5 output voltage VREG5 4.9 5.0 5.1 V REG5 current ability IREG5 10 30 - mA V=VREG5×0.95 ISYNC - 8 16 uA SYNC=5V MIN TYP MAX VOCPTH 160 200 OCP propagation delay to output TOCP - OCP counts to hiccup NOCP 【CURRENT LIMIT】 OCP threshold voltage OCP shut-down hold cycles 【REGULATOR】 【SYNCHRONIZE OSCILLATOR】 SYNC input current SYNC input voltage H VSYNCH 2.8 - 5.0 V SYNC input voltage L VSYNCL GND - 0.3 V CLKOUT output range VCLKOUT REG5-0.5 REG5 REG5+0.5 V CLKOUT sink current ICLKSI 1.5 3 - mA CLKOUT=0.5V CLKOUT source current ICLKSO 1.5 3 - mA CLKOUT=4.5V CTL output current ICTL 15 20 25 uA CTL=5V CTL input voltage L VCTLL GND - 0.3 V CTL input voltage1 H VCTL1H 2.2 - 2.4 V REG5, REG10 start up CTL input voltage2 H VCTL2H 2.8 - VCC V DRV start up Stand-by current ISC - 0 5.0 uA CTL=0V Quiescent current ICC 1.0 2.0 4.0 mA INV=5V 【WHOLE DEVICE】 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 7/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● 110.0 110.0 108.0 108.0 106.0 106.0 104.0 104.0 102.0 102.0 FOSC [kHz] FOSC [kHz] Typical Performance Curves 1 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 100.0 98.0 96.0 100.0 98.0 96.0 94.0 94.0 92.0 92.0 90.0 90.0 -40 -10 20 50 80 110 0 12 24 Ta [ºC] Fig.1 FOSC-Ta 48 60 Fig.2 FOSC-VCC 8.0 8.0 7.0 7.0 6.0 6.0 5.0 5.0 IRTSS [uA] IRTSS [uA] 36 VCC [V] 4.0 3.0 4.0 3.0 2.0 2.0 1.0 1.0 0.0 0.0 -40 -10 20 50 Ta [℃] 80 110 -40 20 50 Ta [℃] 80 110 Fig.4 IRTSS-Ta (VRTSS=1V) Fig.3 IRTSS-Ta (VRTSS=0V) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 -10 8/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Typical Performance Curves 2 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 0.8 150.0 140.0 130.0 120.0 0.6 110.0 IRTSS [uA] Pre-charge Threshold Voltage [V] 0.7 0.5 0.4 100.0 90.0 80.0 70.0 0.3 60.0 50.0 0.2 -40 -10 20 50 Ta [℃] 80 110 -40 -10 20 50 Ta [℃] 80 110 Fig.6 RTSS Pre-charge Current-Ta Fig.5 RTSS Pre-charge Threshold-Ta [IRTSSP] 2.0 400 1.8 350 1.6 300 1.2 250 1.0 200 ISS [uA] ISS [uA] 1.4 0.8 150 0.6 100 0.4 50 0.2 0.0 0 -40 -10 20 50 Ta [℃] 80 110 -40 20 50 Ta [℃] 80 110 Fig.8 SS Sink Current-Ta (VSS=1V, Protection) Fig.7 SS Source Current-Ta (VSS=1V) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 -10 9/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Typical Performance Curves 3 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 2.75 2.70 9.5 EXUVLO Threshold Voltage [V] VCC UVLO Threshold Voltage [V] 10.0 Release 9.0 8.5 Detect 8.0 7.5 2.65 2.60 2.55 2.50 2.45 -40 -10 20 50 Ta [°C] 80 110 -40 20 50 Ta [℃] 80 110 Fig.10 EXUVLO (CTL)-Ta 24.0 24.0 23.0 23.0 22.0 22.0 21.0 21.0 20.0 20.0 ICTL [uA] ICTL [uA] Fig.9 VCC UVLO-Ta -10 19.0 19.0 18.0 18.0 17.0 17.0 16.0 16.0 -40 -10 20 50 Ta [℃] 80 110 0 Fig.11 UVLO Hysteresis Current-Ta www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 12 24 36 VCC [V] 48 60 Fig.12 UVLO Hysteresis Current-VCC 10/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Typical Performance Curves 4 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 0.806 0.808 0.806 0.804 0.804 0.802 0.800 NON [V] NON [V] 0.802 0.798 0.800 0.798 0.796 0.796 0.794 0.794 0.792 -40 -10 20 50 Ta [℃] 80 0 110 24 36 VCC [V] 48 60 Fig.14 Reference Voltage-VCC 4.0 140.0 3.0 120.0 2.0 100.0 IFB [uA] IFB [mA] Fig.13 Reference Voltage-Ta 12 1.0 80.0 0.0 60.0 -40 -10 20 50 Ta [℃] 80 110 -40 Fig.15 FB Sink current-Ta www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 -10 20 50 Ta [℃] 80 110 Fig.16 FB Source current-Ta 11/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV Typical Performance Curves 5 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 500 0 80 -45 60 -90 40 -135 20 -180 0 -225 -20 -270 100 1K 10K 100K 1M 400 HG Min Off Pulse [ns] Gain(dB) 100 Phase Shift(deg) ● 300 200 100 0 10M -40 -10 20 Frequency(Hz) Fig.17 Error Amp Response-Frequency 50 Ta [°C] 80 110 Fig.18 HG Min Off Pulse-Ta 10.0 2.0 8.0 1.5 Ron (Nch) [Ω ] Ron (Pch) [Ω ] 6.0 4.0 1.0 0.5 2.0 0.0 0.0 -40 -10 20 50 80 110 -40 -10 20 50 80 Ta [°C] Ta [°C] Fig.19 FET Ron –Ta (Pch) Fig.20 FET Ron –Ta (Nch) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 12/37 110 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Typical Performance Curves 6 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 260.0 150.0 120.0 ICLH 220.0 90.0 200.0 ICLL [uA] OCP Threshold Voltage [V] 240.0 180.0 ICLL 60.0 30.0 160.0 No. 59 OCP threshold-Ta 140.0 0.0 -40 -10 20 50 Ta [℃] 80 110 -40 -10 50 Ta [℃] 80 110 Fig.22 ICLH, ICLL-Ta 11.0 11.0 10.8 10.8 10.6 10.6 10.4 10.4 10.2 10.2 REG10 [V] REG10 [V] Fig.21 OCP Threshold Voltage-Ta 20 10.0 9.8 9.6 10.0 9.8 9.6 9.4 9.4 9.2 9.2 9.0 9.0 -40 -10 20 50 Ta [°C] 80 0 110 24 36 VCC [V] 48 60 Fig.24 REG10 Line Regulation Fig.23 REG10-Ta www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 12 13/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV Typical Performance Curves 7 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 5.20 5.20 5.15 5.15 5.10 5.10 5.05 5.05 5.00 5.00 REG5 [V] REG5 [V] ● 4.95 4.95 4.90 4.90 4.85 4.85 4.80 4.80 -40 -10 20 50 Ta [℃] 80 110 0 15 Fig.25 REG5-Ta 30 VCC [V] 45 60 Fig.26 REG5-VCC 60.0 12.0 55.0 10.0 Sync Input Current [uA] REG5 Current Ability [mA] 50.0 45.0 40.0 35.0 30.0 8.0 6.0 4.0 2.0 25.0 0.0 20.0 -40 -10 20 50 80 0 110 Ta[℃] Fig.27 REG5 Current Ability -Ta www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 1 2 3 4 5 Sync Input Voltage [V] 6 7 Fig.28 ISYNC-VSYNC 14/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV Typical Performance Curves 8 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 10.0 20.0 8.0 16.0 6.0 12.0 ICLKOUT [uA] ICLKOUT [uA] ● 4.0 2.0 8.0 4.0 0.0 0.0 0 1 2 3 VCLKOUT [V] 4 5 0 Fig.29 CLKOUT Sink Current - VCLKOUT 1 2 3 VCLKOUT [V] 4 5 Fig.30 CLKOUT Source Current - VCLKOUT 50.0 3.00 0.0 DRV Start Up 2.60 CTL Threshold Voltage [V] -50.0 ICTL [uA] -100.0 -150.0 -200.0 -250.0 -300.0 2.20 Regulator Start Up 1.80 1.40 1.00 0 5 10 15 VCTL [V] 20 25 -10 20 50 80 110 Ta [℃] Fig.31 ICTL-VCTL www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 -40 Fig.32 CTL Threshold Voltage -Ta 15/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV Typical Performance Curves 9 (Unless otherwise specified: Ta=25℃, VCC=CTL=24V, RT=200kΩ) 1.0 5.0 0.8 4.0 0.6 3.0 ICC [mA] ICC [uA] ● Ta=105℃ 0.4 0.2 2.0 1.0 0.0 0.0 0 15 30 VCC [V] 45 60 Fig.33 Stand-by Current -VCC 0 15 30 VCC [V] 45 60 Fig.34 Quiescent Current -VCC 5.0 4.0 ICC [ms] 3.0 2.0 1.0 0.0 -40 -10 20 50 Ta [°C] 80 110 Fig.35 Quiescent Current -Ta www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 16/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Reference Application (Vo=12V/ Io=10A) 200kΩ 1μF 28.26kΩ CTL Vo VCC FB 1kΩ VIN =15V to 56V CLL RCL 15kΩ 140kΩ 5mΩ 180pF 2200pF 20kΩ INV 10kΩ VIN 10μF×4 CLH BST SS HG Nch 0.01μF REG5 0.1μF SUD23N06-31L (Vishay Siliconix) 0.47μF BD9611MUV LX RTSS 10μF×4 VOUT =12V Vo 5μH (DCR=3mΩ) 0.01μF RT 220μF REG10 75kΩ SYNC LG Nch RSD221N06 (ROHM) 1μF CLKOUT PGND GND Reference Application data (VCC=34V, Vo=12V, Ta=25℃) 12.5 12.5 12.4 12.4 12.3 12.3 12.2 12.2 Output Voltage[V] Output Voltage[V] ● 12.1 12.0 11.9 11.8 12.1 12.0 11.9 11.8 11.7 11.7 11.6 11.6 11.5 15 20 25 30 35 40 VCC[V] 45 50 55 60 Fig.36 Line Regulation (Io=10A) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 11.5 0.0 2.0 4.0 6.0 8.0 Load Current[A] 10.0 Fig.37 Load Regulation (VCC=34V) 17/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 12.0 BD9611MUV ● Reference Application data (VCC=34V, Vo=12V, Ta=25℃) Io (5A/div) Io (5A/div) Tf =40us Tr=10us Vout (0.5V/div, AC) Vout (0.5V/div, AC) Over-shoot 380mV Under-shoot 480mV 20us/div 20us/div Fig.38 Load Response (Io=0A→10A) Fig.39 Load Response (Io=10A→0A) Start-up (Pre-Bias) Start-up (Soft Start) Vout (1.0V/div, Offset=11V) Vdrop=500mV Vo=12V Vout (5.0V/div) Fig.40 Startup Waves (Soft start) Vo=12V LX (10V/div) LG (10V/div) Icc (0.5A/div) Iccmax=0.3A 1ms/div Fig.40 Start-up Waves (Soft Start) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 ILX (2.0A/div) 20us/div Fig.41 Start-up Waves (Pre-Bias) 18/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV ● Function Description (1) REG5 REGULATOR REG5 is used as an internal power supply and reference voltage. Its maximum load should be less than 2mA. Please connect a ceramic capacitor (CREG5=0.1uF) between REG5 and GND. (2) REG10 REGULATOR This is a regulator for the low-side DRV. It also charges the external BST-LX capacitor through an internal FET switch. Please connect a ceramic capacitor (CREG10=1.0uF) between REG10 and GND. When REG10 pin is shorted to GND, its short circuit detection function limits the load current to 20mA. (3) SOFT START To prevent in-rush current or overshoot, a reference voltage is ramped at startup. The reference voltage comes from the voltage generated across capacitor CSS connected to the SS pin. A ramp voltage is generated at this pin as CSS is charged by an internal constant current source (ISS=1uA). Soft-start time (tss) is defined as the time it takes for the SS voltage to reach 0.8V: tss = (CSS×VNON) / ISS (Ex.) CSS=0.01uF → tss = (0.01uF×0.8V) / 1uA = 8 [ms] Before soft start begins, the start-up time for RTSS takes first as described next. (4) OSCILLATOR (RT, RTSS, CLKOUT) The switching frequency of the oscillator is set by an external resistor RRT that is connected to pin RT and ground. The clock frequency FOSC is related to RRT as shown in Figure 42 and is defined by the equation below. Note that the amplitude of the generated triangle wave of the oscillator is 1.5V to 2V. -0.955 FOSC = 15900 × RRT （RRT: RT resistor [kΩ] ） [kHz] FOSC (kHz) 1000 Fig.42 Switching Frequency vs RRT Resistance 100 10 10 100 RRT (kΩ) 1000 In case external synchronization is not used, the RTSS terminal outputs the internal reference voltage (0.5V) through its internal voltage buffer. Terminal RT outputs the buffer of the RTSS voltage. A 0.01uF ceramic capacitor (CRTSS) should be connected from terminal RTSS to ground. When the UVLO is about to be released, the RTSS pin is quickly charged up to VRTSS=0.45V by an internal current source (IRTSS=100uA) due to pre-charge function. CRTSS is later discharged during UVLO. If the voltage of pin RTSS reaches 0.45V, the UVLO is released and soft start function is started. The CRTSS charging time (TRTSS) is the time it takes before CSS is charged at start-up of DC/DC operation. TRTSS is given by: (ex.) CRTSS=0.01uF TRTSS= (0.01uF×0.50V) / 100uA = 50 [us] The CLKOUT pin outputs a square wave synchronized to the internal oscillator. CLKOUT is intended to serve as clock for synchronizing master-slave configurations. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 19/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV (5) EXTERNAL SYNCHRONIZATION (SYNC) This IC can be synchronized to an external clock through the SYNC pin for noise management. It can either be used as a Master IC which outputs a clock signal through the CLKOUT terminal, or as a Slave IC which accepts an input clock signal through the SYNC terminal. The SYNC pin is connected to GND when the IC is not configured as Slave. Master IC Slave IC (Free running mode) （Externally synchronized mode） GND CLKOUT SYNC CLKOUT SYNC CLK signal Propagation RT RTSS Fig.43 Example of an External Synchronization Circuit OPEN RTSS RT Synchronization happens after three consecutive rising edges at the SYNC terminal. The clock frequency at the SYNC pin replaces the master clock generated by the internal oscillator circuit. Pulling the SYNC pin low configures the BD9611MUV to freely run at the frequency programmed by RRT. ◆ Input Wave Conditions into the SYNC Pin The synchronization frequency should be in the range of -10% to +10% in relation to the programmed free-run frequency, that is within the range of 50 to 500kHz. The input pulse width should be more than 500ns and its high level should be within 2.8V to 5.0V. There is no special sequence against VCC or CTL. Please refer to the discussion of RRT vs Frequency from the previous page in deciding the RT resistor value to be used when using fixed-frequency input signal into SYNC. It is recommended to decide whether the BD9611MUV synchronizing function is used or not before start-up. If synchronization is done after start-up, please consider the fluctuation of Vout caused by the momentary instability of oscillation. When the SYNC pin becomes open, the oscillator state is changed from synchronized mode to free-run mode after eight consecutive pulses had not been detected. The BD9611MUV operating frequency will gradually change to the free-run frequency programmed by RRT. The speed of transition depends on how fast the RTSS voltage stabilize to 0.5V by charging or discharging CRTSS with IRTSS (=5uA max). The frequency changes as RTSS shifts. The RT voltage is fixed to almost 0.5V during free-run mode. In synchronized mode, the RT voltage adjusts freely between 0.25V and 1.0V for the oscillator to be able to output the synchronized frequency. The movement of the RT voltage is smoothed out by CRTSS. When the capacitance of the CRTSS is too small, the frequency fluctuates. However, if the capacitance is too large, it takes longer to synchronize the frequency. CRTSS should be adjusted accordingly to the intended circuit behavior. 2.5V SYNC ① Mode of synchronization: Internal/ External ② ③ Internal mode Internal mode External Mode (Synchronized CLK) ① ② ③ ④ ⑤ ⑥ ⑦ ⑧ CT 2V 1.5V The CT amplitude is automatically fitted to the amplitude at internal mode. RTselect （RT 1V/0.25V) RTSS （≒ RT) The RTSS voltage is adjusted by (dis)charging CRTSS (IRTSS=5uA, max) 0.5V Fig.44 Timing Chart of External Synchronization www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 20/37 TSZ02201-0Q1Q0AJ00230-1-2 17.OCT.2014 Rev.003 BD9611MUV (6) PWM / BOOST (PRE-CHARGE MODE) Charging capacitor CBST (BST-LX) is needed to drive the high-side N-channel FET. CBST is charged to the voltage of REG10 through the internal FET switch between REG10 and BST, whenever the low side external FET is turned on. The maximum on duty does not reach 100% because of the LG minimum ON pulse. It is possible to charge CBST even if the voltage of the FB pin is over 2.0V (high voltage of the internal ramp wave) and for terminal HG to always output HIGH. In case the voltage values of Vin and Vout are becoming close, the voltage of Vout can never become equal to the voltage of the Vin. ※ MAX DUTY BD9611MUV turns off for almost 350nsec at every turn. This is the High-side Min Off Pulse (HGmin). The 350ns duration of HGMIN consists of the LG Min pulse (about 100ns) and the anti-cross conduction time between HG and LG (100ns each). The Max ON Duty is calculated in the following equation: D(on) = (T – Toff) / T Where: T: Switching Cycle (=1/FOSC), Toff: OFF time (≒350ns Typ) ※ PRE-CHARGE MODE The BD9611MUV operates at pre-charge mode during the time when CBST is charged at start-up. By dropping the voltage of CBST and releasing the protect functions (UVLO, TSD, OCP hiccup-mode), CBST is charged in advance. In this mode, capacitor CBST is charged by the LG ON pulse which is limited to almost 300ns at every cycle. Pre-charge mode changes to normal switching mode after the release threshold of BSTUVLO had been detected. (7) STAND-BY It is possible to make the quiescent current value go as low as 0uA by turning off the IC using the CTL pin. All IC functions such as REG5 and REG10 are terminated in this mode. (8) UVLO The UVLO circuits shut down HG, LG, SS and FB, when the voltage of any of the three supplies VCC, REG10 or REG5 are under their respective UVLO threshold (VCC