BD9673EFJ

Single-chip Type with Built-in FET Switching Regulators Flexible Step-down Switching Regulator with Built-in Power MOSFET BD9673EFJ No.11027EBT57 ●Description Output 1.5A and below High Efficiency Rate Step-down Switching Regulator Power MOSFET Internal Type BD9673EFJ mainly used as secondary side Power supply, for example from fixed Power supply of 12V, 24V etc, Step-down Output of 1.2V/1.8V/3.3V/5V, etc, can be produced. This IC has external Coil/Capacitor down-sizing through 300 kHz Frequency operation, inside Nch-FET SW for 45V “withstand-pressure” commutation and also, high speed load response through Current Mode Control is a simple external setting phase compensation system, through a wide range external constant, a compact Power supply can be produced easily. ●Features 1) Internal 200 mΩ Nch MOSFET 2) Output Current 1.5A 3) Oscillation Frequency 300kHz 4) Synchronizes to External Clock ( 200kHz～500kHz ) 5) Feedback Voltage 1.0V±1.0% 6) Internal Soft Start Function 7) Internal Over Current Protect Circuit, Low Input Error Prevention Circuit, Heat Protect Circuit 8) ON/OFF Control through EN Pin (Standby Current 0 A Typ.) 9) Package: HTSOP-J8 Package ●Applications For Household machines in general that have 12V/24V Lines, etc. ●Absolute Maximum Rating Parameter VCC-GND Supply Voltage BST-GND Voltage BST-Lx Voltage EN-GND Voltage Lx-GND Voltage FB-GND Voltage VC-GND Voltage SYNC-GND Voltage High-side FET Drain Current Power Dissipation Operating Temperature Storage Temperature Junction Temperature Symbol VCC VBST ⊿VBST VEN VLX VFB VC SYNC IDH Pd Topr Tstg Tjmax Ratings 45 50 7 45 45 7 7 7 2.0 3.76(*1) -40～+105 -55～+150 +150 Unit V V V V V V V V A W ℃ ℃ ℃ (*1)During mounting of 70×70×1.6t mm 4layer board (Copper area:70mm×70mm).Reduce by 30.08mW for every 1℃ increase. (Above 25℃) ●Operating Conditions (Ta=25℃) Parameter Power Supply Voltage Output Voltage (*2)Restricted by minimum on pulse typ. 200ns Symbol VCC VOUT Ratings Min. 7 1.0(*2) Typ. － － Max. 42 VCC×0.7 Unit V V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/16 2011.07 - Rev.B BD9673EFJ ●Electrical Characteristics (Unless otherwise specified, Ta=25℃,VCC=24V, Vo=5V, EN=3V) Limits Parameter Symbol Min. Typ. Max. 【Circuit Current】 Stand-by current of VCC Circuit current of VCC 【Under Voltage Lock Out (UVLO)】 Detect Voltage Hysteresis width 【Oscillator】 Oscillating frequency Max Duty Cycle 【Error Amp】 FB threshold voltage Input bias current Error amplifier DC gain Trans Conductance Soft Start Time 【Current Sense Amp】 VC to switch current transconductance 【Output】 Lx NMOS ON resistance Lx pre-charge NMOS ON resistance Over Current Detect Current 【CTL】 EN Pin Control voltage EN Pin input current 【SYNC】 SYNC Pin Control voltage SYNC Pin input current SYNC falling edge to LX rising edge delay ◎ Not designed to withstand radiation. Technical Note Unit Conditions Ist Icc － － 0 1 10 2 µA mA VEN=0V FB=1.2V Vuv Vuvhy 6.1 － 6.4 200 6.7 300 V mV fosc Dmax 270 85 300 91 330 97 kHz % VFB IFB AVEA GEA Tsoft 0.990 -1.0 700 110 7 1.000 0 7000 220 10 1.010 1.0 70000 440 13 V µA V/V µA/V ms IVC=±10µA, VC=1.5V VFB=0V GCS 5 10 20 A/V RonH RonL Iocp － － 2.0 200 10 3.3 340 17 － mΩ Ω A ON OFF VENON VENOFF REN 2 -0.3 2.7 － － 5.5 VCC 0.8 11 V V µA VEN=3V High Low VSYNCH VSYNCL REN tdelay 2.0 -0.3 6 200 － － 12 400 5.5 0.8 24 600 V V µA ns VSYNC=3V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/16 2011.07 - Rev.B BD9673EFJ ●Pin Description 8 7 6 5 Technical Note Pin No. 1 2 3 Pin Name Lx GND VC FB SYNC EN BST VCC Terminal for inductor Ground pin Error amplifier output Function Thermal Pad 4 5 6 1 2 3 4 Inverting node of the trans conductance error amplifier Input pin of an external signal for the device synchronized by external signal Stand-by ON/OFF pin Voltage Supply pin for High Side FET Driver Voltage input pin 7 8 Fig.1 Pin Layout Diagram ●Block Diagram ON/OFF EN VCC TSD UVLO Reference VREF REG Current Sense AMP shutdown FB 1.0V + + Error AMP Σ Current Comparator RQ + S BST 200mΩ LX 10Ω VOUT Soft Start Oscillator 300kHz GND VC SYNC Fig.2 Block Diagram www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/16 2011.07 - Rev.B BD9673EFJ ●Block Description 1. Reference This block generates Error Amp standard voltage. Standard voltage is 1.0V. Technical Note 2. 3. REG This is a Gate Drive Voltage Generator and 5V Low saturation regulator for internal circuit power supply. OSC This is a precise wave oscillation circuit with operation frequency fixed to 300 kHz fixed (self-running mode). To implement the synchronization feature connect a square wave (Hi Level: higher than 2V, Low Level: lower than 0.8V )to the SYNC pin. The synchronization frequency range is 200 kHz to 500 kHz. After connecting the rising edge of LX will be synchronized to the falling edge of SYNC pin signal after 3 counts. At the synchronization remove the external clock, the device transitions self-running mode after 7 microseconds. Soft Start A circuit that does soft start to the output voltage of DC/DC comparator, and prevents rush current during start-up. Soft start time is set at IC internal, after 10 ms from starting-up EN pin, standard voltage comes to 1.0V, and output voltage becomes set voltage. ERROR AMP This is an Error amplifier what detects output signal, and outputs PWM control signal. Internal Standard Voltage is set to 1.0V. Also, C and R are connected between the output (VC) pin GND of Error Amp as Phase compensation elements. (See p.11) ICOMP This is a Voltage-Pulse Width Converter that controls output voltage in response to input voltage. This compares the Voltage added to the internal SLOPE waveform in response to the FET WS current with Error amplifier output voltage, controls the width of output Pulse and outputs to driver. Nch FET SW This is an internal commutation SW that converts Coil Current of DC/DC Comparator. It contains 45V” with stand pressure” 200mΩ SW. Because the Current Rating of this FET is 2.0A included ripple current, please use at within 2.0A. The device has the circuit of over current protection for protecting the FET from over current. To detect OCP 2 times sequentially, the device will stop and after 13msec restart. UVLO This is a Low Voltage Error Prevention Circuit. This prevents internal circuit error during increase of power supply voltage and during decline of power supply voltage. It monitors VCC pin voltage and internal REG voltage, and when VCC voltage becomes 6.4V and below, it turns off all output FET and turns off DC/DC comparator output and soft start circuit resets. Now this threshold has hysteresis of 200mV. TSD This is a Heat Protect (Temperature Protect) Circuit. When it detects an abnormal temperature exceeding Maximum Junction Temperature (Tj=150℃), it turns off all output FET, and turns off DC/DC comparator output. When Temperature falls, it has/with hysteresis and automatically returns. 4. 5. 6. 7. 8. 9. 10. EN With the Voltage applied to EN Pin (6pin), IC ON/OFF can be controlled. When a Voltage of 2.0V or more is applied, it turns on, at open or 0V application, it turns off. About 550 kΩ pull-down resistance is contained within the pin. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/16 2011.07 - Rev.B BD9673EFJ Technical Note ●Detailed Description ◇Synchronizes to External Clock The SYNC pin can be used to synchronize the regulator to an external system clock. To implement the synchronization feature connect a square wave to SYNC pin. The square wave amplitude must transition lower than 0.8V and higher than 2.0V on the SYNC pin and have an on time greater than 100 ns and an off time greater than 100 ns. The synchronization frequency range is 200 kHz to 500 kHz. The rising edge of the LX will be synchronized to the falling edge of SYNC pin signal after SYNC input pulse 3 count. At the synchronization, the external clock is removed, the device transitions self-running mode after 7 microseconds. SYNC Set the latch for synchronization SYNC_LATCH 400nsec Lx about 7µsec Fig.3 Timing chart at Synchronization ◇SOFT START The soft start time of BD9763EFJ is determined by the DCDC operating frequency (self-run mode 300 kHz ⇒10ms). If synchronization is used at the time of EN=ON, The soft start time is restricted by SYNC pin input pulse frequency. SYNC pin input pulse frequency is fosc_ex kHz, the soft start time is expressed by below equation. Tss = 300 fosc_ex × 10 [ms] ◇OCP operation The device has the circuit of over current protection for protecting the FET from over current. To detect OCP 2 times sequentially, the device will stop and after 13msec restart. VC voltage discharged by OCP latch VC OCP threshold VC voltage rising by output connect to GND force the High side FET OFF by detecting OCP current (pulse by pulse protection) Lx output connect to GND VOUT OCP set the OCP latch by detecting the OCP current 2 times sequencially OCP latch reset after 13 msec (300ｋHz 4000 counts) OCP_LATCH Fig.4 Timing chart at OCP operation www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 5/16 2011.07 - Rev.B BD9673EFJ ●Reference Data (Unless otherwise specified, Ta=25℃,VCC=24V, Vo=5V,EN=3V) 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -60 -40 -20 0 20 40 60 80 100 120 VCC=42V VCC=36V VCC=24V VCC=12V Technical Note 2 2 1.5 1.5 ICC[uA] ICC[mA] 1 Temp=105℃ Temp=25℃ Temp= ‐40 ℃ 0 0 5 10 15 20 25 30 35 40 45 ICC[mA] 1 VCC=12V VCC=24V 0.5 0.5 VCC=36V VCC=42V 0 -60 -40 -20 0 20 40 60 80 100 120 Temp[℃ ] VCC[V] Temp[℃ ] Fig.5. Standby Current Temperature Characteristics Fig.6. Circuit Current Power supply Voltage Characteristics Fig.7. Circuit Current Temperature Characteristics 8 7 350 340 330 100 90 80 70 60 50 40 30 20 10 0 UVLO threshold[V] FREQUENCY[kHz] 6 5 4 3 2 1 0 -60 -40 -20 0 20 40 60 80 100 120 reset voltage detect voltage 320 310 300 290 280 270 260 250 -60 -40 -20 0 20 40 60 80 100 120 MAXDUTY[%] Temp[℃ ] -60 -40 -20 0 20 40 60 80 100 120 Temp[℃ ] Temp[℃ ] Fig.8. UVLO Threshold Temperature Characteristics Fig.9. Oscillation Frequency Temperature Characteristics Fig.10. Max Duty Temperature Characteristics 1.010   1.008   1.006   1.010   1.008   1.006   VFB threshold[V] 1.004   1.002   1.000   0.998   0.996   0.994   0.992   0.990   -60 -40 -20 0 VCC=12V VFB threshold[V] VCC=36V VCC=42V 1.004   1.002   1.000   0.998   0.996   0.994   0.992   0.990   Temp= ‐40 ℃ Temp=25℃ Temp=105℃ VCC=24V 60 50 40 30 20 10 0 ‐10 ‐20 ‐30 ‐40 ‐50 ‐60 0 VC terminal current[uA] Temp=105℃ Temp=25℃ Temp= ‐40 ℃ 20 40 60 80 100 120 0 5 10 15 20 25 30 35 40 45 0.5 1 1.5 2 Temp[℃ ] VCC[V] VFB[V] Fig.11. FB Threshold Voltage Temperature Characteristics Fig.12. FB Threshold Power supply Characteristics Fig.13. FB Voltage －VC Current Characteristics www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/16 2011.07 - Rev.B BD9673EFJ Technical Note 16 300 20 HIGHSIDE  FET  RON  [m Ω] 250 200 150 100 50 0 PRECHARGE  FET  RON   [Ω] 14 Soft  Start  Time[ms] 12 10 8 6 4 2 0 -60 -40 -20 0 20 40 60 80 100 120 VCC=12V VCC=24V VCC=36V VCC=42V 15 10 5 0 -60 -40 -20 0 20 40 60 80 100 120 -60 -40 -20 0 20 40 60 80 100 120 Temp[℃ ] Temp[℃ ] Temp[℃ ] Fig.14. Soft Start Time Temperature Characteristics Fig.15. Nch FET ON Resistance Temperature Characteristics Fig.16. Pre-charge FET ON Resistance Temperature Characteristics 6 5 4 3 2 1 0 -60 -40 -20 0 20 40 60 80 100 120 VCC=12V VCC=24V VCC=36V VCC=42V 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -60 -40 -20 0 20 40 60 80 100 120 2 VC to SW Current   transconductance[A/V] OCP_peak_current[A] 1.5 EN  Threshold[V] 1 0.5 0 -60 -40 -20 0 20 40 60 80 100 120 Temp[℃ ] Temp[℃ ] Temp[℃ ] Fig.17. OCP Detect Current Temperature Characteristics Fig.18. VC to SW current transconductance Temperature characteristics Fig.19. EN Threshold Temperature Characteristics www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/16 2011.07 - Rev.B BD9673EFJ ●Example of Reference Application Circuit (Input 24V, Output 5.0V/ 1A) 0.01µF 15µH CDRH105R (SUMIDA) 5V/1A VOUT RB056L-40 (ROHM) 47µF/15 GRM32EB31C476KE15 (murata) GND BST Lx VCC Technical Note VCC 24V 10uF/35V GRM31EB3YA106KA12L (murata) VC R1 120Ω k C1 R3 6800pF FB R2 kΩ 30 10kΩ EN EN ON/OFF control SYNC SYNC Fig.20 Reference Application Circuit ●Reference Application Data (Example of Reference Application Circuit) 100 Transformation  Efficiency  η[%] 90 80 70 60 50 40 30 20 10 0 0 500 1000 1500 VCC=42V VCC=12V VCC=24V VCC=36V Phase Phase Gain Gain LOAD CURRENT[mA] Fig.21 Electric Power Conversion Rate Fig.22 Frequency Response Characteristics(Io=0.5A） Fig.23 Frequency Response Characteristics (Io=1.0A） VOUT：200mV/div (AC) VOUT：200mV/div (AC) IL：500mA/div (DC) IL：500mA/div (DC) Fig.24 Load Response Characteristics (Io=0A→1.5A) Fig.25 Load Response Characteristics (Io=1.5A→0A) EN：5V/div (DC) LX：10V/div (DC IL：0.5A/div (DC) VOUT：2V./div (DC) EN：5V/div (DC) LX：10V/div (DC IL：0.5A/div (DC) VOUT：2V./div (DC) Fig.26 startup Waveform Fig.27 Stop Waveform www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/16 2011.07 - Rev.B BD9673EFJ Technical Note ●Evaluation Board Layout Layout is a critical portion of good power supply design. There are several signals paths that conduct fast changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power supplies performance. To help eliminate these problems, the VCC pin should be bypassed to ground with a low ESR ceramic bypass capacitor with B dielectric. Care should be taken to minimize the loop area formed by the bypass capacitor connections, the VCC pin, and the anode of the catch diode. See Fig.28 for a PCB layout example. The GND pin should be tied directly to the thermal pad under the IC and the thermal pad. The thermal pad should be connected to any internal PCB ground planes using multiple VIAs directly under the IC. The LX pin should be routed to the cathode of the catch diode and to the output inductor. Since the LX connection is the switching node, the catch diode and output inductor should be located close to the LX pins, and the area of the PCB conductor minimized to prevent excessive capacitive coupling. For operation at full rated load, the top side ground area must provide adequate heat dissipating area. The additional external components can be placed approximately as shown. It may be possible to obtain acceptable performance with alternate PCB layouts; however this layout has been shown to produce good results and is meant as a guideline. VOUT Output Capacitor Output Inductor Topside Ground Area Catch Diode Input Bypass Capacitor LX VCC VCC Route BST Capacitor Trace on another layer to provide with wide path for topside ground GND BST CBST Compensation Network VC EN FB SYNC Signal VIA Thermal VIA Resistor Divider Fig.28 Evaluation Board Pattern www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/16 2011.07 - Rev.B BD9673EFJ Technical Note ●Application Components Selection Method (1) Inductor Something of the shield Type that Fulfills the Current Rating (Current value Ipecac below), with low DCR (Direct Current Resistance element) is recommended. Value of Inductor influences Inductor Ripple Current and becomes the cause of Output Ripple. In the same way as the formula below, this Ripple Current can be made small for as big as the L value of Coil or as high as the Switching Frequency. Ipeak =Iout + ⊿IL/2 [A] ⊿IL= Vin-Vout L × Vout × Vin 1 f [A] (1) (2) Δ IL (η:Efficiency, ⊿IL:Output Ripple Current, f:Switching Frequency ) Fig.29 Inductor Current For design value of Inductor Ripple Current, please carry out design tentatively with about 20％～50% of Maximum Input Current. ※When current that exceeds Coil rating flows to the coil, the Coil causes a Magnetic Saturation, and there are cases wherein a decline in efficiency, oscillation of output happens. Please have sufficient margin and select so that Peak Current does not exceed Rating Current of Coil. (2) Output Capacitor In order for Capacitor to be used in Output to reduce Output Ripple, Low Ceramic Capacitor of ESR is recommended. Also, for Capacitor Rating, on top of putting into consideration DC Bias Characteristics, please use something whose Maximum Rating has sufficient margin with respect to the Output Voltage. Output Ripple Voltage is looked for using the following formula. 1 + ⊿IL×RESR [V] ・・・ (3) 2π×f×Co Please design in a way that it is held within Capacity Ripple Voltage. Vpp=⊿IL× (3) Output Voltage Setting ERROR AMP internal Standard Voltage is 1.0V. Output Voltage is determined as seen in (4) formula. VOUT ERROR AMP FB R2 VREF 1.0V R1 Vo= (R1+R2) R2 ×1.0 [V] ・・・ (4) Fig.30 Voltage Return Resistance Setting Method (4) Boost Capacitor Please connect CBST=0.01µF (Laminate Ceramic Capacitor) between BST Pin-Lx Pins as Output capacitors of Gate Drive Voltage Generator REG (5V). www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/16 2011.07 - Rev.B BD9673EFJ Technical Note (5) About Adjustment of DC/DC Comparator Frequency Characteristics Role of Phase compensation element CC1, CC2, RC (See P.7 Example of Reference Application Circuit) Stability and Responsiveness of Loop are controlled through VC Pin which is the output of Error Amp. The combination of zero and pole that determines Stability and Responsiveness is adjusted by the combination of resistor and capacitor that are connected in series to the VC Pin. DC Gain of Voltage Return Loop can be calculated for using the following formula. Adc = Rl  Gcs  A EA V FB Vout Here, VFB is Feedback Voltage (1.0V).AEA is Voltage Gain of Error amplifier (typ : 77dB), Gcs is the Trans-conductance of Current Detect (typ : 10A/V), and Rl is the Output Load Resistance value. There are 2 important poles in the Control Loop of this DC/DC. The first occurs with/ through the output resistance of Phase compensation Capacitor (C1) and Error amplifier. The other one occurs with/through the Output Capacitor and Load Resistor. These poles appear in the frequency written below. fp 1 = G EA 2π  C1  A EA 1 2π  COUT  Rl fp2 = Here, GEA is the trans-conductance of Error amplifier(typ : 220µA/V). Here, in this Control Loop, one zero becomes important. With the zero which occurs because of Phase compensation Capacitor C1 and Phase compensation Resistor R3, the Frequency below appears. fz 1 = 1 2π  C1  R3 Also, if Output Capacitor is big, and that ESR (RESR) is big, in this Control Loop, there are cases when it has an important, separate zero (ESR zero). This ESR zero occurs due to ESR of Output Capacitor and Capacitance, and exists in the Frequency below. fz (ESR zero) = 1 2π COUT  RESR In this case, the 3rd pole determined with the 2nd Phase compensation Capacitor (C2) and Phase Correction Resistor (R3) is used in order to correct the ESR zero results in Loop Gain. This pole exists in the frequency shown below. fp 3 = (pole that corrects ESR zero) 1 2π  C2  R3 The target of Phase compensation design is to create a communication function in order to acquire necessary band and Phase margin. Cross-over Frequency (band) at which Loop gain of Return Loop becomes “0” is important. When Cross-over Frequency becomes low, Power supply Fluctuation Response, Load Response, etc worsens. On the other hand, when Cross-over Frequency is too high, instability of the Loop can occur. Tentatively, Cross-over Frequency is targeted to be made 1/20 or below of Switching Frequency. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 11/16 2011.07 - Rev.B BD9673EFJ Selection method of Phase Compensation constant is shown below. 1. Technical Note Phase Compensation Resistor (R3) is selected in order to set to the desired Cross-over Frequency. Calculation of RC is done using the formula below. R3 = 2π  COUT  fc GEA  GCS  Vout VFB Here, fc is the desired Cross-over Frequency. It is made about 1/20 and below of the Normal Switching Frequency (fs). 2. Phase compensation Capacitor (C1) is selected in order to achieve the desired phase margin. In an application that has a representative Inductance value (about several µH～20µH), by matching zero of compensation to 1/4 and below of the Cross-over Frequency, sufficient Phase margin can be acquired. C1 can be calculated using the following formula. C1 ＞ 4 2π  R3  fc RC is Phase compensation Resistor. 3. Examination whether the second Phase compensation Capacitor C2 is necessary or not is done. If the ESR zero of Output Capacitor exists in a place that is smaller than half of the Switching Frequency, a second Phase compensation Capacitor is necessary. In other words, it is the case wherein the formula below happens. 1 2π  COUT  RESR ＜ fs 2 In this case, add the second Phase compensation Capacitor C2, and match the frequency of the third pole to the Frequency fp3 of ESR zero. C2 is looked for using the following formula. C2  COUT  RESR R3 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 12/16 2011.07 - Rev.B BD9673EFJ ●I/O Equivalent Schematic Pin. No Pin. Name Pin Equivalent Schematic Pin. No Pin. Name Technical Note Pin Equivalent Schematic 1 2 7 8 Lx GND BST VCC BST VCC 5 Lx GND GND SYNC SYNC VCC EN 3 VC VC 6 EN GND GND FB 4 FB GND www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 13/16 2011.07 - Rev.B BD9673EFJ Technical Note ●Notes for use (1) About Absolute Maximum Rating When the absolute maximum ratings of application voltage, operating temperature range, etc. was exceeded, there is possibility of deterioration and destruction. Also, the short Mode or open mode, etc. destruction condition cannot be assumed. When the special mode where absolute maximum rating is exceeded is assumed, please give consideration to the physical safety countermeasure for the fuse, etc. (2) About GND Electric Potential In every state, please make the electric potential of GND Pin into the minimum electrical potential. Also, include the actual excessive effect, and please do it such that the pins, excluding the GND Pin do not become the voltage below GND. (3) About Heat Design Consider the Power Dissipation (Pd) in actual state of use, and please make Heat Design with sufficient margin. (4) About short circuit between pins and erroneous mounting When installing to set board, please be mindful of the direction of the IC, phase difference, etc. If it is not installed correctly, there is a chance that the IC will be destroyed. Also, if a foreign object enters the middle of output, the middle of output and power supply GND, etc., even for the case where it is shorted, there is a change of destruction. (5) About the operation inside a strong electro-magnetic field When using inside a strong electro-magnetic field, there is a possibility of error, so please be careful. (6) Temperature Protect Circuit (TSD Circuit) Temperature Protect Circuit (TSD Circuit) is built-in in this IC. As for the Temperature Protect Circuit (TSD Circuit), because it a circuit that aims to block the IC from insistent careless runs, it is not aimed for protection and guarantee of IC. Therefore, please do not assume the continuing use after operation of this circuit and the Temperature Protect Circuit operation. (7) About checking with Set boards When doing examination with the set board, during connection of capacitor to the pin that has low impedance, there is a possibility of stress in the IC, so for every 1 process, please make sure to do electric discharge. As a countermeasure for static electricity, in the process of assembly, do grounding, and when transporting or storing please be careful. Also, when doing connection to the jig in the examination process, please make sure to turn off the power supply, then connect. After that, turn off the power supply then take it off. (8) About common impedance For the power supply and the wire of GND, lower the common impedance, then, as much as possible, make the ripple smaller (as much as possible make the wire thick and short, and lower the ripple from L・C), etc., then and please consider it sufficiently. (9) In the application, when the mode where the VCC and each pin electrical potential becomes reversed exists, there is a possibility that the internal circuit will become damaged. For example, during cases wherein the condition when charge was given in the external capacitor, and the VCC was shorted to GND, it is recommended to insert the bypass diode to the diode of the back current prevention in the VCC series or the middle of each Pin-VCC. (10) About High-side Nch FET Please use within 2.0A contained ripple current, because the absolute maximum rating of high-side Nch FET is 2.0A. (11) About over current detection The detecting current is the current flowing through high-side NchFET. Output current containing ripple current, therefore the detecting current is the current of the output current containing ripple current. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 14/16 2011.07 - Rev.B BD9673EFJ Technical Note (12) About IC Pin Input + This IC is a Monolithic IC, and between each element, it has P isolation for element separation and P board. With the N layer of each element and this, the P-N junction is formed, and the parasitic element of each type is composed. For example, like the diagram below, when resistor and transistor is connected to Pin, ○When GND＞(PinA) in Resistor, when GND＞(PinA), when GND＞(Pin B) in Transistor (NPN), the P-N junction will operate as a parasitic diode. ○Also, during GND＞(Pin B) in the Transistor (NPN), through the N layer of the other elements connected to the above-mentioned parasitic diode , the parasitic NPN Transistor will operation. On the composition of IC, depending on the electrical potential, the parasitic element will become necessary. Through the operation of the parasitic element interference of circuit operation will arouse, and error, therefore destruction can be caused. Therefore please be careful about the applying of voltage lower than the GND (P board) in I/O Pin, and the way of using when parasitic element operating. Resistor (Pin A) (Pin B) C Transistor (NPN) B ～ ～ E N P N P Substrate + GND P P + P N P + P N N + (Pin A) N ～ ～ N Parasitic Element Parasitic Element Parasitic Element GND P Substrate GND Fig.31 Example of simple structure of Bipolar IC www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 15/16 2011.07 - Rev.B BD9673EFJ ●Ordering part number Technical Note B Part No. D 9 Part No. 6 7 3 E F J - E 2 Package EFJ : HTSOP-J8 Packaging and forming specification E2: Embossed tape and reel HTSOP-J8 4.9±0.1 (MAX 5.25 include BURR) (3.2) 8765 Tape 0.65±0.15 1.05±0.2 Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold +6° 4° −4° (2.4) Quantity Direction of feed 6.0±0.2 3.9±0.1 ( reel on the left hand and you pull out the tape on the right hand ) 1234 1PIN MARK 0.545 1.0MAX +0.05 0.17 -0.03 S 1.27 0.85±0.05 0.08±0.08 +0.05 0.42 -0.04 0.08 S 0.08 M 1pin Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 16/16 2011.07 - Rev.B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. R1120A