BD9766FV-E2

1/4 STRUCTURE Silicon Monolithic Integrated Circuit NAME OF PRODUCT DC-AC Inverter Control IC TYPE ＢＤ９７６６ＦＶ FUNCTION ・2ch control with Half-bridge ・Lamp current and voltage sense feed back control ・Sequencing easily achieved with Soft Start Control ・Short circuit protection with Timer Latch ・Under Voltage Lock Out ・Short circuit protection with over voltage ・Mode-selectable the operating or stand-by mode by stand-by pin ・Control PWM and BURST mode by DUTY pin ・BURST mode with 2ch Reverse phase ○Absolute Maximum Ratings（Ta = 25℃） Parameter Supply Voltage Operating Temperature Range Storage Temperature Range Power Dissipation Maximum Junction Temperature * Symbol Limits Unit VCC 12 V Topr -35～+85 ℃ Tstg -55～+125 ℃ Pd 850* mW Tjmax +125 ℃ Pd derated at 8.5mW/℃ for temperature above Ta = 25℃ (When mounted on a PCB 70.0mm×70.0mm×1.6mm) 〇Recommended operating condition Parameter Supply voltage CT oscillation frequency BCT oscillation frequency Symbol Range Unit VCC 5.0～11.0 V fCT 35～200 kHz fBCT 0.10～0.50 kHz Status of this document The Japanese version of this document is the official specification. Please use the translation version of this document as a reference to expedite understanding of the official version. If these is any uncertainty in translation version of this document, official version takes priority. REV. B 2/4 ○Electric Characteristics（Ta=25℃，VCC=7V） Parameter Symbol MIN. Limits TYP. MAX. Conditions Unit （（WHOLE DEVICE） ） Operating current Icc1 － 9.0 17.0 mA Stand-by current Icc2 － 4 8 uA Vovf 2.70 3.00 3.30 V VoutPH VoutNH VoutPL VoutNL RsinkP RsourceP RsinkN RsourceN VCC-0.3 VCC-0.3 － － － － － － VCC-0.1 VCC-0.1 0.1 0.1 8 10 8 10 － － 0.3 0.3 16 20 16 20 V V V V Ω Ω Ω Ω VstH VstL ⊿Vst 2.0 － 0.05 － － 0.15 － 0.8 0.25 V V V Vcp Icp 1.5 1.0 1.9 2.0 2.3 3.0 V uA OSC Max voltage Iact Ineg VoscH 1.2/RT 1.2/RDIS 1.8 1.5/RT 1.5/RDIS 2.0 1.8/RT 1.8/RDIS 2.2 A A V fact=10kHz OSC Min voltage VoscL 0.3 0.5 0.7 V fneg=100kHz Iss 1.0 2.0 3.0 uA VISC Vss RSRT － － － 0.6 2.2 200 － － 400 V V Ω VuvloH VuvloL 4.25 4.0 4.50 4.25 4.75 4.50 V V （（OVER VOLTAGE DETECT）） FB over voltage detect voltage （（OUTPUT BLOCK） ） Pch output voltage H Nch output voltage H Pch output voltage L Nch output voltage L Pch output sink resistance Pch output source resistance Nch output sink resistance Nch output source resistance （（STAND-BY CONTROL）） Stand-by voltage H Stand-by voltage L Hysteresis width （（TIMER LATCH）） Timer Latch voltage Timer Latch current （（OSC BLOCK）） Active edge current Negative edge current Soft start current IS COMP detect Voltage SS COMP detect voltage SRT ON resistance （（UVLO BLOCK）） Operating voltage Shut down voltage （（FEED BACK BLOCK）） IS threshold voltage Vis 1.220 1.250 1.280 V VS threshold voltage IS source current 1 IS source current 2 VS source current （（BURST MODE）） BOSC Max voltage BOSC Min Voltage BOSC constant current （（REG BLOCK）） REG output voltage REG source current （（COMP BLOCK）） Over voltage detect Under voltage detect （（PROTECT CLOCK）） Normal output voltage Protect output voltage Vvs 1.220 1.250 1.280 V Iis1 Iis2 Ivs － 13.0 － － 20.0 － 1.5 27.0 0.9 uA uA uA VburH VburL Iburosc 1.8 0.3 1.2/BRT 2.0 0.5 1.5/BRT 2.2 0.7 1.8/BRT V V A VREG IREG 3.038 5.0 3.100 － 3.162 － V mA VCOMPH VCOMPL 2.20 0.590 2.5 0.640 2.80 0.690 V V VPH VPL 2.9 － 3.1 － 3.3 0.5 V V （This product is not designed for normal operation with in a radio active environment.） REV. B CT=0.5V System ＯＮ System ＯＦＦ DUTY=2.0V DUTY=0V、IS=0.5V fBCT=0.3kHz fBCT=0.3kHz 3/4 〇Package Dimensions Device Mark (Include BURR 10.35) BD9766FV １ Lot No. SSOP-B28 (Unit:mm) 〇Block Diagram VCC 〇Pin Description CT REG REG BLOCK STB STB BLOCK RT RDIS OSC BRT BCT DUTY BOSC DUTY BLOCK Pin Name DUTY 2 BRT 3 BCT 4 RDIS 5 RT 6 SRT VCC UVLO BLOCK SYSTEM　ON/OFF Pin No. 1 SS FB1 IS1 VS1 VCC F/B BLOCK① SS PWM BLOCK① CT LOGIC BLOCK ① FB2 IS2 VS2 OUTPUT BLOCK① P1 N1 VCC F/B BLOCK② SS PWM BLOCK② CT LOGIC BLOCK ② OUTPUT BLOCK② P2 N2 PGND GND PROTECT BLOCK COMP1 COMP2 SCP1 FAIL SCP2 SRT REV. B 7 CT 8 9 10 11 12 13 14 15 16 17 18 19 GND FB1 IS1 VS1 FB2 IS2 VS2 FAIL STB COMP1 COMP2 REG 20 SS 21 SCP1 22 SCP2 23 24 25 26 P2 N2 PGND N1 Function Control PWM mode and BURST mode External resistor from BRT to GND for adjusting the BURST triangle oscillator External capacitor from BCT to GND for adjusting the BURST triangle oscillator External resistor from RDIS to GND for adjusting the triangle oscillator External resistor from SRT to RT for adjusting the triangle oscillator External resistor from SRT to RT for adjusting the triangle oscillator External capacitor from CT to GND for adjusting the triangle oscillator GROUND Error amplifier output① Error amplifier input① Error amplifier input② Error amplifier output② Error amplifier input③ Error amplifier input④ Protect clock output Stand-by switch Under, over voltage detect for 1ch Under, over voltage detect for 1ch Internal regulator output External capacitor from SS to GND for Soft Start Control External capacitor from SCP1 to GND for Timer Latch for 1ch External capacitor from SCP2 to GND for Timer Latch for 2ch FET driver for 2ch FET driver for 2ch Ground for FET drivers FET driver for 1ch 27 P1 FET driver for 1ch 28 Vcc Supply voltage input 4/4 〇NOTE FOR USE １． When designing the external circuit, including adequate margins for variation between external devices and the IC.Use adequate margins for steady state and transient characteristics. ２． Recommended Operating Range The circuit functionality is guaranteed within of ambient temperature operation range as long as it is within recommended operating range. The standard electrical characteristic values cannot be guaranteed at other voltages in the operating ranges, however, the variation will be small. ３． Mounting Failures Mounting failures, such as misdirection or miscounts, may harm the device. ４． Electromagnetic Fields A strong electromagnetic field may cause the IC to malfunction. ５. The GND pin should be the location within ±0.3V compared with the PGND pin ６． BD9766FV has the short circuit protection with Thermal Shut Down System. When STB or Vcc pin re-supplied, They enables to cancel the latch. If It rise the temperature of the chip more than 170℃(TYP), It make the external FET OFF ７． Absolute maximum ratings are those values that, if exceeded, may cause the life of a device to become significantly shortened. Moreover, the exact failure mode caused by short or open is not defined. Physical countermeasures, such as a fuse, need to be considered when using a device beyond its maximum ratings. ８． About the external FET, the parasitic Capacitor may cause the gate voltage to change, when the drain voltage is switching. Make sure to leave adequate margin for this IC variation. ９． On operating Slow Start Control (SS is less than 2.2V), It does not operate Timer Latch. １０． By STB voltage, BD9886FV is changed to 2 states. Therefore, do not input STB pin voltage between one state and the other state (0.8～2.0V). １１．The pin connected a connector need to connect to the resistor for electrical surge destruction. １２．This IC is a monolithic IC which (as shown is Fig-1)has P+ substrate and between the various pins. A P-N junction is formed from this P layer of each pin. For example, the relation between each potential is as follows, ○(When GND > PinB and GND > PinA, the P-N junction operates as a parasitic diode.) ○(When PinB > GND > PinA, the P-N junction operates as a parasitic transistor.) Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits as well as operation faults and physical damage. Accordingly you must not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND(P substrate)voltage to an input pin. Transistor (NPN) Resistance (PinA) B (PinB) E C Ｃ GND P P＋ N P＋ N Ｎ N Ｎ P substrate GND Parasitic diode N P substrate GND Parasitic diode (PinB) (PinA) B CＣ Ｂ EＥ Parasitic diode GND GND Other adjacent components Parasitic diode 図-1 Simplified structure of a Bipolar IC REV. B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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