BD9781HFP

Single-chip Type with built-in FET Switching Regulator Series Flexible Step-down Switching Regulators with Built-in Power MOSFET BD9778F, BD9778HFP, BD9001F, BD9781HFP No.10027EBT41 Overview The flexible step-down switching regulator controller is a switching regulator controller designed with a high-withstand-voltage built-in POWER MOS FET, providing a free setting function of operating frequency with external resistor. This switching regulator controller features a wide input voltage range (7 V to 35 V or 7 V to 48 V) and operating temperature range (-40˚C to +125˚C or -40˚C to +95˚C). Furthermore, an external synchronization input pin (BD9781HFP) enables synchronous operation with external clock. Features 1) 2) 3) 4) 5) 6) 8) 9) 10) 11) 12) 13) 14) 15) Minimal external components Wide input voltage range: 7 V to 35 V (BD9778F/HFP and BD9781HFP), 7 V to 48 V (BD9001F) Built-in P-ch POWER MOS FET Output voltage setting enabled with external resistor: 1 to VIN Reference voltage accuracy: ±2% Wide operating temperature range: -40˚C to +125˚C (BD9778F/HFP and BD9781HFP), -40˚C to +95˚C (BD9001F) Low dropout: 100% ON Duty cycle Standby mode supply current: 0 µA (Typ.) (BD9778F/HFP and BD9781HFP), 4 µA (Typ.) (BD9001F) Oscillation frequency variable with external resistor: 50 to 300 kHz (BD9001F), 50 to 500 kHz (BD9778F/HFP and BD9781HFP) External synchronization enabled (only on the BD9781HFP) Soft start function : soft start time fixed to 5 ms (Typ.)) Built-in overcurrent protection circuit Built-in thermal shutdown protection circuit High power HRP7 package mounted (BD9778HFP and BD9781HFP) Compact SOP8 package mounted (BD9778F and BD9001F) Applications All fields of industrial equipment, such as Flat TV , printer, DVD, car audio, car navigation, and communication such as ETC, AV, and OA. Product lineup Item Output current Input range Oscillation frequency range External synchronization Standby function Operating temperature Package BD9778F/HFP 2A 7V ~ 35V 50 ~ 500kHz Not provided Provided -40˚C ~ +125˚C SOP8 / HRP7 BD9001F 2A 7V ~ 48V 50 ~ 300kHz Not provided Provided -40˚C ~ +95˚C SOP8 BD9781HFP 4A 7V ~ 35V 50 ~ 500kHz Provided Provided -40˚C ~ +125˚C HRP7 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Absolute Maximum Ratings(Ta = 25˚C) Parameter BD9778F/HFP,BD9781HFP Power supply BD9001F voltage Output switch pin voltage Output switch current BD9778F/HFP, BD9001F BD9781HFP Technical Note Symbol VIN VSW ISW VEN/SYNC,VEN VRT,VFB,VINV Pd Topr Tstg Tjmax EN/SYNC, EN pin voltage RT, FB, INV pin voltage Power dissipation HRP7 SOP8 Operating temperature BD9778F/HFP,BD9781HFP range BD9001F Storage temperature range Maximum junction temperature Limits 36 50 VIN 2 4 VIN 7 5.5 0.69 -40 ~ +125 -40 ~ +95 -55 ~ +150 150 Unit V V *1 *1 A V *2 *3 W ˚C ˚C ˚C *1 Should not exceed Pd-value. *2 Reduce by 44mW/°C over 25°C, when mounted on 2-layer PCB of 70 X 70 X 1.6 mm3. (PCB incorporates thermal via. Copper foil area on the front side of PCB: 10.5 X 10.5 mm2. Copper foil area on the reverse side of PCB: 70 X 70 mm2) *3 Reduce by 5.52 mW/°C over 25°C, when mounted on 2-layer PCB of 70 X 70 X 1.6 mm3. Recommended operating range Parameter Operating power supply voltage Output switch current Output voltage (ON Duty) Oscillation frequency Oscillation frequency set resistance BD9778F/HFP 7 ~ 35 ~2 6 ~ 100 50 ~ 500 40 ~ 800 BD9001F 7 ~ 48 ~2 6 ~ 100 50 ~ 300 100 ~ 800 BD9781HFP 7 ~ 35 ~4 6 ~ 100 50 ~ 500 39 ~ 800 Unit V A % kHz kΩ Possible operating range Parameter Operating power supply voltage BD9778F/HFP 5 ~ 35 BD9001F 7 ~ 48 BD9781HFP 5 ~ 35 Unit V Electrical characteristics BD9778F/HFP (Unless otherwise specified, Ta = -40˚C to +125˚C, VIN =13.2 V, VEN = 5 V) Parameter Symbol Min. 2 0.98 0.96 -1 2.4 -5.0 70 82 0.8 Limits Typ. Max. 0 10 3 4.2 0.53 4 0 1.00 1.00 0.5 2.5 0.05 -3.0 120 5 102 1 1.7 13 0.9 30 1.02 1.04 0.10 -0.5 170 122 2.6 50 Unit µA mA Ω A µA V V % µA V V mA µA mS kHz % V µA Condition VEN=0V,Ta=25˚C IO=0A ISW=50mA * Design assurance VIN=35V,VEN=0V VFB=VINV,Ta=25˚C VFB=VINV VIN=5 ~ 35V VINV=1.1V VINV=0.5V VINV=1.5V VFB=1.5V,VINV=1.5V VFB=1.5V,VINV=0.5V * Design assurance RT=390kΩ VIN=5 ~ 35V VEN=5V ISTB Standby circuit current IQ Circuit current [SW block] RON POWER MOS FET ON resistance IOLIMIT Operating output current of overcurrent protection IOLEAK Output leak current [Error Amp block] VREF1 Reference voltage 1 VREF2 Reference voltage 2 ∆VREF Reference voltage input regulation IB Input bias current VFBH Maximum FB voltage VFBL Minimum FB voltage IFBSINK FB sink current IFBSOURCE FB source current TSS Soft start time [Oscillator block] FOSC Oscillation frequency ∆FOSC Frequency input regulation [Enable block] VEN Threshold voltage IEN Sink current * Not designed to be radiation-resistant. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP BD9001F (Unless otherwise specified, Ta=-40˚C ~ +95˚C,VIN=13.2V, VEN=5V) Parameter Symbol Min. 2.5 0.98 0.96 -1 2.4 -5.0 70 82 0.8 Limits Typ. Max. 4 10 3 4.2 0.6 4 1.00 1.00 0.5 2.5 0.05 -3.0 120 5 102 2 1.7 13 1.2 1.02 1.04 0.10 -0.5 170 122 2.6 50 Unit µA mA Ω A V V % µA V V mA µA ms kHz % V µA Condition VEN=0V,Ta=25˚C IO=0A ISW=50mA * Design assurance VFB=VINV,Ta=25˚C VFB=VINV VIN=7 ~ 48V VINV=1.1V VINV=0.5V VINV=1.5V VFB=1.5V,VINV=1.5V VFB=1.5V,VINV=0.5V * Design assurance RT=390kΩ VIN=7 ~ 48V Technical Note Standby circuit current ISTB IQ Circuit current [SW block] RON POWER MOS FET ON resistance IOLIMIT Operating output current of overcurrent protection [Error Amp block] VREF1 Reference voltage 1 VREF2 Reference voltage 2 ∆VREF Reference voltage input regulation IB Input bias current VFBH Maximum FB voltage VFBL Minimum FB voltage IFBSINK FB sink current IFBSOURCE FB source current Soft start time Tss [Oscillator block] FOSC Oscillation frequency ∆FOSC Frequency input regulation [Enable block] VEN Threshold voltage IEN Sink current * Not designed to be radiation-resistant. VEN =5V BD9781HFP (Unless otherwise specified, Ta=-40˚C ~ +125˚C,VIN=13.2V,VEN/SYNC=5V) Parameter Symbol Min. 4 0.98 0.97 -1 2.4 -5.0 70 82 0.8 Limits Typ. Max. 0 10 8 3 0.5 8 0 1.00 1.00 0.5 2.5 0.05 -3.0 120 5 102 1 1.7 35 150 0.9 30 1.02 1.03 0.10 -0.5 170 122 2.6 90 Unit µA mA Ω A µA V V % µA V V mA µA mS kHz % V µA kHz Condition VEN/SYNC=0V,Ta=25ºC IO=0A ISW=50mA * Design assurance VIN=35V,VEN/SYNC=0V VFB=VINV,Ta=25ºC VFB=VINV VIN=5 ~ 35V VINV=1.1V VINV=0.5V VINV=1.5V VFB=1.5V,VINV=1.5V VFB=1.5V,VINV=0.5V * Design assurance RT=390kΩ VIN=5 ~ 35V VEN/SYNC=5V FEN/SYNC=150kHz ISTB Standby circuit current IQ Circuit current [SW block] RON POWER MOS FET ON resistance IOLIMIT Operating output current of overcurrent protection IOLEAK Output leak current [Error Amp block] Reference voltage1 VREF1 VREF2 Reference voltage2 ∆VREF Reference voltage input regulation IB Input bias current VFBH Maximum FB voltage VFBL Minimum FB voltage IFBSINK FB sink current IFBSOURCE FB source current TSS Soft start time [Oscillator block] FOSC Oscillation frequency ∆FOSC Frequency input regulation [Enable/Synchronizing input block] VEN/SYNC Threshold voltage IEN/SYNC Sink current FSYNC External synchronizing frequency * Not designed to be radiation-resistant. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Reference data Technical Note OSCILLATING FREQUENCY : fosc[kHz] 1.020 REFERENCE VOLTAGE : VREF[V] 1.015 1.010 1.005 1.000 0.995 0.990 0.985 0.980 -50 -25 0 25 50 75 100 125 600 500 400 300 200 100 0 -50 390kΩ 910kΩ 91kΩ 10 STAND-BY CURRENT : ISTB[µA] 39kΩ 9 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 -40 VCC=12V Istb=0.14µA 125 -25 0 25 50 75 100 125 25 30 35 40 AMBIENT TEMPERATURE : Ta[ ] AMBIENT TEMPERATURE : Ta[ ] INPUT VOLTAGE : VIN[V] Fig.1 Output reference voltage vs. Ambient temprature(All series) Fig.2 Frequency vs. Ambient temperature(All series) Fig.3 Standby current(BD9781HFP) 10 STAND-BY CURRENT : ISTB[µA] STAND-BY CURRENT : ISTB[µA] 40 125 4 CIRCUIT CURRENT : ICC[mA] 9 8 7 6 125 30 25 3 -40 25 125 5 4 3 2 1 0 0 5 25 -40 VCC=12V Istb=0.14µA 20 –40 2 10 1 0 10 15 20 25 30 INPUT VOLTAGE : VIN[V] 35 40 0 10 20 30 40 50 60 0 5 10 15 20 25 30 35 40 INPUT VOLTAGE : VIN[V] INPUT VOLTAGE : VIN[V] Fig.4 Standby current(BD9778F/HFP) Fig.5 Standby current(BD9001F) Fig.6 Circuit current(BD9781HFP) 4 CIRCUIT CURRENT : ICC[mA] CIRCUIT CURRENT : ICC[mA] -40 25 125 4 1.8 1.6 FET ON RESISTANCE : RON[Ω] 3 3 125 -40 25 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 OUTPUT CURRENT : IO[A] Ta=-40 Ta=125 Ta=25 2 2 1 1 0 0 5 10 15 20 25 30 INPUT VOLTAGE : VIN[V] 35 40 0 10 20 30 40 50 INPUT VOLTAGE : VIN[V] 60 Fig.7 Circuit current(BD9778F/HFP) Fig.8 Circuit current(BD9001F) Fig.9 ON resistance VIN=5V(BD9781HFP) 1.8 1.8 FET ON RESISTANCE : RON[Ω] FET ON RESISTANCE : RON[Ω] 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 Ta=-40 Ta=125 Ta=25 FET ON RESISTANCE : RON[Ω] 1.6 1.4 1.2 1.0 0.8 0.6 0.4 Ta=-40 Ta=25 Ta=125 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 Ta=-40 Ta=25 Ta=125 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 OUTPUT CURRENT : IO[A] 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 OUTPUT CURRENT : IO[A] OUTPUT CURRENT : IO[A] Fig.10 ON resistance VIN=7V (BD9781HFP) Fig.11 ON resistanceVIN=13.2V (BD9781HFP) Fig.12 ON resistance VIN=5V (BD9778F/HFP) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP 1.8 FET ON RESISTANCE : RON[Ω] FET ON RESISTANCE : RON[Ω] Technical Note 1.8 FET ON RESISTANCE : RON[Ω] 1.8 1.6 1.4 1.2 1.0 0.8 Ta=125 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 OUTPUT CURRENT : IO[A] 2.5 Ta=125 Ta=25 Ta=-40 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 0.5 1 1.5 2 OUTPUT CURRENT : IO[A] 2.5 Ta=125 Ta=25 0.6 Ta=25 0.4 0.2 0.0 0.0 Ta=-40 Ta=–40 0.5 1.0 1.5 2.0 OUTPUT CURRENT : IO[A] 2.5 Fig.13 ON resistance VIN=7V (BD9778F/HFP) Fig.14 ON resistance VIN=13.2V (BD9778F/HFP) Fig.15 ON resistance VIN=7V (BD9001F) 1.8 CONVERSION EFFICIENCY [%] 100 CONVERSION EFFICIENCY [%] 100 5V output FET ON RESISTANCE : RON[Ω] 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 0.5 1 1.5 2 OUTPUT CURRENT : IO[A] 2.5 Ta=–40 Ta=125 Ta=25 5V output 3.3V output 90 80 70 60 50 40 30 20 10 0 0.0 0.5 3.3V output 90 80 70 60 50 40 30 20 10 2.5V output 1.5V output 2.5V output 1.0 1.5 2.0 2.5 OUTPUT CURRENT : IO[A] 3.0 0 0 1.5 0.5 1.0 OUTPUT CURRENT : IO[A] 2.0 Fig.16 ON resistance VIN=13.2V (BD9001F) Fig.17 IO vs Efficiency(VIN=12V,f=200kHz) (BD9781HFP) Fig.18 IO vs Efficiency(VIN=12V,f=100kHz) (BD9778F/HFP) 100 CONVERSION EFFICIENCY [%] 6 5V output Ta=25 Ta=-40 6 Ta=25 90 80 70 60 50 40 30 20 10 0 0 OUTPUT VOLTAGE : VO[V] 5 4 Ta=125 5 Ta=-40 3.3V output 2.5V output OUTPUT VOLTAGE : VO[V] 4 3 2 1 0 Ta=125 3 2 1 0 0.4 0.8 1.2 1.6 OUTPUT CURRENT : IO[A] 2 0 1 2 3 4 5 6 OUTPUT CURRENT : IO[A] 7 0 1 2 3 4 OUTPUT CURRENT : IO[A] 5 Fig.19 IO vs Efficiency(VIN=12V,f=100kHz) Fig.20 Current capacitance(VIN=12V,Vo=5V,f=100kHz) Fig.21 Current capacitance(VIN=12V,Vo=5V,f=100kHz) (BD9001F) (BD9781HFP) (BD9778F/HFP) 6 5 4 Ta=125 Ta=25 Ta=-40 OUTPUT VOLTAGE : VO[V] 3 2 1 0 0 1 2 3 4 OUTPUT CURRENT : IO[A] 5 Fig.22 Current capacitance(VIN=12V,Vo=5V,f=100kHz) (BD9001F) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Block diagram / Application circuit / Pin assignment (BD9778F) (BD9778HFP) Technical Note PVIN 8 VIN EN ON/OFF L:OFF H:ON 1 5 VIN EN ON/OFF L:OFF H:ON 1 7 220µF 1µF Vref 220µF 1µF Vref SOFT START 23kΩ 4 10kΩ 150kΩ GND EN PVIN RT 4700pF SOFT START 23kΩ INV ERROR AMP INV ERROR AMP + + Vref + PWM COMPARATOR LATCH RESET DRIVER SW 5 33µH VO 2 TSD 10kΩ 150kΩ 4700pF + + Vref + PWM COMPARATOR LATCH RESET DRIVER SW 33µH VO 2 TSD OSC OSC 330µF VIN VIN 330µF + - SW INV VIN FB 3 FB RT + CURRENT LIMIT GND 7 3 VIN SW FB INV EN GND RT FB RT CURRENT LIMIT GND 4 6 6 0.1µF 390kΩ 0.1µF 390kΩ Fig.23 No. 1 2 3 4 5 6 7 8 Pin name VIN SW FB INV EN RT GND PVIN Function Power supply input Output Error Amp output Output voltage feedback Enable Frequency setting resistor connection Ground Power system power supply input No. 1 2 3 4 5 6 7 FIN Pin name VIN SW FB GND INV RT EN - Fig.24 Function Power supply input Output Error Amp output Ground Output voltage feedback Frequency setting resistor connection Enable Ground (BD9001F) (BD9781HFP) VIN 8 VIN EN/ SYNC ON/OFF L:OFF H:ON 1 7 220µF 1µF 220µF 1µF Vref SYNC SOFT START Vref 23kΩ SOFT START INV ERROR AMP 23k INV ERROR AMP 6 + PWM COMPARATOR LATCH RESET DRIVER SW 4 10k 150k + + Vref 10kΩ 33 µH VO + + Vref + PWM COMPARATOR LATCH RESET DRIVER SW 33µH VO 150kΩ 4700pF 2 TSD VIN 1 OSC TSD VIN 4700pF GND EN VIN RT OSC 330µF 330µF + CURRENT LIMIT GND FB RT + CURRENT LIMIT 4 N.C. INV SW FB FB 7 GND 5 3 VIN RT FB EN/SINC SW GND INV 0.1µF 390kΩ 3 6 RT 0.1µF 390k Fig.25 No. 1 2 3 4 5 6 7 8 Pin name SW N.C. FB INV EN RT GND VIN Function Output Non Connection Error Amp Output Output voltage feedback Enable Frequency setting resistor connection Ground Power supply input No. 1 2 3 4 5 6 7 FIN Pin name VIN SW RT GND FB INV EN/SYNC - Fig.26 Function Power supply input Output Frequency setting resistor connection Ground Error Amp output Output voltage feedback Enable/Synchronizing pulse input Ground www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Description of operations Technical Note ERROR AMP The ERROR AMP block is an error amplifier used to input the reference voltage (1 V typ.) and the INV pin voltage. The output FB pin controls the switching duty and output voltage Vo. These INV and FB pins are externally mounted to facilitate phase compensation. Inserting a capacitor and resistor between these pins enables adjustment of phase margin. (Refer to recommended examples on page 11.) SOF T START The SOFT START block provides a function to prevent the overshoot of the output voltage Vo through gradually increasing the normal rotation input of the error amplifier when power supply turns ON to gradually increase the switching Duty. The soft start time is set to 5 msec (Typ.). ON/OFF(BD9778F/HF P,BD9781HFP) Setting the EN pin to 0.8 V or less makes it possible to shut down the circuit. Standby current is set to 0 µA (Typ.). Furthermore, on the BD9781HFP, applying a pulse having a frequency higher than set oscillation frequency to the EN/SYNC pin allows for external synchronization (up to +50% of the set frequency). PWM COM PARATOR The PWM COMPARATOR block is a comparator to make comparison between the FB pin and internal triangular wave and output a switching pulse. The switching pulse duty varies with the FB value and can be set in the range of 0 to 100%. OSC(Oscillator) The OSC block is a circuit to generate a triangular wave that is to be input in the PWM comparator. Connecting a resistor to the RT pin enables setting of oscillation frequency. TSD(Thermal Shut Down) In order to prevent thermal destruction/thermal runaway of this IC, the TSD block will turn OFF the output when the chip temperature reaches approximately 150˚C or more. When the chip temperature falls to a specified level, the output will be reset. However, since the TSD is designed to protect the IC, the chip junction temperature should be provided with the thermal shutdown detection temperature of less than approximately 150˚C. CURREN T LIMIT While the output POWER P-ch MOS FET is ON, if the voltage between drain and source (ON resistance ¥ load current) exceeds the reference voltage internally set with the IC, this block will turn OFF the output to latch. The overcurrent protection detection values have been set as shown below: BD9781HFP . . . 8A(Typ.) BD9001F,BD9778F/HFP . . . 4A(Typ.) Furthermore, since this overcurrent protection is an automatically reset, after the output is turned OFF and latched, the latch will be reset with the RESET signal output by each oscillation frequency. However, this protection circuit is only effective in preventing destruction from sudden accident. It does not support for the continuous operation of the protection circuit (e.g. if a load, which significantly exceeds the output current capacitance, is normally connected). Furthermore, since the overcurrent protection detection value has negative temperature characteristics, consider thermal design. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Timing chart (BD9781HFP) - While in basic operation mode VIN Technical Note Internal OSC FB SW EN/SYNC Fig.27 While in overcurrent protection mode IO Internal OSC FB SW Output short circuit Auto reset Auto reset Auto reset Auto reset Fig.28 External synchronizing function (BD9781HFP) In order to activate the external synchronizing function, connect the frequency setting resistor to the RT pin and then input a synchronizing signal to the EN/SYNC pin. As the synchronizing signal, input a pulse wave higher than a frequency determined with the setting resistor (RT). On the BD9781HFP, design the frequency difference to be within 50%. Furthermore, set the pulse wave duty between 10% and 90%. FSYNC : For RT only Internal OSC : For external synchronization Fig.29 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Description of external components Technical Note VIN L VIN C Cin SW + Di CO VO R1 RT INV RT CT SS GND CSS FB CC RC R2 Fig.30 Design procedure Vo = Output voltage, Vin (Max.) = Maximum input voltage Io (Max.) = Maximum load current, f = Oscillation frequency 1. Setting or output voltage Output voltage can be obtained by the formula shown below. VO=1 x (1+R1/R2) Use the formula to select the R1 and R2. Furthermore, set the R2 to 30 kΩ or less. Select the current passing through the R1 and R2 to be small enough for the output current. 2. Selection of coil (L) The value of the coil can be obtained by the formula shown below: L=(VIN-VO) x VO / (VIN x f x ∆IO) ∆IO: Output ripple current f = Operating frequency ∆Io should typically be approximately 20 to 30% of Io. If this coil is not set to the optimum value, normal (continuous) oscillation may not be achieved. Furthermore, set the value of the coil with an adequate margin so that the peak current passing through the coil will not exceed the rated current of the coil. 5=1 x (1+R1/10kΩ) Calculation example When Vo = 5 V and R2 = 10 kΩ , R1=40kΩ When VIN = 13.2 V, Vo = 5 V, Io = 2 A, and f = 100 kHz, L=(13.2-5) x 5/13.2 x 1/100k x 1/(2 x 0.3) =51.8µH 47µ L=47µH 3. Selection of output capacitor (Co) The output capacitor can be determined according to the output ripple voltage ∆Vo (p-p) required. Obtain the required ESR value by the formula shown below and then select the capacitance. ∆IL=(VIN-VO) x VO/(L x f x VIN) ∆Vpp=∆IL x ESR+(∆IL x Vo)/(2 x Co x f x VIN) Set the rating of the capacitor with an adequate margin to the output voltage. Also, set the maximum allowable ripple current with an adequate margin to ∆IL. Furthermore, the output rise time should be shorter than the soft start time. Select the output capacitor having a value smaller than that obtained by the formula shown below. 3.5m x (ILimit-Io(Max)) CMax= Vo VIN=13.2V, Vo=5V, L=100µH, f=100kHz ∆IL=(13.2-5) x 5/(100 x 10-6 x 100 x 103 x 13.2) 0.31 ∆IL=0.31A When ILimit: 2 A, Io (Max) = 1 A, and Vo = 5V, CMax=3.5m x (2-1)/5 =700µ ILimit:2A(BD9778F/HFP,BD9001F), 4A(BD9781HFP) If this capacitance is not optimum, faulty startup may result. ( 3.5m is soft start time(min.)) CMax=700µF www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Design procedure 4. Selection of diode Set diode rating with an adequate margin to the maximum load current. Also, make setting of the rated inverse voltage with an adequate margin to the maximum input voltage. A diode with a low forward voltage and short reverse recovery time will provide high efficiency. Calculation example Technical Note When VIN = 36 V and Io = (max.) 2 A, Select a diode of rated current of 2 A or more and rated withstand voltage of 36 V or more. 5. Selection of input capacitor Two capacitors, ceramic capacitor CIN and bypass capacitor C, should be inserted between the VIN and GND.Be sure to insert a ceramic capacitor of 1 to 10 µF for the C. The capacitor C should have a low ESR and a significantly large ripple current. The ripple current IRMS can be obtained by the following formula: IRMS=IO X VO X (Vin-VO)/ Vin2 Select capacitors that can accept this ripple current. If the capacitance of CIN and C is not optimum, the IC may malfunction. 6. Setting of oscillation frequency Referring Fig. 34 and Fig. 35 on the following page, select R for the oscillation frequency to be used. Furthermore, in order to eliminate noises, be sure to connect ceramic capacitors of 0.1 to 1.0 µF in parallel. 7. Setting of phase compensation (Rc and Cc) The phase margin can be set through inserting a capacitor or a capacitor and resistor between the INV pin and the FB pin. Each set value varies with the output coil, capacitance, I/O voltage, and load. Therefore, set the phase compensation to the optimum value according to these conditions. (For details, refer to Application circuit on page 11.) If this setting is not optimum, output oscillation may result. When VIN = 13.2 V, Vo = 5 V, and Io = 1 A, IRMS=1 X 5 X (13.2-5)/(13.2)2 =0.485 IRMS=0.485A * The set values listed above are all reference values. On the actual mounting of the IC, the characteristics may vary with the routing of wirings and the types of parts in use. In this connection, it is recommended to thoroughly verify these values on the actual system prior to use. Directions for pattern layout of PCB 1 GND BD9778HFP GND INV SW VIN RT R3 Cx1 C3 EN RT FB CT 3 SIGNAL GND 2 C Cin 8 L 8 L O A D 4 Cx2 R2 Co GND R1 5 6 Fig.31 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Technical Note Di Cin C L RT CT Cx1 R3 Di RT CT Cx1 R3 C3 Cx2 R2 500 R1 600 700 C3 Co Cx2 R2 Cin L Co 200 C R1 Fig.32 BD9001F reference layout pattern As shown above, design the GND pattern as large area as possible within inner layer. Gray zones indicate GND. 500 Fig.33 BD9781HFP reference layout pattern OSCILATING FREQUENCY : fosc[kHz] 450 400 350 300 250 200 150 100 50 0 100 200 300 400 500 600 700 800 OSCILATING FREQUENCY : fosc[kHz] 300 250 200 150 100 50 50 100 300 400 800 OSCILATING FREQUENCY SETTING RESISTANCE : RT[kΩ] OSCILATING FREQUENCY SETTING RESISTANCE : RT [kΩ] Fig.34 RT vs fOSC (BD9781HFP/BD9778F/HFP) Fig.35 RT vs fOSC BD9001F Phase compensation setting procedure 1. Application stability conditions The following section describes the stability conditions of the negative feedback system. Since the DC/DC converter application is sampled according to the switching frequency, GBW (frequency at 0-dB gain) of the overall system should be set to 1/10 or less of the switching frequency. The following section summarizes the targeted characteristics of this application. At a 1 (0-dB) gain, the phase delay is 150˚ or less (i.e., the phase margin is 30˚ or more). The GBW for this occasion is 1/10 or less of the switching frequency. Responsiveness is determined with restrictions on the GBW. To improve responsiveness, higher switching frequency should be provided. Replace a secondary phase delay (-180˚) with a secondary phase lead by inserting two phase leads, to ensure the stability through the phase compensation. Furthermore, the GBW (i.e., frequency at 0-dB gain) is determined according to phase compensation capacitance provided for the error amplifier. Consequently, in order to reduce the GBW, increase the capacitance value. (1) Typical integrator (Low pass filter) (2) Open loop characteristics of integrator (a) A Gain [dB] 0 Phase -90 [˚] 0 -90˚ Phase margin -180˚ f -20dB/decade GBW(b) f FB A + Feedback R - C -180 Since the error amplifier is provided with (1) or (2) phase compensation, the low pass filter is applied. In the case of the DC/DC converter application, the R becomes a parallel resistance of the feedback resistance. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP 2. For output capacitors having high ESR, such as electrolyte capacitor Technical Note For output capacitors that have high ESR (i.e., several Ω), the phase compensation setting procedure becomes comparatively simple. Since the DC/DC converter application has a LC resonant circuit attached to the output, a -180˚ phase-delay occurs in that area. If ESR component is present, howeve r, a +90˚ phase-lead occurs to shift the phase delay to -90˚. Since the phase delay should be set within 150˚, it is a very effective method but tends to increase the ripple component of the output voltage. (1) LC resonant circuit VCC (2) With ESR provided VCC L + C VO L VO ) RESR C fr = 1 [Hz] At this resonance point, a -180˚ phase-delay occurs. A -90˚ phase-delay occurs. According to changes in phase characteristics, due to the ESR, only one phase lead should be inserted. For this phase lead, select either of the methods shows below: (3) Insert feedback resistance in the C. VO C1 R1 INV R2 A + R2 FB INV C2 R1 A + FB (4) Insert the R3 in integrator. VO R3 C2 To cancel the LC resonance, the frequency to insert the phase lead should be set close to the LC resonant frequency. The settings above have are estimated. Consequently, the settings may be adjusted on the actual system. Furthermore, since these characteristics vary with the layout of PCB loading conditions, precise calculations should be made on the actual system. 3. For output capacitors having low ESR, such as low impedance electrolyte capacitor or OS-CON In order to use capacitors with low ESR (i.e., several tens of mΩ), two phase-leads should be inserted so that a -180˚ phase-delay, due to LC resonance, will be compensated. The following section shows a typical phase compensation procedure. (1) Phase compensation with secondary phase lead VO R1 C1 INV R2 A + FB R3 C2 To set phase lead frequency, insert both of the phase leads close to the LC resonant frequency. According to empirical rule, setting the phase lead frequency f Z2 with R3 and C2 lower than the LC resonant frequency fr, and the phase lead frequency fZ1 with the R1 and C1 higher than the LC resonant frequency fr, will provide stable application conditions. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/16 ( 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP Measurement of open loop of DC/DC converter Technical Note To measure the open loop of DC/DC converter, use the gain phase analyzer or FRA to measure the frequency r A characteristics. 1. Check to ensure output causes no oscillation at the maximum load in closed loop. 2. Isolate (1) and (2) and insert Vm (with amplitude of approximately 100 mVpp). 3. Measure (probe) the oscillation of (1) to that of (2). Furthermore, the phase margin can also be measured with the load responsiveness. Measure variations in the output voltage when instantaneously changing the load from no load to the maximum load. Even though ringing phenomenon is caused, due to low phase margin, no ringing takes place. Phase margin is provided. However, no specific phase margin can be probed. DC/DC converter controller VO + ~ Vm RL Maximum load Load 0 Output voltage Inadequate phase margin Adequate phase margin t Heat loss ºC ºC The heat loss W of the IC can be obtained by the formula shown below: Vo W=Ron X Io2 X + VIN X ICC + Tr X VIN X Io X f VIN Ron: ON resistance of IC (refer to pages 4 and 5.) Io: Load current Vo: Output voltage VIN: Input voltage Icc: Circuit current (Refer to pages 2 and 3) Tr: Switching rise/fall time (Approximately 40 nsec) f : Oscillation frequency Tr VIN SW waveform GND 2 T= 1 f 1 1 Ron X Io2 2 2X 1 1 X Tr X X VIN X Io T 2 =Tr X VIN X Io X f www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/16 2010.02 - Rev. B BD9778F, BD9778HFP, BD9001F, BD9781HFP SW VIN VIN VIN Technical Note FB BD9778F/HFP, BD9781HFP VREF VIN RT VREF INV VREF 50kΩ SW 10kΩ RT 2kΩ 300kΩ VIN FB 1kΩ INV 1kΩ EN BD9778F/HFP, BD9001F VIN FB BD9001F VREF VIN EN/SYNC BD9781HFP VREGA VIN EN 300kΩ FB 1kΩ 1kΩ EN/SYNC 222 kΩ 145 kΩ 221 kΩ 2kΩ 250kΩ 139 kΩ Fig.36 Equivalent circuit Notes for use 1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. Furthermore, don't turn on the IC with a fast rising edge of VIN. ( rise time