BD9839MWV

1/4 STURUCTURE Type PRODUCUT SERIES THYSICAL DIMENSIONS BLOCK DIAGRAM FEATURES Silicon Monolithic Integrated Circuit 6 Channel Switching Regulator control system BD９８３９MWV Fig. 1 (Plastic Mold) Fig. 2 ● Step Down 5CH, Step Up 1CH total 6CH included. ● FET 4ch (CH1~CH4) for Synchronous Switching Regulator ● Short Circuit Protection (SCP) ● Under Voltage Lockout Function (UVLO) ● Thermal Shut Down Function (TSD) ● Independent ON/OFF Function Each Channel(Stand_by Current Is Under 5uA) ● UQFN056V7070 Package Absolute Maximum Ratings（Ta=25℃） Parameter Power Supply Voltage Input Voltage BOOT-Lx Voltage Power Dissipation Operating Temperature Storage Temperature Junction Temperature Symbol VCC,PVCC1～6 BOOT1～4 Lx1～4,OUT5,6 ΔBOOT1～4 Pd Topr Tstg Tjmax Limits 12 17.5 12 6.5 420(*1) 930(*2) -30～+85 -55～+125 125 Units V V V V mW mW ℃ ℃ ℃ (*1) Without external heat sink, the power dissipation degrades by 4.2mW/℃ above 25℃. (*2)Power dissipation degrades by 9.3mW/℃ above 25℃, when mounted on a PCB (74.2mm×74.2mm×1.6mm). Recommended Operating Conditions（Ta=25℃） Parameter Power Supply Voltage BOOT-Lx Voltage CH1～4 H NMOS Drain Current CH1～4 L NMOS Drain Current Frequency Stability (*4) VREGA – GND Capacitor VCC – VREGD Capacitor BOOT – Lx Capacitor Symbol VCC,PVCC1～56 BOOT1～4 ⊿BOOT1～4 Idhnl Idlnl fosc CVREGA CVREGD CBOOT Spec. Min 4 3.5 3.5 300 0.47 0.47 0.047 Typ 7 500 1.0 1.0 0.1 Max 11 16 5.0 1.5(*3) 1.5(*3) 2000 2.2 2.2 0.22 Units V V V A A kHz uF uF uF (*3) FET Drain Current Max value.Set the current value within Power dissipation in the application. (*4) Max 1MHz for Ch1 ~ Ch4. Status of this document The Japanese language version of this document shall be the official specification. Any translation of this document shall be for reference only. REV. C 2/4 ● Electrical Characteristics （Ta=25℃，VCC=7V，fosc=500kHz with no designation） Parameter 【Whole Device】 Standby Current Circuit Current 【Reference Voltage】 Output Voltage Line regulation Load regulation Output current at VREGA PIN shorted 【Bias Voltage】 Output Voltage 【Oscillator】 Oscillator Frequency CH1～６ Oscillator Frequency coefficient 【Current Mode Circuit】 Minimum OFF time of H Nch（CH１） Minimum OFF time of H Nch（CH２） Minimum OFF time of H Nch（CH３） Minimum OFF time of H Nch（CH４） SEL control voltage 【PWM Comparator】 ０％Duty threshold（CH5,6） １００％Duty threshold（CH5） MAX Duty ｃｙｃｌｅ ＣＨ６ 【ERRORAMP１】（ＣＨ１） Threshold Voltage Output Voltage Ｌ Output Voltage Ｈ Output Sink Current Output Source Current Input Bias Current Voltage Gain Frequency Bandwidth 【ERRORAMP２】（ＣＨ２～５） Threshold Voltage Output Voltage Ｌ Output Voltage Ｈ Output Sink Current Output Source Current Input Bias Current Voltage Gain Frequency Bandwidth 【ERRORAMP３】（ＣＨ６） Threshold Voltage Output Voltage Ｌ Output Voltage Ｈ Output Sink Current Output Source Current Input Bias Current Voltage Gain Frequency Bandwidth 【Driver 部】 Ｌｘ Pull-down resistor（ＣＨ１～ＣＨ４） Simultaneous off time setting（ＣＨ１～ＣＨ４） H Nch resistor（ＣＨ１） L Nch resistor（ＣＨ１） H Nch resistor（ＣＨ２） L Nch resistor（ＣＨ２） H Nch resistor（ＣＨ３） L Nch resistor（ＣＨ３） H Nch resistor（ＣＨ４） L Nch resistor（ＣＨ４） Output ＯＮ resistor（ＣＨ５） Output ＯＮ resistor（ＣＨ６） 【Control Block】 ＣＴＬ vol ＣＴＬ１～６Pull-down resistor 【Soft Start Block】 Standby Voltage Input Charge Current 【Short Circuit Protection (SCP) Timer】 Timer Start Voltage Threshold Voltage Source Current Standby Volatge 【Short Circuit Detective Comparator】 Threshold Voltage Input Bias Current 【Under Volatge Lockout (UVLO)】 Threshold Voltage１ Hysteresis Voltage Threshold Voltage２ Threshold Voltage３ ON OFF ＶＣＴＬＨ ＶＣＴＬＬ ＲＣＴＬ Ｖｓｔｓｃ ＩＳＯＦＴ Ｖｔｉｍｅ Ｖｔｓｃ Ｉｓｃｐ Ｖｓｔｓｃ ＶＴＨ ＩＢＩＡＳ Ｖｓｔｄ１ ⊿Ｖｓｔ Ｖｓｔｄ２ Ｖｓｔｄ３ 2 -0.3 250 -1.4 2.1 0.9 -1.4 0.95 -15 3.3 25 1.8 2.8 400 10 -1.0 2.2 1.0 -1.0 10 1.0 -10 3.4 100 2.0 3.0 VCC 0.8 700 100 -0.6 2.3 1.1 -0.6 100 1.05 -5 3.5 200 2.2 3.2 Ｖ Ｖ kΩ ｍV uA V V uA ｍV V uA V ｍV V V Symbol Min. 2.475 -30 4.90 450 2 -0.3 1.00 81 0.790 2.2 1.8 -150 60 1 0.990 2.2 1.8 -150 60 1 0.285 2.2 1.8 -150 60 1 300 Limits Typ. 0.1 6.0 2.500 5.00 500 0 1.10 1.60 90 0.800 0.03 2.4 3.6 -100 -50 80 4 1.000 0.03 2.4 3.6 -100 -50 80 4 0.300 0.03 2.4 3.6 -100 -50 80 4 500 25 25 0.38 0.18 0.28 0.28 0.27 0.22 0.28 0.28 9 9 9 9 Max. 5 9.0 2.525 10 10 -5 5.10 550 2 100 100 100 100 VCC 0.8 1.70 99 0.810 0.2 -50 1.010 0.2 -50 0.315 0.2 -50 700 50 50 0.65 0.31 0.48 0.48 0.46 0.37 0.48 0.48 16 16 16 16 Units Condition Ｉｓｔ Ｉｃｃ ＶＲＥＧＡ DVli ＤＶｌｏ Ｉｏｓ ＶＲＥＧＤ ｆｏｓｃ Ｄｆ Ｔｏｆｆｍｉｎ１ Ｔｏｆｆｍｉｎ２ Ｔｏｆｆｍｉｎ３ Ｔｏｆｆｍｉｎ４ ＶＳＥＬＨ ＶＳＥＬＬ Ｖｔ０ Ｖｔ１００ Ｄｍａｘ６ ＶＥＴＨ ＶＯＬ ＶＯＨ ＩＳＩＮＫ ＩＳＯＵＲＣＥ ＩＢＩＡＳ ＡＶ ＢＷ ＶＥＴＨ ＶＯＬ ＶＯＨ ＩＳＩＮＫ ＩＳＯＵＲＣＥ ＩＢＩＡＳ ＡＶ ＢＷ ＶＥＴＨ ＶＯＬ ＶＯＨ ＩＳＩＮＫ ＩＳＯＵＲＣＥ ＩＢＩＡＳ ＡＶ ＢＷ ＲＬｘ ＴＵＰＰＥＲ ＴＬＯＷＥＲ ＲｏｎＨ１ ＲｏｎＬ１ ＲｏｎＨ２ ＲｏｎＬ２ ＲｏｎＨ３ ＲｏｎＬ３ ＲｏｎＨ４ ＲｏｎＬ４ ＲｏｎＨ５ ＲｏｎＬ５ ＲｏｎＨ６ ＲｏｎＬ６ uA mA V mV mV mA V kHz % nsec nsec nsec nsec V V V V % V V V mA uA nA dB MHz V V V mA uA nA dB MHz V V V mA uA nA dB MHz Ω ｎｓｅｃ ｎｓｅｃ Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω FB＝0V VREGA=-1mA VCC=4V～10V、VREGA=-1ｍA VREGA=-1ｍA～-5ｍA VREGA=0V VREGD=-10ｍA RT=10kΩ、CT=220ｐF、SEL=”L” VCC=4V～10V （ｆｏｓｃ=ｆｏｓｃ/2）（CH1～4） INV=0.9V INV=0.7V INV=0.9V、FB=1.25V INV=0.7V、FB=1.25V INV=0V Open loop ｇain INV=1.1V INV=0.9V INV=1.1V、FB=1.25V INV=0.9V、FB=1.25V INV=0V Open loop ｇain INV=0.4V INV=0.2V INV=0.4V、FB=1.25V INV=0.2V、FB=1.25V INV=0V Open loop ｇain CTL=0V Lx1=-50mA Lx1=50mA Lx2=-50mA Lx2=50mA Lx3=-50mA Lx3=50mA Lx4=-50mA Lx4=50mA IOUT5=-15mA IOUT5=15ｍA IOUT6=-15ｍA IOUT6=15ｍA SOFT1～6=0.1V FB1～6 voltage SCP=0.1V SCP1=0V VCC voltage VCC voltage VREGA voltage VREGD voltage REV. C 3/4 ● Package BD9839MW LOT No. Fig－１ ● Block Diagram ● Pin Description BOOT1 ERRORAMP1 Pin No. Pin Name SEL SOFT1 INV1 FB1 SOFT2 INV2 FB2 SOFT3 INV3 FB3 SOFT4 INV4 FB4 SOFT5 INV5 FB5 SOFT6 INV6 FB6 SCP1 SCP OUT6 PGND56 OUT5 PVCC56 CTL6 CTL5 CTL4 Pin Descriptions CH1～CH4 Oscillator Frequency Cotrol Pin CH1 Soft Start Delay time Setting Pin with External Capacitor CH1Error Amplifier Negative Input Pin CH1 Error Amplifier Output Pin CH2 Soft Start Delay time Setting Pin with External Capacitor CH2 Error Amplifier Negative Input Pin CH2 Error Amplifier Output Pin CH3 Soft Start Delay time Setting Pin with External Capacitor CH3 Error Amplifier Negative Input Pin CH3 Error Amplifier Output Pin CH4 Soft Start Delay time Setting Pin with External Capacitor CH4 Error Amplifier Negative Input Pin CH4 Error Amplifier Output Pin CH5 Soft Start Delay time Setting Pin with External Capacitor CH5 Error Amplifier Negative Input Pin CH5 Error Amplifier Output Pin CH6 Soft Start Delay time Setting Pin with External Capacitor CH6 Error Amplifier Negative Input Pin CH6 Error Amplifier Output Pin Short Detective Comparator Negative Input Pin Short Circuit Protection Delay time Setting Pin with External Capacitor CH6 NchFET Driver Output Pin Ground Pin for CH5、6 Driver Output Pin for CH5 PchFET Driver Input Supply Voltage Pin for CH5、6 Driver CH6 ON/OFF Control Pin CH5 ON/OFF Control Pin CH4 ON/OFF Control Pin Pin No. Pin Name BOOT4 PVCC4 Lx4 PGND34 PGND34 Lx3 Lx3 PVCC3 BOOT3 BOOT2 PVCC2 Lx2 CTL3 CTL2 CTL1 PGND12 PGND12 Lx1 Lx1 PVCC1 BOOT1 VREGD VCC VREGA GND SLOPE RT CT Pin Descriptions Input Supply Voltage Pin for CH4 Output Input Supply Voltage Pin for CH4 Output Pin for Connecting to Inductor Ground Pin for CH3、4 Output Ground Pin for CH3、4 Output Pin for Connecting to Inductor Pin for Connecting to Inductor Input Supply Voltage Pin for CH3 Output Input Supply Voltage Pin for CH3 Output Input Supply Voltage Pin for CH2 Output Input Supply Voltage Pin for CH2 Output Pin for Connecting to Inductor CH3 ON/OFF Control Pin CH2 ON/OFF Control Pin CH1 ON/OFF Control Pin Ground Pin for CH1、2 Output Ground Pin for CH1、2 Output Pin for Connecting to Inductor Pin for Connecting to Inductor Input Supply Voltage Pin for CH1Output Input Supply Voltage Pin for CH1Output Bias Output Voltage Pin Input Supply Voltage Pin Reference Output Voltage Pin Ground Pin Slope Setting Pin with external Resistor Oscillator Frequency Adjustment Pin with external Resistor Oscillator Frequency Adjustment Pin with external Capacitor PVCC1 CH1 Step Down DC/DC (Current mode) INV1 SOFT1 FB1 SS TIMER － ＋ 1 Lx1(2pin) PGND12(2pin) 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 2 3 BOOT2 ERRORAMP2 － SS TIMER ＋ PVCC2 CH2 Step Down DC/DC (Current mode) 4 5 6 INV2 SOFT2 FB2 Lx2 BOOT3 ERRORAMP3 － SS TIMER ＋ 7 8 9 10 PVCC3 CH3 Step Down DC/DC (Current mode) INV3 SOFT3 FB3 Lx3(2pin) PGND34(2pin) BOOT4 ERRORAMP4 11 12 PVCC4 CH4 Step Down DC/DC (Current mode) INV4 SOFT4 FB4 SS TIMER － ＋ Lx4 13 14 15 ERRORAMP5 INV5 SOFT5 FB5 SS TIMER － ＋ PVCC56 CH5 Step Down DC/DC (Voltage mode) 16 17 18 19 OUT5 PGND56 INV6 SOFT6 FB6 SS TIMER ERRORAMP6 － ＋ CH6 Step Up DC/DC (Voltage mode) 20 OUT6 21 22 PROTECTION SCP1 － － － － － － ＋ 2.2V 23 24 25 26 SCP SCP TIMER CTL1 CTL2 CTL3 CTL4 CTL5 CTL6 VREGA UVLO SHUT DOWN OSC VREGD VCC 27 28 GND RT CT SLOPE SEL VREGA VREGD Fig－２ REV. C 4/4 ● Operation Notes １.) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC deterioration or damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. ２.) GND potential Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry a voltage lower than or equal to the GND pin, including during actual transient phenomena. ３.) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. ４.) Inter-pin shorts and mounting errors Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply and GND pin caused by the presence of a foreign object may result in damage to the IC. ５.) Operation in a strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. ６.) Common impedance Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance). ７.) Voltage of CTL pin The threshold voltages of CTL pin are 0.8V and 2.0V. STB state is set below 0.8V while action state is set beyond 2.0V. The region between 0.8V and 2.0V is not recommended and may cause improper operation. The rise and fall time must be under 10msec. In case to put capacitor to STB pin, it is recommended to use under 0.01μF. ８.) Thermal shutdown circuit (TSD circuit) This IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of the thermal shutdown circuit is assumed. ９.) Applications with modes that reverse VCC and pin potentials may cause damage to internal IC circuits. For example, such damage might occur when VCC is shorted with the GND pin while an external capacitor is charged. It is recommended to insert a diode for preventing back current flow in series with VCC or bypass diodes between VCC and each pin. 10.) Relationship between PVCC - VCC Because diode was connecting between PVCC (Anode) – VCC (Cathode) for prevent electrostatic breakdown, it must be set PVCC – VCC < 0.3V voltage relationship. 11.) Rush current at the time of power supply injection. An IC which has plural power supplies, or CMOS IC could have momentaly rush current at the time of power supply injection. Because there exists inside logic uncertainty state. Please take care about power supply coupling capacity and width of power Supply and GND pattern wiring. 12.) Please use it so that VCC and PVCC terminal should not exceed the absolute maximum ratings. Ringing might be caused by L element of the pattern according to the position of the input capacitor, and ratings be exceeded. Please will assume the example of the reference ,the distance of IC and capacitor, use it by 5.0mm or less when thickness of print pattern are 35um, pattern width are 1.0mm. 13.) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 14.) IC pin input This monolithic IC contains P+ isolation and PCB layers between adjacent elements in order to keep them isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements. For example, when a resistor and transistor are connected to pins as shown in following chart,  the P/N junction functions as a parasitic diode when GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN).  Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer of other adjacent elements to operate as a parasitic NPN transistor. The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements, such as by the application of voltages lower than the GND (PCB) voltage to input and output pins. Resistance (PinA) (PinB) Transistor ( NPN) Ｂ Ｃ Ｎ Ｅ ＧＮＤ Ｐ Ｐ ＋ (PinA) Parasitic diode Ｇ ＮＤ Ｐ Ｎ ＋ Ｐ Ｎ Ｐ ＋ Ｐ Ｎ Ｎ ＋ (PinB) Ｎ Ｂ Ｃ Ｅ Ｎ P substrate ＧＮＤ P substrate ＧＮＤ Parasitic diode Parasitic elementals Other adiacent components ＧＮＤ Parasitic diode REV. C Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. 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