Large Current External FET Controller Type Switching Regulators
Single/Dual-output High-frequency Step-down Switching Regulator(Controller type)
BD9845FV
No.11028EDT08
●Overview BD9845FV is an IC containing a circuit of switching regulator controller by pulse width modulation system. This circuit can be used for step-down DC/DC converter operation. In addition, the package is designed compact, and is optimum for compact power supply for many kinds of equipment. ●Feature 1) High voltage resistance input (Vcc=35V) 2) FET driver circuit is contained (step-down circuit 1 output). 3) Error amplifier reference voltage (1.0V1%) and REG output circuit (2.5V) are contained. 4) Overcurrent detection circuit is contained. 5) Soft start and pause period can be adjusted. 6) Three modes of standby, master, and slave can be switched. (iccs = 0 uA typ in standby mode.) 7) ON/OFF control is enabled independently for each channel. (DT terminal) ●Application LCD, PDP, PC, AV, Printer, DVD, Projector TV, Fax, Copy machine, Measuring instrument, etc. ●Absolute maximum rating Item Supply voltage Permissible loss OUT terminal voltage resistance C5V terminal voltage resistance Operation temperature range Storage temperature range Joint temperature Symbol Vcc Pd OUT C5V Topr Tstg Tjmax Rating 36 500*1 Vcc-7V to Vcc Vcc-7V to Vcc -40 to +85 -55 to +150 150 Unit V mW V V °C °C °C
*1 When glass epoxy board 70.0 mm 70.0 mm 1.6 mm is installed onboard. Reduced by 4.0 mW/C above Ta=25C.
●Operating condition (Ta=25C) Item Supply voltage Output terminal voltage Timing capacity Oscillation frequency STB input voltage SEL input voltage Symbol Vcc OUT CCT Fosc VSTB VSELTB Range 3.6 to 35 C5V – Vcc 47 to 3000 100 to 1500 0 to Vcc 0 to Vcc Unit V V pF kHz V V
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1/15
2011.08 - Rev.D
BD9845FV
●Electric characteristics (Ta=25C, VCC=6V unless otherwise specified) Standard value Item Symbol Min. Typ. Max. [VREF output unit] Output voltage VREF 2.450 2.500 2.550 Input stability Line reg. - 1 10 Load stability Load reg. - 2 10 Current capacity IOMAX 2 13 - [Triangular wave oscillator] Oscillation frequency FOSC 95 106 117 Frequency fluctuation FDV - 0 1 [Soft start unit] SS source current ISSSO 1.4 2 2.6 SS sink current ISSSI 5 12 - [Pause period adjusting circuit] DT input bias current IDT - 0.1 1 DT sink current IDTSI 1 3.3 - [Low input malfunction preventing circuit] Threshold voltage VUTH 3.0 3.2 3.4 Hysteresis VUHYS - 0.15 0.25 [Error amplifier] Non-inverting input reference voltage VINV 0.99 1 1.01 Reference voltage supply fluctuation dVinv - 1 6 INV input bias current IIB - 0 1 Open gain AV 65 85 - Max output voltage VFBH 2.30 - VREF Min output voltage VFBL - 0.6 1.3 Output sink current IFBSI 0.5 1.5 - Output source current IFBSO 50 105 - [PWM comparator] Vt0 1.4 1.5 1.6 Input threshold voltage(fosc=100kHz) Vt100 1.9 2 2.1 [Output unit] Output ON resistance H RONH - 4.0 10 Output ON resistance L RONL - 3.3 10 C5V clamp voltage VCLMP 4.5 5 5.5 [Overcurrent protection circuit] Overcurrent detection threshold voltage VOCPTH 0.04 0.05 0.06 OCP-input bias current IOCP- 0.1 10 Overcurrent detection delay time tdocpth - 200 400 Overcurrent detection minimum tdocpre 0.8 1.6 - retention time [Standby changeover unit] STB flow-in current ISTB 55 100 Standby mode setting range VSTBL 0 0.5 Active (master) mode setting range VSTBH 3.0 VCC SEL flow-in current ISEL 15 30 Master mode setting range VSELL 0 0.5 Slave mode setting range VSELH 2.0 VCC [Device overall] Standby current ICCS - 0 1 Average power consumption ICCA 1 2.4 4
* Radiation resistance design is not applied.
Technical Note
Unit V mV mV mA kHz % µA mA µA mA V V V mV µA dB V V mA µA V V Ω Ω V V µA ns ms µA V V µA V V µA mA
Condition IO=0.1 mA Vcc=3.6 V→35 V IO=0.1 mA→2 mA VREF=(typ.)×0.95 CCP=1800 pF Vcc=3.6 V→35 V SS=0.5 V SS=0.5 V DT=1.75 V DT=1.75 V, (OCP+)-(OCP-)=0.5 V Vcc start detection
INV=FB Vcc=3.6 V→35 V INV=1 V
FB=1.25 V, INV=1.5 V FB=1.25 V, INV=0.5 V On duty 0% On duty 100% RONH=(VCC -OUT)/ Iout, Iout=0.1 A RONL=(OUT-C5 V)/ Iout, Iout=0.1 A VCLMP= VCC-C5V , VCC >7 V Voltage between(OCP+) and (OCP-) OCP+= VCC, OCP-= VCC-0.5 V OCP-= VCC→VCC-0.2 V OCP-= VCC-0.2 V→VCC STB=6V
SEL=2.5V
STB=0 V INV=0 V, FB=H, DT=1.75 V
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2/15
2011.08 - Rev.D
BD9845FV
●Reference data
10 9 Standby Current: ICCS(uA) Current: ICCA(mA) 8 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 VCC=6V 8 7 Circuit Current: ICCA(mA) 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 Ta=25°C 8 7 6 5 4 3 2 1 0 -50 -25 0
Technical Note
VCC=6V
Circuit
25
50
75
100
125
Ambient Temperature: Ta(°C)
Supply Voltage: VCC(V)
Ambient Temperature: Ta(°C)
Fig.1 Standby current temperature characteristics
2.520 Reference Voltage: VREF(V) 2.515 Reference Voltage: VREF(V) 2.510 2.505 2.500 2.495 2.490 2.485 2.480 0 5 10 15 20 25 30 35 40 Supply Voltage: VCC(V) Ta=25°C
Fig.2 Circuit current in operation
2.520 2.515 2.510 2.505 2.500 2.495 2.490 2.485 2.480 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Ta=25°C VCC=6V
Fig.3 Circuit current temperature characteristics in operation
2.520 2.515 2.510 2.505 2.500 2.495 2.490 2.485 2.480 -50 -25 0 25 50 75 100 125 VCC=6V
Reference Output Current: IREF(mA)
Reference Output Voltage: VREF (V)
Ambient Temperature: Ta(°C)
Fig.4 VREF supply voltage characteristics
Fig.5 VREF current capability
Fig.6 VREF temperature characteristics
3.5 3.4 UVLO Threshold: VUTH(V) 3.3
Loop Gain :Closed [ dB ]
100 80 60 40 20 0 -20
Gain Phase
0 -45
ErrAmp Input Current: IIB(µA)
2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
3.2 3.1 3 2.9 2.8 2.7 2.6 2.5 -50 -25 0 25 50 75 100 125
-90
Phase
-135 -180
Phase Shift [ deg ]
VCC=6V Ta=25℃
Gain
100 1K
-225 -270
Ambient Temperature: Ta(°C)
Fr equency [Hz]
10K
100K
1M
10M
ErrAmp Input Voltage: VINV(V)
Fig.7 UVLO threshold temperature characteristics
Fig.8 Error amplifier I/O characteristics
Fig.9 Error amplifier input current
1.01 ErrAmp Reference Voltage: VINV(V) FB Source Current: IFBSO(µA) 1.006 1.004 1.002 1 0.998 0.996 0.994 0.992 0.99 -50 -25 0 25 50 75 100 125 VCC=6V 120 100 80 60 40 20 0 0 1 2 3 4 Ambient Temperature: Ta(°C) ErrAmp Output Voltage: VFB(V) Ta=-40°C VCC=6.0V FB Sinkt Current: IFBSI(mA) 1.008 140 Ta=85°C Ta=25°C
3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 0 0.5 1 1.5 2 VCC=6.0V Ta=85°C Ta=25°C Ta=-40°C
ErrAmp Output Voltage: VFB(V)
Fig.10 Error amplifier reference voltage temperature characteristics
Fig.11 FB output source current
Fig.12 FB output sink current
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3/15
2011.08 - Rev.D
BD9845FV
●Reference data
4.0 SS Source Current: ISSso(µA) SS Sink Current: ISSsi(mA) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 SS Voltage: VSS(V) VCC=6.0V 35 30 25 20 15 10 5 0 0 0.5 1 1.5 2 VCC=6.0V Ta=-40°C Ta=25°C Ta=85°C
Technical Note
5 SS Source Current: ISSso(uA) 4 3 2 1 0 -50
VCC=6.0V
-25
0
25
50
75
100
125
SS Voltage: VSS(V)
Ambient Temperature: Ta(°C)
Fig.13 SS source current
Fig.14 SS sink current
Fig.15 SS source current temperature characteristics
120 CCP=1800pF DT Input Current: IDT(µA) Frequency: FOSC(kHz) 110
7 6 Dt SInk Current: IDT(mA) 5 4 3 2 1 0 -25 0 25 50 75 100 125 0 0.5 1 1.5 2 2.5 DT Input Voltage: VDT(V) VCC=6.0V Ta=25°C
7 6 5 4 3 2 VCC=6.0V 1 0 0 0.5 1 1.5 2 2.5 Ta=-40°C Ta=25°C Ta=85°C
100 VCC=6V 90
80 -50
Ambient Temperature: Ta(°C)
DT Input Voltage: VDT(V)
Fig.16 Oscillation frequency temperature characteristics
Fig.17 DT bias current
Fig.18 DT sink current
100 90 80 70 60 50 40 30 20 10 0 1.4 1.6 1.8
VCC=6.0V Ta=25°C
100 90 80 70 60 50 40 30 20 10 0 1.4
40 35 VCC=6.0V Ta=25°C 30 IDS(mA) 25 20 15 10 5 1.6 1.8 2 2.2 0 VCC VCC -0.05 VCC -0.10 VOUT(V) VCC -0.15 VCC -0.20 Ta=-40°C Ta=25°C Ta=85°C VCC=6.0V Ta=25°C
Output Duty Cycle: Duty(%)
2
2.2
DT Input Voltage: VDT(V)
Output Duty Cycle:Duty(%)
DT Input Voltage: VDT(V)
Fig.19 Output Duty-VDT characteristics (100kHz)
Fig.20 Output Duty-VDT characteristics (1.5MHz)
Fig.21 Output ON resistance H (RONH)
40 35 30 IDS(mA) 25 20 15 10 5 0 C5V C5V -0.05 C5V -0.10 VOUT(V) C5V -0.15 C5V -0.20 VCC=6.0V Ta=-40°C Ta=25°C Ta=85°C
ISTB(uA)
500
70
VCC=35V Ta=85 Ta=25 Ta=-40℃
400 350 300 250 200 150 100 50 0 0 5 10 15
OCP Threshold: Vocpth(mV)
450
65 60 55 50 45 40 35 30 -50 -25 0 25 50 75 100 125 VCC=6V
20 VSTB(V)
25
30
35
40
Ambient Temperature: Ta(°C)
Fig.22 Output ON resistance L (RONH)
Fig.23 STB flow-in current
Fig.24 Overcurrent detection voltage temperature characteristics
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4/15
2011.08 - Rev.D
BD9845FV
●Reference data
5.0 4.5 3.5 VC5V(V) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 50 100 150 200 250 VCC=5.0V Ta=25°C 4.0 5.5 5.4 5.3 VCC=6.0V Ta=25°C VCC-VC5V(V) 10 9 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 0 5 10
Technical Note
VCC-VC5V(V)
5.2 5.1 5.0 4.9 4.8 4.7 4.6 4.5
Ta=25°C
15
20
25
30
35
40
IC5V(mA)
IC5V(mA)
Supply Voltage: VCC(V)
Fig.25 C5V saturation voltage
Fig.26 C5V load regulation
Fig.27 C5V line regulation
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5/15
2011.08 - Rev.D
BD9845FV
●Block diagram/Pin layout
VCC
VCC
Technical Note
STB
SEL
OCP+
OCP-
VCC VREF
+
REG (2.5V) STB
MASTER /SLAVE
VCC OCP
VREF
-
OCP
+ C5V C5V 50mV±10mV
REG (VCC-5V) C5V
DT
DTOFF
FB
VREF 2μA 1V±10mV
DT +
1.25V
DTLow
VCC
SS
SSOFF
+ + ERR -
+ + PWM -
LS
DRV
OUT
C5V
INV OSC
200μA + 200μA
PROTECTION LOGIC
OCP 2.0V 1.5V Hold time (1.6msec)
DTLow
SSOFF
DTOFF
TSD
TSD
UVLO TSD Hold time (0.2msec) MASTER /SLAVE VCC VREF C5V 3.2V 2.2V 3V
2V 1.5V
UVLO
UVLO
CT
Fig.28 Block diagram
GND
VREF CT
DT SS
Terminal number 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Terminal name VREF CT GND STB C5V OUT Vcc OCP+ OCP- SEL FB INV SS DT
Function Reference voltage (2.5V) output terminal Timing capacity external terminal
GROUND
SSOP-B14
GND STB C5V OUT VCC
INV FB SEL OCPOCP+
Standby mode setting terminal
Output L side voltage (Vcc-5V)
Output Power terminal Output Overcurrent detector + Input terminal Output Overcurrent detector - Input terminal
Master/Slave mode setting terminal
Fig.29 Pin layout
Output Error amplifier output terminal Output Output Error amplifier - input terminal Soft start time setting terminal
Output Dead time setting terminal
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6/15
2011.08 - Rev.D
BD9845FV
Technical Note
●Operation description of each block and function 1) REG (reference voltage unit) As for REG (2.5V), reference voltage (2.5V) stabilized better than supply voltage input to VCC terminal is supplied as an operation voltage of IC internal circuit, as well as output outside through VREF terminal. Insert a capacitor of 1uF to VREF terminal. As for REG (VCC-5V), voltage of VCC-5V is supplied as power supply (LDO) of driver circuit (DRV) of OUT terminal, as well as output outside through C5V terminal. Insert a capacitor of 1uF to VCC terminal of C5V terminal. 2) ERR Amp (error amplifier) In step-down application, inverting input INV of error amplifier detects output voltage by sending back feedback current from final output stage (on load side) of switching regulator. R1 and R2 connected to this input terminal are resistor for setting output voltage. Non-inverting input of amplifier is a reference input of error amplifier itself by adding reference voltage (1.0V) inside IC. Rf and Cf connected between FB, which is output from error amplifier, and INV are for feedback of error amplifier, and allows setting of loop gain. FB is connected to PWM Comp and supplied as non-inverting input. Setting of output voltage (Vo) is as follows: Vo = R1+R2 R2 1.0V
Vo
R1
1V
ErrAmp
12 Rf R2 Cf 11 FB INV
Fig.30
3) OSC (triangular wave oscillating unit) Generates triangular wave for inputting to PWM Comp. First, timing capacitor CCT connected between CT terminal and GND is charged by constant current (200 uA) generated inside IC. When CT voltage reaches 2.0 V typ, the comparator is switched, and then CCT is discharged by constant current (200 µA). Then, when CT voltage reaches 1.5V, the comparator is switched again, and CCT is charged again. This repetition generates triangular wave. Oscillation frequency is determined by externally mounted CCT through theoretical formula below: Fosc ≒ ICT/(2・CCT・ΔVosc) ICT : CT sink/source current 200 uA typ ΔVosc : Triangular wave amplifying voltage=(Vt0-Vt100)=0.50 V typ. Here, error from theoretical formula is caused by delay of internal circuit at a high frequency. See the graph in Fig 31 for setting. This triangular wave can be taken out through CT terminal. It is also possible to input the oscillator externally by switching to slave mode described later. Waveform input here in principle must be triangular wave of Vpeak = (1.5V 2.0V) equivalent to internal oscillation circuit. External input voltage range VCT : 1.4 V < VCT < 2.3 V Standard external CCT range CCT : MIN.47 pF – MAX.3000 pF
10000
Oscillation frequency (kHz)
1000
100 Ta=25℃
10 10 100 1000 10000
CT timing capacity (pF)
Fig.31
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7/15
2011.08 - Rev.D
BD9845FV
4) Soft start (soft start function) It is possible to provide SS terminal (13pin) with soft start function by connecting CSS as shown on the right. Soft start time TSS is shown by the formula below: Tss = Css・ Vinv Issso (Ex) When Css = 0.01 uF Tss = = 0.01×10 ×1 2×10-6 5 [msec]
R1
-6
Technical Note
VREF
2uA SS Css 13 1Vtyp. 12 ErrAmp
Css : SS terminal connection capacity Vinv : Error amplifier reference voltage (1V typ) Issso : SS source current (2uA typ)
INV
Fig.32
1 VREF
In order to function soft start, time must be set longer enough than start time of power supply and STB. It is also possible to provide function of soft start by connecting the resistor (R1/R2) and capacitor (CDT) to DT terminal (14pin) as shown on the right.
14
DT
C DT
R2
Fig.33
5) PWM Comp - DEAD TIME (Pause period adjusting circuit - dead time) Dead time can be set by applying voltage dividing resistance between VREF and GND to DT terminal. PWM Comp compares the input dead time voltage (DT terminal voltage) and error voltage from Err Amp (FB terminal voltage) with triangular wave, and turns off and on the output. When dead time voltage < error voltage, duty of output is determined by dead time voltage. (When dead time setting is not used, pull up DT terminal to VREF terminal with resistor approx 10 k ohms.) Dead time voltage VDT in Fig 32 is shown by the formula below: VDT = VREF・ R2 R1+R2
2.4 2.2 2 VDT[V] 1.8 1.6
Vt0
Relation between VDT and Duty [See the graph on the right.] Duty 100% Duty 0% min typ max min typ max When f = 100kHz 1.9 2.0 2.1 1.4 1.5 1.6 When f = 1.5MHz 1.95 2.1 2.25 1.35 1.5 1.65 [Unit : V] Be careful when oscillation frequency is high, upper/lower limit of triangular wave (Vt100/Vt0) is shifted by delay time of comparator to directions expanding amplitude.
Vt100
1.4 1.2 1 100 1000 fosc[KHz] 10000
6) OCP Comp (overcurrent detection circuit) This function provides protection by forcibly turning off the output when abnormal overcurrent flows due to shorting of output, etc. When voltage between terminal OCP+(8pin)/OCP-(9pin) monitoring the current with sense resistor exceeds overcurrent detection voltage (50 mV typ), it is determined as overcurrent condition, and switching operation is stopped immediately by setting OUT to "H" and DT,SS (and FB) to "L". It is automatically recovered when voltage between terminal OCP+/OCPis below overcurrent detection voltage. In addition, although hysteresis, etc. are not set here, minimum detection retention time (1.6ms typ) is set for suppressing the heating of FET, etc. (See the timing chart.) When the overcurrent detection circuit is not used, short-circuit both terminal OCP+/OCP- to VCC pin.
Fig.34
Direction of current VIN
OCP+
8
Sense resistor
OCP-
9
50mVtyp.
OCP Comp
Fig.35
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8/15
2011.08 - Rev.D
BD9845FV
7) STB /SEL(Standby/Master/Slave function) Standby mode and normal mode can be switched by STB terminal (4pin). 1. When STB3.0V, normal operation mode is set. All circuits operate. Use the controller normally in this range.
Technical Note
Master mode and slave mode can be switched by SEL terminal (10pin). 1. When SEL0.5V, slave mode is set. Operation status is set , but OSC block alone is stopped, CT terminal is High-Z here, and triangular wave is not output.(PWM circuit and protection circuit perform the same operation as usual.) Therefore, if the controller is used in this more without using master IC, triangular wave is not emitted, operation is unstable, and normal output cannot be obtained. Be careful.
OUT terminal permissible capacity [F]
8) OUT (Output: External FET gate drive) OUT terminal (6pin) is capable of directly driving the gate of external (PchMOS) FET. Amplitude of output is restricted between Vcc and C5V (Vcc-5V), and is not restricted by voltage resistance of gate by input voltage, which allows broad selection of FET. However, for precaution when selecting FET, there is a restriction that input capacity of gate is determined by current capability of C5V and permissible loss of IC, therefore refer to the permissible range in the graph on the right when determining FET.
1.E-07
Cout_max Cout_max (Vcc=10V) Cout_max (Vcc=20V) Cout_max (Vcc=30V)
1.E-08
1.E-09
Per m is s ible r ange
Fig.35 OUT 端子外付け容量許容範囲
Area below each line under each condition
1 .E-10 100 1000 Switching f requency [kHz] 10000
Fig.36
9) Protection (other protection functions) This IC is equipped with low input malfunction prevention circuit (UVLO) and abnormal temperature protection circuit (TSD) in addition to overcurrent detection circuit (OCP). Low input malfunction prevention circuit is for preventing unstable output when input voltage is low. Three positions of Vcc (3.2V), VREF(2.35V), and C5V(Vcc-3V) are monitored, and output is made only when all are canceled. (See the timing chart.) Abnormal temperature protection circuit is for protecting IC chip from destruction for preventing runaway when abnormal heating is caused on IC exceeding rated temperature. (It does not operate normally.) Apply a design with full margin allowed for heating in consideration of permissible loss.
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9/15
2011.08 - Rev.D
BD9845FV
●Timing chart ◎Starting characteristics (UVLO cancel) and standby operation
VCC
Technical Note
(①Vcc>3.2VでUVLO(Vcc)解除 1) UVLO (Vcc) is canceled when Vcc>3.2V.
S TB
1.8Vtyp. 0.9Vtyp.
VREF起動電圧 VREF停止電圧
VREF
(②VREF>2.2VでUVLO(VREF)解除 VREF>2.2V. 2) UVLO (VREF) is canceled when
SS
UVLO (TSD) Minimum retention time (0.2 ms)
☆UVLO(TSD)最小保持時間(0.2msec) 1V
Set SS by external capacity. SSは外付け容量によって設定します。 Although SS is notated by the same time axis in the figure for showing the image, 図中ではイメージをつかんで頂く為同じ時間軸で表記しておりますが、 actually set sufficiently longer time in comparison with the cycle of triangular wave. 実際は三角波の周期に比べ十分に長い時間を設定します。
■UVLOは、
①Vcc②VREF③C5V全てが通常状態となった後、☆最小保持時間後に解除、 UVLO
①Vcc②VREF③C5VのいずれかでUVLOを検出した場合には、ただちに出力を停止。 DT FB CT UVLO保護状態 UVLO
UVLO voltage [unit: V]
Item Threshold voltage (VCC) Hysteresis
CT: :UVLO期間中はVREFにプルアップ CT Pull-up to VREF during UVLO period DT: Pull-down during UVLO DT:UVLO期間中はプルダウン
Min 3.0 2.0 -
Typ 3.2 0.15 2.2 3.0
Max 3.4 0.25 2.4 3.4
OUT C5V When UVLO (Vcc , and VREF) is UVLO(Vcc,VREF)とも解除になると canceled, (Vcc - 5V) Reg is started. (Vcc-5V)Regが起動 Vcc Vcc-5V
FB:UVLO期間中はプルダウン FB: Pull-down during UVLO OUT
Threshold voltage (VREF) Threshold voltage (C5V)
C5V
(3) UVLO (C5V) is canceled when C5V(Terminal B) for transistor (NPN). ○In addition, when GND>(Terminal B) for transistor (NPN), parasitic NPN transistor is operated by N-layer of some other elements in the vicinity of parasitic diode mentioned above. Parasitic element is inevitably generated by potential because of IC structure. Operation of parasitic element causes interference with circuit operation, and may lead to malfunction, and also may cause rupture. Therefore when applying a voltage lower than GND (P board) to I/O terminal, pay full attention to usage so that parasitic elements do not operate.
抵抗 Resistor ( 端子A ) (Terminal A) ~ ~ ト ラ ン ジスタ (NPN) Transistor ( NPN) ((Terminal B) 端子B) C E ~ ~ B
GND N P+ N N P 基板 P board N N P P+ P+ N N P P+
Parasitic element 寄生素子 Parasitic element 寄生素子
( 端子B (Terminal B) )
PP oard b 基板
GND
GND
(Terminal A) ( 端子 A)
~ ~
C ~ ~ 寄生素子 element Parasitic B E GND
A近接する 他の素子 nother element in the vicinity
GND
Parasitic element 寄生素子
Fig.44
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14/15
2011.08 - Rev.D
BD9845FV
●Ordering part number
Technical Note
B
D
9
Part No. 9845
8
4
5
F
V
-
E
2
Part No.
Package FV : SSOP-B14
Packaging and forming specification E2: Embossed tape and reel (SSOP-B14)
SSOP-B14
5.0 ± 0.2
14 8
Tape Quantity
0.3Min.
Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.4 ± 0.3
4.4 ± 0.2
Direction of feed
( reel on the left hand and you pull out the tape on the right hand
)
1
7
0.15 ± 0.1
1.15 ± 0.1
0.10
0.65
0.1
0.22 ± 0.1
1pin
(Unit : mm)
Direction of feed
Reel
∗ Order quantity needs to be multiple of the minimum quantity.
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15/15
2011.08 - Rev.D
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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