Datasheet
4.5V to 18V Input, 5.0A Integrated MOSFET
Single Synchronous Buck DC/DC Converter
BD9C501EFJ
General Description
BD9C501EFJ is a synchronous buck switching regulator
with built-in low on-resistance power MOSFETs. With
wide input voltage range, It is capable of providing current
of up to 5A. It is a current mode control DC/DC converter
and features high-speed transient response. Phase
compensation can also be set easily.
Features
■ Synchronous Single DC/DC Converter
■ Over Current Protection
■ Thermal Shutdown Protection
■ Under Voltage Lockout Protection
■ Short Circuit Protection
■ Fixed Soft Start Function
Key Specifications
Input Voltage Range:
Reference Voltage:
Maximum Output Current:
Switching Frequency:
Pch MOSFET On Resistance:
Nch MOSFET On Resistance:
Standby Current:
Operating Temperature Range:
Package
HTSOP-J8
4.5V to 18.0V
0.8V ± 1%
5A(Max)
500kHz(Typ)
50mΩ(Typ)
35mΩ(Typ)
1μA (Typ)
-40°C to +85°C
W(Typ) x D(Typ) x H(Max)
4.90mm x 6.00mm x 1.00mm
Applications
■ LCD TVs
■ Set-top Boxes
■ DVD/Blu-ray Disc Players/Recorders
■ Broadband Network and Communication Interface
■ Entertainment Devices
HTSOP-J8
Typical Application Circuit
VIN
12V
10µF
Enable
VIN
3.3µH
0.1µF
VOUT
3.3V
SW
EN
COMP AGND
PGND
FB
22µF×2
Figure 1. Application Circuit
〇Product structure: silicon monolithic integrated circuit 〇This product has no protection against radioactive rays.
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Pin Configuration
(TOP VIEW)
PGND
1
8
SW
VIN
2
7
SW
AGND
3
6
EN
FB
4
5
COMP
Figure 2. Pin Assignment
Pin Descriptions
Pin No.
Pin Name
Function
1
PGND
2
VIN
3
AGND
4
FB
5
COMP
6
EN
Turning this pin signal low (0.8 V or lower) forces the device to enter the shutdown mode. Turning this
pin signal high (2.0 V or higher) enables the device. This pin must be terminated.
SW
Switch nodes. These pins are connected to the drain of Pch MOSFET and the drain of Nch MOSFET.
E-Pad
A backside heat dissipation pad. Connecting to the internal PCB ground plane by using multiple vias
provides excellent heat dissipation characteristics.
Ground pins for the output stage of the switching regulator.
This pins supply power to the control circuit and the output stage of the switching regulator.
Connecting a 10 µF and a 0.1µF ceramic capacitor is recommended.
Ground pin for the control circuit.
An inverting input node for the gm error amplifier.
See page 14 for how to calculate the resistance of the output voltage setting.
An input pin for the switch current comparator and an output pin for the gm error amplifier. Connect a
frequency phase compensation component to this pin.
See page 14 for how to calculate the resistance and capacitance for phase compensation.
7
8
-
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Block Diagram
EN
6
VREF
OSC
SCP
OCP
UVLO
IBIAS
VIN
TSD
2
S
FB
7 SW
8
LOGIC
ERR
4
OUTPUT
SLOPE
COMP
PWM
5
R
PGND
1
SoftStart
3
AGND
Figure 3. Block Diagram
Absolute Maximum Ratings (Ta = 25C)
Parameter
Symbol
Rating
Unit
Supply Voltage
VIN
20
V
SW Pin Voltage
VSW
20
V
EN Pin Voltage
VEN
20
V
Power Dissipation (Note 1)
Pd
3.76
W
Operating Temperature Range
Topr
-40 to +85
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
150
°C
VLVPINS
7
V
Maximum Junction Temperature
FB, COMP Pin Voltage
Conditions
When mounted on a 70 mm x 70
mm x 1.6 mm 4-layer glass epoxy
board
(Note1) Derate by 30.08 mW when operating above 25C.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Range (Ta= -40°C to +85°C)
Parameter
Symbol
Rating
Min
Typ
Max
Unit
Supply Voltage
VIN
4.5
-
18.0
V
Output Current
IOUT
-
-
5.0
A
VRANGE
VIN × 0.075(Note 1)
-
VIN × 0.7
V
Output Voltage Setting Range
(Note 1) VIN x 0.075 ≥ 0.8 [V]
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Electrical Characteristics
(Ta = 25C, VIN = 12 V, VEN = 5 V unless otherwise specified)
Parameter
Symbol
Limits
Min
Typ
Max
Unit
Conditions
Circuit Current in Active
IQ_active
-
1.5
2.5
mA
VFB= 0.75V, VEN= 5V
Circuit Current in Standby
IQ_stby
-
1.0
10.0
μA
VEN = 0V
FB Pin Voltage
VFB
0.792
0.800
0.808
V
FB-COMP Short
(Voltage follower)
FB Input Current
IFB
-
0
2
μA
Switching Frequency
fOSC
450
500
550
kHz
High Side FET On Resistance
RONH
-
50
-
mΩ
VIN= 12V , ISW = -1A
Low Side FET On Resistance
RONL
-
35
-
mΩ
VIN= 12V , ISW = -1A
Power MOS Leakage Current
ILSW
-
0
5
μA
VIN= 18V , VSW = 18V
Current Limit
ILIMIT
5.5
-
-
A
Min_duty
-
-
7.5
%
VUVLO
3.8
4.1
4.4
V
VUVLOHYS
-
0.3
-
V
EN High-Level Input Voltage
VENH
2.0
-
-
V
EN Low-Level Input Voltage
VENL
-
-
0.8
V
Soft Start Time
TSS
0.5
1.0
2.0
msec
Minimum Duty Ratio
UVLO Threshold
UVLO Hysteresis Voltage
(Note 1) VFB :FB Pin Voltage, VEN :EN Pin Voltage,
(Note 2) Current capability should not exceed Pd.
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VIN Sweep up
ISW :SW Pin Current
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Typical Performance Curves
100
110
90
100
80
90
80
Vout = 5.0V
Vout = 3.3V
60
50
Tc[℃]
Efficiency [%]
70
Vout = 1.2V
70
60
40
50
30
20
40
10
30
0
20
0
1
2
3
4
0
5
1
SW
3
4
ILOAD[A]
ILOAD[A]
Figure 4. Efficiency
Figure 5. TC vs ILOAD
(VIN=12V, Vout=3.3V, L=3.3µH, Cout=44µF)
(VIN=12V, L=3.3µH / 4.7µH / 4.7µH (Vout=1.2 / 3.3 / 5.0V))
Vout(AC)
2
[20mV/div]
Vout(AC)
[5V/div]
SW
T - Time - 1µsec/div
[20mV/div]
[5V/div]
T - Time - 1µsec/div
Figure 6. Vout Ripple
Figure 7. Vout Ripple
(VIN=12V, Vout=3.3V, L=3.3µH, Cout=44µF, Iout=0A)
(VIN=12V, Vout=3.3V, L=3.3µH, Cout=44µF, Iout=5A)
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3.40
3.40
3.38
3.38
3.36
3.36
3.34
3.34
3.32
3.32
Vout [V]
Vout [V]
Typical Performance Curves (Continued)
3.30
3.28
3.30
3.28
3.26
3.26
3.24
3.24
3.22
3.22
3.20
3.20
0
1
2
3
4
5
4
6
8
10
12
14
16
18
80
100
ILOAD [A]
Figure 8. Load Regulation
VIN [V]
Figure 9. Line Regulation
(VIN=12V, Vout=3.3V, L=3.3µH, Cout=44µF)
(Vout=3.3V, L=3.3µH, Cout=44µF, Iout=0A)
3.40
560
3.38
3.36
3.34
520
3.32
Vout [V]
Frequency [kHz]
540
500
480
3.30
3.28
3.26
3.24
460
3.22
3.20
440
4
6
8
10
12
14
16
-40
18
-20
0
20
40
60
VIN [V]
Figure 10. Switching Frequency
Ta [℃]
Figure 11. Vout vs Temperature
(Vout=3.3V, L=3.3µH, Cout=44µF, Iout=0A)
(Vin=12V, Vout=3.3V, L=3.3µH, Cout=44µF, Iout=0A)
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Typical Performance Curves (Continued)
EN [5V/div]
EN [5V/div]
Vout [2V/div]
Vout [2V/div]
SW
SW
[10V/div]
T - Time – 1msec/div
[10V/div]
T - Time – 200msec/div
Figure 12. Start-up with EN
Figure 13. Shutdown Wave Form
(Vin=12V, Vout=3.3V, L=3.3µH, Cout=44µF, Iout=0A)
(Vin=12V, Vout=3.3V, L=3.3µH, Cout=44µF, Iout=0A)
Vout [5V/div]
Δ=+68mV
Δ=-73mV
SW
VOUT (AC) [50mV/div]
[20V/div]
IL [5A/div]
Iout [2A/div]
T - Time – 100µsec/div
T - Time - 200µsec/div
Figure 14. Transient Response
Figure 15. OCP Function
(Vin=12V, Vout=3.3V, L=3.3µH, Cout=44µF, Iout=2A)
(Vin=12V, Vout=3.3V, L=3.3µH, Cout=44µF, Vout is short to GND)
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Function Explanations
1. Enable control
The IC shutdown can be controlled by the voltage applied to the EN pin. When VEN reaches 2.0 V, the internal circuit is
activated and the IC starts up.
VIN
0V
EN
VENH
VENL
0V
Vout
0V
TSS
Figure 16. Timing Chart of Enable Control
2. Protective Functions
The protective circuits are intended for prevention of damage caused by unexpected accidents. Do not use them for
continuous protective operation.
2-1. Short Circuit Protection Function (SCP)
The short circuit protection block (SCP) compares the FB pin voltage with the internal reference voltage VREF. When
the FB pin voltage fall below VSCP (= VREF – 240mV) and with that situation continuing for off latch time, it latches
output in off situation.
Table 1. Short Circuit Protection Function
EN Pin
Short Circuit
Protection Function
FB Pin
< VSCP
2.0 V or higher
0.8 V or lower
ON
Enabled
> VSCP
-
Short Circuit
Protection Operation
OFF
Disabled
OFF
Soft start
Typ:1msec
VOUT1
SCP delay time
Typ:1msec
SCP delay time
Typ:1msec
0.8V
FB
SCP threshold:0.56V
SCP release before counter fix
HG
SCP Protect
HG=H
LG=L
LG
OCP
threshold
IL
EN
EN threshold
Normal operation
OCP
Normal operation
OCP
SCP
(OFF Latch)
Stand by
Normal operation
latch release by EN or UVLO
HG Hi side FET GATE signal
LG : Low side FET GATE signal
Figure 17. Short Circuit Protection function (SCP) timing chart
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2-2. Under Voltage Lockout Protection (UVLO)
The Under Voltage Lockout Protection (UVLO) circuit monitors the VIN pin voltage.
The device stops the switching operation and the output voltage drops when the VIN pin voltage is 3.8V (Typ) in the
case of VIN sweep down. The device starts the switching operation and the output voltage gradually rises when the
VIN pin voltage is 4.0V (Typ) in the case of VIN sweep up.
In the case of the application that EN pin is shortened to VIN pin like Figure 18-a, please use the UVLO function on
the below conditions.
· VIN Sweep Down: Set the falling slew rate of VIN to 0.9V/ms or more and drop the VIN voltage to 0V.
· VIN Sweep Up: Set the rising slew rate of VIN to 1.8V/ms or more and start the VIN voltage from 0V.
If the slew rate is slower than the above values, UVLO circuit is not able to operate normally and the output of UVLO
block may become indefinite at the lower VIN voltage than UVLO release or detect voltage. The Vout voltage may be
re-outputted in the case of the indefinite UVLO output.
If the VIN pin voltage has the rising slew rate of less than 1.8V/ms or the falling slew rate of less than 0.9V/ms, the
start-up and shutdown must be controlled by EN function instead of UVLO function as shown Figure 18-b.
VIN
(=EN)
Vout
UVLO Detect
Voltage
Hysteresis
UVLO Release
Voltage
0V
0.9V/ms
or more
1.8V/ms
or more
Vout
0V
TSS
Figure 18-a. UVLO Timing Chart (VIN=EN)
VIN
UVLO Detect
Voltage
UVLO Release
Voltage
0V
Less than
1.8V/ms
Less than
0.9V/ms
EN
VENH
VENL
0V
Vout
0V
TSS
Figure 18-b. EN Control Timing Chart in the case of slow VIN slew rate
If there is any questions about above EN control or considerations of other control method, please contact us.
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2-3. Thermal Shutdown
When the chip temperature exceeds Tj = 175°C (Typ), the DC/DC converter output is stopped. The thermal shutdown
circuit is intended for shutting down the IC from thermal runaway in an abnormal state with the temperature exceeding
Tjmax = 150C (Typ). It is not meant to protect or guarantee the soundness of the application. Do not use the function
of this circuit for application protection design.
VIN
EN
SCP delay time
Typ:1msec
Vout
SCP threshold
Soft Start
Tj
TSD release
HG
LG
Normal operation
TSD Normal operation
TSD
TSD release
SCP
(OFF Latch)
Normal operation
HG : Hi side FET GATE signal
LG : Low side FET GATE signal
Figure 19. TSD Timing chart
2-4. Over Current Protection
The Over Current Protection operates by using the current mode control to limit the current that flows through the
top MOSFET at each cycle of the switching frequency. When an abnormal state continues, the output is fixed in a
low level.
2-5. Error detection (off latch) release method
BD9C501EFJ enters the state of off latch when the protection function operates.
To release the off latch state, the VIN pin voltage should be changed to less than UVLO level (=3.8V [Typ] ) or, the
EN pin voltage falls below VENL.voltage.
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Application Example
PGND
SW
1
VIN
(12V)
Cin1
10μF
8
Cin2
0.1μF
L
3.3μH
VOUT
(3.3V)
SW
VIN
Cout
22μF×2
7
2
AGND
BD9C501EFJ
EN
6
3
COMP
R_DW
2.4kΩ
FB
5
4
R_UP
7.5kΩ
Rcmp
20kΩ
Ccmp
1500pF
C_UP
Open
Figure 20. Application Circuit
(VIN=12V, VOUT=3.3V)
*Please confirm the above components values and the characteristics on the application board because there is a case
needed to adjust the values due to the application load.
*If it is considered to use the other application circuit or the other components values, please contact us.
Input capacitor(Cin1)
Input capacitor(Cin2)
Output capacitor(Cout)
Inductor (L)
Maker
TDK
TDK
TDK
TDK
10µF/25V
0.1µF/25V
22µF/16V x 2
3.3µH
Part No
C3225JB1E106K
C1608JB1H104K
C3216JB1C226M x 2
SPM6530-3R3
The example of output voltage setting at VIN=12V
FB
Vo(V)
R_UP [kΩ]
R_DW [kΩ]
5
4.3
0.82
3.3
7.5
2.4
1.8
15
12
1.5
16
18
1.2(Note1)
10
20
1(Note1)
5.1
20
(Note 1) VOUT has restriction with VIN. See page 14.
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PCB Layout Design
In the step-down DC/DC converter, a large pulse current flows into two loops. The first loop is the one into which the
current flows when the top FET is turned ON. The flow starts from the input capacitor CIN, runs through the FET, inductor L
and output capacitor COUT and back to GND of CIN via GND of COUT. The second loop is the one into which the current
flows when the bottom FET is turned on. The flow starts from the bottom FET, runs through the inductor L and output
capacitor COUT and back to GND of the bottom FET via GND of COUT. Route these two loops as thick and as short as
possible to allow noise to be reduced for improved efficiency. It is recommended to connect the input and output
capacitors directly to the GND plane. The PCB layout has a great influence on the DC/DC converter in terms of all of the
heat generation, noise and efficiency characteristics.
VIN
MOS FET
CIN
VOUT
L
COUT
GND
Figure 21. Current Loop of Buck Converter
Accordingly, design the PCB layout considering the following points.
Connect an input capacitor as close as possible to the IC VIN pin on the same plane as the IC.
If there is any unused area on the PCB, provide a copper foil plane for the GND node to assist heat dissipation from
the IC and the surrounding components.
Switching nodes such as SW are susceptible to noise due to AC coupling with other nodes. Route the coil pattern as
thick and as short as possible.
Provide lines connected to FB and COMP far from the SW nodes.
Place the output capacitor away from the input capacitor in order to avoid the effect of harmonic noise from the input.
Vout
SW
L
IC
GND
VIN
Top layer
Mid layer1
Mid layer2
Bottom layer
Figure 22. Example of evaluation board layout
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Selection of Components Externally Connected
1. Output LC Filter Constant
The DC/DC converter requires an LC filter for smoothing the output voltage in order to supply a continuous current to the
load. Selecting an inductor with a large inductance causes the ripple current ∆I L that flows into the inductor to be small.
However, decreasing the ripple voltage generated in the output is not advantageous in terms of the load transient
response characteristic. An inductor with a small inductance improves the transient response characteristic but causes
the inductor ripple current to be large which increases the ripple voltage in the output voltage, showing a trade-off
relationship. It is recommended to select an inductance such that the size of the ripple current component of the coil will
be 20% to 40% of the average output current (average inductor current).
VIN
IL
Inductor saturation current > IOUTMAX +ΔIL /2
ΔIL
IOUTMAX
L
Driver
Average inductor current
VOUT
COUT
t
Figure 23. Waveform of current through inductor
Figure 24. Output LC filter circuit
With VIN = 12 V, VOUT = 3.3 V and the switching frequency FOSC = 500 kHz, the calculation is shown in the following
equation.
Coil ripple current ΔIL = 30% x Average output current (5A) = 1.5 [A]
L = VOUT × (V
IN -VOUT ) ×
1
= 3.19μ ≒3.3μ
V IN × FOSC × ⊿IL
[H]
where :
FOSC is a switching f requency
The saturation current of the inductor must be larger than the sum of the maximum output current and 1/2 of the inductor
ripple current ∆IL.
The output capacitor COUT affects the output ripple voltage characteristics. The output capacitor COUT must satisfy the
required ripple voltage characteristics.
The output ripple voltage can be represented by the following equation.
⊿V RPL = ⊿ I L × (R ESR +
1
8 × COUT × FOSC
) [V]
where :
RESR is the Equiv alent Series Resistance (ESR) of the output capacitor.
Also this IC provides 1msec[Typ] soft start function to reduce sudden current which flows in output capacitor when
startup. But when capacity value of output capacitor COUT becomes bigger than the following method, correct soft start
waveform may not appear in some cases. ( ex. Vout over shoot at soft start .)
Select output capacitor COUT fulfilling the following condition including scattering and margin..
C OUT < IOCP (= 5.5A[min])× TSS (= 0.5ms[min])
VOUT
[F]
where :
IOCP is switch current restrictedv alue
TSS is sof tstart time
Caution) Concerning COUT total the capacity value of every part connected to Output line.
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2. Output Voltage Setting
The output voltage value can be set by the feedback resistance ratio.
𝑉𝑂𝑈𝑇 =
VOUT
VFB
ERR
𝑅1 +𝑅2
𝑅2
× 𝑉𝐹𝐵
[V]
VFB is 0.8V (Typ) at VIN=12V. The output voltage can be calculated as
below formula.
R1
𝑉𝑂𝑈𝑇 =
FB
R2
𝑅1 +𝑅2
𝑅2
× 0.800
[V]
Output voltage VOUT and VFB have the VIN dependence as shown in
Figure 9 VOUT Line Regulation.
For example, the output voltage at VIN=5V can be set as below.
Figure 25. Feedback Resistors Circuit
𝑉𝑂𝑈𝑇 =
𝑅1 +𝑅2
𝑅2
× 0.793
[V]
If it is considered to use on the other input voltage, please refer to
Figure 9 and set the output voltage value by considering the VIN
dependence. Please contact us if needed.
VOUT has restriction with VIN by the following equation.
VOUTMIN: VIN x 0.125
(VIN x 0.125 ≥ 0.8V)
VOUTMAX: VIN x 0.7
3. Phase Compensation Component
A current mode control buck DC/DC converter is a two-pole, one-zero system. Two poles are formed by an error amplifier
and load and the one zero point is added by phase compensation. The phase compensation resistor R CMP determines
the crossover frequency FCRS where the total loop gain of the DC/DC converter is 0 dB. A high value crossover frequency
FCRS provides a good load transient response characteristic but inferior stability. Conversely, a low value crossover
frequency FCRS greatly stabilizes the characteristics but the load transient response characteristic is impaired. Here,
select the constant so that the crossover frequency FCRS will be 1/10 of the switching frequency.
( 1 ) Selection of Phase Compensation Resistor RCMP
The Phase Compensation Resistance RCMP can be determined by using the following equation.
RCMP = 2π × VOUT × FCRS × COUT
V FB × G MP × G MA
[Ω]
(3-1)
VOUT is Output Voltage
FCRS is Crossov erFrequency
C OUT is Output Capacitance
V FB is Feedback Ref erenceVoltage (0.8 V (Ty p))
G MP is Current Sense Gain (6.8 A/V (Ty p))
G MA is Error Amplif ierTrans conductance (400 μA/V (Ty p))
( 2 ) Selection of Phase Compensation Capacitance CCMP
The phase compensation capacitance CCMP can be determined by using the following equation.
CCMP = VOUT × COUT [F]
(3-2)
IOUT × RCMP
*When capacity value of CCMP and resistance value of RCMP don’t meet the following method, correct soft start
waveform may not appear in some cases.
Select CCMP and RCMP fulfilling the following condition including scattering and margin so that VCMP voltage reaches
1.4V or over within Off-latch delay time of SCP detection (500µsec(MIN) ).
VCMP RCMP × ICMP + ICMP × T 1.4
CCMP
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ICMP × T
0.715
CCMP
[V]
(3-4)
VCMP is COMP Terminal voltage
RCMP is resistor connected to COMP Terminal
CCMP is capacitor connected to COMP Terminal
ICMP is Error Amplifier Source Current (45uA(MIN))
T is SCP delay time(500µsec(MIN) )
( 3 ) Loop Stability
To ensure the stability of the DC/DC converter, make sure that a sufficient phase margin is provided. A phase margin
of at least 45º in the worst conditions is recommended.
VOUT
RUP
(a)
A
Gain [dB]
FB
COMP
GBW(b)
【dB】
RDW
0.8V
RCMP
CCMP
0
Phase[deg]
-90°
-90
PHASE MARGIN
Phase
【°】
f
FCRS
0
-180°
-180
f
Figure 26. Phase Compensation Circuit
Figure 27. Bode Plot
I/O Equivalent Circuit Diagram
4.FB
5. COMP
VIN
VREG
20kΩ
FB
10kΩ
VIN
2kΩ
0.5kΩ
2kΩ
COMP
0.5kΩ
10kΩ
AGND
AGND
6.EN
7,8.SW
VIN
VIN
EN
250kΩ
SW
725kΩ
AGND
PGND
Figure 28.
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm 4-layer glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 29. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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Power Dissipation
HTSOP-J8 Package
Board size: 70mm x 70mm x 1.6mm
(1) 4-layer board (surface heat dissipation
copper foil 70mm 70mm)
(2) 2-layer board (surface heat dissipation
copper foil 70mm 70mm)
(3) 2-layer board (surface heat dissipation
copper foil 15mm 15mm)
(4) 1-layer board (surface heat dissipation
copper foil 0mm 0mm)
Ordering Information
B
D
9
C
5
Part Number
0
1
E
F
J
Package
EFJ: HTSOP-J8
-
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram (TOP VIEW)
HTSOP-J8(TOP VIEW)
Part Number Marking
D 9 C 5 0 1
LOT Number
T Numbe
1PIN MARK
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Physical Dimension, Tape and Reel Information
Package Name
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Revision History
Date
Revision
7.MAR.2013
001
New Release
6.AUG.2013
002
Add Example of evaluation board layout
8.OCT.2014
003
Expression change Output Voltage Setting
004
P.8
P.9
P.11
P.14
24.JUL.2018
Changes
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Add VIN signal on Figure16.
Add the explanation of UVLO and detailed timing chart.
Add the description.
Add the description.
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
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Rev.003
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001