Datasheet
4.0 V to 17 V Input, 3 A Integrated MOSFET
Single Synchronous Buck DC/DC Converter
BD9D300MUV
General Description
Key Specifications
Features
Package
BD9D300MUV is a synchronous buck switching regulator
with built-in low on-resistance power MOSFETs. This
integrated circuit (IC) is capable of providing current up to
3 A. It operates high oscillating frequency with low
inductance. It has original on-time control system which
can operate low power consumption in light load condition.
This IC is ideal for reducing standby power consumption
of equipment.
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Single Synchronous Buck DC/DC Converter
On-time Control
Light Load Mode Control
Over Current Protection (OCP)
Short Circuit Protection (SCP)
Thermal Shutdown Protection (TSD)
Under Voltage Lockout Protection (UVLO)
Adjustable Soft Start
Power Good Output
Over Voltage Protection (OVP)
VQFN016V3030 Package
Backside Heat Dissipation
Input Voltage Range:
Output Voltage Range:
Output Current:
Switching Frequency:
High-Side FET ON Resistance:
Low-Side FET ON Resistance:
Shutdown Current:
Operating Quiescent Current:
4 V to 17 V
0.9 V to 5.25 V
3 A (Max)
1.25 MHz (Typ)
110 mΩ (Typ)
50 mΩ (Typ)
3 μA (Typ)
20 µA (Typ)
W (Typ) x D (Typ) x H (Max)
3.00 mm x 3.00 mm x 1.00 mm
VQFN016V3030
Applications
◼ Step-down Power Supply for SoC, FPGA,
Microprocessor
◼ Laptop PC / Tablet PC / Server
◼ LCD TV
◼ Storage Device (HDD / SSD)
◼ 2-series Cell Li-Ion Batteries Equipment
◼ Printer, OA Equipment
◼ Distributed Power Supply, Secondary Power Supply
VQFN016V3030
Typical Application Circuit
VIN
BD9D300MUV
PVIN
PGD
AVIN
CIN
VEN
R3
EN
RESERVE
MODE
SS
L1
SW
VOUTS
VOUT
R1
COUT
FB
PGND
AGND
〇Product structure : Silicon integrated circuit
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TSZ22111 • 14 • 001
VPGD
R2
〇This product has no designed protection against radioactive rays.
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BD9D300MUV
Pin Configuration
SW
1
SW
2
PGND
PGND
VOUTS
EN
(TOP VIEW)
16
15
14
13
12
PVIN
11
PVIN
EXP-PAD
Pin Descriptions
PGD
4
9
SS
5
6
7
8
MODE
AVIN
RESERVE
10
AGND
3
FB
SW
Pin No.
Pin Name
Function
1, 2, 3
SW
Switch pin. These pins are connected to the drain of the High-Side and Low-Side FET. In
addition, connect an inductor considering the direct current superimposition characteristic.
4
PGD
Power Good pin. This pin is an open drain output that requires a pull-up resistor (to the VOUTS
pin). See page 15 for setting the resistance. If not used, this pin can be left floating or connected
to Ground.
5
FB
Output voltage feedback pin. See page 32 for how to calculate the resistances of the output
voltage setting.
6
AGND
7
Ground pin for the control circuit.
RESERVE Reserve pin. Connect to Ground.
8
MODE
Pin for setting switching control mode. Connecting this pin to the VOUTS pin forces the device
to operate in the Pulse Width Modulation (PWM) mode control. Connecting to Ground, the
mode is automatically switched between the Light Load mode control and PWM mode control.
Fix this pin to the VOUTS pin or Ground. Do not change the mode control during operation.
9
SS
Pin for setting the soft start time of output voltage. The soft start time is 1 ms (Typ) when the
SS pin is open. A ceramic capacitor connected to the SS pin makes the soft start time 1 ms or
more. See page 32 for how to calculate the capacitance.
10
AVIN
Pin for supplying power to the control circuit. Connecting 0.1 µF (Typ) ceramic capacitor is
recommended. This pin is connected to PVIN.
11, 12
PVIN
Power supply pins for the output MOSFETs. Connecting 10 µF (Typ) ceramic capacitor is
recommended.
13
EN
Enable pin. The device starts up when VEN is set to 0.9 V (Min) or more. The device enters the
shutdown mode with setting VEN to 0.3 V (Max) or less. This pin must be properly terminated.
14
VOUTS
Pin for discharging output and detecting output voltage. Connect to output voltage node.
15, 16
PGND
Ground pins for the output stage of the switching regulator.
-
EXP-PAD
A backside heat dissipation pad. Connecting to the internal PCB Ground plane by using via
provides excellent heat dissipation characteristics.
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BD9D300MUV
Block Diagram
AVIN
10
11
REG
EN
13
UVLO
PVIN
12
HOCP
+
EN
SCP
OVP
VOUTS
-
14
High-Side
FET
Main Comparator
SS
9
VREF
Control
Logic
+
DRV
+
Soft Start
On Time
+
+
-
1
2
3
-
FB
Low-Side
FET
Error
Amplifier
LOCP
5
+
TSD
PGOOD
PGND
-
ZXCMP
15
+
16
-
PGD
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SW
4
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7
RESERVE
8
6
AGND
MODE
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16.Sep.2021 Rev.002
BD9D300MUV
Description of Blocks
1.
REG
This block generates the internal power supply.
2.
EN
This is the enable block. When EN voltage (VEN) is set to 0.9 V (Min) or more, the internal circuit is activated and the
device starts operation. Shutdown is forced if VEN is set to 0.3 V (Max) or less.
3.
UVLO
This block is for under voltage lockout protection. The device shuts down when input voltage falls to 3.6 V (Typ) or less.
The threshold voltage has a hysteresis of 200 mV (Typ).
4.
VREF
This block generates the internal reference voltage.
5.
TSD
This block is for thermal protection. The device is shut down when the junction temperature (Tj) reaches to 175 °C (Typ)
or more. The device is automatically restored to normal operation with a hysteresis of 25 °C (Typ) when the Tj goes down.
6.
Soft Start
This block slows down the rise of output voltage during start-up and controls the current, which allows the prevention of
output voltage overshoot and inrush current. The internal soft start time is 1 ms (Typ) when the SS pin is open. A capacitor
connected to the SS pin makes the rising time 1 ms or more.
7.
PGOOD
This block is for power good function. When the FB voltage (VFB) is more than or equal to 95 % (Typ) of 0.8 V, the builtin open drain Nch MOSFET connected to the PGD pin is off, and the PGD pin becomes High impedance. When VFB is
less than or equal to 90 % (Typ) of 0.8 V, it turns on the built-in open drain Nch MOSFET and the PGD pin is pulled down
with 100 Ω (Typ).
8.
Control Logic + DRV
This block controls switching operation and various protection functions.
9.
OVP
This block is for output over voltage protection. When VFB is more than or equal to 120 % (Typ) of 0.8 V, the output
MOSFETs are off. After VFB is less than or equal to 115 % (Typ) of 0.8 V, the output MOSFETs are returned to normal
operation condition. In addition, when VOUTS voltage (VVOUTS) reaches 5.95 V (Typ) or more, the output MOSFETs are
off. After VVOUTS falls 5.65 V (Typ) or less, the output MOSFETs are returned to normal operation condition. If the condition
of the over voltage protection is continued for 20 µs (Typ), the output MOSFETs are latched to off.
10. HOCP
This block is for over current protection of the High-Side FET. When the current that flows through the High-Side FET
reaches the value of over current limit, it turns off the High-Side FET and turns on the Low-Side FET.
11. LOCP
This block is for over current protection of the Low-Side FET. While the current that flows through the Low-Side FET over
the value of over current limit, the condition that being turned on the Low-Side FET is continued.
12. SCP
This block is for short circuit protection. After soft start is completed and in condition where VFB is less than or equal to
90 % (Typ) of 0.8 V, this block counts the number of times of which current flowing in the High-Side FET or the Low-Side
FET reaches over current limit. When 256 times is counted, the device is shut down for 15 ms (Typ) and re-operates.
Counting is reset when VFB is more than or equal to 95 % (Typ) of 0.8V, or IC re-operates by EN, UVLO and SCP function.
13. Error Amplifier
The Error Amplifier adjusts Main Comparator input voltage to make the internal reference voltage equal to VFB.
14. Main Comparator
The Main Comparator compares the Error Amplifier output voltage and VFB. When VFB becomes lower than the Error
Amplifier output voltage, the output turns High and reports to the On Time block that the output voltage has dropped
below the control voltage.
15. On Time
This block generates On Time. The designed On Time is generated after the Main Comparator output turns High. The
On Time is adjusted to control the frequency to be fixed even with I/O voltage is changed.
16. ZXCMP
The ZXCMP is a comparator that monitors the inductor current. When inductor current falls below 0 A (Typ) while the
Low-Side FET is on, it turns the FET off.
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BD9D300MUV
Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Input Voltage
Symbol
Rating
Unit
VPVIN, VAVIN
-0.3 to +20
V
VEN
-0.3 to VPVIN + 0.3
V
VMODE
-0.3 to +7
V
VRESERVE
-0.3 to +7
V
SS Voltage
VSS
-0.3 to +20
V
PGD Voltage
VPGD
-0.3 to +7
V
EN Voltage
MODE Voltage
RESERVE Voltage
VFB
-0.3 to +7
V
VVOUTS
-0.3 to +7
V
VSW
-0.3 to VPVIN + 0.3
V
FB Voltage
VOUTS Voltage
SW Voltage
IOUT
3.5
A
Tjmax
150
°C
Tstg
-55 to +150
°C
Output Current
Maximum Junction Temperature
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing
board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 1)
Parameter
Symbol
Thermal Resistance (Typ)
Unit
1s (Note 3)
2s2p (Note 4)
θJA
189.0
57.5
°C/W
ΨJT
23
10
°C/W
VQFN016V3030
Junction to Ambient
Junction to Top Characterization Parameter
(Note 2)
(Note 1) Based on JESD51-2A (Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface
of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
2 Internal Layers
Thermal Via (Note 5)
Pitch
Diameter
1.20 mm
Φ0.30 mm
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 5) This thermal via connects with the copper pattern of all layers.
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BD9D300MUV
Recommended Operating Conditions
Parameter
Input Voltage
Symbol
Min
Typ
Max
Unit
VPVIN, VAVIN
4.0
-
17
V
Operating Temperature
Ta
-40
-
Output Current
IOUT
0
-
3
A
Output Voltage Setting
VOUT
(Note 2)
-
5.25
V
0.9
+85
(Note 1)
°C
(Note 1) Tj must be lower than 150C under actual operating environment. Life time is derated at junction temperature greater than 125 °C.
(Note 2) Use under the condition of the output voltage (VOUT) ≥ input voltage (VIN) × 0.125.
Electrical Characteristics (Unless otherwise specified Ta = 25 °C, VPVIN = VAVIN = 12 V, VEN = 5 V, VMODE = GND)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Shutdown Current
ISDN
-
3
10
µA
Operating Quiescent Current
ICC
-
20
40
µA
VUVLO
3.4
3.6
3.8
V
VUVLOHYS
-
200
-
mV
EN Input High Level Voltage
VENH
0.9
-
VAVIN
V
EN Input Low Level Voltage
VENL
GND
-
0.3
V
IEN
-
-
10
µA
VFBTH
0.792
0.800
0.808
V
FB Input Current
IFB
-
1
100
nA
Soft Start Charge Current
ISS
2.3
2.5
2.7
µA
Internal Soft Start Time
tSS
0.4
1
1.8
ms
MODE Input High Level Voltage
VMODEH
0.9
-
VVOUTS
V
MODE Input Low Level Voltage
VMODEL
GND
-
0.3
V
tONT
-
333
-
ns
VPGDR
92
95
98
%
VPGDF
87
90
93
%
ILKPGD
-
0
800
nA
PGD MOSFET ON Resistance
RPGD
-
100
200
Ω
PGD Low Level Voltage
VPGDL
-
0.2
0.4
V
High-Side FET ON Resistance
RONH
-
110
220
mΩ
Low-Side FET ON Resistance
RONL
-
50
100
mΩ
High-Side Output Leakage Current
ILKH
-
0
10
µA
No switching
Low-Side Output Leakage Current
ILKL
-
0
10
µA
No switching
Output OVP Detection Voltage
VOVPH
115
120
125
%
Output OVP Release Voltage
VOVPL
110
115
120
%
Low-Side FET Over Current
Detection Current (Note 3)
ILOCP
3.1
3.8
-
A
Power Supply (AVIN)
UVLO Detection Threshold Voltage
UVLO Hysteresis Voltage
VEN = 0 V
IOUT = 0 mA
No switching
VIN falling
Enable
EN Input Current
Reference Voltage, Error Amplifier, Soft Start
FB threshold Voltage
VFB = 0.8 V
Control
On Time
Power Good
Power Good Rising
Threshold Voltage
Power Good Falling
Threshold Voltage
PGD Output Leakage Current
VOUT = 5.0 V
VFB rising,
VPGDR = VFB / VFBTH x 100
VFB falling,
VPGDF = VFB / VFBTH x 100
VPGD = 5 V
IPGD = 2 mA
SW (MOSFET)
Protection
VFB rising,
VOVPH = VFB / VFBTH x 100
VFB falling,
VOVPL = VFB / VFBTH x 100
(Note 3) No tested on outgoing inspection.
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BD9D300MUV
Typical Performance Curves
10
VIN = 12 V
Shutdown Supply Current : ISDN [μA]
Operating Quiescent Current : ICC [μA]
30
25
20
15
10
5
0
-40
-20
0
20
40
Temperature : Ta [°C]
60
Figure 1. Operating Quiescent Current vs Temperature
7
6
5
4
3
2
1
-40
100
100
90
90
80
80
70
70
60
50
40
0
20
40
Temperature : Ta [°C]
60
80
60
50
40
30
30
VIN = 7.4 V
20
20
VIN = 12 V
10
0
0.001
-20
Figure 2. Shutdown Supply Current vs Temperature
Efficiency [%]
Efficiency [%]
8
0
80
VIN = 12 V
9
10
VIN = 15 V
0.01
0.1
1
Output Current : IOUT [A]
10
Figure 3. Efficiency vs Output Current
(VOUT = 5 V, L = 2.2 μH, MODE = Low)
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0
0.001
VIN = 7.4 V
VIN = 12 V
VIN = 15 V
0.01
0.1
1
Output Current : IOUT [A]
10
Figure 4. Efficiency vs Output Current
(VOUT = 5 V, L = 2.2 μH, MODE = High)
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BD9D300MUV
100
100
90
90
80
80
70
70
Efficiency [%]
Efficiency [%]
Typical Performance Curves – continued
60
50
40
60
50
40
30
30
20
20
VIN = 7.4 V
10
0
0.001
0.01
0.1
1
Output Current : IOUT [A]
10
0.01
0.1
1
Output Current : IOUT [A]
10
Figure 6. Efficiency vs Output Current
(VOUT = 3.3 V, L = 2.2 μH, MODE = High)
4
0.815
VIN = 12 V
0.81
UVLO Threshold Voltage : VUVLO [V]
FB Threshold Voltage : VFBTH [V]
VIN = 12 V
0
0.001
Figure 5. Efficiency vs Output Current
(VOUT = 3.3 V, L = 2.2 μH, MODE = Low)
0.805
0.8
0.795
0.79
0.785
VIN = 7.4 V
10
VIN = 12 V
-40
-20
0
20
40
60
Temperature : Ta [°C]
Release
3.8
3.7
3.6
Detection
3.5
3.4
3.3
3.2
80
Figure 7. FB Threshold Voltage vs Temperature
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3.9
-40
-20
0
20
40
Temperature : Ta [°C]
60
80
Figure 8. UVLO Threshold Voltage vs Temperature
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BD9D300MUV
Typical Performance Curves – continued
1
0.9
VIN = 12 V
9
0.8
8
EN Input Current : IEN [μA]
EN Threshold Voltage : VEN [V]
10
VIN = 12 V
0.7
VENH (High Level)
0.6
0.5
VENL (Low Level)
0.4
0.3
7
6
5
4
3
0.2
2
0.1
1
0
0
-40
-20
0
20
40
Temperature : Ta [°C]
60
80
VEN = 0.5 V
VEN = 5.0 V
-40
Figure 9. EN Threshold Voltage vs Temperature
1
VMODEH (High Level)
0.6
0.5
VMODEL (Low Level)
0.4
0.3
0.2
0.7
0.6
0.5
0.4
0.3
0.2
0
-40
-20
0
20
40
Temperature : Ta [°C]
60
80
Figure 11. MODE Threshold Voltage vs Temperature
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80
0.8
0.1
0.1
0
60
VIN = 12 V
0.9
MODE Input Current : IMODE [μA]
MODE Threshold Voltage : VMODE [V]
1
0.8
0.7
0
20
40
Temperature : Ta [°C]
Figure 10. EN Input Current vs Temperature
VIN = 12 V
0.9
-20
VMODE = 5 V
-40
-20
0
20
40
Temperature : Ta [°C]
60
80
Figure 12. MODE Input Current vs Temperature
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BD9D300MUV
Typical Performance Curves – continued
80
VIN = 12 V
Low-Side FET ON Resistance : R ONL [mΩ]
High-Side FET ON Resistance : RONH [mΩ]
140
120
100
80
60
40
20
0
-40
-20
0
20
40
Temperature : Ta [°C]
60
Figure 13. High-Side FET ON Resistance vs Temperature
98
VPGDR (Rising)
96
94
92
VPGDF (Falling)
88
86
84
-40
-20
40
30
20
10
-40
200
VIN = 12 V
90
50
0
20
40
Temperature : Ta [°C]
60
Figure 15. Power Good Threshold Voltage vs Temperature
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0
20
40
Temperature : Ta [°C]
60
80
VIN = 12 V
180
IPGD = 2 mA
160
140
120
100
80
60
40
20
0
80
-20
Figure 14. Low-Side FET ON Resistance vs Temperature
PGD MOSFET ON Resistance : RPGD [Ω]
Power Good Threshold Voltage : VPGD [%]
100
60
0
80
VIN = 12 V
70
-40
-20
0
20
40
Temperature : Ta [°C]
60
80
Figure 16. PGD MOSFET ON Resistance vs Temperature
TSZ02201-0F3F0AJ00260-1-2
16.Sep.2021 Rev.002
BD9D300MUV
Typical Performance Curves – continued
2
1.6
1.4
1.2
1
0.8
0.6
0.4
-40
-20
0
20
40
Temperature : Ta [°C]
60
2
3
2.5
2
1.5
1
2
Switching Frequency : fOSC [MHz]
MODE = High
1.4
1.2
1
0.8
MODE = Low
0.4
-20
0
20
40
Temperature : Ta [°C]
60
80
VIN = 12 V
1.8
1.6
0.6
-40
Figure 18. Soft Start Charge Current vs Temperature
VIN = 12 V
1.8
Switching Frequency : fOSC [MHz]
3.5
0
80
Figure 17. Internal Soft Start Time vs Temperature
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0.2
0
4
0.5
0.2
0
VIN = 12 V
4.5
Soft Start Charge Current : ISS [μA]
1.8
Internal Soft Start Time : tSS [ms]
5
VIN = 12 V
0
0
0.5
1
1.5
2
Output Current : IOUT [A]
2.5
3
Figure 19. Switching Frequency vs Output Current
(VIN = 12 V, VOUT = 5 V)
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5
6
7
8
9 10 11 12 13 14 15 16 17
Input Voltage : VIN [V]
Figure 20. Switching Frequency vs Input Voltage
(VOUT = 5.0 V, IOUT = 1 A, MODE = High)
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BD9D300MUV
Typical Performance Curves – continued
Time: 500 µs/div
Time: 500 µs/div
VEN: 5 V/div
VEN: 5 V/div
VOUT: 2 V/div
VOUT: 2 V/div
VSW: 10 V/div
VSW: 10 V/div
VPGD: 5 V/div
VPGD: 5 V/div
Figure 21. EN Start-up Waveform
(VIN = 12 V, VOUT = 5 V, RLOAD = 5 Ω, MODE = Low)
Figure 22. EN Shutdown Waveform
(VIN = 12 V, VOUT = 5 V, RLOAD = 5 Ω, MODE = Low)
Time: 500 µs/div
Time: 500 µs/div
VIN: 10 V/div
VIN: 10 V/div
VOUT: 2 V/div
VOUT: 2 V/div
VSW: 10 V/div
VSW: 10 V/div
VPGD: 5 V/div
VPGD: 5 V/div
Figure 23. VIN Start-up Waveform
(VOUT = 5 V, RLOAD = 5 Ω, MODE = Low, VPVIN = VAVIN = VEN)
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TSZ22111 • 15 • 001
Figure 24. VIN Shutdown Waveform
(VOUT = 5 V, RLOAD = 5 Ω, MODE = Low, VPVIN = VAVIN = VEN)
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Typical Performance Curves – continued
Time: 1 µs/div
Time: 1 µs/div
VOUT: 100 mV/div
VOUT: 100 mV/div
VSW: 5 V/div
VSW: 5 V/div
Figure 25. Switching Waveform
(VIN = 12 V, VOUT = 5 V, IOUT = 0.1 A, L = 2.2 μH, COUT = 47 μF,
MODE = Low)
2
2
VIN = 12 V
1.5
1
0.5
0
-0.5
-1
-1.5
-2
VIN = 12 V
1.5
Output Voltage Deviation [%]
Output Voltage Deviation [%]
Figure 26. Switching Waveform
(VIN = 12 V, VOUT = 5 V, IOUT = 3.0 A, L = 2.2 μH, COUT = 47 μF,
MODE = Low)
1
0.5
MODE = Low
0
MODE = High
-0.5
-1
-1.5
6
7
8
9 10 11 12 13 14 15 16 17
Input Voltage : VIN [V]
Figure 27. Line Regulation
(VOUT = 5 V, L = 2.2 μH, IOUT = 3.0 A)
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-2
0
0.5
1
1.5
2
Output Current : IOUT [A]
2.5
3
Figure 28. Load Regulation
(VIN = 12 V, VOUT = 5 V, L = 2.2 μH)
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BD9D300MUV
Function Explanations
1. Basic Operation
(1) DC/DC Converter Operation
BD9D300MUV is a synchronous rectifying step-down switching regulator that has original on-time control method.
When the MODE pin is connected to Ground, it utilizes switching operation in Pulse Width Modulation (PWM) mode
control for heavier load, and it operates in Light Load mode control at lighter load to improve efficiency. When the MODE
pin is connected to the VOUTS pin, the device operates in PWM mode control regardless of the load.
Efficiency [%]
MODE = Low
Light Load mode
control
PWM mode
control
PWM mode
control
MODE = High
Output Current [A]
Figure 29. Efficiency Image between Light Load Mode Control and PWM Mode Control
(2) Enable Control
The start-up and shutdown can be controlled by the EN voltage (VEN). When VEN becomes 0.9 V (Min) or more, the
internal circuit is activated and the device starts up. When VEN becomes 0.3 V (Max) or less, the device is shut down.
The start-up with VEN must be at the same time of the input voltage (VIN=VEN) or after supplying VIN.
VIN
0V
VEN
VENH
VENL
0V
VOUT
0V
Start-up
Shutdown
Figure 30. Start-up and Shutdown with Enable Control Timing Chart
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BD9D300MUV
1. Basic Operation – continued
(3) Soft Start
When VEN goes high, soft start function operates and output voltage gradually rises. This soft start function can prevent
overshoot of the output voltage and excessive inrush current. The soft start time (tSS) is 1 ms (Typ) when the SS pin is
left floating. A capacitor connected to the SS pin makes tSS more than 1 ms. See page 32 for how to set the soft start
time. When Short Circuit Protection (SCP) is released, tSS is 1 ms (Typ) regardless of a capacitor connected to the SS
pin.
VIN
0V
VEN
0V
VOUT
0V
VFBTH x 95 %
0.8 V
(Typ)
VFB
0V
VPGD
0V
tSS
Figure 31. Soft Start Timing Chart
(4) Power Good
When the FB voltage (VFB) is more than or equal to 95 % (Typ) of 0.8 V, the built-in open drain Nch MOSFET connected
to the PGD pin is off, and the PGD pin becomes Hi-Z (High impedance). When VFB is less than or equal to 90 % (Typ)
of 0.8V, it turns on the built-in open drain Nch MOSFET turns on and the PGD pin is pulled down with 100 Ω (Typ). It is
recommended to connect a pull-up resistor of 10 kΩ to 100 kΩ to the VOUTS pin.
Table 1. PGD Output
State
Condition
PGD Output
Before Supply Input Voltage
VIN < 1.6 V (Typ)
Hi-Z
Shutdown
VEN ≤ 0.3 V (Max)
Low (Pull-down)
Enable
VEN ≥ 0.9 V (Min)
95 % (Typ) ≤ VFB / VFBTH
Hi-Z
VFB / VFBTH ≤ 90 % (Typ)
Low (Pull-down)
UVLO
1.6 V (Typ) < VIN ≤ 3.6 V (Typ)
Low (Pull-down)
TSD
Tj ≥ 175 °C (Typ)
Low (Pull-down)
OVP
120 % (Typ) ≤ VFB / VFBTH, 5.95 V (Typ) ≤ VVOUTS
Low (Pull-down)
SCP
Complete Soft Start
VFB / VFBTH ≤ 90 % (Typ)
OCP 256 counts
Low (Pull-down)
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BD9D300MUV
(4) Power Good – continued
VIN
0V
VEN
0V
5.95 V (Typ)
5.65 V (Typ)
VOUT
0V
VFB TH x 120 % (Typ)
VFB TH x 115 % (Typ)
VFB TH x 95 % (Typ)
VFB TH x 90 % (Typ)
VFB
0V
tSS
VPGD
< 20 μs (Typ)
< 20 μs (Typ)
0V
Figure 32. Power Good Timing Chart
(Connecting a pull-up resistor to the PGD pin)
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BD9D300MUV
Function Explanations – continued
2. Protection
The protection circuits are intended for prevention of damage caused by unexpected accidents. Do not use the
continuous protection.
(1) Over Current Protection (OCP) / Short Circuit Protection (SCP)
Over Current Protection (OCP) restricts the flowing current through the Low-Side FET or High-Side FET for every
switching period. If the inductor current exceeds the Low-Side OCP ILOCP = 3.8 A (Typ) while the Low-Side FET is on,
the Low-Side FET remains on even with FB voltage (VFB) falls to VFBTH = 0.8 V (Typ) or less. If the inductor current
becomes lower than ILOCP, the High-Side FET is able to be turned on. When the inductor current is the High-Side OCP
IHOCP = 4.8 A (Typ) or more while the High-Side FET is on, it is turned off. Output voltage may decrease by changing
frequency and duty due to OCP operation.
Short Circuit Protection (SCP) function is a Hiccup mode. When OCP operates 256 cycles while VFB is less than or
equal to 90 % (Typ) of 0.8V (VPGD = Low), the device stops the switching operation for 15 ms (Typ). After 15 ms (Typ),
the device restarts. SCP does not operate during the soft start even if the device is in the SCP condition. Do not exceed
the maximum junction temperature (Tjmax = 150 °C) during OCP and SCP operation.
Table 2. The Operating Condition of OCP and SCP
VFB
Start-up
OCP
VEN
≤ VFBTH x 90 % (Typ)
≥ 0.9 V (Typ)
> VFBTH x 95 % (Typ)
≤ VFBTH x 90 % (Typ)
≤ 0.3 V (Typ)
During Soft Start
Complete Soft Start
-
Shutdown
SCP
Enable
Disable
Enable
Disable
Enable
Enable
Disable
Disable
VOUT
VFB
VFB TH x 90 % (Typ)
VFB TH x 95 % (Typ)
VPGD
VSW
High-Side FET
Inte rnal Gate Signal
Low-Side FET
Inte rnal Gate Signal
IHOCP
Inductor Current
ILOCP
High-Side OCP
Internal Signal
Low-Side OCP
Internal Signal
SCP
Internal Signal
OCP 256 counts
Less than
OCP 256 counts
15 ms (Typ)
Figure 33. OCP and SCP Timing Chart
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BD9D300MUV
2. Protection – continued
(2) Under Voltage Lockout Protection (UVLO)
When input voltage (VIN) falls to 3.6 V (Typ) or less, the device is shut down. When VIN becomes 3.8 V (Typ) or more,
the device starts up. The hysteresis is 200 mV (Typ).
VIN
(=VEN)
VOUT
Hysteresis
VUVLOHYS = 200 mV (Typ)
3.8 V (Typ)
UVLO Detect
VUVLO = 3.6 V (Typ)
0V
VOUT
0V
tSS
Figure 34. UVLO Timing Chart
(3) Thermal Shutdown Protection (TSD)
Thermal shutdown circuit prevents heat damage to the IC. Normal operation should always be within the IC’s maximum
junction temperature rating (Tjmax = 150 °C). However, if it continues exceeding the rating and the junction temperature
Tj rises to 175 °C (Typ), the TSD circuit is activated and it turns the output MOSFETs off. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation. The TSD threshold has a hysteresis of 25 °C
(Typ). Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings. Therefore, under
no circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
(4) Over Voltage Protection (OVP)
When VFB is more than or equal to 120 % (Typ) of 0.8 V, the output MOSFETs are off. After V FB is less than or equal to
115 % (Typ) of 0.8 V, the output MOSFETs are returned to normal operation condition. In addition, when VOUTS voltage
(VVOUTS) reaches 5.95 V (Typ) or more, the output MOSFETs are off. After V VOUTS falls 5.65 V (Typ) or less, the output
MOSFETs are returned to normal operation condition. If the condition of the over voltage protection is continued for 20
µs (Typ), the output MOSFETs are latched to off, and it re-operates by Enable control or UVLO function.
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BD9D300MUV
Application Examples
1. VIN = 12 V / VOUT = 5.0 V
Table 3. Specification of Application (VIN = 12 V / VOUT = 5.0 V)
Symbol
Specification Value
Parameter
Input Voltage
Output Voltage
Switching Frequency
Maximum Output Current
Operating Temperature
VIN
12 V
VOUT
5.0 V
fOSC
1.25 MHz (Typ)
IOUTMAX
3A
Ta
25 °C
BD9D300MUV
VIN
PGD
PVIN
PGD
AVIN
C3
C2
C1
R3
L1
C7
EN
EN
R0
C4
VOUTS
PGND
R1
SS
RESERVE
C9
VOUT
SW
MODE
C5
C6
C8
FB
AGND
R2
Figure 35. Application Circuit
Part No.
L1
C1
C4
C7
R0
Table 4. Recommended Component Values
Value
Part Name
(Note 1)
(VIN = 12 V / VOUT = 5.0 V)
Size (mm)
Manufacturer
2.2 μH
FDSD0518-H-2R2M
5249
Murata
10 μF (35 V / X5R)
GRM21BR6YA106ME43
2012
Murata
C2
-
-
-
-
C3
-
-
-
-
(Note 2)
47 μF (16 V / X5R)
GRM31CR61C476ME44
3216
Murata
C5
-
-
-
-
C6
-
-
-
-
(Note 3)
0.1 μF (35 V / X5R)
GRM033R6YA104ME14
0603
Murata
C8
-
-
-
-
C9
-
-
-
-
R1
270 kΩ (1 %, 1/16 W)
MCR01MZPF2703
1005
ROHM
R2
51 kΩ (1 %, 1/16 W)
MCR01MZPF5102
1005
ROHM
R3
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
Short
-
-
-
(Note 4)
(Note 5)
(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics
of the product and external components.
(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum
value of no less than 2 μF.
(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response
characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its
datasheet.
(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND
pin if needed.
(Note 5) R0 is an option used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.
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16.Sep.2021 Rev.002
BD9D300MUV
1. VIN = 12 V / VOUT = 5.0 V – continued
100
80
240
Gain
70
60
Gain [dB]
Efficiency [%]
Phase
60
80
50
40
30
20
MODE = High
0
0.001
0.01
0.1
1
Output Current : IOUT [A]
40
120
20
60
0
0
-20
MODE = Low
10
10
Figure 36. Efficiency vs Output Current
-40
-60
1
10
100
Frequency [kHz]
-120
1000
Figure 37. Frequency Characteristics IOUT = 2.0 A
Time: 1 µs/div
Time: 1 ms/div
VOUT: 100 mV/div
VOUT: 100 mV/div
IOUT: 1 A/div
VSW: 5 V/div
Figure 38. Load Transient Response IOUT = 0.1 A – 2.0 A
(MODE = Low)
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Phase [°]
90
20/39
Figure 39. VOUT Ripple IOUT = 3.0 A
(MODE = High)
TSZ02201-0F3F0AJ00260-1-2
16.Sep.2021 Rev.002
BD9D300MUV
Application Examples – continued
2. VIN = 7.4 V / VOUT = 5.0 V
Table 5. Specification of Application (VIN = 7.4 V / VOUT = 5.0 V)
Symbol
Specification Value
Parameter
Input Voltage
Output Voltage
Switching Frequency
Maximum Output Current
Operating Temperature
VIN
7.4 V
VOUT
5.0 V
fOSC
1.25 MHz (Typ)
IOUTMAX
3A
Ta
25 °C
BD9D300MUV
VIN
PGD
PVIN
PGD
AVIN
C3
C2
C1
R3
L1
C7
EN
EN
R0
C4
VOUTS
PGND
R1
SS
RESERVE
C9
VOUT
SW
MODE
C5
C6
C8
FB
AGND
R2
Figure 40. Application Circuit
Part No.
L1
C1
C4
C7
R0
Table 6. Recommended Component Values
Value
Part Name
(Note 1)
(VIN = 7.4 V / VOUT = 5.0 V)
Size (mm)
Manufacturer
2.2 μH
FDSD0518-H-2R2M
5249
Murata
10 μF (35 V / X5R)
GRM21BR6YA106ME43
2012
Murata
C2
-
-
-
-
C3
-
-
-
-
(Note 2)
47 μF (16 V / X5R)
GRM31CR61C476ME44
3216
Murata
C5
-
-
-
-
C6
-
-
-
-
(Note 3)
0.1 μF (35 V / X5R)
GRM033R6YA104ME14
0603
Murata
C8
-
-
-
-
C9
-
-
-
-
R1
270 kΩ (1 %, 1/16 W)
MCR01MZPF2703
1005
ROHM
R2
51 kΩ (1 %, 1/16 W)
MCR01MZPF5102
1005
ROHM
R3
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
Short
-
-
-
(Note 4)
(Note 5)
(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics
of the product and external components.
(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum
value of no less than 2 μF.
(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response
characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its
datasheet.
(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND
pin if needed.
(Note 5) R0 is an option used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.
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BD9D300MUV
2. VIN = 7.4 V / VOUT = 5.0 V – continued
100
80
240
Gain
70
60
Gain [dB]
Efficiency [%]
Phase
60
80
50
40
30
20
MODE = High
0
0.001
0.01
0.1
1
Output Current : IOUT [A]
40
120
20
60
0
0
-20
MODE = Low
10
10
Figure 41. Efficiency vs Output Current
-40
-60
1
10
100
Frequency [kHz]
-120
1000
Figure 42. Frequency Characteristics IOUT = 2.0 A
Time: 1 µs/div
Time: 1 ms/div
VOUT: 100 mV/div
VOUT: 100 mV/div
IOUT: 1 A/div
VSW: 5 V/div
Figure 43. Load Transient Response IOUT = 0.1 A – 2.0 A
(MODE = Low)
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Phase [°]
90
22/39
Figure 44. VOUT Ripple IOUT = 3.0 A
(MODE = High)
TSZ02201-0F3F0AJ00260-1-2
16.Sep.2021 Rev.002
BD9D300MUV
Application Examples – continued
3. VIN = 12 V / VOUT = 3.3 V
Table 7. Specification of Application (VIN = 12 V / VOUT = 3.3 V)
Symbol
Specification Value
Parameter
Input Voltage
Output Voltage
Switching Frequency
Maximum Output Current
Operating Temperature
VIN
12 V
VOUT
3.3 V
fOSC
1.25 MHz (Typ)
IOUTMAX
3A
Ta
25 °C
BD9D300MUV
VIN
PGD
PVIN
PGD
AVIN
C3
C2
C1
R3
L1
C7
EN
EN
R0
C4
VOUTS
PGND
R1
SS
RESERVE
C9
VOUT
SW
MODE
C5
C6
C8
FB
AGND
R2
Figure 45. Application Circuit
Part No.
L1
C1
C4
C7
R0
Table 8. Recommended Component Values
Value
Part Name
(Note 1)
(VIN = 12 V / VOUT = 3.3 V)
Size (mm)
Manufacturer
2.2 μH
FDSD0518-H-2R2M
5249
Murata
10 μF (35 V / X5R)
GRM21BR6YA106ME43
2012
Murata
C2
-
-
-
-
C3
-
-
-
-
(Note 2)
47 μF (16 V / X5R)
GRM31CR61C476ME44
3216
Murata
C5
-
-
-
-
C6
-
-
-
-
(Note 3)
0.1 μF (35 V / X5R)
GRM033R6YA104ME14
0603
Murata
C8
-
-
-
-
C9
-
-
-
-
R1
160 kΩ (1 %, 1/16 W)
MCR01MZPF1603
1005
ROHM
R2
51 kΩ (1 %, 1/16 W)
MCR01MZPF5102
1005
ROHM
R3
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
Short
-
-
-
(Note 4)
(Note 5)
(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics
of the product and external components.
(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum
value of no less than 2 μF.
(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response
characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its
datasheet.
(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND
pin if needed.
(Note 5) R0 is an option used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.
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16.Sep.2021 Rev.002
BD9D300MUV
3. VIN = 12 V / VOUT = 3.3 V – continued
80
100
240
Gain
70
60
Gain [dB]
Efficiency [%]
Phase
60
80
50
40
30
20
10
MODE = High
0
0.001
0.01
0.1
1
Output Current : IOUT [A]
40
120
20
60
0
0
-20
MODE = Low
10
Figure 46. Efficiency vs Output Current
-40
-60
1
10
100
Frequency [kHz]
-120
1000
Figure 47. Frequency Characteristics IOUT = 2.0 A
Time: 1 µs/div
Time: 1 ms/div
VOUT: 100 mV/div
VOUT: 100 mV/div
IOUT: 1 A/div
VSW: 5 V/div
Figure 48. Load Transient Response IOUT = 0.1 A – 2.0 A
(MODE = Low)
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Phase [°]
90
24/39
Figure 49. VOUT Ripple IOUT = 3.0 A
(MODE = High)
TSZ02201-0F3F0AJ00260-1-2
16.Sep.2021 Rev.002
BD9D300MUV
Application Examples – continued
4. VIN = 7.4 V / VOUT = 3.3 V
Table 9. Specification of Application (VIN = 7.4 V / VOUT = 3.3 V)
Symbol
Specification Value
Parameter
Input Voltage
VIN
7.4 V
Output Voltage
VOUT
3.3 V
Switching Frequency
fOSC
1.25 MHz (Typ)
Maximum Output Current
Operating Temperature
IOUTMAX
3A
Ta
25 °C
BD9D300MUV
VIN
PGD
PVIN
PGD
AVIN
C3
C2
C1
R3
L1
C7
EN
EN
R0
C4
VOUTS
PGND
R1
SS
RESERVE
C9
VOUT
SW
MODE
C5
C6
C8
FB
AGND
R2
Figure 50. Application Circuit
Part No.
L1
C1
C4
C7
R0
Table 10. Recommended Component Values
Value
Part Name
(Note 1)
(VIN = 7.4 V / VOUT = 3.3 V)
Size (mm)
Manufacturer
2.2 μH
FDSD0518-H-2R2M
5249
Murata
10 μF (35 V / X5R)
GRM21BR6YA106ME43
2012
Murata
C2
-
-
-
-
C3
-
-
-
-
47 μF (16 V / X5R)
GRM31CR61C476ME44
3216
Murata
C5
-
-
-
-
C6
-
-
-
-
(Note 2)
(Note 3)
0.1 μF (35 V / X5R)
GRM033R6YA104ME14
0603
Murata
C8
-
-
-
-
C9
-
-
-
-
R1
160 kΩ (1 %, 1/16 W)
MCR01MZPF1603
1005
ROHM
R2
51 kΩ (1 %, 1/16 W)
MCR01MZPF5102
1005
ROHM
R3
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
Short
-
-
-
(Note 4)
(Note 5)
(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics
of the product and external components.
(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum
value of no less than 2 μF.
(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response
characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its
datasheet.
(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND
pin if needed.
(Note 5) R0 is an option used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.
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4. VIN = 7.4 V / VOUT = 3.3 V – continued
100
80
240
Gain
70
60
Gain [dB]
Efficiency [%]
Phase
60
80
50
40
30
20
MODE = High
0
0.001
0.01
0.1
1
Output Current : IOUT [A]
40
120
20
60
0
0
-20
MODE = Low
10
10
Figure 51. Efficiency vs Output Current
-40
-60
1
10
100
Frequency [kHz]
-120
1000
Figure 52. Frequency Characteristics IOUT = 2.0 A
Time: 1 µs/div
Time: 1 ms/div
VOUT: 100 mV/div
VOUT: 100 mV/div
IOUT: 1 A/div
VSW: 5 V/div
Figure 53. Load Transient Response IOUT = 0.1 A – 2.0 A
(MODE = Low)
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Phase [°]
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Figure 54. VOUT Ripple IOUT = 3.0 A
(MODE = High)
TSZ02201-0F3F0AJ00260-1-2
16.Sep.2021 Rev.002
BD9D300MUV
Application Examples – continued
5. VIN = 7.4 V / VOUT = 1.8 V
Table 11. Specification of Application (VIN = 7.4 V / VOUT = 1.8 V)
Symbol
Specification Value
Parameter
Input Voltage
VIN
7.4 V
Output Voltage
VOUT
1.8 V
Switching Frequency
fOSC
1.25 MHz (Typ)
Maximum Output Current
Operating Temperature
IOUTMAX
3A
Ta
25 °C
BD9D300MUV
VIN
PGD
PVIN
PGD
AVIN
C3
C2
C1
R3
L1
C7
EN
EN
R0
C4
VOUTS
PGND
R1
SS
RESERVE
C9
VOUT
SW
MODE
C5
C6
C8
FB
AGND
R2
Figure 55. Application Circuit
Part No.
L1
C1
C4
C7
R0
Table 12. Recommended Component Values
Value
Part Name
(Note 1)
(VIN = 7.4 V / VOUT = 1.8 V)
Size (mm)
Manufacturer
1.5 μH
FDSD0518-H-1R5M
5249
Murata
10 μF (35 V / X5R)
GRM21BR6YA106ME43
2012
Murata
C2
-
-
-
-
C3
-
-
-
-
47 μF (16 V / X5R)
GRM31CR61C476ME44
3216
Murata
C5
-
-
-
-
C6
-
-
-
-
(Note 2)
(Note 3)
0.1 μF (35 V / X5R)
GRM033R6YA104ME14
0603
Murata
C8
-
-
-
-
C9
-
-
-
-
R1
150 kΩ (1 %, 1/16 W)
MCR01MZPF1503
1005
ROHM
R2
120 kΩ (1 %, 1/16 W)
MCR01MZPF1203
1005
ROHM
R3
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
Short
-
-
-
(Note 4)
(Note 5)
(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics
of the product and external components.
(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum
value of no less than 2 μF.
(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response
characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its
datasheet.
(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND
pin if needed.
(Note 5) R0 is an option used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.
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BD9D300MUV
5. VIN = 7.4 V / VOUT = 1.8 V – continued
100
80
240
Gain
70
60
Gain [dB]
Efficiency [%]
Phase
60
80
50
40
30
20
MODE = High
0
0.001
0.01
0.1
1
Output Current : IOUT [A]
40
120
20
60
0
0
-20
MODE = Low
10
10
Figure 56. Efficiency vs Output Current
-40
-60
1
10
100
Frequency [kHz]
-120
1000
Figure 57. Frequency Characteristics IOUT = 2.0 A
Time: 1 µs/div
Time: 1 ms/div
VOUT: 100 mV/div
VOUT: 100 mV/div
IOUT: 1 A/div
VSW: 5 V/div
Figure 58. Load Transient Response IOUT = 0.1 A – 2.0 A
(MODE = Low)
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Phase [°]
90
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Figure 59. VOUT Ripple IOUT = 3.0 A
(MODE = High)
TSZ02201-0F3F0AJ00260-1-2
16.Sep.2021 Rev.002
BD9D300MUV
Application Examples – continued
6. VIN = 7.4 V / VOUT = 1.2 V
Table 13. Specification of Application (VIN = 7.4 V / VOUT = 1.2 V)
Symbol
Specification Value
Parameter
Input Voltage
VIN
7.4 V
Output Voltage
VOUT
1.2 V
Switching Frequency
fOSC
1.25 MHz (Typ)
Maximum Output Current
Operating Temperature
IOUTMAX
3A
Ta
25 °C
BD9D300MUV
VIN
PGD
PVIN
PGD
AVIN
C3
C2
C1
R3
L1
C7
EN
EN
R0
C4
VOUTS
PGND
R1
SS
RESERVE
C9
VOUT
SW
MODE
C5
C6
C8
FB
AGND
R2
Figure 60. Application Circuit
Part No.
L1
C1
C4
C7
R0
Table 14. Recommended Component Values
Value
Part Name
(Note 1)
(VIN = 7.4 V / VOUT = 1.2 V)
Size (mm)
Manufacturer
1.0 μH
FDSD0518-H-1R0M
5249
Murata
10 μF (35 V / X5R)
GRM21BR6YA106ME43
2012
Murata
C2
-
-
-
-
C3
-
-
-
-
47 μF (16 V / X5R)
GRM31CR61C476ME44
3216
Murata
C5
-
-
-
-
C6
-
-
-
-
(Note 2)
(Note 3)
0.1 μF (35 V / X5R)
GRM033R6YA104ME14
0603
Murata
C8
-
-
-
-
C9
-
-
-
-
R1
150 kΩ (1 %, 1/16 W)
MCR01MZPF1503
1005
ROHM
R2
300 kΩ (1 %, 1/16 W)
MCR01MZPF3003
1005
ROHM
R3
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
Short
-
-
-
(Note 4)
(Note 5)
(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics
of the product and external components.
(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum
value of no less than 2 μF.
(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response
characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its
datasheet.
(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND
pin if needed.
(Note 5) R0 is an option used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.
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BD9D300MUV
6. VIN = 7.4 V / VOUT = 1.2 V – continued
100
80
240
Gain
70
60
Gain [dB]
Efficiency [%]
Phase
60
80
50
40
30
20
MODE = High
0
0.001
0.01
0.1
1
Output Current : IOUT [A]
40
120
20
60
0
0
-20
MODE = Low
10
10
Figure 61. Efficiency vs Output Current
-40
-60
1
10
100
Frequency [kHz]
-120
1000
Figure 62. Frequency Characteristics IOUT = 2.0 A
Time: 1 µs/div
Time: 1 ms/div
VOUT: 100 mV/div
VOUT: 100 mV/div
IOUT: 1 A/div
VSW: 5 V/div
Figure 63. Load Transient Response IOUT = 0.1 A – 2.0 A
(MODE = Low)
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Phase [°]
90
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Figure 64. VOUT Ripple IOUT = 3.0 A
(MODE = High)
TSZ02201-0F3F0AJ00260-1-2
16.Sep.2021 Rev.002
BD9D300MUV
Selection of Components Externally Connected
Contact us if not use the recommended component values in Application Examples.
1. Output LC Filter
In order to supply a continuous current to the load, the DC/DC converter requires an LC filter for smoothing the output
voltage.
VIN
IL
Inductor saturation current > IOUTMAX + ΔIL/2
L1
ΔIL
VOUT
Driver
Maximum output current IOUTMAX
COUT
t
Figure 65. Waveform of current through inductor
Figure 66. Output LC filter circuit
For example, given that VIN = 12 V, VOUT = 5.0 V, L1 = 2.2 μH, and the switching frequency fOSC = 1.25 MHz, the inductor
ripple current ΔIL can be calculated as below.
∆𝐼𝐿 = 𝑉𝑂𝑈𝑇 × (𝑉𝐼𝑁 − 𝑉𝑂𝑈𝑇 ) ×
1
𝑉𝐼𝑁 × 𝑓𝑂𝑆𝐶 × 𝐿1
= 1061 mA
The inductance value of L1 is recommended in the range between 1.0 μH and 3.3 μH. However, ΔIL should be set 400 mA
or more when using Light Load mode control by the MODE pin connecting to Ground.
The rated current of the inductor (Inductor saturation current) must be larger than the sum of the maximum output current
IOUTMAX and 1/2 of the inductor ripple current ΔIL.
The output capacitor COUT affects the output ripple voltage characteristics. The capacitance value of COUT is recommended
in the range between 22 μF and 47 μF for stability of the control loop. COUT must satisfy the required ripple voltage
characteristics.
The output ripple voltage ΔVRPL can be estimated by the following equation.
∆𝑉𝑅𝑃𝐿 = ∆𝐼𝐿 × (𝑅𝐸𝑆𝑅 +
1
8 × 𝐶𝑂𝑈𝑇 × 𝑓𝑂𝑆𝐶
) [V]
Where:
𝑅𝐸𝑆𝑅 is the Equivalent Series Resistance of the output capacitor.
For example, given that COUT = 47 μF, and RESR = 3 mΩ, ΔVRPL can be calculated as below.
∆𝑉𝑅𝑃𝐿 = 1061 𝑚𝐴 × (3 𝑚𝛺 +
1
8 × 47 𝜇𝐹 × 1.25 𝑀𝐻𝑧
) = 5.4 [mV]
The total capacitance COUTMAX connected to VOUT needs to satisfy the value obtained by the following equation.
𝐶𝑂𝑈𝑇𝑀𝐴𝑋 <
𝑡𝑆𝑆𝑀𝐼𝑁
𝑉𝑂𝑈𝑇
× (3.1 +
∆𝐼𝐿
− 𝐼𝑂𝑈𝑇𝑆𝑆 ) [F]
2
where:
𝑡𝑆𝑆𝑀𝐼𝑁 is the minimum soft start time.
𝑉𝑂𝑈𝑇 is the output voltage.
∆IL is the inductor current.
IOUTSS is the maximum output current during soft start.
For example, given that VIN = 12 V, VOUT = 5.0 V, L1 = 2.2 µH, fOSC = 1.25 MHz (Typ), tSSMIN = 0.4 ms (CSS = OPEN), and
IOUTSS = 3 A, COUTMAX can be calculated as below.
𝐶𝑂𝑈𝑇𝑀𝐴𝑋 <
0.4 𝑚𝑠
5.0 𝑉
× (3.1 +
1061 𝑚𝐴
2
− 3.0 𝐴) = 50.4 [μF]
If the total capacitance connected to VOUT is larger than COUTMAX, over current protection may be activated by the inrush
current at start-up and prevented to turn on the output. In addition, COUT affects the load transient response and stability
of the control loop. Confirm it on the actual application.
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Selection of Components Externally Connected – continued
2. Output Voltage Setting
The output voltage value can be set by the feedback resistance ratio.
For stable operation, use feedback resistance R1 of value from 100 kΩ to 300 kΩ.
VOUT
𝑉𝑂𝑈𝑇 =
R1
Error Amplifier
𝑅2 =
FB
R2
𝑅1 + 𝑅2
𝑅2
× 𝑉𝐹𝐵 [V]
𝑉𝐹𝐵
𝑉𝑂𝑈𝑇 − 𝑉𝐹𝐵
× 𝑅1 [Ω]
0.8 V
(Typ)
Figure 67. Feedback Resistor Circuit
3. Soft Start Capacitor (Soft Start Time Setting)
The soft start time tSS depends on the value of the capacitor connected to the SS pin. tSS is 1 ms (Typ) when the SS pin is
left floating. The capacitor connected to the SS pin makes tSS more than 1 ms. The tSS and CSS can be calculated using
below equation. The CSS should be set in the range between 3300 pF and 0.1 μF.
𝑡𝑆𝑆 =
(𝐶𝑆𝑆 × 𝑉𝑆𝑆 )
𝐼𝑆𝑆
Where:
𝑡𝑆𝑆 is the soft start time.
𝐶𝑆𝑆 is the capacitor connected to the SS pin.
𝑉𝑆𝑆 is the SS voltage finished soft start function.
𝐼𝑆𝑆 is the soft start current.
2.5 μA (Typ)
1.2 V (Typ) x 0.95 (Typ)
With CSS = 0.01 µF, tSS can be calculated as below.
𝑡𝑆𝑆 =
(0.01 μF × 1.2 V ×0.95)
2.5 μA
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PCB Layout Design
PCB layout design for DC/DC converter power supply IC is as important as the circuit design. Appropriate layout can avoid
various problems caused by power supply circuit. Figure 68-a to Figure 68-c show the current path in a buck converter circuit.
The Loop1 in Figure 68-a is a current path when H-side switch is ON and L-side switch is OFF and the Loop2 in Figure 68-b
is when H-side switch is OFF and L-side switch is ON. The thick line in Figure 68-c shows the difference between Loop1 and
Loop2. The current in thick line changes sharply each time the switching element H-side and L-side switch change from OFF
to ON, and vice versa. These sharp changes induce several harmonics in the waveform. Therefore, the loop area of thick line
that is consisted by input capacitor and IC should be as small as possible to minimize noise. For more detail, refer to
application note of switching regulator series “PCB Layout Techniques of Buck Converter”.
VIN
Loop1
H-side switch
VOUT
L
CIN
COUT
L-side switch
GND
GND
Figure 68-a. Current Path when H-side Switch = ON, L-side Switch = OFF
VIN
CIN
VOUT
L
H-side switch
COUT
Loop2
L-side switch
GND
GND
Figure 68-b. Current Path when H-side Switch = OFF, L-side Switch = ON
VIN
VOUT
L
CIN
COUT
H-side FET
L-side FET
GND
GND
Figure 68-c. Difference of Current and Critical Area in Layout
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BD9D300MUV
I/O Equivalence Circuits
1.2.3. SW
4. PGD
PVIN
SW
PGD
500 kΩ
300 kΩ
50 Ω
Internal
Circuit
167 kΩ
5. FB
8. MODE
Internal REG
Internal REG
FB
10 kΩ
MODE
9. SS
13. EN
Internal REG
EN
SS
25 kΩ
20 kΩ
20 kΩ
10 kΩ
380 kΩ
14. VOUTS
35 kΩ
VOUTS
10 kΩ
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500 kΩ
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BD9D300MUV
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. However,
pins that drive inductive loads (e.g. motor driver outputs, DC-DC converter outputs) may inevitably go below ground
due to back EMF or electromotive force. In such cases, the user should make sure that such voltages going below
ground will not cause the IC and the system to malfunction by examining carefully all relevant factors and conditions
such as motor characteristics, supply voltage, operating frequency and PCB wiring to name a few.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
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Operation Notes – continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin A
N
P+
N
P
N
P+
N
Parasitic
Elements
N
P+
GND
E
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
Parasitic
Elements
Pin B
B
Parasitic
Elements
GND
GND
Figure 69. Example of Monolithic IC Structure
N Region
close-by
GND
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
13. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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BD9D300MUV
Ordering Information
B
D
9
D
3
0
0
M
U
V
Package
VQFN016V3030
-
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
VQFN016V3030 (TOP VIEW)
Part Number Marking
D9D
LOT Number
3 0 0
Pin 1 Mark
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BD9D300MUV
Physical Dimension and Packing Information
Package Name
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BD9D300MUV
Revision History
Date
Revision
Changes
18.Mar.2019
001
16.Sep.2021
002
New Release
P4 Consist Soft Start block explanation with Japanese version.
P6 Correct of Output Voltage Setting symbol error in Recommended Operating Condition
P6 Correct of Output OVP Release Voltage symbol error in Electrical Characteristics
P7 Correct of Figure 3 MODE setting error in Typical Performance Curves
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001