High-performance System Video Driver Series
Wide Band 3-output Video Driver
BH7600AFS, BH7601FS, BH7602FS
●
No.09065EAT05
Description BH7600AFS, BH7601FS and BH7602FS is wide band 3-output video driver for high-definition television system. This video driver is built in the DC output circuits (LINE1, LINE2, LINE3 output ) for D terminal and detector to connect. And they have line-up build in sync-mix, DC shift input, selectable LPF every applications.
●
Features 1) Built-in the DC output circuits (LINE1, LINE2, LINE3) / detector to connect. 2) Built-in OUTPUT MUTE circuit 2 3) I C BUS control 4) Pedestal clamp input with sync mix (BH7600AFS) 5) Sync tip clamp input 1ch, bias input 2ch (BH7601FS) 6) Possible to be directly connected with DAC by DC shift circuit (BH7602FS) 7) Built-in power down function (BH7602FS) Applications DVD Player, DVD Recorder, DVC, DSC, STB, TV and so on.
●
●
Line Up Parameter Input form of Py Input form of Pb, Pr Voltage Gain Package BH7600AFS Pedestal Clamp With sync mix Pedestal Clamp 5.5dB SSOP-A24 BH7601FS Sync tip Clamp Bias Input 8.45dB SSOP-A24 BH7602FS DC Shift （Directly connected） DC Shift （Directly connected） 6.0dB SSOP-A20
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1/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Absolute Maximum Ratings ( Ta=25℃ ) Parameter Supply Voltage Power Dissipation Input Voltage Range Operating Temperature Storage Temperature Symbol Vcc Pd Vin Topr Tstg Rating 7 800 (SSOP-A24) 750 (SSOP-A20) 0～Vcc -25～+75 (SSOP-A24) -35～+75 (SSOP-A20) -55～+125 Unit V mW V ℃ ℃
Technical Note
※1. 70mm×70mm×1.6mm mounting on the glass epoxy board. ※2. For operation above Ta=25℃ free-air temperature, power dissipation is decreasing 8.0mW/℃(SSOP-A24), 7.5mW/℃ (SSOP-A20). ● Operating Voltage Range Parameter Supply Voltage (BH7600AFS/BH7601FS) Supply Voltage (BH7602FS) ● Symbol Vcc Vcc Min 4.5 4.5 Typ 5.0 5.0 Max 5.5 5.25 Unit V V
BH7600AFS Electrical Characteristics (Unless otherwise specified, Ta=25℃,VCC=5V) Parameter 《All Circuits》 Circuit Current LINEOUT「H」Voltage LINEOUT「M」Voltage LINEOUT「L」Voltage LINEOUT Impedance 《Video Driver Parts》 Voltage Gain Frequency Characteristics 1 MUTE Input Parts Impedance MUTE「H」Level Input Voltage MUTE「L」Level Input Voltage 《SYNC》 SYNC1, 2「H」Level Input Voltage SYNC1, 2「L」Level Input Voltage SYNC Input Bias Current SYNC Mix Level 《Control Parts》 「H」Level Input Voltage 「L」Level Input Voltage SDA「L」Sink Current DET Detection Level「H」 DET Detection Level「L」 DET Input Bias Current Symbol ICC VLOH VLOM VLOL ZLO GV VF1 ZIN VMH VML VSYNH VSYNL ISYN VSYL VH VL ISIN VDH VDL IDET Min 10.8 4.0 1.5 0.0 1.3 -1 -1 75 2.0 0 2.0 0 0 270 2.0 0 4.0 2.0 0 0 Typ 21.5 4.9 1.9 0.2 1.8 -0.5 0 100 -2.0 300 -2.0 Max 32.3 5.0 2.3 0.5 2.3 0 1 125 VCC 1.0 VCC 1.0 20 330 VCC 1.0 VCC 1.0 -20 Unit mA V V V kΩ dB dB kΩ V V V V μA mV V V mA V V μA ※1 Measure at separation of 75Ω+75Ω Conditions No Signal
VIN=1VP-P, f=1MHz ※1 VIN=1VP-P, f=1M/10MHz
●
Reference Value (Unless otherwise specified, Ta=25℃,VCC=5V) Parameter 《Video Driver Parts》 Frequency Characteristic2 Mute Attenuation Channel Crosstalk Symbol VF2 VMT CTV Min -3 Typ -1 -40 -40 Max 1 Unit dB dB dB Conditions VIN=0.7VP-P, f=1M/10MHz VIN=1VP-P, f=30MHz VIN=1VP-P, f=20MHz
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2/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● BH7601FS Electrical Characteristics (Unless otherwise specified, Ta=25℃,VCC=5V) Parameter Symbol Min Typ Max 《All Circuit》 Circuit Current ICC 13.5 27.0 40.5 LINEOUT「H」Voltage VLOH 3.5 4.25 5.0 LINEOUT「M」Voltage VLOM 1.4 1.9 2.4 LINEOUT「L」Voltage VLO 0.0 0.1 0.5 LINEOUT Impedance ZLO 1.3 1.8 2.3 《Video Driver Parts》 Voltage Gain GV 1.65 2.45 3.25 Frequency Characteristics VF1 -1 0 1 MUTE Input Parts Impedance ZMUTE 75 100 125 MUTE「H」Level Input Voltage VMH 2.0 VCC MUTE「L」Level Input Voltage VML 0 1.0 PB, PR Input Impedance ZIN 14 20 26 《Control Parts》 「H」Level Input Voltage VH 2.0 VCC 「L」Level Input Voltage SDA 「L」Sink Current DET Detection Level「H」 DET Detection Level「L」 DET Input Bias Current ● VL ISIN VDH VDL IDET 0 4.0 2.0 0 0 -2.0 1.0 VCC 1.0 -20
Technical Note
Unit mA V V V kΩ dB dB kΩ V V kΩ V V
Conditions No signal (VCC=5V±5%) (VCC=5V±5%) (VCC=5V±5%) VIN=0.75VP-P, f=1MHz ※1 VIN=0.75VP-P, f=1M/10MHz
mA V V μA ※1 Measure at separation of 75Ω+75Ω
●
Reference Value (Unless otherwise specified, Ta=25℃, VCC=5V) Parameter Symbol Min Typ Max Unit Conditions 《Video Driver Parts》 Frequency Characteristics2 VF2 -1 dB VIN=0.53VP-P, f=1M/30MHz Mute Attenuation VMT -40 dB VIN=0.75VP-P, f=20MHz Channel Crosstalk CTV -40 dB VIN=0.75VP-P, f=20MHz BH7602FS Electrical Characteristics (Unless otherwise specified, Ta=25℃,VCC=5V) Parameter Symbol Min Typ Max Unit Conditions 《All Circuits》 VCC Circuit Current IVCC 44 56 68 mA No signal VCC Circuit Current PD IPD 1.5 3.0 mA Power down 《Video Driver Parts》 Y/PB/PR OUT Voltage Gain Vin=1.0VP-P, f=100kHz G20 5.5 6.0 6.5 dB Y/PB/PR OUT Vin: THD=1.0% f=10kHz 2.6 2.9 VP-P VOM20 Maximum Output Level Vin=1.0VP-P, f=30M/100kHz, Y OUT LPF1 -5.0 -1.5 1.0 dB F1201 Frequency Characteristics 1 LPF1:ON Y OUT LPF2 Vin=1.0VP-P, f=13.5M/100kHz, -1.5 -0.5 0.5 dB F2201 Frequency Characteristics 1 LPF2:ON Vin=1.0VP-P, f=15M/100kHz, PB/PR OUT LPF1 -5.0 -1.5 1.0 dB F1171 Frequency Characteristics 1 LPF1:ON PB/PR OUT LPF2 Vin=1.0VP-P, f=6.75M/100kHz, -1.5 -0.5 0.5 dB F2171 Frequency Characteristics 1 LPF2:ON Y OUT LPF1 Vin=1.0VP-P, f=74.25M/100kHz, F1202 -45 -28 dB Frequency Characteristics 2 LPF1:ON Y OUT LPF2 Vin=1.0VP-P, f=54M/100kHz, -40 -28 dB F2202 Frequency Characteristics 2 LPF2:ON PB/PR OUT LPF1 Vin=1.0VP-P, f=37.125M/100kHz, F1172 -45 -28 dB Frequency Characteristics 2 LPF1:ON PB/PR OUT LPF2 Vin=1.0VP-P, f=27M/100kHz, -40 -28 dB F2172 Frequency Characteristics 2 LPF2:ON MUTE Attenuation MT20 -65 -55 dB Vin=1.0VP-P, f=4.43MHz Channel Crosstalk MTCH -65 -55 dB Vin=1.0VP-P, f=4.43MHz 《D_DET》 Input Voltage H VI14H 4.0 VCC V Input Voltage M VI14L 0.0 1.0 V Input Impedance ZI14 100 150 200 kΩ Pull Up Resistance 《LINE_OUT》 Output Voltage H VO13H 4.2 4.5 4.8 V Output Voltage M VO13M 1.7 2.0 2.3 V Output Voltage L VO13L 0.0 0.1 0.5 V Input Impedance ZO13 0.5 0.9 1.3 kΩ Pull Down Resistance
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3/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Electrical Characteristics (Unless otherwise specified, Ta=25℃,VCC=5V) Parameter 《ADR》 Input Voltage H Input Voltage L Input Impedance 《SCL, SDA》 Input Voltage H Input Voltage L Input Bias Current Symbol VI8H VI8L ZI8 VI9H VI9L IB9 Min 2.0 0.0 65 Typ 100 Max Vcc 1.0 135 Unit V V kΩ
Technical Note
Conditions
Pull Down Resistance
2.0 Vcc V 0.0 1.0 V μA -10 0 10 ※2 VIDEO part input signal : 0.5～1.5V (1.0Vp-p) sine wave, VREF pin: 0.9V
●
Block Diagram BH7600AFS
1
YIN PEDESTAL CLAMP SYNC MIX YGND
VIDEO DRIVER
BH7601FS
24 23 22 21 20 19 18 17 16 15 14 13
1 2 3 4 5 6 7 8 9 10 11 12
YIN
VIDEO DRIVER
YGND YOUT DVCC LINE1 LINE2 LINE3 DET DAGND
VIDEO DRIVER
24 23 22 21 20 19 18 17 16 15 14 13
2 YVCC 3 4 5 6 7 8 9 10 11 12
SCL SDA SYNC1 SYNC SYNC2 AVCC MUTE PBVCC PBIN PRVCC PRIN PEDESTAL CLAMP PEDESTAL CLAMP CONTROL I 2C-BUS CONTROL
MUTE
YOUT DVCC LINE1 LINE2 LINE3 DET DAGND
VIDEO DRIVER
YVCC SCL SDA VCC1 VCC2 AVCC MUTE PBVCC
20kΩ
MUTE
LINE1 OUTPUT LINE2 OUTPUT LINE3 OUTPUT DET
I 2C-BUS CONTROL
LINE1 OUTPUT LINE2 OUTPUT LINE3 OUTPUT DET
MUTE
VIDEO DRIVER
MUTE
VIDEO DRIVER
PBOUT PBGND PROUT PRGND
PBOUT PBGND PROUT
20kΩ
MUTE VIDEO DRIVER
PBIN PRVCC PRIN
MUTE VIDEO DRIVER
MUTE
MUTE
PRGND
Fig.1
Fig.2
BH7602FS
VIDEO DRIVER
1
YIN
DC_SHIFT
LPF1 LPF2
MUTE
6dB
Y_OUT
20
2
TEST
TEST
N.C
19
3
PB_IN
DC_SHIFT
LPF1 LPF2
MUTE VIDEO DRIVER
P_VCC
18
4
S_VCC
6dB
PB_OUT
17
5
PR_IN
DC_SHIFT
LPF1 LPF2
MUTE VIDEO DRIVER
P_GND
16
6
S_GND
6dB
PR_OUT
15
7
VREF
D-Connector Detect
D_DET
14
8
ADR
H M L H L
LINE1_OUT
13
9
SCL
IIC-BUS Control
LINE2_OUT
12
10
SDA
H M L
LINE3_OUT
11
Fig.3
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4/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Terminal Description・Input/Output Equivalent Circuit BH7600AFS Standard Pin.No Pin Name IN OUT voltage
Technical Note
Input/Output Equivalent Circuit
Terminal Description
Y Signal Input Terminal 1 YIN ○ － 2.3V This terminal is Y signal input terminal. The input is pedestal clamp. It is possible to mix sync signal by pulse of SYNC1, SYNC2.
100
100
Vcc Terminal 2 7 9 11 22 YVcc AVcc PBVcc PRVcc DVcc YVcc, PBVcc, PRVcc are Vcc terminal of video driver. AVcc is the Vcc terminal of the other analog parts. DVcc is the Vcc terminal of the digital parts.
－
－
5.0V
1 1kk
Sync Control Terminal It is sync control pulse input terminal synchronized to Y signal for pedestal clamp.
5 6
SYNC1 SYNC2
○
－
－
GND Terminal 13 15 17 24 PRGND PBGND DAGND YGND － － 0.0V PRGND, PBGND, YGND are GND terminal of video driver. DAGND is the GND terminal except driver parts.
PB, PR Signal Input Terminal 10 12 PBIN PRIN ○ － 2.8V
100 100
This terminal is the input terminal. This input is pedestal clamp.
Line Output Terminal 19 20 21 LINE3 LINE2 LINE1 ― ○ ―
1.8k
It is the line 3 value output terminal for D terminal. This terminal is controlled by I2C BUS.
※ The values in the terminal descriptions and input/output equivalent circuit are for reference only - they are not guaranteed.
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5/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Terminal Description・Input/Output Equivalent Circuit BH7600AFS/BH7601FS Standard Pin.No Pin Name IN OUT Voltage
Technical Note
Input/Output Equivalent Circuit
2
Terminal Description I C BUS CLOCK Input Terminal
50
30k
3
SCL
○
―
―
This terminal is serial clock input terminal that is based on I2C BUS. Usually, it use to pull up by resistor. I2C BUS DATA Input Terminal
50
30k
4
SDA
○
―
―
This terminal is serial data input terminal that is based on I2C BUS. Usually, it use to pull up by resistor.
Mute Control Terminal
100k 100k
8
MUTE
○
―
5.0V
1k
1k
This terminal is connected to Vcc with 100kΩ, when the terminal is open or High, mute mode, when Low, normal mode.
14 16
PROUT PBOUT
PB, PR Signal Output Terminal ― ○ 2.1V This terminal is the PR, PB output terminal.
1.2V (BH7600AFS) 23 YOUT ― ○ 0.7V (BH7601FS)
Y Signal Output Terminal This terminal is the Y signal output terminal.
DET Terminal
1k
18
DET
○
―
―
This terminal is the detector to connect D terminal. Usually, it use to pull up by resistor.
※ The values in the terminal descriptions and input/output equivalent circuit are for reference only - they are not guaranteed.
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6/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Terminal Description・Input/Output Equivalent Circuit BH7601FS Standard Pin.No Pin Name IN OUT Voltage
Technical Note
Input/Output Equivalent Circuit
Terminal Description
Y Signal Input Terminal 1 YIN ○ ― 2.8V
100
This terminal is Y signal input terminal. The input is sync tip clamp.
Vcc Terminal 2 5 6 7 9 11 22 YVcc Vcc1 Vcc2 AVcc PBVcc PRVcc DVcc YVcc, PBVcc, PRVcc are Vcc terminal of video driver. Vcc1, Vcc2, AVcc are the Vcc terminal of the other analog parts ( These 3 terminals are connected inside), DVcc is Vcc terminal of the digital parts.
―
―
5.0V
PB, PR Signal Input Terminal 10 12 PBIN PRIN ○ ― 2.1V
100
This terminal is the PR, PB input terminal. The input is bias type.
GND Terminal 13 15 17 24 PRGND PBGND DAGND YGND PRGND, PBGND, YGND are GND terminal of video driver. DAGND is the GND terminal of the blocks except video driver.
―
―
0.0V
Line Output Terminal 19 20 21 LINE3 LINE2 LINE1 － ○ －
2.11k
12k
This terminal is the line 3 value output terminal for D terminal. This terminal is controlled by I2C BUS.
※ The values in the terminal descriptions and input/output equivalent circuit are for reference only - they are not guaranteed.
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7/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Terminal Description・Input/Output Equivalent Circuit BH7602FS Pin.No Pin Name IN OUT Standard Voltage Input/Output Equivalent Circuit
Technical Note
Terminal Description Component signal input terminal
1 3 5
Y_IN PB_IN PR_IN
○
―
(VS7-0.4) ～ (VS7+0.9)
Input range is possible to regulate by VREF terminal input voltage (VS7). When Vcc off, this terminal become high impedance.
20 17 15
Y_OUT PB_OUT PR_OUT
―
○
0.7 At input terminal voltage =(VS7-0.4)
Component signal output terminal It is possible to output two drivers.
Reference Terminal 7 VREF ○ ― 0.4～1.4 This terminal is input terminal of inside reference voltage for DC-shift circuit.
D Terminal Input Terminal for detector to connect 14 D_DET ○ ― 5.0V Terminal condition (H/L) is possible to read out by I2C BUS. When D mode, it is possible to control of power-down into terminal condition (H/L). LINE-OUT Terminal 13 12 11 LINE1_OUT LINE2_OUT LINE3_OUT 4.5(H) 2.0(M) 0.1(L) This terminal is the line 3 value output terminal for controlled by I2C BUS. Each distinction output are correspond with the D terminal standard.
―
○
I C BUS clock Input Terminal 9 SCL ○ ― ― This terminal is possible to operate max 400kHz. When Vcc off, this terminal become high impedance.
2
※ The values in the terminal descriptions and input/output equivalent circuit are for reference only - they are not guaranteed.
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8/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Terminal Description・Input/Output Equivalent Circuit BH7602FS Pin.No Pin Name IN OUT Standard Voltage Input/Output Equivalent Circuit
2
Technical Note
Terminal Description I C-BUS Data Input/ Output Terminal
10
SDA
○
○
―
This terminal is possible to operate max 400kHz. When VCC off, this terminal become high impedance.
Slave Address Change Terminal 8 ADR ○ ― 0V LOW: D8H High: DAH
LOGIC Test Mode Change Terminal 2 TEST ○ ― 0V Usually not use. This terminal is 0V input (=GND ).
18
P_VCC
―
―
5.0V
VCC terminal output.
for
driver
19
P_GND
―
―
0V
GND terminal output.
for
driver
4
S_VCC
―
―
5.0V
VCC terminal for the analog part except driver and digital part.
6
S_GND
―
―
0V
GND terminal for the analog part except driver and digital part.
※ The values in the terminal descriptions and input/output equivalent circuit are for reference only - they are not guaranteed.
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9/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
Technical Note
■
2 I C BUS Control Input Specifications 〈 BH7600AFS / BH7601FS 〉 I2C BUS Format (WRITE MODE)
S
SLAVE ADDRESS
A
DATA A: Acknowledge
A
P P: Stop Condition b3 1 LINE2 b2 0 b1 0 LINE3 b0 0
S: Start Condition b7 1 0 b6 1 0 b5 0
Slave address DATA
b4 1 LINE1
Select Input Switch・ Setting Mode (When power on, it becomes ＊ condition.)
LINE1
LINE2
Explanation Setting output of LINE1 OUT 00: LOW ＊(BH7601FS) 01: LOW 10: MIDDLE 11: HIGH ＊(BH7600AFS) Setting output of LINE2 00: LOW ＊(BH7601FS) 01: LOW 10: MIDDLE 11: HIGH ＊(BH7600AFS)
Explanation LINE3 Setting output of LINE3 OUT 00: LOW ＊(BH7601FS) 01: LOW 10: MIDDLE 11: HIGH ＊(BH7600AFS)
2 I C BUS Format (READ MODE)
S
SLAVE ADDRESS
A
DATA A: Acknowledge
NA
P NA: No Acknowledge P: Stop Condition
S: Start Condition
Slave address DATA
b7 1 0
b6 1 0
b5 0 0
b4 1 0
b3 1 0
b2 0 0
b1 0 0
b0 1 DET
Select Input Switch・ Setting Mode Explanation Read out the condition of DET (18PIN) pin. 0: LOW 1: HIGH
DET
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10/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
■ I2C BUS Control Input Specifications 〈 BH7602FS 〉 2 I C BUS Format (WRITE MODE) S SLAVE ADDRESS A DATA1 A DATA2 A P
Technical Note
S: Start Condition
A: Acknowledge
P: Stop Condition
Slave address DATA1 DATA2
b7 1 PD
b6 1 LPF_SW D_MODE
b5 0 LINE1 0
b4 1 0
b3 1 LINE2 0
b2 0 0 0
b1 ADR LINE3 0
b0 R/W 0
Select Input Switch・ Setting Mode (When power on, it becomes ＊ condition.) Explanation Slave Address (write mode) set by ADR pin. 0: “D8H”when ADR is Low. 1: “DAH”when ADR is High. LPF_SW Setting output 00: LPF1 01: LPF2 10: － 11: MUTE ＊ (NOTE)“10”is No use Setting output of LINE2_OUT for D terminal 0: L ＊ 1: H Explanation R/W READ/WRITE Setting Mode 0: WRITE 1: READ Setting output of LINE1_OUT for D terminal 00: L ＊ 01: L 10: M 11: H Setting of output of LINE3_OUT for D terminal 00: L ＊ 01: L 10: M 11: H D terminal detect mode change 0: OFF ＊ 1: ON（D terminal detect mode）
ADR
LPF_SW
LINE1
LINE2
LINE3
PD
Power down control 0: Normal ＊ 1: PD（Power down）
D_MODE
D_MODE (D terminal detect mode) 2 When I C BUS sets D_MODE=ON, POWER DOWN is controlled by D_DET pin input level and the PD pin input is ignore.
D_MODE OFF
PD 0 0 1 1
D_DET L H L H L H L H
Output Normal Normal Power down Power down Normal Power down Normal Power down
ON
0 0 1 1
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11/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● I2C BUS Format (READ MODE) S SLAVE ADDRESS A DATA1 NA P
Technical Note
S: Start Condition b7 1 0 b6 1 0
A: Acknowledge b5 0 0 b4 1 0
NA: No Acknowledge P: Stop Condition b3 1 0 b2 0 0 b1 ADR 0 b0 R/W D_DET
Slave address DATA
● Select Input Switch・ Setting Mode Explanation Slave Address (read mode) set by ADR 0: “D9H”, when ADR is LOW. 1: “DBH”, when ADR is High. READ/WRITE setting mode 0: WRITE 1: READ Explanation D_DET Read out D_DET condition 0: LOW 1: HI
ADR
R/W
■
BH7600AFS
Sync-mix operation
On BH7600AFS, it is necessary to operate sync-mix Y signal and control signal synchronized with the Y signal (SYNC1, SYNC2). Use this control signal, (1) When the Y signal which has no sync is inputted, it is outputted with a sync. (2) When the Y signal which has sync is inputted, it is possible to output as that. Then, please refer to show how to use SYNC1, SYNC2 palse.
(1) When the Y signal which has no sync is inputted ( i ) 3 value sync mix ( ii ) 2 value sync mix
YIN SYNC1 SYNC2
YIN SYNC1 SYNC2
YOUT Pedestal Level
YOUT Pedestal Level
(2) When the Y signal which has a sync is inputted
YIN SYNC1 SYNC2 (HIGH fix)
YOUT Pedestal Clamp Pedestal Clamp
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12/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● ■ Operation description of each block BH7602FS How to set video input level in DC_SHFT circuit
Technical Note
BH7602FS is build in DC_Shift block and it operate without input coupling capacitor. It is necessary to set input voltage of VREF (7pin) terminal to VIDEO signal input level because of enough output dynamic range.
V_IN (Y, PB, PR_IN)
+ f
f=2(VREF-0.4)-0.7
V_OUT (Y, PB, PR_OUT)
VREF
Fig. 4 DC_Shift block equivalent circuit
The relation of V_IN, VREF, V_OUT in this place
V_OUT=0.7+2(V_IN-VREF+0.4)
（eq.1）
and the input possible range of VREF is
0.4≦VREF≦1.4 [V]
（eq.2）
It shows the relation of V_IN-V_OUT at each VREF value on Fig.6. On the other hand, the operation range of V_OUT (VIDEO OUTPUT) becomes 0.7V～3.3V (2.6Vp-p) of the circuit composition, and needs to adjust VREF terminal voltage to be kept this range for inputted VIDEO signal. VREF terminal voltage and V_IN input possible range are shown in Fig.5. Caution on use, after confirming Fig.5, adjust VREF terminal voltage. Fig. 5 The relation of VREF terminal voltage and input possible range VREF [V] 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4
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V_IN input possible range [V] 0.0～1.3
V_OUT [V]
4
V_IN =1.8V 3.3V
3
Output Operation Range Vref = 0.4V Vref = 0.9V Vref = 1.4V
0.1～1.4 0.2～1.5 0.3～1.6 0.4～1.7 0.5～1.8 0.6～1.9 0.7～2.0 0.8～2.1 0.9～2.2 1.0～2.3
2
V_IN =0.5V 0.7V
1
0 0 1 V_IN [V] 2 3
Fig. 6 The relation of V_IN-V_OUT at each VREF value (measurement value)
13/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Application circuit BH7600AFS
This terminal is input terminal of control pulse synchronized Y signal Refer to 12/16 page for the way of use
Technical Note
D Terminal
1uF Y Signal 5V 3.3V
+
1
YIN
PEDESTAL CLAMP
SYNC MIX
YGND
VIDEO DRIVER
24 +
5V 0.1u
I C-BUS
1k SCL 1k SDA
2
47u
+
2 YVCC 3 4 5
SCL SDA SYNC1 SYNC SYNC2 AVCC MUTE PBVCC PBIN PRVCC PRIN PEDESTAL CLAMP PEDESTAL CLAMP CONTROL I 2C-BUS CONTROL
MUTE
YOUT DVCC LINE1 LINE2 LINE3 DET DAGND
VIDEO DRIVER
23 22 21 20 19 18 17
470u
75
1
Y
0.1u
+
47u
8
LINE1 OUTPUT LINE2 OUTPUT LINE3 OUTPUT DET
LINE1
8.2k
100k
9
LINE2
SYNC CONTROL
8.2k
100k
11 LINE3
6
5V
8.2k
100k 3.3V
+
7 8
47u VCC or OPEN
0.1u
100k
14 SW
MUTE
VIDEO DRIVER
5V
47u PB Signal 5V
0.1u
+
1uF
10 11
MUTE VIDEO DRIVER
PBGND PROUT PRGND
15 + 14 13
470u 75
5
47u PR Signal
+
0.1u
+
1uF
12
MUTE
Fig. 7
BH7602FS
Input is DC_Shift can connect directly from DAC. Refer to 13/16 page for the way of use. DAC OUTPUT
VIDEO DRIVER
Y DAC
1
YIN
DC_SHIFT
LPF1 LPF2
MUTE
6dB
Y_OUT
20
220u +
2
TEST
TEST
N.C
19
Pb DAC
3
PB_IN
DC_SHIFT
LPF1 LPF2
MUTE VIDEO DRIVER
P_VCC
18
0.1u
+ 47u
0.1u
4
S_VCC
6dB
PB_OUT
17
220u +
Pr DAC
5
PR_IN
DC_SHIFT
LPF1 LPF2
MUTE VIDEO DRIVER
P_GND
16
6
S_GND
6dB
PR_OUT
15
220u +
+ 22u
7
VREF
D-Connector Detect
D_DET
14
I 2C-BUS 8
ADR
H M L H L
LINE1_OUT
13
9.1k
SCL
9
SCL
IIC-BUS Control
LINE2_OUT
12
9.1k
SDA
10
SDA
H M L
LINE3_OUT
11
9.1k
This is standard voltage terminal to decide input range of DC-Shift circuit. Refer to 13/16 page for the way of use
Fig. 8
www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved.
14/16
+
75 75
+
9
PBOUT
16
470u
75
3
Pb
Pr
D Connecter
1
Y
+ 47u
75 75
3
Pb
75 75
5
Pr
14 SW
8
LINE1
9 LINE2
11 LINE3
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Reference Data BH7600AFS
40
2
2
Technical Note
SUPPLY CURRENT:ICC[mA]
DIFFERENTIAL GAIN:DG[%]
35 30 25 20 15 10 5 0 -25 0 25 50 75
DIFFERENTIAL PHASE:DP[deg
1.5
1.5
1
1
0.5
0.5
0 -25 0 25 50 75
0 -25 0 25 50 75
TEMPERATURE [℃]
TEMPERATURE [℃]
TEMPERATURE [℃]
Fig.9 Circuit Current BH7601FS
40
Fig.10 Differential Gain
Fig.11Differential Phase
2
2
SUPPLY CURRENT:ICC[mA]
DIFFERENTIAL GAIN:DG[%]
35 30 25 20 15 10 5 0 -25 0 25 50 75
DIFFERENTIAL PHASE:DP[deg
-25 0 25 50 75
1.5
1.5
1
1
0.5
0.5
0
0 -25 0 25 50 75
TEMPERATURE [℃]
TEMPERATURE [℃]
TEMPERATURE [℃]
Fig.12 Circuit Current BH7602FS
70 65 60 55 50 45 40 -25 0 25 50 75
Fig.13 Differential Gain
2
Fig.14 Differential Phase
2
1.5
DIFFERENTIAL PHASE:DP [deg]
SUPPLY CURRENT:ICC[mA]
DIFFERENTIAL GAIN:DG[%]
1.5
1
1
0.5
0.5
0 -25 0 25 50 75
0 -25 0 25 50 75
TEMPERATURE[℃]
TEMPERATURE [℃]
TEMPERATURE[℃]
Fig.15 Circuit Current
-50 -55 -60
20 10 0
Fig.16 Differential Gain
D3・D4
Fig.17 Differential Phase
20 10 0
D3・D4
GAIN[dB]
S/N[dB]
-10
GAIN[dB]
-10
-65 -70 -75
D1・D2
-20 -30 -40 -50
D1・D2
-20 -30 -40 -50 -60
-80 -25 0 25 50 75
-60 0.1 1 10 100
0.1
1
10
100
TEMPERATURE[℃]
FREQUENCY[MHz]
FREQUENCY [MHz]
Fig.18 S/N
Fig.19 YLPF Characteristics
Fig.20 PBLPF Characteristics
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15/16
2009.03 - Rev.A
BH7600AFS, BH7601FS, BH7602FS
● Selection of order type
Technical Note
B
H
7
6
0
Type
0
A
F
S
－
E
2
Package, forming specifications
BH7600AFS , BH7601FS , BH7602FS
SSOP-A24
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