BH7884EFV

TECHNICAL NOTE Speaker /Headphone Amplifier Series 1W+1W Stereo Speaker / Headphone Amplifier BH7884EFV ●Description The BH7884EFV is a low voltage, low noise, high output speaker and headphone amplifier drive, in which a BiCMOS process is used. This IC supports: headphone amplifier gain adjustment, active/suspend switching, speaker amplifier stereo/monaural switching, and amplifier mute switching. All functions are controllable from a microcontroller. Built-in digital noise reduction circuits eliminate digital noise and BEEP sounds. ●Features 1) Built-in 1W+1W stereo speaker amplifier (Vcc=5V, RL=8Ω, THD=10%) 2) Built-in stereo headphone amplifier 3) Built-in bass boost function for speaker amplifier 4) Built-in low noise VCA (electronic volume) for headphone 5) Built-in mute circuit 6) Built-in standby circuit 7) Low current consumption specifications (9 mA TYP. in ACTIVE mode, 0.2 μA TYP. in SUSPEND mode) ●Applications Notebook computers, LCD TVs, etc. ●Absolute maximum ratings(Ta=25°C) Parameter Supply voltage Power dissipation Storage temperature Operating temperature Limits +6.0 1100 *1 -55 ～ +125 -10 ～ +70 Unit V mW °C °C *1 Reduced by 11 mW/C at 25C or higher, when mounting on a 70mmX70mmX1.6mm PCB board). ●Operating range (Ta=25°C) Parameter Supply voltage Limits +3.0~+5.5 Unit V * This IC is not designed to be radiation-resistant. Oct. 2005 ●Electrical characteristics (Unless otherwise noted, Vcc=3.3V, Ta=25°C, f=1kHz) Specifications Min. 9.0 15.2 2.2 2.6 -10 70 -2.0 Typ. 9.0 0.2 12.0 18.2 0.1 5.2 -97 -90 -102 5.6 -7 0.025 100 1.0 -98 -98 -110 Max. 18.0 10.0 15.0 21.2 1.0 -80 -80 -80 8.6 -4 0.1 -80 -80 -80 Parameter ■1 CHIP Circuit current ACTV Circuit current SPND ■SP AMP Voltage gain1 Voltage gain2 Distortion Maximum output level Output noise level Cross talk Output level on mute ■HP AMP Voltage gain 3 Voltage gain 4 Distortion Variable width of volume Maximum output level Output noise level Cross talk Output level on mute ■BEEP AMP Output voltage level ■BIAS Output voltage level ■CTRL ACTIVE mode SUSPEND mode SP/ON mode SP/OFF mode BASS-BOOST/ON mode BASS-BOOST/OFF mode STEREO mode MONO mode ACTIVE mode MUTE mode ■PSRR Ripple rejection ratio Symbol Unit Condition IA Is GSP1 GSP2 DSP VOSP VNSP CTSP MTSP GHP GHP DHP ΔGHP VoHP VNHP CTHP MTHP mA µA dB dB % dBV dBV dBV dBV dB dB % dB dBV dBV dBV dBV No signal ACTIVE No signal SUSPEND SE, Vin=-18dBV,RL=8Ω BTL, Vin=-18dBV BTL, Vin=-18dBV BTL, DSP=1% SE, DIN-Audio SE, Vin=-18dBV, DIN-Audio BTL, Vin=-18dBV VOL:MAX, RL=10kΩ,Vin=-12dBV VOL:MAX, RL=32Ω,Vin=-12dBV VOL:MAX, RL=32Ω,Vin=-8dBV VOL:MIN～MAX, RL=32Ω VOL:MAX, DHP=1%, RL=10kΩ VOL:MAX, RL=32Ω, DIN-Audio VOL:MAX, RL=32Ω,Vin=-12dBV DIN-Audio VOL:MAX, RL=32Ω,Vin=-12dBV DIN-Audio Vin=1.3dBV, f=1kHz, 20MHzLPF No Signal Active mode. Hold Voltage of 11pin. Suspend mode. Hold Voltage of 11pin. SP/ON mode. Hold Voltage of 2pin. SP/OFF mode. Hold Voltage of 2pin. SP/BassBoost mode. Hold Voltage of 4pin. SP/NonBoost mode. Hold Voltage of 4pin. SP/STEREO mode. Hold Voltage of 3pin. SP/MONO mode. Hold Voltage of 3pin. HP/Active mode. Hold Voltage of 10pin. HP/MUTE mode. Hold Voltage of 10pin. f=100Hz, 0.3Vpp, SIN Input SPOUT monitor, DIN-Audio VBP VBIAS 0.8 1.4 VCC -0.3 GND VCC -0.3 GND VCC -0.7 GND VCC -0.7 GND VCC -0.7 GND 1.25 1.7 2.0 Vpp V V11H V11L V2H V2L V4H V4L V3H V3L V10H V10L - VCC 0.3 VCC 0.3 VCC 0.7 VCC 0.7 VCC 0.7 V V V V V V V V V V GPR - -64 - dBV 2/8 ●Block diagram Fig.1 ●Control pin settings SP MUTE PIN:2PIN H L SP ACTIVE SP MUTE SPAMP is in active state SPAMP is in suspend state STEREO/MONO PIN:3PIN H L STEREO MONO For SPAMP, LCH and RCH both are in active state For SPAMP, LCH is in active state and RCH is in suspend state BASSBOOST PIN:4PIN H L BASS BOOST NON -BOOST For SPAMP, bass is boosted For SPAMP, bass is not boosted MUTE PIN:10PIN (The SPAMP mute function is realized by connecting HP_OUT to SP_IN) H L ACTIVE MUTE SUSPEND PIN:11PIN H L ACTIVE SUSPEND The IC is in active state The IC is in suspend state HPAMP is in active state HPAMP is in mute state ●Equivalent circuit (1 of 2) 3/8 PIN1 SP_IN_LCH PIN2 SP MUTE PIN3 ST/MN PIN4 BASS BOOST 100k 100k 100k 100k 100k 100k PIN5 LINE_IN_LCH PIN6 BIAS PIN7 BEEP_IN PIN8 LIHE_IN_RCH 50 50k 35k 50 100k 16k 47k 27k 60k PIN9 HP_VOL PIN10 HP_MUTE PIN11 SUSPEND PIN12 SP_IN_RCH 100k 1k 100k 100k 100k 100k 100k PIN13 HP_OUT_RCH PIN14 VCC_RCH PIN15 BOOST_R_RCH PIN16 SPOUT1_RCH 25k 12 7.5k 40k 16 25k 40k 15 7.5k 4/8 ●Equivalent circuit (2 of 2) PIN17 SPOUT2_RCH PIN18 GND_RCH PIN19 GND_LCH PIN20 SPOUT2_LCH 25k 25k 7.5k 7.5k PIN21 SPOUT1_LCH PIN22 BOOST_R_LCH PIN23 VCC_LCH PIN24 HP_OUT_LCH 25k 40k 1 21 30k 7.5k 40k 22 7.5k ●Application circuit Fig.2 5/8 ●Description of operations 1) LINEIN (5,8PIN)～HPOUT (13,24PIN) voltage gain The voltage gain at EVRMAX is generally calculated by the following equation: GHP  20 log 40k (dB) R5( or R8 ) The above gain attenuates according to the DC voltage of the VOL pin (9PIN). By connecting multiple resistances (R), mixing input can be handled. 2) BEEPIN(7PIN)～HPOUT(13,24PIN) When a pulse waveform is input at the BEEPIN pin, a pulse wave is output at HPOUT (24,13PIN). The output level, determined by the resistance of 7PIN, has default values as follows: HP OUT level 1Vpp< 0.5Vpp 0.25Vpp Vcc=5V