Datasheet
Power supply IC series for TFT-LCD panels
12V Input Multi-Channel
System Power Supply IC
BM81004MUV
General Description
BM81004MUV is a system power supply for TFT-LCD
panels used for liquid crystal TVs. This IC is
incorporated with Negative and Positive charge pump
controller and Gate Pulse Modulation (GPM) function. It
also features built-in EEPROM to contain each setting
voltage, soft start time etc.
Key Specifications
Input voltage range：
AVDD Output voltage range：
VIO Output voltage range：
HAVDD Output voltage range：
VGH Output voltage range：
VGL Output voltage range：
Switching Frequency：
Features
■ Step-up DC/DC converter (AVDD).
(Synchronous rectification, Built-in load switch).
■ Step-down DC/DC converter 1(VIO).
(Non-synchronous rectification).
■ Step-down DC/DC converter 2(VCORE).
■ Step-down DC/DC converter 3(HAVDD).
(Synchronous rectification).
■ Positive charge pump controller (VGH).
■ Negative charge pump controller (VGL).
■ Gate Pulse Modulation (GPM) function.
■ High Voltage LDO (50mA)
■ 10 bit DAC-controlled Gamma Amplifier 4ch
■ 8 bit DAC-controlled VCOM Amplifier
■ Output voltage control by I2C.
■ Built-in EEPROM.
■ Switching Frequency 750kHz (AVDD, VIO).
■ Switching Frequency 1MHz (VCORE, HAVDD).
Operating temperature range：
8.6V to 14.0V
11.7V to 18.0V
2.2V to 3.7V
4.8V to 11.1V
25V to 40.5V
-10.2V to -4.0V
750kHz(Typ)
1MHz(Typ)
-40℃ to +105℃
Package
W(Typ) x D(Typ) x H(Max)
7.00mm x 7.00mm x 1.0mm
VQFN48V7070A
Applications
■ TFT-LCD panel
Typical Application Circuit 1
（TOP VIEW）
SW
SW
VGH
AVDD
VIN
HAVDD
VCORE
VGL
DRVN
VGH
DRVP
RE
N.C.
VINB3
SWB3
VGHM
PGND2
PGND3
EN
VDD3
SWB1
VGL
PGATE
SWB2
AVDDS
VDD2
SWO
VINB2
SWI
SW
VINB1
AVDD
VIN
SW
VINB1
BM81004MUV
VIO
N.C.
PGND
SWB1
PGND
VL
SWB1
INN
VCOM
HVCC
HVLDO
AVIN
A0
SCL
SDA
CTRL
PG
AGND
AMP3
VDD1
AMP4
AMP1
COMP
AMP2
AMPGND
VIN
AVDD
Figure 1.
Application Circuit 1
○Product structure：Silicon monolithic chip ○This chip is not designed for protection against ratio active rays.
www.rohm.com
TSZ02201-0313AAF00420-1-2
© 2014 ROHM Co., Ltd. All rights reserved.
1/49
TSZ22111・14・001
4.Dec.2014 Rev.002
BM81004MUV
Typical Application Circuit 2
（TOP VIEW）
SW
SW
VGH
AVDD
VIN
HAVDD
VCORE
VGL
DRVN
DRVP
VGH
RE
VINB3
N.C.
SWB3
VGHM
PGND2
PGND3
VDD3
EN
SWB1
VGL
PGATE
SWB2
AVDDS
VDD2
SWO
VINB2
SWI
VINB1
SW
VINB1
AVDD
VIN
SW
BM81004MUV
PGND
SWB1
PGND
SWB1
VL
INN
VCOM
HVCC
HVLDO
AVIN
A0
CTRL
SCL
AMP3
SDA
AGND
PG
AMP4
VDD1
COMP
AMP1
AMPGND
AMP2
VIO
N.C.
VIN
AVDD
Figure 2. Application Circuit 2
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
2/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Typical Application Circuit 1 ............................................................................................................................................................ 1
Key Specifications........................................................................................................................................................................... 1
Package .......................................................................................................................................................................................... 1
Typical Application Circuit 2 ............................................................................................................................................................ 2
Pin Configuration ............................................................................................................................................................................ 4
Pin Description................................................................................................................................................................................ 4
Block Diagram ................................................................................................................................................................................ 5
Description of each Block ............................................................................................................................................................... 6
Absolute Maximum Ratings ............................................................................................................................................................ 7
Recommended Operating Ranges ................................................................................................................................................. 7
Electrical Characteristics................................................................................................................................................................. 8
Typical Performance Curves ......................................................................................................................................................... 12
Timing Chart ................................................................................................................................................................................. 24
Example Application ..................................................................................................................................................................... 25
Protection function explanation of each block ............................................................................................................................... 26
Protection function list ................................................................................................................................................................... 29
Serial transmission ....................................................................................................................................................................... 30
Register Map ................................................................................................................................................................................ 33
Command Table 1 ......................................................................................................................................................................... 34
Command Table 2 ......................................................................................................................................................................... 35
Selecting Application Components ............................................................................................................................................... 36
Layout Guideline ............................................................................................................................................................................. 41
Power Dissipation ......................................................................................................................................................................... 41
I/O Equivalence Circuit ................................................................................................................................................................. 42
Operational Notes ......................................................................................................................................................................... 45
Ordering Information ..................................................................................................................................................................... 47
Marking Diagram .......................................................................................................................................................................... 47
Physical Dimension Tape and Reel Information ............................................................................................................................ 48
Revision history ............................................................................................................................................................................ 49
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
3/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
29
VGL
30
DRVN
31
VGH
32
DRVP
33
RE
34
VGHM
SWB3
35
N.C.
PGND3
36
VINB3
EN
VDD3
Pin Configuration
(TOP VIEW)
28
27
26
25
PGND2
37
24
PGATE
SWB2
38
23
AVDDS
VDD2
39
22
SWO
VINB2
40
21
SWI
VINB1
41
20
SW
VINB1
42
19
SW
N.C.
43
18
PGND
SWB1
44
17
PGND
SWB1
45
16
VL
AMPGND
46
15
COMP
AMP4
47
14
AGND
AMP3
48
13
CTRL
6
7
AMP1
VDD1
PG
SDA
SCL
A0
8
9
10
11
12
INN
5
VCOM
4
HVCC
3
HVLDO
2
AVIN
1
AMP2
Thermal Pad
Figure 3. Pin Configuration
Pin Description
PIN No.
SYMBOL
FUNCTION
PIN No.
SYMBOL
FUNCTION
1
AMP2
Gamma amplifier output pin 2
25
VGL
Negative charge pump output pin
2
AMP1
Gamma amplifier output pin 1
26
DRVN
Negative charge pump drive pin
3
VDD1
Step-down DC/DC output pin 1
27
DRVP
Positive charge pump drive pin
4
PG
Power GOOD signal output pin
28
VGH
Positive charge pump output pin
5
SDA
Serial data input pin
29
VGHM
GPM output pin
6
SCL
Serial clock input pin
30
RE
GPM Slope adjustment pin
7
A0
I2C address selected pin
31
VINB3
Power supply pin for Step-down DC/DC 3
8
AVIN
Power supply input pin
32
N.C.
―
9
HVLDO
High Voltage LDO output pin
33
SWB3
Step-down DC/DC switching pin 3
10
HVCC
VCOM and Gamma power supply pin
34
PGND3
Step-down DC/DC GND pin 3
11
VCOM
VCOM amplifier output pin
35
VDD3
Step-down DC/DC output pin 3
12
INN
VCOM amplifier feedback pin
36
EN
Enable pin
13
CTRL
GPM control pin
37
PGND2
Step-down DC/DC GND pin 2
14
AGND
Analog GND pin
38
SWB2
Step-down DC/DC switching pin 2
15
COMP
Error amplifier output pin
39
VDD2
Step-down DC/DC output pin 2
16
VL
Internal REG output pin
40
VINB2
Power supply pin for Step-down DC/DC 2
17
PGND
Step-up DC/DC GND pin
41
VINB1
Power supply pin for Step-down DC/DC 1
18
PGND
Step-up DC/DC GND pin
42
VINB1
Power supply pin for Step-down DC/DC 1
19
SW
Step-up DC/DC switching pin
43
N.C.
―
20
SW
Step-up DC/DC switching pin
44
SWB1
Step-down DC/DC switching pin 1
21
SWI
Load switch input pin
45
SWB1
Step-down DC/DC switching pin 1
22
SWO
Load switch output pin
46
AMPGND
Gamma amplifier GND pin
23
AVDDS
Step-up DC/DC feedback pin
47
AMP4
Gamma amplifier output pin 4
24
PGATE
Load switch gate drive pin
48
AMP3
Gamma amplifier output pin 3
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
4/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Block Diagram
AVDD
HVCC
HVCC
HVLDO
HVLDO
HVLDO
HVLDO
HVCC
+
OPAMP
-
VCOM
COMP
PGATE
INN
AVDDS
AVDD
HVCC
SWO
SWI
+
-
DAC
VIN
BOOST
CONVERTER
AMP1
+
-
SW
PGND
AMP2
+
-
VIN
AMP3
VINB1
+
-
BUCK
CONVERTER 1
AMP4
SWB1
VIO
AMPGND
VIN
VDD1
INTERNAL
REGULATOR
AVIN
VIN
VINB2
BUCK
CONVERTER 2
VL
VCORE
SWB2
PGND2
EEPROM
VDD2
VINB3
BUCK
CONVERTER 3
SDA
SCL
I2C
INTERFACE
A0
SWB3
HAVDD
PGND3
DAC
VDD3
VGH
REGULATOR
SEQUENCE
CONTROL
EN
DRVP
SW
AVDD
PG
SW
VGH
VGL
GPM
VGH
VGHM
RE
AGND
VGL
DRVN
CTRL
VGL
SWB1
Figure 4. Block Diagram
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
5/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Description of each Block
① BUCK CONVERTER BLOCK 2
This block generates VCORE (VDD2) voltage from Power supply voltage.
After releasing UVLO of VIN, VL starts activating. After Auto Read is operated to EEPROM, VCORE will be activated.
During operations, it is possible to prevent destruction of IC by OVP, UVP and OCP protection function.
② BUCK CONVERTER BLOCK 1
This block generates VIO (VDD1) voltage from Power supply voltage of VIO.
After completing VCORE start-up, VIO starts activating.
Power on Reset works at the time of VIN startup and the setting that is written to EEPROM will be reflected in Register.
During operations, it is possible to prevent destruction of IC by OVP, UVP and OCP protection function.
③ VGL REGULATOR BLOCK
This block generates VGL voltage.
After completing VCORE start-up, VGL starts activating.
Power on Reset works at the time of VIN startup and the setting that is written to EEPROM will be reflected in Register.
During operations, it is possible to prevent destruction of IC by UVP and OCP protection function.
④ BOOST CONVERTER BLOCK
This block generates AVDD (SWO) voltage from Power supply voltage.
It activates when EN=H, and under condition where VIO and VGL are activating.
Power on Reset works at the time of VIN startup and the setting that is written to EEPROM will be reflected in Register.
During operations, it is possible to prevent destruction of IC by OVP, UVP and OCP protection function.
⑤ BUCK CONVERTER BLOCK 3
This block generates HAVDD (VDD3) voltage from Power supply voltage.
HAVDD starts up following AVDD output voltage.
The setting voltage range of the HAVDD voltage depends on the AVDD setting voltage, and the lower limit level of the
HAVDD voltage is limited in AVDD×0.4.
Power on Reset works at the time of VIN startup and the setting that is written to EEPROM will be reflected in Register.
During operations, it is possible to prevent destruction of IC by OVP, UVP and OCP protection function.
⑥ HIGH VOLTAGE LDO BLOCK
This block generates HVLDO voltage from Power supply voltage of AVDD (HVCC).
HVLDO starts up following AVDD output voltage.
Power on Reset works at the time of VIN startup and the setting that is written to EEPROM will be reflected in Register.
During operations, it is possible to prevent destruction of IC by UVP and OCP protection function.
⑦ VCOM AMPLIFIER BLOCK
This block generates VCOM voltage from Power supply voltage of AVDD (HVCC). VCOM calibrator function is built-in.
VCOM starts up following AVDD output voltage.
Power on Reset works at the time of VIN startup and the setting that is written to EEPROM will be reflected in Register.
⑧ GAMMA AMPLIFIER BLOCK
This block generates AMP1 to 4 voltages from Power supply voltage of AVDD (HVCC).
AMP1 to 4 startup following AVDD output voltage.
Power on Reset works at the time of VIN startup and the setting that is written to EEPROM will be reflected in Register.
⑨ VGH REGULATOR BLOCK
This block generates VGH voltage from AVDD voltage.
After completing AVDD start-up, VGH starts activating.
Power on Reset works at the time of VIN startup and the setting that is written to EEPROM will be reflected in Register.
During operations, it is possible to prevent destruction of IC by OVP, UVP and OCP protection function.
⑩ GPM BLOCK
This is a switching circuit to drive a gate voltage for TFT that consist of PMOS FET.
VGHM output synchronizes with CTRL input and outputs High voltage = VGH at CTRL=H.
GPM Falling Limit voltage can be controlled by EEPROM.
※ Caution
・EN Input tolerant function is built in this IC. No need to be always EN < VIN.
・When PG pin is not used, PG pin must be connected to GND, or it should be open.
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
6/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Absolute Maximum Ratings
Limits
Parameter
Symbol
Unit
MIN
TYP
MAX
AVIN, VINB1, VINB2, VINB3
-0.3
-
24
V
HVCC
-0.3
-
20
V
SDA, SCL, A0, EN, CTRL
-0.3
-
7
V
VL
-0.3
-
6.5
V
COMP, PG
-0.3
-
7
V
-0.3
-
24
V
-0.3
-
20
V
VGL, DRVN
-15
-
7
V
DRVP, VGH, VGHM, RE
-0.3
-
48
V
Ta
-40
-
105
℃
Tstg
-55
-
150
℃
-
-
150
℃
Supply Voltage
Input Voltage
SW, SWI, SWO,
PGATE, AVDDS, VDD1, SWB1,
VDD2, SWB2, VDD3, SWB3
HVLDO, VCOM, INN
AMP1, AMP2, AMP3, AMP4
Output Voltage
Operating Ambient
Temperature Range
Storage Temperature
Range
Maximum Continuous
Junction Temperature
Power Dissipation
*1
*2
Tjmax
(*1)
Pd
5.08
W
Θja
24.6
degC/W
(*2)
It shows junction temperature when stores.
Derate by 40.6mW/℃ at Ta>25℃(on 4-layer 76.2mm×114.3mm×1.6mm glass epoxy board).
Recommended Operating Ranges
(Ta=-40℃～105℃)
Limits
Parameter
Symbol
Unit
MIN
TYP
MAX
AVIN
8.6
-
14
V
EN, A0, CTRL
-0.1
-
5.5
V
2 wire serial pin voltage
SDA, SCL
-0.1
-
5.5
V
2 wire serial frequency
FCLK
-
-
400
kHz
Supply Voltage
Functional pin voltage
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
7/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Electrical Characteristics
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V)
Limits
Parameter
Symbol
MIN
TYP
MAX
Unit
Condition
【 GENERAL 】
8.0
8.3
8.6
V
VIN rising
7.25
7.55
7.85
V
VIN falling
TSD
155
175
195
℃
Design guarantee
Internal Oscillator Frequency 1
FOSC1
600
750
900
kHz
AVDD, VIO, 0 < Ta < 50℃
Internal Oscillator Frequency 2
FOSC2
800
1000
1200
kHz
VCORE, HAVDD, 0 < Ta < 50℃
VL Voltage
VL
4.9
5
5.1
V
Consumption Current
ICC
-
5.4
-
mA
VIN Under Voltage
Lockout Threshold
VIN_
UVLO
Thermal shutdown
Not Switching
【 LOGIC SIGNALS SDA, SCL, EN, A0, CTRL 】
High Level Input Voltage
VIH
2
-
-
V
Low Level Input Voltage
VIL
-
-
0.5
V
Minimum Output Voltage
VSDA
-
-
0.4
V
RLOGIC
140
200
260
kΩ
AVDD
11.7
-
18.0
V
0.1V step
Regulation Voltage
AVDD_R
15.444
15.6
15.756
V
27h, 1%, 0 < Ta < 50℃
Hi-Side Leakage Current
ILK_SWH
-
0
10
uA
SWI=18V, SW=0V
RON_SWH
-
100
200
mΩ
ISW=-500mA
ILK_SWL
-
0
10
uA
SW=18V
RON_SWL
-
100
200
mΩ
ISW=500mA
Load SW ON-Resistance
RON_LS
-
100
200
mΩ
ILS=500mA
SW Current Limit
ILIM_SW
4.25
5
5.75
A
5.0A – Offset(0.0A) setting
L=6.8uH, 0 < Ta < 50℃
SW Current Limit Offset
ILIM_SET
0
-
2.8
A
0.4A step
18
19.5
21
V
-
18
-
V
-
AVDD
x 0.8
-
V
10
-
20
msec
Pull-Down Resistance
SDA, ISDA=3mA
EN, A0, CTRL
【 BOOST CONVERTER (AVDD) 】
Output Voltage Range
Hi-Side SW ON-Resistance
Lo-Side SW Leakage Current
Lo-Side SW ON-Resistance
Over-Voltage Protection Rise
Over-Voltage Protection Fall
AVDD UVP Detecting Voltage
Soft Start Time
VOVP_AVD
D_RISE
VOVP_AVD
D_FALL
VUVP_
AVDD
TSS_
AVDD
Load Switch Current Limit
ILIM_LSW
-
7
-
A
External Load Switch
Current Limit
ILIM_EXT
450
540
630
mV
PGATE Drive Capability
PGATE_
DRV
-
10
-
uA
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
8/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Electrical Characteristics
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V)
Limits
Parameter
Symbol
MIN
TYP
MAX
Unit
Condition
【 BUCK CONVERTER 1 (VIO) 】
Output Voltage Range
Regulation Voltage
Hi-Side SWB1 Leak Current
Hi-Side SWB1 ON-Resistance
SWB1 Current Limit
VIO Over-Voltage Protection
VIO UVP Detecting Voltage
Soft Start Time
VIO
2.2
-
3.7
V
0.1V step
VIO_R
3.234
3.3
3.366
V
0Bh, 2%, 0 < Ta < 50℃
-
0
10
uA
VINB1=18V, SWB1=0V
-
200
300
mΩ
SWB1=-500mA
2.8
3.5
4.2
A
VIO
x 1.03
VIO
x 1.1
VIO
x 0.8
VIO
x 1.17
V
-
V
-
3.3
-
msec
0.396
0.400
0.404
V
1%, Ta=25℃
0.394
0.400
0.406
V
1.5%, 0 < Ta < 50℃
-
0
10
uA
VINB2=18V, SWB2=0V
-
175
300
mΩ
SWB2=-500mA
-
0
10
uA
SWB2=18V
-
175
300
mΩ
SWB2=500mA
2.4
3.0
3.6
A
VCORE
x 1.03
VCORE
x 1.1
VCORE
x 0.8
VCORE
x 1.17
V
-
V
-
3
-
msec
HAVDD
4.8
-
11.1
V
0.1V step
HAVDD_R
7.68
7.8
7.92
V
1Eh, 1.5%, 0 < Ta < 50℃
-
0
10
uA
VINB3=18V, SWB3=0V
-
300
500
mΩ
SWB3=-500mA
-
0
10
uA
SWB3=18V
-
300
500
mΩ
SWB3=500mA
1.2
1.8
2.4
A
HAVDD
x 1.03
HAVDD
x 1.1
HAVDD
x 0.8
HAVDD
x 1.17
V
-
V
ILK_
SWB1H
RON_
SWB1H
ILIM_
SWB1
VOVP_
VIO
VUVP_
VIO
TSS_VIO
-
L=6.8uH, 0 < Ta < 50℃
Frequency 1/4
VIO=3.3V
【 BUCK CONVERTER 2 (VCORE) 】
VCORE Reference Voltage
Hi-Side SWB2 Leak Current
Hi-Side SWB2 ON-Resistance
Lo-Side SWB2 Leak Current
Lo-Side SWB2 ON-Resistance
SWB2 Current Limit
VCORE Over-Voltage
Protection
VCORE UVP Detecting Voltage
Soft Start Time
VCORE_
REF
ILK_
SWB2H
RON_
SWB2H
ILK_
SWB2L
RON_
SWB2L
ILIM_
SWB2
VOVP_
VCORE
VUVP_
VCORE
TSS_
VCORE
-
L=6.8uH, 0 < Ta < 50℃
Frequency 1/4
【 BUCK CONVERTER 3 (HAVDD) 】
Output Voltage Range
Regulation Voltage
Hi-Side SWB3 Leak Current
Hi-Side SWB3 ON-Resistance
Lo-Side SWB3 Leak Current
Lo-Side SWB3 ON-Resistance
SWB3 Current Limit
HAVDD Over-Voltage
Protection
HAVDD UVP Detecting Voltage
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
ILK_
SWB3H
RON_
SWB3H
ILK_
SWB3L
RON_
SWB3L
ILIM_
SWB3
VOVP_
HAVDD
VUVP_
HAVDD
-
9/49
L=6.8uH, 0 < Ta < 50℃
Frequency 1/4
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Electrical Characteristics
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V)
Limits
Parameter
Symbol
MIN
TYP
MAX
Unit
Condition
【 VGH REGULATOR 】
Output Voltage Range
Regulation Voltage
Over-Current Protection
VGH Over-Voltage Protection
VGH UVP Detecting Voltage
Soft Start Time
VGH
25
-
40.5
V
0.5V step
VGH_R
34.47
35
35.53
V
14h, 1.5%, 0 < Ta < 50℃
Io=5mA
ILIM_
DRVP
VOVP_
VGH
VUVP_
VGH
5
-
-
mA
42
45
48
V
-
VGH
x 0.8
-
V
TSS_VGH
-
7
-
msec
VGH=35V
VGL
-10.2
-
-4.0
V
0.2V step
VGL_R
-6.09
-6
-5.91
V
-6.12
-6
-5.88
V
5
-
-
mA
-
VGL×0.8
-
V
-
2.5
-
msec
【 VGL REGULATOR 】
Output Voltage Range
Regulation Voltage
Over-Current Protection
VGL UVP Detecting Voltage
Delay Time
ILIM_
DRVN
VUVP_
VGL
TDLY_VGL
0Ah, 1.5%, Ta=25℃
Io=5mA
0Ah, 2.0%, 0 < Ta < 50℃
Io=5mA
【 GATE PULSE MODULATION (GPM) 】
VGH-VGHM ON-Resistance
RGHH
-
3
5
Ω
RE-VGHM ON-Resistance
RGHL
-
3
-
Ω
Propagation Delay
TGPM
150
250
350
nsec
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
10/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Electrical Characteristics
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V)
Limits
Parameter
Symbol
MIN
TYP
MAX
Unit
Condition
【 HIGH VOLTAGE LDO 】
LDO
11.7
－
18.0
V
0.1V step
LDO_R
15.12
15.2
15.28
V
23h, 0.5%
LDO_R
15.09
15.2
15.31
V
23h, 0.7%, 0 < Ta < 50℃
ILIM_
LDO
-
100
-
mA
LDO_UVP
-
LDOx0.8
-
V
VCOM_R
HVLDO
X0.36
－
HVLDO
X0.54
V
SR
-
30
-
V/usec
I_VCOM
-
±200
-
mA
C2h
Load Stability
ΔVO1
-
±15
-
mV
Io=-50mA～50mA
DAC Resolution
RES1
Output Voltage Range
Regulation Voltage
Over-Current Protection
HVLDO UVP Detecting Voltage
【 VCOM AMPLIFIER 】
Output Voltage Range
Slew Rate
Output Current Capability
8
No external components
Bit
DAC Integral Non-linearity Error
(INL)
LE1
-1
-
+1
LSB
DAC Differential Non-linearity
Error (DNL)
DLE1
-1
-
+1
LSB
Output Current Capability
I_AMP
30
-
-
mA
Load Stability
ΔVO2
-
±15
-
mV
DAC Resolution
RES2
02～FD is the allowable margin
of error against the ideal linear.
02～FD is the allowable margin
of error against the ideal
increase of 1LSB.
【 GAMMA AMPLIFIER 】
10
Io=-5mA～5mA
Bit
DAC Integral Non-linearity Error
(INL)
LE2
-2
-
+2
LSB
DAC Differential Non-linearity
Error (DNL)
DLE2
-2
-
+2
LSB
00F ～ 3F0 is the allowable
margin of error against the ideal
linear.
00F ～ 3F0 is the allowable
margin of error against the ideal
increase of 1LSB.
○This product has no designed for protection against radioactive rays.
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
11/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
1500
8
Internal Oscillatior Freqency : FOSC [kHz]
7
Input Current : Icc[mA]
6
5
4
3
EN=L
No Switching
2
1
1400
1300
1200
AVDD,VIO Frequency
1100
1000
900
800
700
VCORE,HAVDD Frequency
600
500
0
5
6
7
8
9
10
11
12
13
14
5
15
6
7
8
9
10
11
12
13
14
Input Voltage : VIN [V]
Input Voltage : VIN [V]
Figure 5. Input Current vs Input Voltage
(EN=L, no switching)
Figure 6. Internal Oscillator Frequency vs Input Voltage
Figure 7. Power-on (till AVDD and VGH on)
Figure 8. Power-on (after AVDD on)
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
15
12/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
3
100
90
2
70
Output Voltage [%]
Efficiency [%]
80
60
50
40
VIN=12V
VIO=3.3V
30
1
0
-1
VIN=12V
VIO=3.3V
20
-2
10
-3
0
0
200
400
600
800
1000
1200
1400
0
200
400
600
800
1000
Output Current [mA]
Output Current [mA]
Figure 9. VIO Efficiency vs Output Current
Figure 10. VIO Output Voltage vs Output Current
VIO (10mV/Div AC)
VIO (100mV/Div AC)
ΔV：6.3mV
SWB1 (10V/Div)
ISWB1 (500mA/Div)
IOUT=500mA
IOUT=100mA
IOUT (500mA/Div)
IOUT (500mA/Div)
1usec/Div
50usec/Div
Figure 11. VIO Load Transient
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Figure 12. VIO Switching
(Output Current=500mA)
13/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
3
100
90
2
70
Output Voltage [%]
Efficiency [%]
80
60
50
40
VIN=12V
VCORE=1.2V
30
1
0
-1
VIN=12V
VCORE=1.2V
20
-2
10
-3
0
0
200
400
600
800 1000
Output Current [mA]
1200
0
1400
Figure 13. VCORE Efficiency vs Output Current
200
400
600
Output Current [mA]
800
1000
Figure 14. VCORE Output Voltage vs Output Current
VCORE (10mV/Div AC)
VCORE (100mV/Div AC)
ΔV：6.4mV
SWB2 (10V/Div )
I OUT =300mA
I SWB2 (500mA/Div )
I OUT =10mA
I OUT (500mA/Div )
I OUT (200mA/Div )
50usec/Div
1usec/Div
Figure 15. VCORE Load Transient
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Figure 16. VCORE Switching
(Output Current=500mA)
14/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
100
3
90
2
70
Output Voltage [%]
Efficiency [%]
80
60
50
40
VIN=12V
AVDD=15.6V
HAVDD=7.8V
(source)
30
20
1
0
-1
VIN=12V
AVDD=15.6V
HAVDD=7.8V
（source)
-2
10
0
-3
0
200
400
600
800 1000
Output Current [mA]
1200
1400
Figure 17. HAVDD Efficiency vs Output Current (source)
0
200
400
600
800
Output Current [mA]
1000
Figure 18. HAVDD Output Voltage vs Output Current (source)
HAVDD (10mV/Div AC)
HAVDD (100mV/Div AC)
ΔV：6.8mV
SWB3 (10V/Div)
IOUT=350mA
ISWB3 (500mA/Div)
IOUT=0mA
IOUT (500mA/Div)
IOUT (300mA/Div)
1usec/Div
200usec/Div
Figure 19. HAVDD Load Transient (source)
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Figure 20. HAVDD Switching (source)
(Output Current=500mA)
15/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
3
100
90
2
70
Output Voltage [%]
Efficiency [%]
80
60
50
40
VIN=12V
AVDD=15.6V
HAVDD=7.8V
(sink)
30
20
1
0
-1
VIN=12V
AVDD=15.6V
HAVDD=7.8V
（sink)
-2
10
0
-3
0
200
400
600
800 1000
Output Current [mA]
1200
1400
0
Figure 21. HAVDD Efficiency vs Output Current (sink)
200
400
600
800
Output Currnet [mA]
1000
Figure 22. HAVDD Output Voltage vs Output Current (sink)
HAVDD (10mV/Div AC)
ΔV：9.4mV
HAVDD (100mV/Div AC)
SWB3 (10V/Div)
ISWB3 (500mA/Div)
IOUT (300mA/Div)
IOUT=0mA
IOUT=350mA
IOUT (500mA/Div)
1usec/Div
200usec/Div
Figure 23. HAVDD Load Transient (sink)
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Figure 24. HAVDD Switching (sink)
(Output Current=500mA)
16/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
100
3
90
2
70
Output Voltage [%]
Efficiency [%]
80
60
50
40
VIN=12V
AVDD=15.6V
30
1
0
-1
VIN=12V
AVDD=15.6V
20
-2
10
0
-3
0
200
400
600
800 1000
Output Current [mA]
1200
1400
0
Figure 25. AVDD Efficiency vs Output Current
200
400
600
Output Current [mA]
800
1000
Figure 26. AVDD Output Voltage vs Output Current
AVDD (10mV/Div AC)
AVDD (200mV/Div AC)
SW (10V/Div )
ΔV：18.0mV
I OUT =500mA
I SW (1A/Div )
I OUT =100mA
I OUT (500mA/Div )
I OUT (500mA/Div )
50usec/Div
1usec/Div
Figure 27. AVDD Load Transient
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Figure 28. AVDD Switching
(Output Current=500mA)
17/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
3
VGH (200mV/Div AC)
I OUT =50mA
I OUT =10mA
Output Voltage [%]
2
1
0
-1
VIN=12V
AVDD=15.6V
VGH=35V
I OUT (50mA/Div )
-2
-3
200usec/Div
10
Figure 29. VGH Load Transient
30
50
70
90
110
Output Current [mA]
130
150
Figure 30. VGH Output Voltage vs Output Current
VGH (20mV/Div AC)
ΔV：38.7mV
SW (10V/Div )
I OUT =50mA
I OUT (50mA/Div )
5usec/Div
Figure 31. VGH Ripple Voltage
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
18/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
3
2
I OUT =50mA
I OUT =10mA
Output Voltage [%]
VGL (100mV/Div AC)
1
0
-1
VIN=12V
VGL=-6.0V
I OUT (50mA/Div )
-2
-3
200usec/Div
10
Figure 32. VGL Load Transient
30
50
70
90
110
Output Current [mA]
130
150
Figure 33. VGL Output Voltage vs Output Current
ΔV：28.2mV
SWB1 (10V/Div )
I OUT =50mA
I OUT (50mA/Div )
5usec/Div
Figure 34. VGL Ripple Voltage
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
19/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
CTRL (5V/Div)
CTRL (5V/Div)
VGHM (5V/Div)
VGHM (5V/Div)
Delay=255nsec
Delay=270nsec
VGH=28V
No Capacitive Load
RE Resister=0Ω
VGH=28V
No Capacitive Load
RE Resister=0Ω
500nsec/Div
500nsec/Div
Figure 35. GPM Propagation Delay (rise)
Figure 36. GPM Propagation Delay (fall)
CTRL (5V/Div )
Clamp Voltage 20V
VGHM (10V/Div )
500usec/Div
Figure 37. GPM Clamp Voltage (20V Clamp)
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
20/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
3
CTRL (5V/Div)
2
Output Voltage [%]
VGHM (5V/Div)
1
Delay=255nsec
0
-1
VIN=12V
VGH=28V
NoAVDD=15.6V
Capacitive Load
RE Resister=0Ω
-2
HVLDO=15.2V
-3
0
20
40
60
Output Current [mA]
500nsec/Div
80
100
3
3
2
2
Output Voltage [%]
Output Voltage [%]
Figure 38. HVLDO Output Voltage vs Output Current
1
0
-1
VIN=12V
AVDD=15.6V
HVLDO=15.2V
VCOM=6.1V
-2
1
0
-1
VIN=12V
AVDD=15.6V
HVLDO=15.2V
GAMMA=7.8V
-2
-3
-3
-200 -150 -100
-50
0
50 100
Output Current [mA]
150
200
-20
Figure 39. VCOM Output Voltage vs Output Current
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
-15
-10
-5
0
5
10
Output Current [mA]
15
20
Figure 40. GAMMA Output Voltage vs Output Current
21/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
VCOM (5V/Div )
VCOM (5V/Div )
S/R = 43.6V/us
S/R = 43.3V/us
100nsec/Div
100nsec/Div
Figure 42. VCOM Slew Rate（Fall）
1
1
0.5
0.5
INL [LSB]
DNL [LSB]
Figure 41. VCOM Slew Rate（Rise）
0
000h
0FFh
0
000h
-0.5
-0.5
-1
-1
BIT
BIT
Figure 43. VCOM DNL vs BIT
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
0FFh
Figure 44. VCOM INL vs BIT
22/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
2
2
1
1
INL [LSB]
DNL [LSB]
Typical Performance Curves
(Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB2,VINB3=12V, VIO=3.3V, VCORE=1.2V,
AVDD=15.6V, HAVDD=7.8V, VGH=35V, VGL=-6.0V, HVLDO=15.2V, VCOM=6.1V, GAMMA=7.8V, RL=no load)
0
000h
3FFh
0
000h
-1
-1
-2
-2
BIT
BIT
Figure 45. GAMMA DNL vs BIT
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
3FFh
Figure 46. GAMMA INL vs BIT
23/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Timing Chart
ON and OFF Sequence of this IC are shown below.
VIN_
UVLO
VIN_
UVLO
VIN
VL
VL_
UVLO
TEAR
VCORE
TSS_VCORE / 3.0ms
EEPROM
Auto Read
TSS_VIO / 3.3ms
VIO
VGL
VGL
DELAY
(internal)
TDLY_VGL / 2.5ms
EN
TSS_AVDD
TSS_LSW / 10ms
AVDD
HAVDD
Load Swith ON
TSS_VGH / 7ms
VGH
CTRL
VGHM
VGHM = RE
VGHM = VGH
Figure 47. Timing Chart
VL activates with UVLO release of VIN.
It reads EEPROM data by Auto Read operation after VL finish its activation.
(TEAR=2msec)
After Auto Read completion, VCORE activates. The Soft Start time of VCORE is 3msec.
After VCORE soft-start completion, VIO activates. The Soft Start time of VIO is 3.3msec if the setting is 3.3V.
After VIO soft-start completion, PG becomes high and VGL activates. (If SWB1 is used)
The Soft Start time of VGL depends on output voltage setting, external capacitor etc.
2.5msec after VIO soft-start completion, Load SW turns ON (10msec) because of EN=High and AVDD activates.
The Soft Start time of AVDD can be changed by register setting. (10msec or 20msec)
After AVDD started, VGH activates. The Soft Start time of VGH is 7msec if the setting is 35V.
After VGH started, CTRL rising or falling will be a trigger to activate GPM operation.
When VGHM voltage at CTRL =L reaches the GPM clamp voltage, VGHM output is high impedance.
GPM, VGH, AVDD, HAVDD shuts down when EN=Low. GPM output (VGHM) will be the same potential with RE.
All output shuts down when UVLO of VIN is detected. VGHM will be the same potential with VGH.
AVDD
HVLDO, HAVDD and VCOM starts up followed by
AVDD output voltage. AMP 1 to 4 startup followed by
HVLDO output voltage.
HVLDO
HAVDD
When EN=low, AVDD and HAVDD output become
high impedance. HVLDO, VCOM and AMP1 to 4
output shut down followed by AVDD till AVDD is
below a certain level.
VCOM
AMP1-4
EN
Figure 48. Timing Chart 2
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
24/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Example Application
（TOP VIEW）
SW
SW
CFP4
RFP2 CFP2
VGH
CFP3
CFP1 RFP1
AVDD
QP
DFP2
C28
DFP1
RQP
RQN
VIN
HAVDD
QN
L35
C35
CFN2
C31
CFN1 RFN1
VGL
DRVP
DRVN
VGH
RE
SWB1
DFN1
VGHM
N.C.
VINB3
SWB3
VDD3
PGND2
C39
PGND3
EN
R30
VGL
PGATE
C25
L39
VCORE
R39_2 R39_1
SWB2
AVDDS
VDD2
SWO
AVDD
C39_0
C22
VINB2
SWI
VINB1
SW
VINB1
SW
C40
VIN
BM81004MUV
C41
C19
L19
N.C.
PGND
SWB1
PGND
C16
D45
L3
VL
AMPGND
COMP
AMP4
AGND
AMP3
CTRL
C15
SWB1
C3
R15
VIO
INN
VCOM
HVCC
HVLDO
AVIN
A0
SCL
SDA
PG
VDD1
C52
C9
C11
VIN
AMP1
C53
AMP2
C54
AVDD
C10
C51
C8
Figure 49. Example Application
Application circuit components list
Parts
name
Value
Company
Parts Number
Parts
name
Value
Company
Parts Number
C3
4x 10 [uF]
MURATA
GRM21BB31A106KE18
C40
10 [uF]
MURATA
GRM31CB31E106KA75
C8
1 [uF]
MURATA
GRM188B31E105KA75
C41
2x 10 [uF]
MURATA
GRM31CB31E106KA75
C9
10 [uF]
MURATA
GRM31CB31E106KA75
C51-54
0.1 [uF]
MURATA
GRM188B31H104KA92
C10
10 [uF]
MURATA
GRM31CB31E106KA75
R15
2.7 [kΩ]
ROHM
MCR03
C11
10 [uF]
MURATA
GRM31CB31E106KA75
R30
300 [Ω]
ROHM
MCR25
C15
6.8 [nF]
MURATA
GRM188B11E682KA01
R39_1
330 [Ω]
ROHM
MCR03
C16
1 [uF]
MURATA
GRM188CB31E105KA75
R39_2
120 [Ω]
ROHM
MCR03
C19
2x 10 [uF]
MURATA
GRM31CB31E106KA75
RFN1
2.2 [Ω]
ROHM
MCR25
C22
4x 10 [uF]
MURATA
GRM31CB31E106KA75
RFP1-2
2.2 [Ω]
ROHM
MCR25
C25
4.7 [uF]
MURATA
GRM219B31C475KE15
RQN
100 [kΩ]
ROHM
MCR03
CFN1
0.1 [uF]
MURATA
GRM188B31H104KA92
RQP
100 [kΩ]
ROHM
MCR03
CFN2
470 [pF]
MURATA
GRM188B11H471KA01
L19
6.8 [uH]
TAIYO YUDEN
NS10165T6R8N
CFP1
0.1 [uF]
MURATA
GRM188B31H104KA92
L3
6.8 [uH]
TAIYO YUDEN
NRS8040T6R8M
CPF2
0.1 [uF]
MURATA
GRM188B31H104KA92
L35
6.8 [uH]
TAIYO YUDEN
NRS8040T6R8M
CPF3
1 [uF]
MURATA
GRM21BB31H105KA12
L39
6.8 [uH]
TAIYO YUDEN
NRS8040T6R8M
CFP4
2.2 [nF]
MURATA
GRM188B11H222KA01
D45
-
ROHM
RSX301L-30
C28
10 [uF]
MURATA
GRM31CB31H106KA12
DFN1
-
ROHM
RB558W
C31
10 [uF]
MURATA
GRM31CB31E106KA75
DFP1
-
ROHM
RB558W
C35
2x 10 [uF]
MURATA
GRM31CB31E106KA75
DFP2
-
ROHM
RB558W
C39
4x 10 [uF]
MURATA
GRM21BB31A106KE18
QN
PNP
ROHM
2SCR513P
C39_0
22 [nF]
MURATA
GRM188B31H104KA92
QP
NPN
ROHM
2SAR513P
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
25/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
Protection function explanation of each block
1.
BUCK CONVERTER BLOCK 1 (VIO)
1-1. Over Voltage Protection (OVP)
OVP function is incorporated to prevent IC or other components from malfunctioning due to rising VIO voltage.
Voltage inputted to VDD1 pin is monitored and if VIO voltage reaches VIO>110% (Typ), it is considered as unusual
condition thus, OVP function is operated. If OVP is detected, switching is stopped until OVP release voltage (100%, Typ)
falls to VIO voltage. After OVP is released, switching is re-started.
1-2. Over Current Protection (OCP)
If excessive load current (SWB1 peak current>3.5A, Typ) is present, it limits current to flow to built–in Power MOS by
controlling Switching.
1-3. Under Voltage Protection (UVP)
Timer-latch type output UVP function is built-in.
When unusual condition (VIO110%(Typ), it is considered as unusual
condition thus, OVP function is operated. If OVP is detected, switching is stopped until OVP release voltage (100%,Typ)
falls to VCORE voltage. After OVP is released, switching is re-started.
2-2. Over Current Protection (OCP)
If excessive load current (SWB2 peak current>3.0A, Typ) is present, it limits current to flow to built–in Power MOS by
controlling Switching.
2-3. Under Voltage Protection (UVP)
Timer-latch type output UVP function is built-in.
When unusual condition (VCORE5mA, Min) is present, It controls source current (Base current of NPN Tr) of DRVN.
3-2. Under Voltage Protection (UVP)
Timer-latch type output UVP function is built in.
When unusual condition is detected (VGL>80%), UVP time counter get started, and if the unusual condition continues up to
10msec (Typ), all output is latched in shutdown condition. Power reset is needed to cancel the latch state and to re-start.
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
26/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002
BM81004MUV
4.
BOOST CONVERTER BLOCK (AVDD)
4-1. Over Voltage Protection (OVP)
OVP function is built in to prevent IC or other components from malfunctioning due to excessive rise in AVDD voltage.
The voltage inputted to SWO pin is being monitored. If the SWO pin voltage becomes 19.5V (Typ), OVP is detected. Once
OVP is detected, switching is stopped. After AVDD voltage falls below OVP detection release voltage 18V (Typ), switching
is restarted.
4-2. Over Current Protection (OCP)
If excessive load current over 5A (Typ) of SW peak current is present, OCP limits current to rush to built-in Power MOS by
controlling its output switching.
4-3. Under Voltage Protection (UVP)
Timer-latch type output UVP function is built in.
When an unusual condition is detected (AVDD110% (Typ), it is considered as
unusual condition thus, OVP function is operated. If OVP is detected, switching is stopped until OVP release voltage (100%,
Typ) falls to HAVDD voltage. After OVP release, switching is re-started.
5-2. Over Current Protection (OCP)
If excessive load current is demanded (SWB3 peak current>1.5A, Typ), it limits current to flow to built–in Power MOS by
controlling Switching.
5-3. Under Voltage Protection (UVP)
Timer-latch type output UVP function is built-in.
When the unusual condition (HAVDD100mA, typ.) is present, It controls source current of HVLDO.
6-2. Under Voltage Protection (UVP)
Timer-latch type output UVP function is built in.
When an unusual condition is detected (HVLDO38V (Typ), it is considered as unusual
condition so that OVP function is operated. If OVP is detected, limit DRVP current until OVP release voltage (35V, Typ) falls
to VGH voltage. After OVP release, switching is re-started.
7-2. Over Current Protection (OCP)
If excessive load current (I_DRVP>5mA, Min) is present, It controls sink current (Base current of PNP Tr ) of DRVP.
7-3. Under Voltage Protection (UVP)
Timer-latch type output UVP function is built-in.
When an unusual condition is detected (VGH110%
Stops switching.
VIO3.5A
Control switching pulse duty to not over current limit.
I_SWB180%
UVP
VIO110%
Stops switching.
VCORE3.0A
Control switching pulse duty to not over current limit.
I_SWB280%
UVP
VCORE5mA
Limit DRVN current.
I_DRVN
