Datasheet
USB Type-C Power Delivery Controller
BM92A21MWV-Z
General Description
Key Specifications
BM92A21 is a USB Type-C Power Delivery (PD)
controller that supports USB Power Delivery using
base-band communication. It is compatible with USB
Type-C Specification and USB Power Delivery
specification.
BM92A21 includes support for the PD policy engine and
be able to operate independently. In addition, this IC has
secondary side error amplifier that support variable
output voltage and it is suitable for PD AC adapter
systems.
VEX Voltage Range:
4.75V to 20V
VBUS Voltage Range:
4.75V to 20V
Power Consumption at Sleep Power: 0.9mW(Typ)
Operating Temperature Range: -30°C to +105°C
Package
W (Typ) x D (Typ) x H (Max)
5.00mm x 5.00mm x 1.00mm
UQFN40V5050A
Features
USB Type-C Specification compatible
USB PD Specification compatible (BMC-PHY)
Power path control using N-channel MOSFET
drivers with back flow prevention
Type-C cable orientation detection
Supports DFP-SOURCE mode
Integrated Secondary side of AC adapter system
PDO1:5V/3A, PDO2:9V/3A, PDO3:12V/3A,
PDO4:15V/3A, PDO5:20V/5A
EC-less Operation (Auto mode)
Applications
Consumer Applications
AC Adaptors, Chargers
Typical Application Circuit
Q2
Q1
VBUS
+
SGND
SGND
SGND
SGND
IFB
GND SGND
SGND
FB
ACDC
Primary
Side
VCCIN
DSCHG
VB
SPDSRC_G1
SPDSRC_SRC
SPDSRC_G2
VEX
LDISCHG_G1
SMDATA
LDISCHG_SRC
VDIV
LDISCHG_G2
VDDIO
R3
CC1
CC1
(Open or CC2)
CC2
SMCLK
VDDIO
GPIO0
VCONN_IN
GPIO1
(Open or 5V Sourece)
Captive cable
with a USB
Type-C plug
or
Type-C
IFB
XCLPOFF1
XCLPOFF2
GPIO
GPIO6
SGND
BM92A21MWV-Z
UQFN40V5050A
GPIO7
VSVR
Receptacle
GPIO5
GPIO4
DBGMODDT
For TEST
For
BC1.2
DCP
VDDIO
D+
D-
CSENSEN
SGND
GND
GND
GND
EPAD
LDO28CAP
LDO15DCAP
XRST
VCCIN
VSTR/ATST2
CSENSEP
IDSEL/ATST1
VCCIN
LDO15ACAP
DBGRSTCK
VCCIN
SGND
GND
SGND
GND
Figure A. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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Contents
Contents ......................................................................................................................................................................................... 2
Notation ......................................................................................................................................................................................... 3
Reference ...................................................................................................................................................................................... 3
1.
Pin Configuration.................................................................................................................................................................. 4
2.
Pin Description ..................................................................................................................................................................... 5
3.
Block Diagram ...................................................................................................................................................................... 7
4.
Electrical Characteristics ...................................................................................................................................................... 8
4.1. Absolute Maximum Ratings ................................................................................................................................................. 8
(Note 4)
4.2. Thermal Resistance
..................................................................................................................................................... 8
4.3. Recommended Operating Conditions .................................................................................................................................. 9
4.4. Internal Memory Cell Characteristics ................................................................................................................................... 9
4.5. Circuit Power Characteristics ............................................................................................................................................... 9
4.6. Digital Pin DC Characteristics ............................................................................................................................................ 10
4.7. Power Supply Management ............................................................................................................................................... 11
4.7.1. Outline ............................................................................................................................................................................ 11
4.7.2. Electrical Characteristics ................................................................................................................................................ 12
4.8. CC_PHY ............................................................................................................................................................................ 13
4.8.1. Outline ............................................................................................................................................................................ 13
4.8.2. Electrical Characteristics ................................................................................................................................................ 14
4.9. Voltage Detection ............................................................................................................................................................... 15
4.9.1. Outline ............................................................................................................................................................................ 15
4.9.2. Electrical Characteristics ................................................................................................................................................ 15
4.10.
VBUS Discharge............................................................................................................................................................. 16
4.10.1.
Outline ........................................................................................................................................................................ 16
4.10.2.
Electrical Characteristics ............................................................................................................................................. 16
4.11.
Power FET Gate Driver (Power Path and Discharge) .................................................................................................... 17
4.11.1.
Outline ........................................................................................................................................................................ 17
4.11.2.
Electrical Characteristics ............................................................................................................................................. 17
4.12.
ACDC Bridge .................................................................................................................................................................. 18
4.12.1.
Outline ........................................................................................................................................................................ 18
4.12.2.
Electrical Characteristics ............................................................................................................................................. 18
4.13.
Power On Sequence ...................................................................................................................................................... 20
4.13.1.
Reset Timing ............................................................................................................................................................... 20
4.14.
Power Off Sequence ...................................................................................................................................................... 20
4.15.
I/O Equivalence Circuit ................................................................................................................................................... 21
5.
Application Example........................................................................................................................................................... 25
5.1. Selection of Components Externally connected ................................................................................................................. 25
6.
Firmware Revision ............................................................................................................................................................. 26
7.
Operational Notes .............................................................................................................................................................. 27
8.
Ordering Information .......................................................................................................................................................... 29
9.
Marking Diagrams .............................................................................................................................................................. 29
10.
Physical Dimension Tape and Reel Information ................................................................................................................. 30
11.
Revision History ................................................................................................................................................................. 31
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Notation
Category
Notation
Description
Unit
V
Volt (Unit of voltage)
A
Ampere (Unit of current)
Ω, Ohm
Ohm (Unit of resistance)
F
Farad (Unit of capacitance)
deg., degree
degree Celsius (Unit of Temperature)
Hz
Hertz (Unit of frequency)
s (lower case)
second (Unit of time)
min
minute (Unit of time)
b, bit
bit (Unit of digital data)
B, byte
1 byte = 8 bits
M, mega-, mebi-
2
M, mega-, million-
10 = 1,000,000
Unit prefix
K, kilo-, kibik, kilo-
20
= 1,048,576
(used with “bit” or “byte”)
6
2
10
= 1,024
3
10 = 1,000
(used with “Ω” or “Hz”)
(used with “bit” or “byte”)
(used with “Ω” or “Hz”)
m, milli-
10
-3
μ, micro-
10
-6
n, nano-
10
-9
p, pico-
10
-12
xxh, xxH
Hexadecimal number.
“x”: any alphanumeric of 0 to 9 or A to F.
xxb
Binary number; “b” may be omitted.
“x”: a number, 0 or 1
“_” is used as a nibble (4-bit) delimiter.
(eg. “0011_0101b” = “35h”)
Address
#xxh
Address in a hexadecimal number.
“x”: any alphanumeric of 0 to 9 or A to F.
Data
bit[n]
n-th single bit in the multi-bit data.
bit[n:m]
Bit range from bit[n] to bit[m].
“H”, High
High level (over VIH or VOH) of logic signal.
“L”, Low
Low level (under VIL or VOL) of logic signal.
“Z”, “Hi-Z”
High impedance state of 3-state signal.
Numeric value
Signal level
Reference
Name
Reference Document
Release Date
Publisher
USB Type-C
“USB Type-C Specification Release 1.1”
3.Apr.2015
USB.org
USB PD
“Power Delivery Specification Revision2.0 Version1.1”
7.May.2015
USB.org
SMBus
“System Management Bus (SMBus) Specification Version 2.0”
3.Aug.2000
System Management
Implementers Forum
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VDIV
VEX
GND
SPDSRC_G2
SPDSRC_SRC
SPDSRC_G1
LDISCHG_G2
LDISCHG_SRC
LDISCHG_G1
Pin Configuration
FB
1.
30
29
28
27
26
25
24
23
22
21
CSENSEN
31
20
SMCLK
CSENSEP
32
19
SMDATA
XCLPOFF1
33
18
VDDIO
XCLPOFF2
34
17
GPIO1
CC1
35
16
GPIO0
VCONN_IN
36
15
DBGMODDT
CC2
37
14
DBGRSTCK
LDO15DCAP
38
13
GPIO7
LDO28CAP
39
12
GPIO6
11
GPIO5
BM92A21MWV-Z
UQFN40V5050A
Top View
(EPAD)
5
6
7
8
9
10
DSCHG
GND
VB
GPIO4
IDSEL/ATST1
4
VSVR
3
VCCIN
2
XRST
1
VSTR/ATST2
40
GND
LDO15ACAP
Figure 1-1 Pin configuration
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2.
Pin Description
Table 2-1 Pin Description
PKG
PIN#
Pin Name
BLOCK
I/O
Type
I
GND
Digital
I/O Level
Description
1
GND
GND
2
VSTR/ATST2
TEST/Debug
IO
Analog
3
IDSEL/ATST1
TEST/Debug
I
Analog
VCCIN
4
XRST
Interface
I
Digital
VCCIN
5
VCCIN
USB-PD
O
Analog
6
VSVR
POWER
I
Power
Analog TEST/ Debug Pin2
SMBus ID (device address)
selection “H”:1Ah, “L”:18h
/Debug Pin1
Digital block Reset
Internal Power supply
(For internal use, need to
connect capacitor to GND
Connect to Ground
7
DSCHG
Interface
IO
Analog
Discharge NMOS Drain
8
GND
GND
I
GND
9
VB
POWER
I
Power
Power Source from VBUS
10
GPIO4
Interface
I
Digital
Mode fixation (Fix: L)
11
GPIO5
Interface
(Note 1)
Digital
NC pin
(Note 1)
Digital
NC pin
(Note 1)
Digital
NC pin
O
Ground
Ground
12
GPIO6
Interface
O
13
GPIO7
Interface
O
14
DBGRSTCK
TEST
IO
Digital
VDDIO
Test for logic
15
DBGMODDT
TEST
IO
Digital
VDDIO
Test for logic
(Note 1)
Digital
VDDIO
NC pin
(Note 1)
Digital
VDDIO
Alert signal
16
GPIO0
Interface
O
17
GPIO1
Interface
O
18
VDDIO
POWER
I
Power
19
SMDATA
Interface
IO
Digital
VDDIO
SMBus Data
20
SMCLK
Interface
I
Digital
VDDIO
SMBus Clock
21
LDISCHG_G1
FET Gate
Control
O
Analog
VEX Discharge
22
LDISCHG_SRC
FET Gate
Control
I
Analog
VEX Discharge
23
LDISCHG_G2
FET Gate
Control
O
Analog
Not used
24
SPDSRC_G1
FET Gate
Control
O
Analog
Power Path FET Gate Control
25
SPDSRC_SRC
FET Gate
Control
I
Analog
Power Path FET BG/SRC
Voltage
26
SPDSRC_G2
FET Gate
Control
O
Analog
Power Path FET Gate Control
Interface Voltage
(Note 1) N-ch Open Drain
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PKG
PIN#
Pin Name
BLOCK
27
GND
GND
I
GND
28
VEX
POWER
I
Power
29
VDIV
ACDC Bridge
O
Analog
VCCIN
Extension Power Input
For phase compensation
30
FB
ACDC Bridge
O
Analog
VCCIN
Error AMP output
31
CSENSEN
ACDC Bridge
I
Analog
VCCIN
32
CSENSEP
ACDC Bridge
I
Analog
VCCIN
33
XCLPOFF1
CCPHY
I
Analog
VCCIN
34
XCLPOFF2
CCPHY
I
Analog
VCCIN
35
CC1
CCPHY
IO
Analog
36
VCONN_IN
CCPHY
I
Analog
37
CC2
CCPHY
IO
Analog
38
LDO15DCAP
POWER
O
Analog
39
LDO28CAP
POWER
O
Analog
40
LDO15ACAP
POWER
O
Analog
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I/O
Type
6/31
Digital
I/O Level
Description
Ground
Current Sense Voltage Input
Negative
Current Sense Voltage Input
Positive
Disable Clamper of CC1(Fix: L)
Disable Clamper of CC2(Fix: L)
Configuration channel 1 for
Type-C
Input power for VCONN
Configuration channel 2 for
Type-C
Internal LDO 1.5V for Digital
Need Capacitor
Internal LDO 2.8V for Analog
Need Capacitor
Internal LDO 1.5V for Analog
Need Capacitor
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BM92A21MWV-Z
3.
Block Diagram
BM92A21 is USB Type-C PD controller for AC adapter applications that supports Type-C DFP port control and USB Power
Delivery using base-band communication. It is compatible with USB Type-C Specification and USB Power Delivery
Specification. And it has ACDC Bridge which is constructed in Error Amplifier (for Fly back AC adapter system) and Current
Sense (for variable OCP function).
LDISCHG_G1
LDISCHG_SRC
LDISCHG_G2
SPDSRC_G1
SPDSRC_SRC
SPDSRC_G2
GND
VEX
VDIV
FB
BM92A21 includes the following functional blocks: Type-C Physical Layer (base-band PHY), BMC encoder / decoder,
USB-PD Protocol engine, a N-ch MOSFET switch driver, OVP and Discharge FET. BM92A21 includes an EEPROM.
CSENSEN
SMCLK
NchFET Switch
Driver
CSENSEP
SMDATA
XCLPOFF1
SMBus
XCLPOFF2
CC1
VCONN_IN
Type-C
Physical Layer
VDDIO
GPIO1
Device Policy
Manager
GPIO0
ACDC
Bridge
BB PD
Physical Layer
DBGMODDT
Protocol
CC2
SPI
I/F
LDO15DCAP
EEPROM
LDO28CAP
DBGRSTCK
GPIO7
GPIO6
Type-C USBPD
GPIO4
VB
GND
DSCHG
VSVR
VCCIN
XRST
IDSEL/ATST1
VSTR/ATST2
GPIO5
GND
LDO15ACAP
Figure 3-1 Block Diagram
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4.
Electrical Characteristics
4.1.
Absolute Maximum Ratings
Table 4-1 Absolute Maximum Ratings
（Ta=25°C）
Parameter
Maximum Supply Voltage1
(VB, VEX, DSCHG, LDISCHG_G1,
LDISCHG _G2, LDISCHG _SRC,
SPDSRC_G1, SPDSRC_SRC,
SPDSRC_G2 )
Maximum Supply Voltage2
(VDDIO, VSVR, DBGRSTCK,
DBGMODDT,
GPIO0, GPIO1, SMDATA, SMCLK, XRST,
VCONN_IN, VSTR/ATST2, IDSEL/ATST1,
VCCIN, GPIO4, GPIO5, GPIO6, GPIO7,
VDIV, FB, CSENSEN,CSENSEP,
XCLPOFF1, XCLPOFF2, CC1,
CC2, LDO28CAP)
Maximum Supply Voltage3
(LDO15DCAP, LDO15ACAP)
Maximum different Voltage
(LDISCHG_G1 - LDISCHG_SRC,
LDISCHG_G2 - LDISCHG_SRC,
SPDSRC_G1 - SPDSRC_SRC,
SPDSRC_G2 - SPDSRC_SRC)
Storage Temperature Range
Symbol
Rating
Unit
Conditions
VIN1
-0.3 to +28
V
(Note 2)
(Note 3)
VIN2
-0.3 to +6.5
V
VIN3
-0.3 to +2.1
V
Vdiff
-0.3 to +6.5
V
Tstg
-55 to +125
°C
(Note 3)
(Note 2)When the DSCHG pin is applied voltage should by way of resistance more than 1kΩ.
(Note 3)The different voltage between S*DRV_G* and S*DRV_SRC is defined “Symbol Vdiff”. S*_DRV_G*=S*_DRV_SRC+6.0V (typ)
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open
circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
4.2.
Thermal Resistance
(Note 4)
Table 4-2 Thermal Resistance
Parameter
Symbol
Thermal Resistance (Typ)
1s
(Note 6)
(Note 7)
2s2p
Unit
UQFN40V5050A
Junction to Ambient
Junction to Top Characterization Parameter
(Note 5)
θJA
125.0
43.0
°C/W
ΨJT
21
14
°C/W
(Note 4)Based on JESD51-2A(Still-Air)
(Note 5)The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 6)Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
(Note 7)Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
4 Layers
Thermal Via(Note 8)
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.6mmt
Top
2 Internal Layers
Pitch
1.20mm
Diameter
Φ0.30mm
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
74.2mm x 74.2mm
70μm
(Note 8) This thermal via connects with the copper pattern of all layers.
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4.3.
Recommended Operating Conditions
Table 4-3 Recommended Operating Conditions
(Ta=25C)
Item
Range
Unit
VB, VEX
4.75 to 20
V
VSVR Voltage
VSVR
-0.1 to 0.1
V
Connect to Ground
VDDIO Voltage
VDDIO
1.7 to 5.5
V
Connect to VCCIN
VCONN_IN Input Voltage
VCONN
4.75 to 5.5
V
Topr
-30 to +105
°C
VB, VEX Voltage
Operating Temperature Range
4.4.
Conditions
Symbol
Internal Memory Cell Characteristics
Table 4-4 Internal Memory Cell Characteristics
(Ta=25C, VB=VEX=4.75 to 20V, VSVR=0V)
Limit
Item
Data rewriting number
Data retention life
(Note 9)
(Note 9)
Unit
Conditions
Min
Typ
Max
1000
-
-
time
Ta≦25°C
100
-
-
time
Ta≦105°C
20
-
-
year
Ta≦25°C
10
-
-
year
Ta≦105°C
(Note 9)Not 100％ TESTED
Caution: Customer is permitted to rewrite EEPROM on BM92A21 only in case of being provided technical support from ROHM.
4.5.
Circuit Power Characteristics
Table 4-5 Common Characteristics
Electrical Characteristics (Ta=25C)
Item
Symbol
Limit
Unit
Conditions
-
mW
VSVR=0V, VB=open,
VEX=5V, VDDIO=VCCIN
-
mW
VSVR=0V, VB=open,
VEX=5V, VDDIO=VCCIN
Min
Typ
Max
PST
-
0.9
POP
-
6
[Circuit Power]
Sleep power
(Note 10)
Standby power
(Note11)
(Note 10) Sleep power: Power consumption at unattached plug.
(Note 11) Standby power: Power consumption at attached plug.
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4.6.
Digital Pin DC Characteristics
Table 4-6 Digital Pin DC Characteristics
Electrical Characteristics (Ta=25C, VSVR=3.3V, VB=open, VEX=open, VDDIO=3.3V)
Item
Symbol
Limit
Min
Typ
Digital characteristics (VDDIO Power:GPIO0, GPIO1, SMDATA, SMCLK)
0.8×
Input "H" level
VIH1
VDDIO
Max
Unit
Comment
Input "L" level
VIL1
-0.3
-
Input leak current
IIC1
-5
0
VDDIO+
0.3
0.2×
VDDIO
5
VOH1
0.7×
VDDIO
-
-
V
Source=1mA
VOL
SMDATA
-
-
0.4
V
Sink=350μA Max
VOL1
-
-
0.3
V
Sink=1mA
Output Voltage when “H”
SMDATA pin "L" level voltage
(SMDATA)
Output Voltage when “L”
(GPIO0, GPIO1)
V
V
μA
Power: VDDIO
Digital characteristics ( VCCIN Power: XRST, GPIO4, GPIO5, GPIO6, GPIO7)
Input "H" level
VIH2
0.8×
VCCIN
-
VCCIN+
0.3
V
Input "L" level
VIL2
-0.3
-
0.2×
VCCIN
V
Input leak current
IIC2
-5
0
5
μA
Power: VCCIN
Output Voltage when “H”
(GPIOs)
VOH2
0.7×
VCCIN
-
-
V
Source=1mA
Output Voltage when “L”
(GPIOs)
VOL2
-
-
0.3
V
Sink=1mA
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4.7.
Power Supply Management
4.7.1.
Outline
BM92A21 has a power selector. It select the lowest power supply voltage from VSVR, VEX, or VB for low power
consumption. Internal Power Supply (VCCIN) gives priority in order of VSVR, VEX, and VB. VCCIN supplied from the
power selector is used to BM92A21 main power source. LDOs (for internal only) are supplied from VCCIN, and output each
internal supply voltage.
Each power supply input have UVLO and OVLO. And POR (power on reset) signal is generated from detection of
LDO28OK, LDO15DOK, LDO15AOK, and VCCIN.
UVLO
/OVLO
signal
UVLO/OVLO
Detection
Power Selector
with regulator
VSVR
VEX
VB
Internal
Power
Supply
VCCIN
POR
signal
POR
LDO28OK
LDO
LDO28CAP
LDO15DOK
LDO
LDO15DCAP
LDO15AOK
LDO
LDO15ACAP
Internal
Power
Supply
VDDIO
detection
signal
VDDIO
DET
5 to 20V
VBUS
0V
VEX
0V
5 to 20V
5V
VSVR
0V
VCCIN
0V
VBUS
VEX
VSVR
Figure 4-1 Power Supply Management Block Diagram and Timing Chart
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4.7.2.
Electrical Characteristics
Table 4-7 Power Supply Management Characteristics
Item
Symbol
Limit
Min
Typ
Max
[Analog characteristics]
Unless otherwise specified
Ta=25°C, GND=0V, CVCCIN=4.7μF(Ceramic ), CLDO28=CLDO15D=CLDO15A =1μF(Ceramic )
Input Analog Pins: VSVR, VEX, VB
UVLO rising threshold voltage 1
VUVLO1H
2.8
UVLO rising threshold voltage 2
VUVLO2H
3.5
UVLO falling threshold voltage
VUVLOL
2.7
OVLO rising threshold voltage
VOVLO5
6.4
OVLO rising threshold voltage
VOVLO20
28
OVLO hysteresis voltage 1
VOV5HYS
240
OVLO hysteresis voltage 2
VOV20HYS
920
Power ON reset threshold voltage
VPOR
2.6
VDDIO detection voltage
VDB
1.7
LDO28CAP output voltage
V28
2.8
LDO15DCAP output voltage
V15D
1.5
LDO15ACAP output voltage
V15A
1.5
-
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Unit
Comment
V
V
V
V
V
mV
mV
V
V
V
V
V
VSVR
VEX, VB
VSVR, VEX, VB
VSVR
VEX, VB
VSVR
VEX, VB
VCCIN
For Dead Battery Operation
No Load, VEX=5V
No Load, VEX=5V
No Load, VEX=5V
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BM92A21MWV-Z
4.8.
CC_PHY
4.8.1.
Outline
CC_PHY has below functions of USB Type-C. (Refer to USB Type-C Spec)
- Defining Port Mode
> DFP Mode Condition
- DFP-to-UFP Attach / Detach Detection
- Plug Orientation / Cable Twist Detection
- USB Type-C VBUS Voltage Detection and Usage
- VCONN (Supply for SOP’) Control
- Base-Band Power Delivery Communication (BBPD communication)
VBUS
MCU
VCONNSW
VCONN_IN
VBUS_MONI
MCU
CC1
BB_PHY
CC2
Receptacle
Control
Logic
XCLPOFF１
CC DET
UFP_CLAMP
Rd
GND
Rd
XCLPOFF2
GND
PORT_CONT
Figure 4-2 CC_PHY Block Diagram
[PORT_CONT]
This block is fixed DFP mode.
(DFP)
Variable current source is connected to CC terminal. These currents of each mode are Default Current, Medium Current
and High Current.
[CC_DET]
CC_DET has functions of “Attach / Detach Detection”, “Plug Orientation / Cable Twist Detection”, “Discovery and detect
extension mode” and “USB Type-C VBUS Current Detection”.
Attach / Detach is detected with monitoring voltage of CC terminal. When the voltage of CC terminal become under a
threshold voltage at DFP, attach is detected. Oppositely, when the voltage of CC terminal become over a threshold
voltage, detach is detected.
Plug orientation and cable twist is detected from the relationship of two CC terminals. Because only one wire is
connected to Rd, the difference between two CC terminals is generated.
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[VBUS_MONI]
UFP detect Attach / Detach by existence of VBUS voltage. VBUSDET detects Attach when VBUS voltage over the
threshold voltage. And it detects Detach when VBUS under the threshold voltage.
[VCONNSW]
VCONNSW is the power switch for VCONN source. It has OCP function.
[BB_PHY]
If Type-C controller supports BBPD, CC terminal can output BBPD communication signal. (Refer to BB_PHY)
4.8.2.
Electrical Characteristics
Table 4-8 CC_PHY Characteristics
Item
Symbol
Limit
Min
Typ
Max
Unit
Comment
[PORT_CONT characteristics]
Unless otherwise specified
Ta=25°C, VEX=5V, VCONN_IN=open, VDDIO=VCCIN, GND=0V, CVCCIN=4.7μF(Ceramic), CLDO28=CLDO15D=CLDO15A
=1μF(Ceramic)
Input Analog Pins: CC1, CC2
Default current
CCPUP1
64
80
96
μA
Medium current
CCPUP2
166
180
194
μA
High current
CCPUP3
304
330
356
μA
Pull down resistor
CCPDN
4.6
5.1
5.6
kΩ
[UFP_CLAMP characteristics]
Unless otherwise specified
Ta=25°C, VEX=5V, VCONN_IN=open, VDDIO=VCCIN, GND=0V, CVCCIN=4.7μF(Ceramic), CLDO28=CLDO15D=CLDO15A
=1μF(Ceramic)
Input Analog Pins: CC1, CC2
CCx terminal input impedance
CCZin
126
kΩ
CCx clamp voltage
CCCLP
0.7
1.3
V
Iin=64 to 356μA
[VBUS MONI]
Unless otherwise specified
Ta=25°C, VEX=5V, VCONN_IN=open, VDDIO=VCCIN, GND=0V, CVCCIN=4.7μF(Ceramic), CLDO28=CLDO15D=CLDO15A
=1μF(Ceramic)
Input Analog Pins: VB
VBUS presence detection level
CCVBDET
3.42
V
[VCONNSW]
Unless otherwise specified
Ta=25°C, VEX=5V, VCONN_IN=5V, VDDIO=VCCIN, GND=0V, CVCCIN=4.7μF(Ceramic), CLDO28=CLDO15D=CLDO15A
=1μF(Ceramic)
Input Analog Pins: CC1, CC2, VCONN_IN
VCONN_IN to CCx resistance
CCVCR
500
mΩ
Overcurrent protection level
CCVCOCP
1.1
A
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4.9.
Voltage Detection
4.9.1.
Outline
VDET Block detects the voltage level of VB. It can detect follow conditions;
-OVP (over voltage protection) detection
-VBUS voltage drop detection
VBUS
+
OVP
detection
+
VBUS voltage drop
detection
-
Variable Reference
Voltage
Figure 4-3 Voltage Detection Block Diagram
4.9.2.
Electrical Characteristics
Table 4-9 Voltage Detection characteristics
Item
Symbol
Limit
Min
Typ
Max
Unit
Comment
[VDET characteristics]
Unless otherwise specified
Ta=25°C, VEX=5V, VCONN_IN=5V, VDDIO=VCCIN, GND=0V, CVCCIN=4.7μF(Ceramic ), CLDO28=CLDO15D=CLDO15A
=1μF(Ceramic ), Vnom=PD negotiation Voltage
Input Analog Pins: VB
Over voltage protection detection
OVP
17
20
23
%
Standard voltage=Vnom
rate
VBUS voltage drop detection rate
VB_DROP
-27
-25
-23
%
Standard voltage=Vnom
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4.10. VBUS Discharge
4.10.1. Outline
NMOS switch is prepared for VBUS discharging.
DSCHG
Discharge
Resistor
Discharge
Control
GND
Figure 4-4 VBUS Discharge Block Diagram
4.10.2. Electrical Characteristics
Table 4-10 VBUS Discharge Characteristics
Item
Symbol
Limit
Min
Typ
Max
Unit
Comment
[Discharge characteristics]
Unless otherwise specified
Ta=25°C, VEX=5V, VCONN_IN=5V, VDDIO=VCCIN, GND=0V, CVCCIN=4.7μF(Ceramic), CLDO28=CLDO15D=CLDO15A
=1μF(Ceramic)
Input Analog Pins: DSCHG
MOSFET Switch ON Resistance
RDSCHG
25
Ω
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4.11. Power FET Gate Driver (Power Path and Discharge)
4.11.1. Outline
OUT
LDISCHG_G2
OUT
IN IN
Charge
pump
IN IN
LDISCHG_SRC
LDISCHG_G1
SPDSRC_G2
OUT
Charge
pump
Charge
pump
OUT
Charge
pump
SPDSRC_G1
SPDSRC_SRC
FET Gate Driver is the NMOS switch driver for power line and discharging switch.
- External Nch-FET gate control: SPDSRC, LDISCHG
Figure 4-5 Power FET Gate Driver Block Diagram
4.11.2. Electrical Characteristics
Table 4-11 Power FET Gate Driver Characteristics
Item
Symbol
Limit
Min
Typ
Max
Unit
Comment
[Discharge characteristics]
Unless otherwise specified
Ta=25°C, VEX=5V, VCONN_IN=5V, VDDIO=VCCIN, GND=0V, CVCCIN=4.7μF(Ceramic), CLDO28=CLDO15D=CLDO15A
=1μF(Ceramic)
Input Analog Pins: SPDSRC_SRC, LDISCHG_SRC=0V
Output Analog Pins: SPDSRC _G1, SPDSRC _G2, LDISCHG_G1, LDISCHG_G2
SPDSRC_G1 – SPDSRC_SRC
FET control voltage between gate
SPDSRC_G2 – SPDSRC_SRC
VGS
6.0
V
and source
LDISCHG_G1 – LDISCHG_SRC
LDISCHG_G2 – LDISCHG_SRC
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4.12.
ACDC Bridge
4.12.1. Outline
ACDC Bridge Block has an error amplifier and current sensing comparator.
To Connector
+
CSENSEP
CSENSEN
To Connector
GND
OCP
(variable)
VCCIN
VEX VB
FB
+
VDIV
-
Figure 4-6 ACDC Bridge Block Diagram
4.12.2. Electrical Characteristics
Table 4-12 ACDC Bridge Characteristics
Item
Symbol
Limit
Min
Typ
Max
Unit
Comment
[Discharge characteristics]
Unless otherwise specified
Ta=25°C, VEX=5V, VCONN_IN=VCCIN, VDDIO=VCCIN, GND=0V, CVCCIN=4.7μF(Ceramic), CLDO28=CLDO15D=CLDO15A
=1μF(Ceramic)
Input Analog Pins: VEX,CSENSEP, CSENCEN
Output Analog Pins: FB, VDIV
(Vnom=PDO setting voltage, Inom=PDO setting current)
PDO voltage setting range
BRDVR
5
20
V
PDO voltage setting step
BRDVS
50
mV
PDO1 setting voltage
VPDO1
5
V
PDO2 setting voltage
VPDO2
9
V
PDO3 setting voltage
VPDO3
12
V
PDO4 setting voltage
VPDO4
15
V
PDO5 setting voltage
VPDO5
20
V
Feedback current threshold voltage
Vnom
Vnom
BRDVTH
Vnom
V
VEX= Rise
(PDO=Vnom)
-2%
+2%
Trans conductance
BRDTC
1
S
ΔIFB/ΔVEX
Maximum feedback current
BRDImax
2
mA
PDO current setting range
BRDIR
0
5
A
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PDO current setting step
PDO1 setting current
PDO2 setting current
PDO3 setting current
PDO4 setting current
PDO5 setting current
(NOTE12)
Current sense detecting rate
(PDO=Inom)
BRDIS
Inom1
Inom2
Inom3
Inom4
Inom5
-
BRDCCS
-
10
3
3
3
3
5
Inom
X1.2
-
mA
A
A
A
A
A
-
A
Inom: Negotiated current
(NOTE12)Minimum BRDCCS value is 1.2A. For example, when PDO is 0.5A, BRDCCS value is not 0.5A×1.2, BRDCCS value is 1.2A.
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4.13.
Power On Sequence
VSVR
0V
5V
VEX
0V
Status
Firmware
download
(max 230ms)
Firmware
download
Shutdown
Normal
operation
Figure 4-6 Power On Sequence
4.13.1. Reset Timing
Please input “L” level more than
100us when need reset.
T1
T2
XRST
SMBus
access
SMBus can operate
SMBus can operate
SMBus can’t operate
Figure 4-7 Reset Timing Chart
Table 4-13 Reset Timing Characteristics
Item
Symbol
Reset Timing
XRST Minimum Pulse
SMBus access Start after XRST
release
4.14.
Limit
Unit
Min
Typ
Max
T1
100
-
-
μs
T2
230
-
-
ms
Comment
Power Off Sequence
4.75V～20V
VEX
Status
0V
Normal
Operation
Shutdown
Figure 4-8 Power Off Sequence
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4.15.
I/O Equivalence Circuit
PIN
No.
5
6
9
28
PIN Name
VCCIN
VSVR
VB
VEX
Equivalent circuit diagram
VB
Pin
VEX
Pin
Power
Selector
VSVR
Pin
VCCIN
Internal
Circuit
Pin
7
DSCHG
Pin
16
17
15
14
GPIO0
GPIO1
DBGMODDT
DBGRSTCK
10
11
12
13
GPIO4
GPIO5
GPIO6
GPIO7
29
VDIV
VCCIN
VDDIO
VCCIN
VDDIO
VDDIO
Pin
GPIO0
GPIO1
DBGMODDT
DBGRSTCK
VCCIN
VCCIN
VCCIN
Pin
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Pin
GPIO4
GPIO5
GPIO6
GPIO7
VCCIN
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PIN
No.
30
PIN Name
Equivalent circuit diagram
FB
VCCIN VCCIN
VCCIN
Pin
18
VDDIO
Pin
32
31
CSENSEP
CSENSEN
I/O Interface
Circuit
VCCIN
Pin
19
21
SMDATA
SMCLK
VDDIO
Pin
32
22
23
24
25
26
LDISCHG_G1
LDISCHG_SRC
LDISCHG_G2
SPDSRC_G1
SPDSRC _SRC
SPDSRC _G2
Pin
Sx_DRV_G1
Sx_DRV_G2
Sx_DRV_SRC
Pin
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PIN
No.
33
34
35
36
37
PIN Name
XCLPOFF1
XCLPOFF2
CC1
VCONN_IN
CC2
Equivalent circuit diagram
Pin
VCONN_IN
Pin
Pin
CC2
CC1
Pin
Pin
XCLPOFF2
XCLPOFF1
4
XRST
VCCIN
VCCIN
Pin
38
40
LDO15DCAP
LDO15ACAP
VCCIN
VCCIN
Pin
Internal
Circuit
39
LDO28CAP
VCCIN
Pin
Internal
Circuit
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PIN
No.
2
PIN Name
Equivalent circuit diagram
VSTR/ATST2
VCCIN
Pin
3
IDSEL/ATST1
VCCIN
Pin
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5.
Application Example
Q2
+
R3
C5
C1
C2
IFB
Q1
C3
SGND
10μF
SGND
SGND
R1
1μF
1kΩ
R2
1μF
ACDC
Primary
Side
SGND
0.01μF
C4
FB
VCCIN
DSCHG
VB
SPDSRC_G1
SPDSRC_SRC
SPDSRC_G2
VEX
LDISCHG_G1
SMDATA
LDISCHG_SRC
VDIV
100
kΩ
LDISCHG_G2
VDDIO
100 100 10 10
kΩ kΩ kΩ kΩ
SGND
R2
C4
GND SGND
R3
VBUS
C3
CC1
CC1
(Open or CC2)
CC2
SMCLK
VDDIO
GPIO0
VCONN_IN
GPIO1
(Open or 5V Sourece)
Captive cable
with a USB
Type-C plug
or
Type-C
IFB
XCLPOFF1
XCLPOFF2
GPIO
GPIO6
SGND
BM92A21MWV-Z
UQFN40V5050A
GPIO7
VSVR
Receptacle
GPIO5
GPIO4
DBGMODDT
For TEST
For
BC1.2
DCP
VDDIO
D+
D-
100 100
kΩ kΩ
100 100 100
kΩ kΩ kΩ
CSENSEN
SGND
GND
GND
GND
EPAD
VCCIN
RCS
SGND
LDO28CAP
XRST
100
kΩ
LDO15ACAP
VSTR/ATST2
VCCIN
CSENSEP
IDSEL/ATST1
VCCIN
LDO15DCAP
DBGRSTCK
CVCCIN
CLDO15A
CLDO28
CLDO15D
GND
SGND
GND
Figure 5-1 Application Example
5.1.
Selection of Components Externally connected
Table 5-1 Selection of Components Externally Connected
Item
(Note 13)
VCCIN Capacitance
(Note 13)
LDO15ACAP Capacitance
(Note 13)
LDO15DCAP Capacitance
(Note 13)
LDO28CAP Capacitance
Q1,Q2
Gate-Source Capacitance
System Phase Compensation
(Note13)
Capacitance 1
System Phase Compensation
(Note13)
Capacitance 2
Capacitance for the VBUS setup
(Note13)
timing
Phase Compensation Capacitance
(Note13)
Current Sensing Resistor
System Phase Compensation
Resistance
Resistance for the VBUS setup
timing
ACDC Feedback Current Limit
Resistor
Symbol
Limit
Unit
Min
Typ
Max
CVCCIN
CLDO15A
CLDO15D
CLDO28
0.60
0.47
0.47
0.47
4.7
1.0
1.0
1.0
10
2.2
2.2
2.2
μF
μF
μF
μF
CQx_gs
470p
-
0.5μ
F
C1
-
-
-
F
C2
-
-
-
F
C3
-
-
-
F
C4
470p
-
0.5μ
F
RCS
-
10
-
mΩ
R1
-
-
-
Ω
R2
-
-
-
Ω
R3
-
-
-
Ω
Comment
Please choose the value
suitable for your ACDC system.
Please choose the value
suitable for your ACDC system.
In the case of R2≠0.
If R2 is 0Ω, please coordinate
C4 so that sum total of C3 and
CQ and C4 is in the limit.
This resistance tolerance
influences OCP detection
accuracy. Please choose the
value that you can permit.
Please choose the value
suitable for your ACDC system.
Please choose the value
suitable for your ACDC system.
Please choose the value
suitable for your ACDC system.
(Note 13) Please set the capacity of the condenser not to be less than the minimum in consideration of temperature properties, DC bias properties.
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6.
Firmware Revision
Firmware Revision
1565h
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7.
Operational Notes
(1) Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting
the power supply, such as mounting an external diode between the power supply and the IC’s power supply pins.
(2) Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital and
analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block. Furthermore,
connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value
when using electrolytic capacitors.
(3) Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
(4) Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected
to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large
currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground
lines must be as short and thick as possible to reduce line impedance.
(5) Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in deterioration of
the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size and copper area to
prevent exceeding the Pd rating.
(6) Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained. The
electrical characteristics are guaranteed under the conditions of each parameter.
(7) Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of
connections.
(8) Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
(9) Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC
to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off
completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static
discharge, ground the IC during assembly and use similar precautions during transport and storage.
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Operational Notes – continued
(10) Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging
the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could
be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge
deposited in between pins during assembly to name a few.
(11) Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely
low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this
way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC.
So unless otherwise specified, unused input pins should be connected to the power supply or ground line.
(12) Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P-N
junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode or
transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual interference
among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to operate, such as
applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be avoided.
Figure xx. Example of monolithic IC structure
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
Parasitic
Elements
Pin B
B
GND
Parasitic
Elements
GND
GND
N Region
close-by
GND
(13) Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and
the decrease in nominal capacitance due to DC bias and others.
(14) Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation(ASO)
(15) Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection circuit
is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in applications
characterized by continuous operation or transitioning of the protection circuit.
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© 2017 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
28/31
TSZ02201-0232AA000560-1-2
31.Mar.2017 Rev.001
BM92A21MWV-Z
8.
Ordering Information
B
M
9
2
A
Part Number
9.
2
1
M W
V
-
Package
MWV:UQFN40V5050A
Z
E2
Manufacturing
Code
Packaging and forming
specification
E2: Embossed tape and reel
Marking Diagrams
UQFN40V5050A (TOP VIEW)
Part Number Marking
M92 A21
LOT Number
1PIN MARK
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© 2017 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
29/31
TSZ02201-0232AA000560-1-2
31.Mar.2017 Rev.001
BM92A21MWV-Z
10. Physical Dimension Tape and Reel Information
Package Name
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© 2017 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
UQFN40V5050A
30/31
TSZ02201-0232AA000560-1-2
31.Mar.2017 Rev.001
BM92A21MWV-Z
11. Revision History
Date
Revision
31.Mar.2017
001
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© 2017 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Changes
New Release
31/31
TSZ02201-0232AA000560-1-2
31.Mar.2017 Rev.001
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
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