Datasheet
Serial EEPROM Series Standard EEPROM
I2C BUS EEPROM (2-Wire)
BR24G1Mxxx-5A Series
General Description
Key Specifications
BR24G1Mxxx-5A Series is a 1 Mbit serial EEPROM of
I2C BUS Interface.
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Features
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All Controls Available by 2 Ports of Serial Clock (SCL)
and Serial Data (SDA)
1.7 V to 5.5 V Wide Limit of Operating Voltage,
Possible 1 MHz Operation
Page Write Mode 256 Byte
Bit Format 128 K x 8 bit
Low Current Consumption
Prevention of Miswriting
➢ WP (Write Protect) Function Added
➢ Prevention of Miswriting at Low Voltage
Noise Filter Built in SCL/SDA Pin
Initial Delivery State FFh
Packages
W (Typ) x D (Typ) x H (Max)
5.0 mm x 6.2 mm x 1.71 mm
4.9 mm x 6.0 mm x 1.65 mm
3.0 mm x 6.4 mm x 1.2 mm
SOP8
SOP-J8
TSSOP-B8
Applications
◼
Write Cycles:
4 Million Times (Ta = 25 °C)
Data Retention:
200 Years (Ta = 55 °C)
Write Cycle Time:
3.5 ms (Max)
Supply Voltage:
1.7 V to 5.5 V
Ambient Operating Temperature: -40 °C to +85 °C
TSSOP-B8
SOP8
Ordinary Electronic Equipment (such as AV
equipment, OA equipment, telecommunication
equipment, home electronic appliances, amusement
equipment, etc.).
Typical Application Circuit
SOP-J8
VCC
*
A0
VCC
A1
WP
A2
SCL
GND
SDA
Figure 2
Microcontroller
0.1 μF
* Connect A1, A2 to VCC or GND.
These pins have pull-down elements inside the IC.
If pins are open, they are the same as when they are connected to GND.
Pin (A0) not used as device address may be set to any of VCC or GND or leave as open.
Figure 1. Typical Application Circuit
〇Product structure : Silicon integrated circuit
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BR24G1Mxxx-5A Series
Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Typical Application Circuit ............................................................................................................................................................... 1
Key Specifications .......................................................................................................................................................................... 1
Packages ........................................................................................................................................................................................ 1
Contents ......................................................................................................................................................................................... 2
Pin Configuration ............................................................................................................................................................................ 3
Pin Description................................................................................................................................................................................ 3
Block Diagram ................................................................................................................................................................................ 3
Absolute Maximum Ratings ............................................................................................................................................................ 4
Thermal Resistance ........................................................................................................................................................................ 4
Operating Conditions ...................................................................................................................................................................... 5
Input/Output Capacitance ............................................................................................................................................................... 5
Input Impedance ............................................................................................................................................................................. 5
Memory Cell Characteristics ........................................................................................................................................................... 5
Electrical Characteristics................................................................................................................................................................. 5
AC Characteristics .......................................................................................................................................................................... 6
AC Characteristics Condition .......................................................................................................................................................... 6
Input/Output Timing ........................................................................................................................................................................ 7
Typical Performance Curves ........................................................................................................................................................... 9
I2C BUS Communication............................................................................................................................................................... 18
Write Command ............................................................................................................................................................................ 19
Read Command............................................................................................................................................................................ 21
Method of Reset ........................................................................................................................................................................... 22
Acknowledge Polling ..................................................................................................................................................................... 22
WP Valid Timing (Write Cancel) .................................................................................................................................................... 23
Command Cancel by Start Condition and Stop Condition ............................................................................................................ 23
Application Examples ................................................................................................................................................................... 24
Caution on Power-Up Conditions.................................................................................................................................................. 26
Low Voltage Malfunction Prevention Function .............................................................................................................................. 26
I/O Equivalence Circuits................................................................................................................................................................ 27
Operational Notes ......................................................................................................................................................................... 28
Ordering Information ..................................................................................................................................................................... 29
Lineup ........................................................................................................................................................................................... 29
Marking Diagrams......................................................................................................................................................................... 30
Physical Dimension and Packing Information ............................................................................................................................... 31
Revision History ............................................................................................................................................................................ 34
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BR24G1Mxxx-5A Series
Pin Configuration
(TOP VIEW)
A0
1
8
VCC
A1
2
7
WP
A2
3
6
SCL
GND
4
5
SDA
Figure 3. Pin Configuration
Pin Description
Pin No.
Pin Name
Input/Output
Descriptions
Don’t
use(Note 1)
1
A0
-
2
A1
Input
Slave address setting(Note 2)
3
A2
Input
Slave address setting(Note 2)
4
GND
-
Reference voltage of all input/output, 0 V
5
SDA
Input/Output
Serial data input / serial data output(Note 3)
6
SCL
Input
Serial clock input
7
WP
Input
Write protect input(Note 4)
8
VCC
-
Connect to the power source
(Note 1) Pin not used as device address may be set to any of VCC or GND or leave as open.
(Note 2) Connect to VCC or GND. There are pull-down elements inside the IC. If pins are open, they are the same as when they are connected to GND.
(Note 3) SDA is NMOS open drain, so it requires a pull-up resistor.
(Note 4) Connect to VCC or GND, or control to ‘HIGH’ level or ‘LOW’ level. There are pull-down elements inside the IC. If this pin is open, this input is recognized
as ‘LOW’.
Block Diagram
A0 1
(Don’t use)
1 Mbit EEPROM Array
8
VCC
7
WP
6
SCL
5
SDA
8 bit
A1
Address
Decoder
2
START
A2
3
Data
Register
Word Address
Register
17 bit
STOP
Control Circuit
ACK
GND
4
High Voltage
Generating Circuit
Supply Voltage
Detection
Figure 4. Block Diagram
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BR24G1Mxxx-5A Series
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Remark
VCC
-0.3 to +6.5
V
-
-0.3 to VCC+1.0
V
Ta = 25 °C
Ta = 25 °C. The maximum value of input
voltage / output voltage is not over than 6.5 V.
When the pulse width is 50 ns or less, the
minimum value of input voltage / output
voltage is -1.0 V.
VESD
-4000 to +4000
V
Ta = 25 °C
IOLMAX
10
mA
Ta = 25 °C
Tjmax
150
°C
-
Tstg
-65 to +150
°C
-
Supply Voltage
Input Voltage / Output Voltage
Electro Static Discharge
(Human Body Model)
Maximum Output Low Current
(SDA)
Maximum Junction Temperature
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 5)
Parameter
Symbol
Thermal Resistance (Typ)
Unit
1s(Note 7)
2s2p(Note 8)
θJA
197.4
109.8
°C/W
ΨJT
21
19
°C/W
SOP8
Junction to Ambient
Junction to Top Characterization
Parameter(Note 6)
SOP-J8
θJA
149.3
76.9
°C/W
Parameter(Note 6)
ΨJT
18
11
°C/W
Junction to Ambient
θJA
251.9
152.1
°C/W
Junction to Top Characterization Parameter(Note 6)
ΨJT
31
20
°C/W
Junction to Ambient
Junction to Top Characterization
TSSOP-B8
(Note 5) Based on JESD51-2A ( Still-Air ).
(Note 6) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface
of the component package.
(Note 7) Using a PCB board based on JESD51-3.
(Note 8) Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
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BR24G1Mxxx-5A Series
Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage
VCC
1.7
-
5.5
V
Ambient Operating Temperature
Ta
-40
-
+85
°C
Bypass Capacitor(Note 9)
C
0.1
-
-
μF
(Note 9) Connect a bypass capacitor between the IC’s VCC and GND pins.
Input/Output Capacitance (Ta = 25 °C, f = 1 MHz)
Parameter
Input/Output Capacitance
(SDA)(Note 10)
Input Capacitance
(SCL, A0, A1, A2, WP)(Note 10)
Symbol
Min
Typ
Max
Unit
Conditions
CI/O
-
-
8
pF
VI/O = GND
CIN
-
-
8
pF
VIN = GND
(Note 10) Not 100 % Tested.
Input Impedance (Unless otherwise specified, Ta = -40 °C to +85 °C, VCC = 1.7 V to 5.5 V)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Input Impedance 1
ZIH
500
-
-
kΩ
0.7VCC ≤ VIN (A1, A2, WP)
Input Impedance 2
ZIL
30
-
-
kΩ
VIN ≤ 0.3VCC (A1, A2, WP)
Memory Cell Characteristics (VCC = 1.7 V to 5.5 V)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Write Cycles(Note 11, 12)
-
4,000,000
-
-
Times
Ta = 25 °C
Data Retention(Note 11)
-
200
-
-
Years
Ta = 55 °C
(Note 11) Not 100 % Tested.
(Note 12) The Write Cycles is defined for unit of 4 data bytes with the same address bits of P0 to WA2.
Electrical Characteristics (Unless otherwise specified, Ta = -40 °C to +85 °C, VCC = 1.7 V to 5.5 V)
Parameter
Symbol
Min
Typ
Max
Unit
VIH
0.7VCC
-
VCC+1.0
V
-
VIL
-0.3(Note 13)
-
+0.3VCC
V
Output Low Voltage 1
VOL1
-
-
0.4
V
Output Low Voltage 2
VOL2
-
-
0.2
V
Input Leakage Current 1
ILI1
-1
-
+1
μA
Input Leakage Current 2
ILI2
-1
-
+1
μA
IOL = 3.2 mA, 2.5 V ≤ VCC ≤ 5.5 V
(SDA)
IOL = 1.0 mA, 1.7 V ≤ VCC < 2.5 V
(SDA)
VIN = 0 V or VCC (A1, A2, WP)
Standby Mode
VIN = 0 V to VCC (A0, SCL)
Output Leakage Current
ILO
-1
-
+1
μA
Supply Current (Write) (Note 14)
ICC1
-
-
3.0
mA
Supply Current (Read) (Note 14)
ICC2
-
-
1.5
mA
Standby Current
ISB
-
-
5.0
μA
Input High Voltage
Input Low Voltage
Conditions
VOUT = 0 V to VCC (SDA)
VCC = 5.5 V, fSCL = 1 MHz,
tWR = 3.5 ms
Byte Write, Page Write
VCC = 5.5 V, fSCL = 1 MHz
Random Read, Current Read,
Sequential Read
VCC = 5.5 V, SDA, SCL = VCC
A1, A2, WP = 0 V
(Note 13) When the pulse width is 50 ns or less, it is -1.0 V.
(Note 14) The average value during operation.
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BR24G1Mxxx-5A Series
AC Characteristics (Unless otherwise specified, Ta = -40 °C to +85 °C, VCC = 1.7 V to 5.5 V)
Parameter
Symbol
Min
Typ
Max
Unit
Clock Frequency
fSCL
-
-
1
MHz
Data Clock High Period
tHIGH
260
-
-
ns
Data Clock Low Period
tLOW
500
-
-
ns
tR
-
-
120
ns
tF1
-
-
120
ns
tF2
-
-
120
ns
Start Condition Hold Time
tHD:STA
250
-
-
ns
Start Condition Setup Time
tSU:STA
200
-
-
ns
Input Data Hold Time
tHD:DAT
0
-
-
ns
Input Data Setup Time
tSU:DAT
50
-
-
ns
tPD
50
-
450
ns
SDA, SCL (input) Rise
SDA, SCL (input) Fall
Time(Note 15)
Time(Note 15)
SDA (output) Fall Time(Note 15)
Output Data Delay Time
Output Data Hold Time
tDH
50
-
-
ns
tSU:STO
250
-
-
ns
Bus Free Time
tBUF
500
-
-
ns
Write Cycle Time
tWR
-
-
3.5
ms
tI
-
-
50
ns
WP Hold Time
tHD:WP
1.0
-
-
μs
WP Setup Time
tSU:WP
0.1
-
-
μs
WP High Period
tHIGH:WP
1.0
-
-
μs
Stop Condition Setup Time
Noise Suppression Time (SCL, SDA)
(Note 15) Not 100 % Tested.
AC Characteristics Condition
Parameter
Symbol
Conditions
Unit
Load Capacitance
CL
100
pF
Input Rise Time
tR
20
ns
tF1
20
ns
VIH
0.8VCC
V
VIL
0.2VCC
V
-
0.3VCC/0.7VCC
V
Input Fall Time
Input Voltage
Input/Output Data Timing Reference Level
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BR24G1Mxxx-5A Series
Input/Output Timing
tR
tHIGH
tF1
70%
30%
SCL
tHD:STA
tSU:DAT
SDA
(input)
tHD:DAT
tLOW
70%
30%
tDH
tPD
tBUF
70%
30%
SDA
(output)
tF2
○Input read at the rise edge of SCL
○Data output in sync with the fall of SCL
Figure 5-(a). Input/Output Timing
SCL
70%
tSU:STA
tSU:STO
tHD:STA
70%
SDA
30%
START condition
STOP condition
Figure 5-(b). Start-Stop Condition Timing
SCL
SDA
D0
ACK
70%
tWR
write data
(n-th address)
STOP condition
START condition
Figure 5-(c). Write Cycle Timing
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BR24G1Mxxx-5A Series
Input/Output Timing - continued
70%
SCL
DATA(n)
DATA(1)
SDA
D0
D1
70%
ACK
ACK
tWR
70%
WP
30%
tSU:WP
tHD:WP
STOP condition
Figure 5-(d). WP Timing at Write Execution
SCL
DATA(n)
DATA(1)
SDA
D1
D0
ACK
ACK
70%
tWR
tHIGH:WP
70%
WP
Figure 5-(e). WP Timing at Write Cancel
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BR24G1Mxxx-5A Series
Typical Performance Curves
6
6
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
5
Input Low Voltage: VIL [V]
Input High Voltage: VIH [V]
5
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
4
SPEC
3
2
4
3
2
1
1
SPEC
0
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
0
6
2
3
4
5
6
Supply Voltage: VCC [V]
Figure 6. Input High Voltage vs Supply Voltage
Figure 7. Input Low Voltage vs Supply Voltage
1.0
1.0
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
0.8
Output Low Voltage 2: VOL2 [V]
Output Low Voltage 1: VOL1 [V]
1
0.6
SPEC
0.4
0.2
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
0.8
0.6
0.4
SPEC
0.2
0.0
0.0
0
1
2
3
4
5
Output Low Current: IOL [mA]
6
Figure 8. Output Low Voltage 1 vs Output Low Current
(VCC = 2.5 V)
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0
1
2
3
4
5
Output Low Current: IOL [mA]
6
Figure 9. Output Low Voltage 2 vs Output Low Current
(VCC = 1.7 V)
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BR24G1Mxxx-5A Series
Typical Performance Curves - continued
1.2
SPEC
1.0
Input Leakage Current 2: ILI2 [µA]
Input Leakage Current 1: ILI1 [µA]
1.2
0.8
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
0.6
0.4
0.2
0.8
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
0.6
0.4
0.2
0.0
0.0
0
1
2
3
4
Input Voltage: VIN [V]
5
0
6
Figure 10. Input Leakage Current 1 vs Input Voltage
(Standby Mode)
1
2
3
4
Input Voltage: VIN [V]
5
6
Figure 11. Input Leakage Current 2 vs Input Voltage
1.2
3.5
SPEC
1.0
0.8
Supply Current (Write): ICC1 [mA]
Output Leakage Current: ILO [µA]
SPEC
1.0
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
0.6
0.4
0.2
SPEC
3.0
2.5
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
2.0
1.5
1.0
0.5
0.0
0.0
0
1
2
3
4
Output Voltage: VOUT [V]
5
6
Figure 12. Output Leakage Current vs Output Voltage
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0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 13. Supply Current (Write) vs Supply Voltage
(fSCL = 1 MHz)
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BR24G1Mxxx-5A Series
Typical Performance Curves - continued
6
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
2.0
SPEC
5
Standby Current: ISB [µA]
Supply Current (Read): ICC2 [mA]
2.5
SPEC
1.5
1.0
0.5
4
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
3
2
1
0.0
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
0
Figure 14. Supply Current (Read) vs Supply Voltage
(fSCL = 1 MHz)
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 15. Standby Current vs Supply Voltage
10.0
300
Data Clock High Period: tHIGH [ns]
Clock Frequency: fSCL [MHz]
SPEC
SPEC
1.0
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
250
200
150
100
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
50
0.1
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 16. Clock Frequency vs Supply Voltage
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0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 17. Data Clock High Period vs Supply Voltage
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BR24G1Mxxx-5A Series
Typical Performance Curves - continued
140
SPEC
500
100
400
300
200
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
100
80
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
60
40
20
0
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
0
Figure 18. Data Clock Low Period vs Supply Voltage
1
2
3
4
5
Supply Voltage: VCC [V]
6
Figure 19. SDA (output) Fall Time vs Supply Voltage
300
250
Start Condition Setup Time: tSU:STA [ns]
Start Condition Hold Time: tHD:STA [ns]
SPEC
120
SDA (OUTPUT) Fall Time: tF2 [ns]
Data Clock Low Period: tLOW [ns]
600
SPEC
250
200
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
150
100
50
0
SPEC
200
150
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
100
50
0
-50
0
1
2
3
4
5
6
Supply Voltage: VCC [V]
Figure 20. Start Condition Hold Time vs Supply Voltage
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0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 21. Start Condition Setup Time vs Supply Voltage
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BR24G1Mxxx-5A Series
Typical Performance Curves - continued
50
Input Data Hold Time: tHD:DAT [ns]
Input Data Hold Time: tHD:DAT [ns]
50
SPEC
0
-50
-100
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
-50
-100
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
-150
-150
0
1
2
3
4
Supply Voltage: VCC [V]
5
0
6
Figure 22. Input Data Hold Time vs Supply Voltage
(SDA ‘LOW’ to ‘HIGH’)
1
2
3
4
5
Supply Voltage: VCC [V]
6
Figure 23. Input Data Hold Time vs Supply Voltage
(SDA ‘HIGH’ to ‘LOW’)
60
60
SPEC
50
40
Input Data Setup Time: tSU:DAT [ns]
Input Data Setup Time: tSU:DAT [ns]
SPEC
0
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
30
20
10
0
SPEC
50
40
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
30
20
10
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 24. Input Data Setup Time vs Supply Voltage
(SDA ‘LOW’ to ‘HIGH’)
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TSZ22111 • 15 • 001
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 25. Input Data Setup Time vs Supply Voltage
(SDA ‘HIGH’ to ‘LOW’)
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Typical Performance Curves - continued
500
500
400
SPEC
Output Data Delay Time: tPD [ns]
Output Data Delay Time: tPD [ns]
SPEC
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
300
200
100
400
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
300
200
100
SPEC
SPEC
0
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
0
Figure 26. Output Data Delay Time vs Supply Voltage
(SDA ‘LOW’ to ‘HIGH’)
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 27. Output Data Delay Time vs Supply Voltage
(SDA ‘HIGH’ to ‘LOW’)
500
500
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
400
Output Data Hold Time: tDH [ns]
Output Data Hold Time: tDH [ns]
1
300
200
100
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
400
300
200
100
SPEC
SPEC
0
0
0
1
2
3
4
5
6
Supply Voltage: VCC [V]
Figure 28. Output Data Hold Time vs Supply Voltage
(SDA ‘LOW’ to ‘HIGH’)
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TSZ22111 • 15 • 001
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 29. Output Data Hold Time vs Supply Voltage
(SDA ‘HIGH’ to ‘LOW’)
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Typical Performance Curves - continued
600
SPEC
250
200
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
150
SPEC
500
Bus Free Time: tBUF [ns]
Stop Condition Setup Time: tSU:STO [ns]
300
100
400
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
300
200
100
50
0
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
0
6
Figure 30. Stop Condition Setup Time vs Supply Voltage
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 31. Bus Free Time vs Supply Voltage
200
4
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
Noise Suppression Time: tI [ns]
SPEC
Write Cycle Time: tWR [ms]
1
3
2
1
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
0
150
100
50
SPEC
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
1
2
3
4
5
6
Supply Voltage: VCC [V]
Figure 32. Write Cycle Time vs Supply Voltage
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0
Figure 33. Noise Suppression Time vs Supply Voltage
(SCL ‘HIGH’)
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Typical Performance Curves - continued
200
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
Noise Suppression Time: tI [ns]
Noise Suppression Time: tI [ns]
200
150
100
50
SPEC
150
100
50
SPEC
0
0
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 34. Noise Suppression Time vs Supply Voltage
(SCL ‘LOW’)
0
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 35. Noise Suppression Time vs Supply Voltage
(SDA ‘HIGH’)
200
1.2
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
SPEC
1.0
WP Hold Time: tHD:WP [µs]
Noise Suppression Time: tI [ns]
1
150
100
50
SPEC
0.8
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
0.6
0.4
0.2
0
0.0
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 36. Noise Suppression Time vs Supply Voltage
(SDA ‘LOW’)
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0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 37. WP Hold Time vs Supply Voltage
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Typical Performance Curves - continued
1.2
0.2
SPEC
WP High Period: tHIGH:WP [µs]
WP Setup Time: tSU:WP [µs]
0.1
0.0
-0.1
-0.2
-0.3
-0.4
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
-0.5
SPEC
1.0
0.8
Ta = -40 °C
Ta = +25 °C
Ta = +85 °C
0.6
0.4
0.2
0.0
-0.6
0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 38. WP Setup Time vs Supply Voltage
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0
1
2
3
4
Supply Voltage: VCC [V]
5
6
Figure 39. WP High Period vs Supply Voltage
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BR24G1Mxxx-5A Series
I2C BUS Communication
1. I2C BUS Data Communication
(1) I2C BUS data communication begins with start condition input, and ends at the stop condition input.
(2) The data is always 8 bit long, and acknowledge is always required after each byte.
(3) I2C BUS data communication with several devices connected to the BUS is possible by connecting with 2
communication lines: serial data (SDA) and serial clock (SCL).
(4) Among the devices, there is a “master” that generates clock and controls communication start and end. The rest is
“slave” which are controlled by an address peculiar to each device. EEPROM is a “slave”.
(5) The device that outputs data to the bus during data communication is called the “transmitter”, and the device that
receives data is called the “receiver”.
SDA
1 to 7
SCL
8
1 to 7
9
8
9
1 to 7
8
9
P
S
START
condition
ADDRESS
R/W
ACK
DATA
ACK
DATA
ACK
STOP
condition
Figure 40. Data Transfer Timing
2. Start Condition (Start Bit Recognition)
(1) Before executing each command, start condition (start bit) that SDA goes down from ‘HIGH’ to ‘LOW’ while SCL is
‘HIGH’ is necessary.
(2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition
is satisfied, any command cannot be executed.
3. Stop Condition (Stop Bit Recognition)
Each command can be ended by a stop condition (stop bit) that SDA goes from ‘LOW’ to ‘HIGH’ while SCL is ‘HIGH’.
4. Acknowledge (ACK) Signal
(1) The acknowledge (ACK) signal is a software rule to indicate whether or not data transfer was performed normally. In
both master and slave communication, the device at the transmitter (sending) side releases the bus after outputting
8-bit data. When a slave address of a write command or a read command is input, microcontroller is the device at
the transmitter side. When data output for a read command, this IC is the device at the transmitter side.
(2) The device on the receiver (receiving) side sets SDA ‘LOW’ during the 9th clock cycle, and outputs an ACK signal
showing that the 8-bit data has been received. When a slave address of a write command or a read command is
input, this IC is the device at the receiver side. When data output for a read command, microcontroller is the device
at the receiver side.
(3) This IC outputs ACK signal ‘LOW’ after recognizing start condition and slave address (8 bit).
(4) Each write operation outputs ACK signal ‘LOW’ every 8-bit data (a word address and write data) reception.
(5) During read operation, this IC outputs 8-bit data (read data) and detects the ACK signal ‘LOW’. When ACK signal is
detected, and no stop condition is sent from the master (microcontroller) side, this IC continues to output data. If the
ACK signal is not detected, this IC stops data transfer, recognizes the stop condition (stop bit), and ends the read
operation. Then this IC is ready for another transmission.
5.
Device Addressing
(1) From the master, input the slave address after the start condition.
(2) The significant 4 bits of slave address are used for recognizing a device type.
The device code of this IC is fixed to ‘1010’.
(3) The next slave addresses (A2 A1 --- device address) are for selecting devices, and multiple devices can be used on
a same bus according to the number of device addresses. It is possible to select and operate only EEPROM that has
matched ‘VCC’ ‘GND’ input conditions of the A1, A2 pin and the ‘HIGH’ ‘LOW’ input conditions of slave address sent
from the master.
P0 is the page select bit.
(4) The least significant bit ( R / W --- READ/ WRITE ) of slave address is used for designating write or read operation,
and is as shown below.
Setting R / W to 0 ------- write (setting 0 to word address setting of random read)
Setting R / W to 1 ------- read
Maximum number of
Connected buses
Slave address
1
0
1
0
A2
A1
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P0 R / W
4
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BR24G1Mxxx-5A Series
Write Command
1. Write
(1) Write commands can be used to write data to EEPROM. Write can be Byte Write or Page Write. When only 1 byte is
to be written, use Byte Write. When 2 or more bytes of continuous data are written, up to 256 bytes can be written
simultaneously by Page Write.
START
SDA
LINE
SLAVE
WRITE
ADDRESS
1st WORD
ADDRESS(n)
WA
15
1 0 1 0 A2 A1 P0
2nd WORD
ADDRESS(n)
WA
8
WA
7
DATA(n)
WA
0
D0
ACK
ACK
R/W ACK
D7
STOP
ACK
Figure 41. Byte Write
START
SDA
LINE
SLAVE
WRITE
ADDRESS
1st WORD
ADDRESS(n)
WA
15
1 0 1 0 A2 A1 P0
2nd WORD
ADDRESS(n)
WA
8
R/W ACK
WA
7
DATA(n)
WA
0
D7
ACK
ACK
DATA(n+255)
D0
ACK
STOP
D0
ACK
Figure 42. Page Write
During write execution, all input commands are ignored, therefore ACK is not returned.
Data is written to the address (n-th address) specified by the page select bit and word address.
By issuing stop bit after 8 bit data input, write to memory cell starts.
When write is started, command is not accepted for tWR (3.5 ms at maximum).
For Page Write, after the address (n-th address) is specified with the page select bit and word address, then 2 bytes
or more data are input in succession, the lower 8 bits of the word address are incremented inside EEPROM, and up
to 256 bytes of data can be written from the specified address (n-th address).
(7) When the data exceeding the maximum number of bytes is sent in Page Write, the data of the first byte is overwritten
in order.
(Refer to " Internal Address Increment").
(8) When VCC is turned off during write execution, data at the designated address is not guaranteed, please write it again.
(2)
(3)
(4)
(5)
(6)
1 page = 256 bytes, but the write time of page write is 3.5 ms at maximum for 256 byte batch write.
It is not equal to 3.5 ms at maximum x 256 byte = 896 ms (Max) .
2. Internal Address Increment During Page Write
WA8 WA7 WA6 WA5 WA4 WA3 WA2 WA1 WA0
0
0
0
FEh
0
0
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
1
1
1
0
0
1
0
0
1
0
Increment
For example, when starting from address FEh, then,
FEh→FFh→00h→01h···.
Please take note that it is incremented.
*FEh···FE in hexadecimal, therefore, 11111110 is a
binary number.
Significant bit is fixed.
No digit up
3. Write Protect (WP) Function
When WP pin is set at VCC (‘HIGH’ level), data rewrite of all addresses is prohibited. When it is set GND (‘LOW’ level),
data rewrite of all address is enabled. Be sure to connect this pin to VCC or GND, or control it to ‘HIGH’ level or ‘LOW’
level. If WP pin is open, this input is recognized as ‘LOW’.
In case of using it as ROM, by connecting it to pull up or VCC, write error can be prevented.
At extremely low voltage at power ON/OFF, by setting the WP pin ‘HIGH’, write error can be prevented.
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Write Command - continued
4. ECC Function
This IC has ECC bits for Error Correction every 4 bytes with the same address bits of P0 to WA2. In read operation, if
error data of 1 bit exists in 4 bytes, this error data is corrected by the ECC function and outputs the correct data. In
write operation, only data of 1 byte is written, 4 bytes of data is written as one group with the same address bits of P0
to WA2 (the data to be written in the remaining 3 bytes is the same as its previous stored data). Therefore, the number
of write cycle times is guaranteed every 4 bytes with the same address bits of P0 to WA2.
Initial Delivery State
Address
Number of Remaining
Write Cycles
00000h
4 Million
Times
00001h
4 Million
Times
00002h
4 Million
Times
00003h
4 Million
Times
00004h
4 Million
Times
00005h
4 Million
Times
···
00003h
3 Million
Times
00004h
4 Million
Times
00005h
4 Million
Times
···
···
After 1 Million Times using Byte Write in Address 00000h
Address
Number of Remaining
Write Cycles
00000h
3 Million
Times
00001h
3 Million
Times
00002h
3 Million
Times
···
Even if only 1 byte of data is to be written in address 00000h,
the addresses 00000h to 00003h are written as one group.
Therefore, the number of write cycle times at addresses 00001h to 00003h decreases.
Figure 43. Example of Data Write and Number of Remaining Write Cycles
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BR24G1Mxxx-5A Series
Read Command
Read commands can be used to read the EEPROM data. Read has a random read and a current read functions. Random
read is commonly used in commands that specify addresses and read data. The current read is a command to read data
of the internal address register without specifying an address. In both read functions, sequential read is possible that the
next address data can be read in succession.
SLAVE
1st WORD
2nd WORD
SLAVE
START ADDRESS WRITE ADDRESS(n) ADDRESS(n) START ADDRESS READ DATA(n)
SDA
LINE
WA
15
1 0 1 0 A2A1P0
0 0
WA
8
WA
7
WA
0
ACK
R/W ACK
ACK
1 0 1 0 A2A1 *
0 0
D7
SDA
LINE
1 0 1 0 A2A1 *
ACK
* Don’t Care bit
DATA(n)
D7
D0
R/W ACK
Figure 44. Random Read
SLAVE
START ADDRESS READ
STOP
STOP
D0
0
ACK
R/W ACK
Figure 45. Current Read
START
SDA
LINE
SLAVE
ADDRESS READ
1 0 1 0 A2 A1 *
0
D7
* Don’t Care bit
DATA(n)
DATA(n+x)
D0
D7
STOP
D0
0
R/W ACK
ACK
Figure 46. Sequential Read (in the Case of Current Read)
ACK
ACK
* Don’t Care bit
(1) In random read, data of designated word address can be read.
(2) When the command just before current read is random read or current read (each including sequential read), If last
read address is (n)-th, data of the incremented address (n + 1)-th is outputted.
(3) When ACK signal ‘LOW’ is detected after D0, and stop condition is not sent from master (microcontroller) side, the
next address data can be read in succession.
(4) Read is ended by stop condition that ‘HIGH’ is input to ACK signal after D0 and SDA signal goes from ‘LOW’ to ‘HIGH’
while at SCL signal is ‘HIGH’.
(5) When ‘LOW’ is input at ACK signal after D0 without ‘HIGH’ input, sequential read gets in, and the next data is outputted.
Therefore, read command cannot be ended. To end read command, be sure to input ‘HIGH’ to ACK signal after D0,
and the stop condition that SDA goes from ‘LOW’ to ‘HIGH’ while SCL signal is ‘HIGH’.
(6) Sequential read is ended by stop condition that ‘HIGH’ is input to ACK signal after arbitrary D0 and SDA goes from
‘LOW’ to ‘HIGH’ while SCL signal is ‘HIGH’.
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BR24G1Mxxx-5A Series
Method of Reset
This IC is equipped with Power-on Reset circuit, which is described later, and is reset at power-up. Also, by continuously input
start condition and stop condition, reset can be done without restarting the power supply. Execute the reset by start condition
and stop condition when it is necessary to reset after power-up, or during command input timing. However, the start condition
and stop condition could not be applied because ‘HIGH’ input of microcontroller and ‘LOW’ output of EEPROM collide when
EEPROM is ‘LOW’ in ACK output section and data reading. In that case, input SCL clock until SDA bus is released (‘HIGH’
by pull-up). After confirming that SDA bus is released, continuously input start condition and stop condition. If SDA bus could
not be confirmed whether released or not in microcontroller, input the software reset. If software reset is run, EEPROM can
be reset without confirming the SDA state because SDA bus is always released in either of the two start conditions. The
method of reset is shown in the table below.
Status of SDA
Method of Reset
SDA bus released
(‘HIGH’ by pull-up)
Continuously input start condition and stop condition.
‘LOW’
Input SCL clock until SDA bus is released. After confirm that SDA bus is released,
continuously input start condition and stop condition.
Microcontroller cannot
confirm SDA bus is
released or not
Using the software reset shown in the figure below, the start condition can be always inputed.
Within the dummy clock input area, the SDA bus is needed to be released. For normal
commands, start with the start condition input.
Dummy clock × 9
Start
1
SCL
2
8
Start Stop
9
Normal command
Normal command
SDA
Figure 47. Input Timing of Software Reset
Acknowledge Polling
During write execution, all input commands are ignored, therefore ACK is not returned. During write execution after write input,
next command (slave address) is sent. If the first ACK signal sends back ‘LOW’, then it means end of write operation, else
‘HIGH’ is returned, which means writing is still in progress. By the use of acknowledge polling, next command can be executed
without waiting for tWR = 3.5 ms.
To write continuously, slave address with R / W = 0, then to carry out current read after write, slave address with R / W = 1
is sent. If ACK signal sends back ‘LOW’, then execute word address input and data output and so forth.
During write execution,
ACK = HIGH is returned.
First write command
START
STOP
START
START
Write Command
Slave
Slave
Address
Address
ACK
= HIGH
tWR
···
ACK
= HIGH
Second write command
START
···
STOP
START
Slave
Slave
Address
Address
tWR
ACK
= HIGH
Word
Data
Address
ACK
= LOW
ACK
= LOW
ACK
= LOW
After completion of write execution, ACK = LOW is returned,
so input next word address and data in succession.
Figure 48. The Case of Continuous Write by Acknowledge Polling
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BR24G1Mxxx-5A Series
WP Valid Timing (Write Cancel)
WP is usually fixed to ‘HIGH’ or ‘LOW’, but when WP is controlled and used for write cancel and so on, pay attention to the
following WP valid timing. Write can be cancelled by setting WP = ‘HIGH’ while it is executed and in WP valid area. In both
byte write and page write, the area from the first start condition of command to the rise of clock which take in D0 of data (in
page write, the first byte data) is the WP invalid area. WP input in this area is ‘Don’t care’. The area from the rise of clock to
take in D0 to the stop condition input is the WP valid area. Furthermore, after the execution of forced end by WP, the IC enters
standby status.
·Rise of SDA
·Rise of D0 taken clock
SCL
SCL
SDA
D1
D0
ACK
SDA
ACK
D0
Enlarged view
Enlarged view
STOP
START
SDA
Slave
Word
Address
Address
ACK
= LOW
D7 D6 D5 D4 D3 D2 D1 D0
ACK
= LOW
ACK
= LOW
tWR
Data
ACK
= LOW
WP Valid Area
WP Invalid Area
WP Invalid Area
If WP = ‘HIGH’ in this area,
data is not written
WP
Figure 49. WP Valid Timing
Command Cancel by Start Condition and Stop Condition
During command input, by continuously inputting start condition and stop condition, command can be cancelled. However,
within ACK output area and during data read, SDA bus may output ‘LOW’. In this case, start condition and stop condition
cannot be inputted, so reset is not available. Therefore, execution of reset is needed referring “Method of Reset”. When
command is cancelled by start-stop condition during random read, sequential read, or current read, internal address setting
is not determined. Therefore, it is not possible to carry out current read in succession. To carry out read in succession, carry
out random read.
SCL
SDA
1
0
1
0
Start
Stop
Condition Condition
Figure 50. The Case of Cancel by Start, Stop Condition during Slave Address Input
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BR24G1Mxxx-5A Series
Application Examples
1.
I/O Peripheral Circuit
(1) Pull-up Resistance of the SDA Pin
SDA is NMOS open drain, so it requires a pull-up resistor. As for this resistor value (RPU), select an appropriate value
from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The smaller
the RPU increases the supply current.
(2) Maximum Value of RPU
The maximum value of RPU is determined by the following factors.
(a) SDA rise time determined by the capacitance (CBUS) of bus line of SDA and RPU should be tR or lower. Furthermore,
AC timing should be satisfied even when SDA rise time is slow.
(b) The bus electric potential A to be determined by input current leak total (IL) of the device connected to bus at output
of ‘HIGH’ to SDA line and RPU should sufficiently secure the input ‘HIGH’ level (VIH) of microcontroller and EEPROM
including recommended noise margin of 0.2VCC.
𝑉𝐶𝐶 − 𝐼𝐿 𝑅𝑃𝑈 − 0.2𝑉𝐶𝐶 ≥ 𝑉𝐼𝐻
∴ 𝑅𝑃𝑈 ≤
IL
0.8𝑉𝐶𝐶 − 𝑉𝐼𝐻
𝐼𝐿
EEPROM
RPU
SDA Pin
A
IL1
E.g.) VCC = 3 V, IL = 10 μA, VIH = 0.7VCC
from (b)
∴ 𝑅𝑃𝑈 ≤
VCC
Microcontroller
CBUS
IL2
0.8 × 3 − 0.7 × 3
10 × 10−6
Figure 51. I/O Circuit Diagram
≤ 30 [kΩ]
(3) Minimum Value of RPU
The minimum value of RPU is determined by the following factors.
(a) When IC outputs ‘LOW’, the bus electric potential A should be equal to or less than output ‘LOW’ level (VOL) of
EEPROM.
𝑉𝐶𝐶 − 𝑉𝑂𝐿
≤ 𝐼𝑂𝐿
𝑅𝑃𝑈
∴ 𝑅𝑃𝑈 ≥
𝑉𝐶𝐶 − 𝑉𝑂𝐿
𝐼𝑂𝐿
E.g.) VCC = 3 V, VOL = 0.4 V, IOL = 3.2 mA, microcontroller, EEPROM VIL = 0.3VCC
∴ 𝑅𝑃𝑈 ≥
3 − 0.4
3.2 × 10−3
≥ 812.5 [Ω]
(4) Pull-up Resistance of the SCL Pin
When SCL control is made at the CMOS output port, there is no need for a pull-up resistor. But when there is a time that
SCL becomes ‘Hi-Z’, add a pull-up resistor. As for the pull-up resistor value, decide with the balance with drive
performance of output port of microcontroller.
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2. Cautions on Microcontroller Connection
(1) RS
In I2C BUS, it is recommended that SDA port is open drain input/output. However, when using CMOS input/output of tri
state to SDA port, insert a series resistance RS between the pull-up resistor RPU and the SDA pin of EEPROM. This is to
control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON
simultaneously. RS also plays the role of protecting the SDA pin against surge. Therefore, even when SDA port is open
drain input/output, RS can be used.
ACK
VCC
SCL
RPU
SDA
RS
‘HIGH’ output of microcontroller
EEPROM
Microcontroller
‘LOW’ output of EEPROM
Over current flows to SDA line by
‘HIGH’ output of microcontroller and ‘LOW’ output of EEPROM.
Figure 52. I/O Circuit Diagram
Figure 53. I/O Collision Timing
(2) Maximum Value of RS
The maximum value of RS is determined by the following relations.
(a) SDA rise time determined by the capacitance (CBUS) of bus line of SDA and RPU should be tR or lower. Furthermore,
AC timing should be satisfied even when SDA rise time is slow.
(b) The bus electric potential A to be determined by RPU and RS when EEPROM outputs ‘LOW’ to SDA bus should
sufficiently secure the input ‘LOW’ level (VIL) of microcontroller including recommended noise margin of 0.1VCC.
VCC
RPU A
RS
VOL
IOL
CBUS
(𝑉𝐶𝐶 − 𝑉𝑂𝐿 ) × 𝑅𝑆
+ 𝑉𝑂𝐿 + 0.1𝑉𝐶𝐶 ≤ 𝑉𝐼𝐿
𝑅𝑃𝑈 + 𝑅𝑆
𝑉𝐼𝐿 − 𝑉𝑂𝐿 − 0.1𝑉𝐶𝐶
∴ 𝑅𝑆 ≤
× 𝑅𝑃𝑈
1.1𝑉𝐶𝐶 − 𝑉𝐼𝐿
E.g.) VCC = 3 V, VIL = 0.3VCC, VOL = 0.4 V, RPU = 20 kΩ
VIL
EEPROM
Microcontroller
𝑅𝑆 ≤
Figure 54. I/O Circuit Diagram
0.3 × 3 − 0.4 − 0.1 × 3
× 20 × 103
1.1 × 3 − 0.3 × 3
≤ 1.67 [kΩ]
(3) Minimum Value of RS
The minimum value of RS is determined by over current at bus collision. When over current flows, noises in power source
line and instantaneous power failure of power source may occur. When allowable over current is defined as I, the
following relation must be satisfied. Determine the allowable current in consideration of the impedance of power source
line in set and so forth.
VCC
RPU
RS
'LOW'
output
𝑉𝐶𝐶
≤𝐼
𝑅𝑆
𝑉𝐶𝐶
∴ 𝑅𝑆 ≥
𝐼
Over current I
E.g.) VCC = 3 V, I = 10 mA
'HIGH'
output
Microcontroller
𝑅𝑆 ≥
EEPROM
≥ 300 [Ω]
Figure 55. I/O Circuit Diagram
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TSZ22111 • 15 • 001
3
10 × 10−3
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Caution on Power-Up Conditions
At power-up, as the VCC rises, the IC’s internal circuits may go through unstable low voltage area, making the IC’s internal
circuit not completely reset, hence, malfunction like miswriting and misreading may occur. To prevent it, this IC is equipped
with Power-on Reset circuit. In order to ensure its operation, at power-up, please observe the conditions below. In addition,
set the power supply rise so that the supply voltage constantly increases from V BOT to VCC level. Furthermore, tINIT is the time
from the power becomes stable to the start of the first command input.
tPOFF
tR:VCC
tINIT
VCC
Command
start
VCC (Min)
VBOT
0V
Figure 56. Rise Waveform Diagram
Power-Up Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage at Power OFF
VBOT
-
-
0.3
V
Power OFF Time(Note 16)
tPOFF
1
-
-
ms
Initialize Time(Note 16)
tINIT
0.1
-
-
ms
tR:VCC
0.001
-
100
ms
Supply Voltage Rising
Time(Note 16)
(Note 16) Not 100 % Tested.
If the above conditions are not followed, the POR circuit does not operate properly, the logic circuit of internal IC is undefined.
At this time, there is a possibility that IC may not be able to input commands because EEPROM may output ‘LOW’ and it
collide with ‘HIGH’ input of microcontroller. However, SDA bus can be released by resetting the IC. Refer to the page
“Method of Reset” for reset details.
Low Voltage Malfunction Prevention Function
LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ = 1.2 V) or below,
data rewrite is prevented.
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BR24G1Mxxx-5A Series
I/O Equivalence Circuits
1. Input (A0)
Don’t use
Figure 57. Input Pin Circuit Diagram (A0)
2. Input (A1, A2, WP)
Pull-down elements
Figure 58. Input Pin Circuit Diagram (A1, A2, WP)
3. Input (SCL)
Figure 59. Input Pin Circuit Diagram (SCL)
4. Input/Output (SDA)
Figure 60. Input/Output Pin Circuit Diagram (SDA)
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BR24G1Mxxx-5A Series
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the operating conditions. The
characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
10. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower
than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply
voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages
within the values specified in the electrical characteristics of this IC.
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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BR24G1Mxxx-5A Series
Ordering Information
B
R
2
4
G
1
M
x
x
x
-
5
A
x
x
BUS Type
24: I2C
Ambient Operating Temperature
/ Supply Voltage
-40 °C to +85 °C
/ 1.7 V to 5.5 V
Capacity
1M = 1 Mbit
Package
F: SOP8
FJ: SOP-J8
FVT: TSSOP-B8
5: Process Code
A: Revision
Packaging and Forming Specification
E2: Embossed tape and reel (SOP8, SOP-J8, TSSOP-B8)
Lineup
Package
Type
Quantity
Orderable Part Number
SOP8
Reel of 2500
BR24G1MF
-5AE2
SOP-J8
Reel of 2500
BR24G1MFJ
-5AE2
TSSOP-B8
Reel of 3000
BR24G1MFVT
-5AE2
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BR24G1Mxxx-5A Series
Marking Diagrams
Part Number Marking
5
LOT Number
Pin 1 Mark
Part Number Marking
5
4 G 1 M A
4 G 1 M A
TSSOP-B8 (TOP VIEW)
SOP8 (TOP VIEW)
LOT Number
Pin 1 Mark
SOP-J8 (TOP VIEW)
4 G 1 M A
Part Number Marking
5
LOT Number
Pin 1 Mark
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BR24G1Mxxx-5A Series
Physical Dimension and Packing Information
Package Name
SOP8
(Max 5.35 (include.BURR))
(UNIT: mm)
PKG: SOP8
Drawing No.: EX112-5001-1
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BR24G1Mxxx-5A Series
Physical Dimension and Packing Information - continued
Package Name
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SOP-J8
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BR24G1Mxxx-5A Series
Physical Dimension and Packing Information - continued
Package Name
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TSSOP-B8
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BR24G1Mxxx-5A Series
Revision History
Date
Revision
24.Sep.2020
001
07.May.2021
002
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© 2018 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
Changes
New Release
P.5 Add Note.14.
Change Supply Current (Read) spec from 2.0 mA to 1.5 mA.
P.11 Figure.14 Change spec from 2.0 mA to 1.5 mA.
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
