Datasheet
Serial EEPROM Series for Automotive EEPROM
125 °C Operation SPI BUS EEPROM
for Automotive
BR25H256xxx-5AC Series
General Description
Key Specifications
BR25H256xxx-5AC Series is a 256 Kbit serial EEPROM of
SPI BUS Interface.
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Features
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AEC-Q100 Qualified(Note 1)
Functional Safety Supportive Automotive Products
SPI BUS Mode (CPOL, CPHA) = (0, 0), (1, 1)
Page Size: 64 Byte
Bit Format: 32768 x 8 bit
64 Byte Write Lockable Identification Page (ID Page)
Address Auto Increment Function at Read Operation
Auto Erase and Auto End Function at Data Rewrite
Write Protect Block Setting by Software
Memory Array 1/4, 1/2, Whole
HOLD Function by the HOLDB Pin
Prevention of Write Mistake
Write Prohibition at Power On
Write Prohibition by the WPB Pin
Write Prohibition Block Setting
Prevention of Write Mistake at Low Voltage
Data at Shipment
Memory Array: FFh
ID Page First 3 Addresses: 2Fh, 00h, 0Fh
Other Addresses: FFh
Status Register WPEN, BP1, BP0: 0, 0, 0
Lock Status
LS: 0
◼
Supply Voltage:
1.7 V to 5.5 V
Ambient Operating Temperature: -40 °C to +125 °C
Clock Frequency:
20 MHz (Max)
Write Time:
3.5 ms (Max)
Write Cycles:
4 Million Times (Ta = 25 °C)
1.2 Million Times (Ta = 85 °C)
0.5 Million Times (Ta = 105 °C)
0.3 Million Times (Ta = 125 °C)
Data Retention:
100 Years (Ta = 25 °C)
60 Years (Ta = 105 °C)
50 Years (Ta = 125 °C)
Packages
SOP8
SOP-J8
TSSOP-B8
MSOP8
VSON008X2030
W (Typ) x D (Typ) x H (Max)
5.0 mm x 6.2 mm x 1.71 mm
4.9 mm x 6.0 mm x 1.65 mm
3.0 mm x 6.4 mm x 1.2 mm
2.9 mm x 4.0 mm x 0.9 mm
2.0 mm x 3.0 mm x 0.6 mm
(Note 1) Grade 1
Applications
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Airbag
ABS
ECU
Typical Application Circuit
SOP8
MSOP8
SOP-J8
VSON008X2030
VCC
0.1 μF
CSB
Microcontroller
TSSOP-B8
VCC
SO HOLDB
WPB
SCK
GND
SI
Microcontroller
Figure 2
Figure 1. Typical Application Circuit
〇Product structure : Silicon integrated circuit
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Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Key Specifications .......................................................................................................................................................................... 1
Packages ........................................................................................................................................................................................ 1
Typical Application Circuit ............................................................................................................................................................... 1
Contents ......................................................................................................................................................................................... 2
Pin Configurations ......................................................................................................................................................................... 3
Pin Description................................................................................................................................................................................ 3
Block Diagram ................................................................................................................................................................................ 3
Absolute Maximum Ratings ............................................................................................................................................................ 4
Thermal Resistance ........................................................................................................................................................................ 4
Operating Conditions ...................................................................................................................................................................... 5
Input/Output Capacitance ............................................................................................................................................................... 5
Memory Cell Characteristics ........................................................................................................................................................... 5
Electrical Characteristics................................................................................................................................................................. 6
AC Characteristics .......................................................................................................................................................................... 7
AC Characteristics Condition .......................................................................................................................................................... 7
Input/Output Timing ........................................................................................................................................................................ 8
Typical Performance Curves ........................................................................................................................................................... 9
Function Explanation .................................................................................................................................................................... 17
Instruction Mode ........................................................................................................................................................................... 20
Timing Chart ................................................................................................................................................................................. 21
At Standby State ........................................................................................................................................................................... 26
Method to cancel each command ................................................................................................................................................. 27
Application Examples ................................................................................................................................................................... 28
I/O Equivalence Circuits................................................................................................................................................................ 29
Caution on Power-Up Conditions.................................................................................................................................................. 30
Low Voltage Malfunction Prevention Function .............................................................................................................................. 30
Noise Countermeasures ............................................................................................................................................................... 31
Operational Notes ......................................................................................................................................................................... 32
Ordering Information ..................................................................................................................................................................... 34
Lineup ........................................................................................................................................................................................... 34
Marking Diagrams......................................................................................................................................................................... 35
Physical Dimension and Packing Information ............................................................................................................................... 36
Revision History ............................................................................................................................................................................ 41
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BR25H256xxx-5AC Series
Pin Configurations
(TOP VIEW)
(TOP VIEW)
1
8
VCC
SO
2
7
HOLDB
WPB
3
6
SCK
WPB 3
GND
4
5
SI
GND 4
7 HOLDB
SO 2
Figure 3-(a). Pin Configuration
(SOP8, SOP-J8, TSSOP-B8, MSOP8)
Pin Description
8 VCC
CSB 1
CSB
6 SCK
EXP-PAD
5 SI
Figure 3-(b). Pin Configuration
(VSON008X2030)
Pin No.
Pin Name
Input/Output
Descriptions
1
CSB
Input
Chip select input
2
SO
Output
Serial data output
3
WPB
Input
Write protect input
4
GND
-
5
SI
Input
Serial data input
6
SCK
Input
Serial clock input
7
HOLDB
Input
Hold input
8
VCC
-
Power supply
-
EXP-PAD
-
Leave as OPEN or connect to GND
All input/output reference voltage, 0 V
Block Diagram
CSB
SCK
SI
VOLTAGE
INSTRUCTION DECODE
DETECTION
CONTROL CLOCK
GENERATION
WRITE
HIGH VOLTAGE
INHIBITION
GENERATOR
INSTRUCTION
REGISTER
HOLDB
IDENTIFICATION PAGE
ADDRESS
REGISTER
WPB
SO
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DATA
REGISTER
15 bit
8 bit
ADDRESS
DECODER
READ/WRITE
AMP
STATUS REGISTER
15 bit
256 Kbit
EEPROM
8 bit
Figure 4. Block Diagram
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BR25H256xxx-5AC Series
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
VCC
-0.3 to +6.5
V
Ta = 25 °C
Supply Voltage
-
-0.3 to VCC+1.0
V
Ta = 25 °C. The maximum value of terminal
voltage is not over than 6.5 V. When the pulse
width is 50 ns or less, the minimum value of
terminal voltage is -1.0 V.
VESD
-3000 to +3000
V
Ta = 25 °C
IOLMAX
10
mA
Ta = 25 °C
IOHMAX
-10
mA
Ta = 25 °C
Tjmax
150
°C
-
Tstg
-65 to +150
°C
-
Terminal Voltage
Electro Static Discharge
(Human Body Model)
Maximum Output Low Current
(SO)
Maximum Output HIGH Current
(SO)
Maximum Junction Temperature
Remark
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between
pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the
absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties
of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing board size
and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 2)
Parameter
Symbol
Thermal Resistance (Typ)
1s(Note 4)
2s2p(Note 5)
Unit
SOP8
Junction to Ambient
θJA
197.4
109.8
°C/W
Junction to Top Characterization Parameter(Note 3)
ΨJT
21
19
°C/W
Junction to Ambient
θJA
149.3
76.9
°C/W
Junction to Top Characterization Parameter(Note 3)
ΨJT
18
11
°C/W
θJA
251.9
152.1
°C/W
ΨJT
31
20
°C/W
θJA
284.1
135.4
°C/W
ΨJT
21
11
°C/W
SOP-J8
TSSOP-B8
Junction to Ambient
Junction to Top Characterization
Parameter(Note 3)
MSOP8
Junction to Ambient
Junction to Top Characterization
Parameter(Note 3)
(Note 2) Based on JESD51-2A (Still-Air)
(Note 3) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface
of the component package.
(Note 4) Using a PCB board based on JESD51-3.
(Note 5) Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
Single
Material
FR-4
Board Size
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
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Thermal Resistance (Note 6) - continued
Parameter
Thermal Resistance (Typ)
Symbol
Unit
1s(Note 8)
2s2p(Note 9)
θJA
308.3
69.6
°C/W
ΨJT
43
10
°C/W
VSON008X2030
Junction to Ambient
Junction to Top Characterization
Parameter(Note 7)
(Note 6) Based on JESD51-2A(Still-Air)
(Note 7) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface
of the component package.
(Note 8) Using a PCB board based on JESD51-3.
(Note 9) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
Material
Board Size
4 Layers
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
Thermal Via(Note 10)
Pitch
Diameter
1.20 mm
Φ 0.30 mm
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 10) This thermal via connects with the copper pattern of all layers.
Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage
VCC
1.7
-
5.5
V
Ambient Operating Temperature
Ta
-40
-
+125
°C
Bypass Capacitor(Note 11)
C
0.1
-
-
μF
(Note 11) Connect a bypass capacitor between the IC’s VCC and GND pin.
Input/Output Capacitance (Ta = 25 °C, f = 5 MHz)
Parameter
Input
Capacitance(Note 12)
Output
Capacitance(Note 12)
Symbol
Min
Typ
Max
Unit
Conditions
CIN
-
-
8
pF
VIN = GND
COUT
-
-
8
pF
VOUT = GND
(Note 12) Not 100 % Tested.
Memory Cell Characteristics (VCC = 1.7 V to 5.5 V)
Parameter
Write Cycles(Note 13, 14)
Data Retention(Note 13)
Symbol
Min
Typ
Max
Unit
Conditions
-
4,000,000
-
-
Times
Ta = 25 °C
-
1,200,000
-
-
Times
Ta = 85 °C
-
500,000
-
-
Times
Ta = 105 °C
-
300,000
-
-
Times
Ta = 125 °C
-
100
-
-
Years
Ta = 25 °C
-
60
-
-
Years
Ta = 105 °C
-
50
-
-
Years
Ta = 125 °C
(Note 13) Not 100 % Tested.
(Note 14) The Write Cycles is defined for unit of 4 data bytes with the same address bits of WA14 to WA2.
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BR25H256xxx-5AC Series
Electrical Characteristics (Unless otherwise specified, Ta = -40 °C to +125 °C, VCC = 1.7 V to 5.5 V)
Parameter
Limit
Symbol
Unit
Conditions
Vcc+1.0
V
-
-
+0.3VCC
V
-
0
-
0.4
V
IOL = 3.0 mA, 2.5 V ≤ VCC ≤ 5.5 V
0
-
0.2
V
IOL = 1.0 mA, 1.7 V ≤ VCC < 2.5 V
VOH1
0.8Vcc
-
Vcc
V
IOH = -2.0 mA, 2.5 V ≤ VCC ≤ 5.5 V
Output High Voltage 2
VOH2
0.8Vcc
-
Vcc
V
IOH = -400 μA, 1.7 V ≤ VCC < 2.5 V
Input Leakage Current
ILI
-2
-
+2
μA
VIN = 0 V to Vcc
Output Leakage Current
ILO
-2
-
+2
μA
ICC1
-
-
1.7
mA
ICC2
-
-
1.0
mA
ICC3
-
-
1.5
mA
ICC4
-
-
3.0
mA
ICC5
-
-
2.0
mA
ICC6
-
-
4.0
mA
ICC7
-
-
8.0
mA
ISB
-
-
10
μA
VOUT = 0 V to Vcc, CSB = Vcc
Vcc = 5.5 V, fSCK = 20 MHz, tE/W = 3.5 ms
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
Vcc = 1.7 V, fSCK = 5 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
Vcc = 2.5 V, fSCK = 5 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
Vcc = 5.5 V, fSCK = 5 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
Vcc = 2.5 V, fSCK = 10 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
Vcc = 5.5 V, fSCK = 10 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
Vcc = 5.5 V, fSCK = 20 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
Vcc = 5.5 V
CSB = HOLDB = WPB = Vcc,
SCK = SI = Vcc or 0 V, SO = OPEN
Min
Typ
Max
VIH
0.7Vcc
-
VIL
-0.3(Note 15)
Output Low Voltage 1
VOL1
Output Low Voltage 2
VOL2
Output High Voltage 1
Input High Voltage
Input Low Voltage
Supply Current
(WRITE)(Note 16)
Supply Current (READ)(Note 16)
Standby Current
(Note 15) When the pulse width is 50 ns or less, it is -1.0 V.
(Note 16) The average value during operation.
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BR25H256xxx-5AC Series
AC Characteristics (Unless otherwise specified, Ta = -40 °C to +125 °C, CL1 = 30 pF, VCC = 1.7 V to 5.5 V)
Parameter
Symbol
1.7 V ≤ Vcc < 2.5 V
2.5 V ≤ Vcc < 4.5 V
4.5 V ≤ Vcc ≤ 5.5 V
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
SCK Frequency
fSCK
0.01
-
5
0.01
-
10
0.01
-
20
MHz
SCK High Time
tSCKWH
80
-
-
40
-
-
20
-
-
ns
SCK Low Time
tSCKWL
80
-
-
40
-
-
20
-
-
ns
CSB High Time
tCS
85
-
-
40
-
-
20
-
-
ns
CSB Setup Time
tCSS
60
-
-
30
-
-
15
-
-
ns
CSB Hold Time
tCSH
60
-
-
30
-
-
15
-
-
ns
SCK Setup Time
tSCKS
60
-
-
30
-
-
15
-
-
ns
SCK Hold Time
tSCKH
60
-
-
30
-
-
15
-
-
ns
SI Setup Time
tDIS
20
-
-
10
-
-
5
-
-
ns
SI Hold Time
tDIH
20
-
-
10
-
-
5
-
-
ns
Data Output Delay Time1
Data Output Delay Time2
(CL2 = 100 pF)
Output Hold Time
tPD1
-
-
50
-
-
30
-
-
20
ns
tPD2
-
-
60
-
-
40
-
-
20
ns
tOH
0
-
-
0
-
-
0
-
-
ns
Output Disable Time
HOLDB Setting
Setup Time
HOLDB Setting
Hold Time
HOLDB Release
Setup Time
HOLDB Release
Hold Time
Time from HOLDB
to Output High-Z
Time from HOLDB
to Output Change
SCK Rise Time(Note 17)
tOZ
-
-
80
-
-
40
-
-
20
ns
tHFS
0
-
-
0
-
-
0
-
-
ns
tHFH
40
-
-
30
-
-
15
-
-
ns
tHRS
0
-
-
0
-
-
0
-
-
ns
tHRH
60
-
-
30
-
-
15
-
-
ns
tHOZ
-
-
80
-
-
40
-
-
20
ns
tHPD
-
-
80
-
-
40
-
-
20
ns
tRC
-
-
2
-
-
2
-
-
2
μs
tFC
-
-
2
-
-
2
-
-
2
μs
SCK Fall
Time(Note 17)
tRO
-
-
40
-
-
20
-
-
10
ns
Output Fall Time(Note 17)
tFO
-
-
40
-
-
20
-
-
10
ns
Write Time
tE/W
-
-
3.5
-
-
3.5
-
-
3.5
ms
Output Rise
Time(Note 17)
(Note 17) Not 100 % Tested.
AC Characteristics Condition
Parameter
Symbol
Conditions
Unit
Load Capacitance1
CL1
30
pF
Load Capacitance2
CL2
100
pF
Input Rise Time
-
50
ns
Input Fall Time
-
50
ns
Input Voltage
Input/Output Judgment Voltage
-
0.2Vcc / 0.8Vcc
V
-
0.3Vcc / 0.7Vcc
V
Input Voltage
Input/Output Judgment Voltage
0.8Vcc
0.7Vcc
0.3Vcc
0.2Vcc
Figure 5. Input/Output Judgment Voltage
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Input/Output Timing
tCSS
tCS
CSB
tSCKS
tSCKWL
tRC
tSCKWH
tFC
SCK
tDIS
tDIH
SI
High-Z
SO
Figure 6-(a). Input Timing
SI is taken into IC inside in sync with data rise edge of SCK. Input address and data from the Most Significant Bit MSB.
tCS
CSB
tSCKH
tCSH
SCK
SI
tPD
tRO,tFO
tOH
tOZ
SO
High-Z
Figure 6-(b). Input/Output Timing
SO is output in sync with data fall edge of SCK. Data is output from the Most Significant Bit MSB.
CSB
"H"
"L"
tHFS
tHFH
tHRS
tHRH
SCK
tDIS
SI
n
n+1
tHOZ
SO
Dn+1
Dn
High-Z
n-1
tHPD
Dn
Dn-1
HOLDB
Figure 6-(c). HOLD Timing
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BR25H256xxx-5AC Series
Typical Performance Curves
6.0
6.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
5.0
Input Low Voltage : VIL [V]
Input High Voltage : VIH [V]
5.0
4.0
4.0
3.0
3.0
SPEC
2.0
2.0
1.0
1.0
0.0
0.0
1.0
2.0
3.0
4.0
Supply Voltage : VCC [V]
5.0
0.0
6.0
Figure 7. Input High Voltage vs Supply Voltage
(CSB, SCK, SI, HOLDB, WPB)
0.0
1.0
2.0
3.0
4.0
Supply Voltage : VCC [V]
5.0
6.0
1.0
Output Low Voltage2 : VOL2 [V]
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.8
Output Low Voltage1 : VOL1 [V]
SPEC
Figure 8. Input Low Voltage vs Supply Voltage
(CSB, SCK, SI, HOLDB, WPB)
1.0
0.6
SPEC
0.4
0.2
0.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.0
1.0
2.0
3.0
4.0
5.0
Output Low Current : IOL [mA]
Figure 9. Output Low Voltage1 vs Output Low Current
(Vcc = 2.5 V)
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0.8
0.6
0.4
SPEC
0.2
0.0
6.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.0
1.0
2.0
3.0
4.0
5.0
Output Low Current : IOL [mA]
6.0
Figure 10. Output Low Voltage2 vs Output Low Current
(Vcc = 1.7 V)
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BR25H256xxx-5AC Series
Typical Performance Curves - continued
2.0
2.5
SPEC
2.0
1.5
1.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.5
0.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
Output High Current : IOH [mA]
1.5
Output High Voltage2 : VOH2 [V]
Output High Voltage1 : VOH1 [V]
3.0
1.0
0.5
-4.0
-3.0
-2.0
-1.0
0.0
Figure 12. Output High Voltage2 vs Output High Current
(Vcc = 1.7 V)
3.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
2.0
1.5
1.0
0.5
0.0
1.0
2.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
2.5
Output Leakage Current : ILO [μA]
2.5
Input Leakage Current : ILI [μA]
-5.0
Output High Current : IOH [mA]
3.0
0.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.0
-6.0
0.0
Figure 11. Output High Voltage1 vs Output High Current
(Vcc = 2.5 V)
SPEC
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
1.5
1.0
0.5
0.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Figure 13. Input Leakage Current vs Supply Voltage
(CSB, SCK, SI, HOLDB, WPB)
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TSZ22111 • 15 • 001
SPEC
2.0
Figure 14. Output Leakage Current vs Supply Voltage
(SO)
10/41
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05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Typical Performance Curves - continued
4.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
3.0
2.0
Supply Current (READ) : ICC2, ICC3, ICC4 [mA]
Supply Current (WRITE) : ICC1 [mA]
4.0
SPEC
1.0
0.0
4.0
4.5
5.0
5.5
6.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
3.0
2.0
SPEC
SPEC
1.0
0.0
0.0
Supply Voltage : VCC [V]
2.0
3.0
4.0
5.0
6.0
Figure 16. Supply Current (READ) vs Supply Voltage
10.0
6.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
5.0
Supply Current (READ) : I CC7 [mA]
Supply Current (READ) : ICC5, ICC6 [mA]
1.0
Supply Voltage : VCC [V]
Figure 15. Supply Current (WRITE) vs Supply Voltage
SPEC
4.0
3.0
SPEC
2.0
1.0
0.0
SPEC
8.0
1.0
2.0
3.0
4.0
Supply Voltage : VCC [V]
5.0
6.0
Figure 17. Supply Current (READ) vs Supply Voltage
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TSZ22111 • 15 • 001
SPEC
6.0
4.0
2.0
0.0
0.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
4.0
4.5
5.0
5.5
6.0
Supply Voltage : VCC [V]
Figure 18. Supply Current (READ) vs Supply Voltage
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05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Typical Performance Curves - continued
12.0
100.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SCK Frequency : fSCK [MHz]
Standby Current : ISB [μA]
10.0
SPEC
8.0
4.0
2.0
0.0
1.0
2.0
3.0
4.0
5.0
SPEC
1.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.1
6.0
Supply Voltage : VCC [V]
Figure 19. Standby Current vs Supply Voltage
1.0
2.0
3.0
4.0
Supply Voltage : VCC [V]
5.0
6.0
100
SPEC
80
SCK Low Time : tSCKWL [ns]
SCK High Time : tSCKWH [ns]
0.0
Figure 20. SCK Frequency vs Supply Voltage
100
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
60
SPEC
40
SPEC
20
0
SPEC
10.0
6.0
0.0
SPEC
1.0
2.0
3.0
4.0
Supply Voltage : VCC [V]
5.0
6.0
Figure 21. SCK High Time vs Supply Voltage
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TSZ22111 • 15 • 001
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
60
SPEC
40
SPEC
20
0
0.0
SPEC
80
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Figure 22. SCK Low Time vs Supply Voltage
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05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Typical Performance Curves - continued
100
100
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
60
SPEC
40
SPEC
20
0
CSB Setup Time : tCSS [ns]
CSB High Time : tCS [ns]
80
0.0
1.0
2.0
3.0
4.0
5.0
80
40
SPEC
20
0
6.0
SPEC
60
SPEC
0.0
Supply Voltage : VCC [V]
3.0
4.0
5.0
6.0
Figure 24. CSB Setup Time vs Supply Voltage
100
50
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
80
SPEC
60
40
SPEC
20
SPEC
0.0
1.0
2.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
40
SI Setup Time : tDIS [ns]
CSB Hold Time : tCSH [ns]
2.0
Supply Voltage : VCC [V]
Figure 23. CSB High Time vs Supply Voltage
0
1.0
3.0
4.0
5.0
SPEC
20
SPEC
10
SPEC
0
-10
6.0
Supply Voltage : VCC [V]
Figure 25. CSB Hold Time vs Supply Voltage
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TSZ22111 • 15 • 001
30
0.0
1.0
2.0
3.0
4.0
Supply Voltage : VCC [V]
5.0
6.0
Figure 26. SI Setup Time vs Supply Voltage
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05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Typical Performance Curves - continued
100
50
SI Hold Time : tDIH [ns]
40
Data Output Delay Time1 : tPD1 [ns]
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
30
SPEC
20
SPEC
10
SPEC
0
-10
0.0
1.0
2.0
3.0
4.0
5.0
80
60
SPEC
40
SPEC
SPEC
20
0
6.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.0
Figure 27. SI Hold Time vs Supply Voltage
3.0
4.0
5.0
6.0
Figure 28. Data Output Delay Time1 vs Supply Voltage
50
120
HOLDB Setting Hold Time : tHFH [ns]
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
100
Output Disable Time : tOZ [ns]
2.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
SPEC
80
60
SPEC
40
SPEC
20
0
1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
SPEC
30
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
20
SPEC
10
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 29. Output Disable Time vs Supply Voltage
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TSZ22111 • 15 • 001
SPEC
40
Figure 30. HOLDB Setting Hold Time vs Supply Voltage
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TSZ02201-0G1G0G100570-1-2
05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Typical Performance Curves - continued
Time From HOLDB to Output High-Z : tHOZ [ns]
HOLDB Release Hold Time : tHRH [ns]
100
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
80
SPEC
60
40
SPEC
20
0
SPEC
0.0
1.0
2.0
3.0
4.0
5.0
120
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
100
SPEC
80
60
SPEC
40
SPEC
20
0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Figure 31. HOLDB Release Hold Time vs Supply Voltage
Figure 32. Time from HOLDB to Output High-Z vs Supply
Voltage
100
100
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
60
SPEC
40
SPEC
20
0
60
1.0
2.0
3.0
4.0
Supply Voltage : VCC [V]
5.0
6.0
Figure 33. Time from HOLDB to Output Change vs Supply
Voltage
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TSZ22111 • 15 • 001
SPEC
40
SPEC
20
SPEC
0
0.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
80
SPEC
80
Output Rise Time : tRO [ns]
Time From HOLDB to Output Change : tHPD [ns]
Supply Voltage : VCC [V]
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Figure 34. Output Rise Time vs Supply Voltage
15/41
TSZ02201-0G1G0G100570-1-2
05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Typical Performance Curves - continued
100
6
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
5
Write Time : tE/W [ms]
Output Fall Time : tFO [ns]
80
60
SPEC
40
SPEC
20
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Figure 35. Output Fall Time vs Supply Voltage
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TSZ22111 • 15 • 001
4
SPEC
3
2
1
SPEC
0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0
0.0
1.0
2.0
3.0
4.0
Supply Voltage : VCC [V]
5.0
6.0
Figure 36. Write Time vs Supply Voltage
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TSZ02201-0G1G0G100570-1-2
05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Function Explanation
1. Status Register
This IC has the Status Registers. Status Register are of 8 bits and express the following parameters.
WPEN, BP0 and BP1 can be set by Write Status Register command. These 3 bits are memorized into the EEPROM,
therefore are valid even when supply voltage is turned off.
Write Cycles and Data Retention of Status Register are same as characteristics of the EEPROM.
WEN can be set by Write
Enable command and Write Disable command. WEN becomes write disable status when supply
――
voltage is turned off. R /B is for write confirmation, therefore cannot be set externally.
The values of Status Register can be read by Read Status Register command.
D7
D6
WPEN
0
Table 1. Status Register
D5
D4
D3
0
0
BP1
D2
D1
BP0
WEN
D0
――
R /B
Table 2. Function of Status Register
bit
Memory
Location
WPEN
EEPROM
Pin Enable/Disable designation bit for the WPB pin
WPEN = 0 = Invalid, WPEN = 1 = Valid
WPEN bit enables/disables the function
of the WPB pin.
BP1
BP0
EEPROM
EEPROM Write Disable Block
designation bit
BP1 and BP0 bits designate the Write
Disable Block of EEPROM. Refer to
Table 3. Write Disable Block Setting.
WEN
Register
Write Enable/Write Disable Confirmation bit
WEN = 0 = Prohibited
WEN = 1 = Permitted
WEN bit indicates the status of write
enable or write disable for WRITE,
WRSR, WRID, LID.
Register
Write Cycle Status (READY /BUSY) Confirmation bit R /B bit indicates the status of READY
――
――
or BUSY of the write cycle.
R /B = 0 = READY, R /B = 1 = BUSY
Function
―――――――
――
R /B
Content
――
Table 3. Write Disable Block Setting
Status Register
Protected Block
Protected Addresses
0
None
None
0
1
Upper 1/4
6000h to 7FFFh
1
0
Upper 1/2
4000h to 7FFFh
1
1
Whole Memory
0000h to 7FFFh, ID Page
BP1
BP0
0
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05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Function Explanation - continued
2. Write Protect Mode by the WPB pin
By setting WPB = Low with WPEN = 1, Write Status Register command is disabled. Only when WPEN bit is set “1”, the
WPB pin functions become valid. However, when write cycle is in execution, no interruption can be made.
Table 4. Write Protect Mode
WPEN bit
WPB pin
0
X
1
1
Instruction
WRSR
WRITE/WRID/LID
Writable
Writable
High
Writable
Writable
Low
Write Protected
Writable
WPB is normally fixed to High or Low for use, but when WPB is controlled so as to cancel Write Status Register command,
pay attention to the following WPB Valid Timing.
Write Status Register command is executed, by setting WPB = Low in cancel valid area, command can be cancelled. The
Data area (from 7th fall of SCK to 16th rise of SCK) becomes the cancel valid area. However, once write is started, any input
cannot be cancelled. WPB input becomes Don’t Care, and cancellation becomes invalid.
SCK
Instruction
6
7
15
Instruction Code
Data
Invalid
Valid
Write Protect
16
tE/W
Data Write Time
Invalid
Figure 37. WPB Valid Timing (WRSR)
3. Hold Mode by the HOLDB pin
By the HOLDB pin, serial communication can be stopped temporarily (HOLD status). The HOLDB pin carries out serial
communications normally when it is High. To get in HOLD status, at serial communication, when SCK = Low, set the HOLDB
pin Low.
At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z).
To release the HOLD status, set HOLDB = High, when SCK = Low. After that, communication can be restarted from the point
before the HOLD status. For example, when HOLD status is made after WA5 address input at Read command, after release
of HOLD status, by starting WA4 address input, Read command can be restarted. When in HOLD status, leave CSB = Low.
When it is set CSB = High in HOLD status, the IC is reset, therefore communication after that cannot be restarted.
SCK
HOLDB
HOLD Status
HOLD Status
Figure 38. HOLD Status
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TSZ02201-0G1G0G100570-1-2
05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Function Explanation - continued
4. ID Page
This IC has 64 byte Write Lockable Identification Page (ID Page) in addition to Memory Array.
The data in the first 3 addresses are for device identification. These data are over written by Write ID Page command.
Table 5. Data in the first 3 addresses
ID Page Address
Data
Content
00h
2Fh
Manufacturer Code (ROHM)
01h
00h
Interface Method (SPI)
02h
0Fh
Memory Density (256 Kbit)
By setting Lock Status (LS) bit to “1” with Lock ID Page command, it is prohibited to write to ID page permanently.
It is not reversible to set from ID Page Lock Status (LS = “1”) to ID Page Lock Release status (LS = “0”).
bit
Memory
Location
LS
EEPROM
Table 6. Function of Lock Status
Function
ID Page Lock/Release Status designation bit
LS = 0 = ID Page Lock Release
LS = 1 = ID Page Lock
Content
LS bit can set Lock Status to
ID Page.
5. ECC Function
This IC has ECC bits for Error Correction to each 4 data bytes with the same address bits of WA14 to WA2. In the Read
operation, even if there is 1 bit data error in the 4 bytes, IC corrects to correct data by ECC function and outputs data
corrected. Even if write operation is started with only 1 byte data input, this IC rewrites the data of 4 bytes with the same
address bits of WA14 to WA2 and the data of ECC bits added to these 4 bytes data. In order to maximize Write Cycles
specified, it is recommended to write with data input of each 4 bytes with the same address bits of WA14 to WA2.
Table 7. Example of 4 data bytes with the same address bits of WA14 to WA2 (Address 0000h, 0001h, 0002h, 0003h)
NonSame Address Bits from WA14 to WA2
Common
Address
WA
WA
WA
WA
WA
WA
WA
WA
WA
WA
WA
WA
WA
WA
WA
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000h
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0001h
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0002h
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0003h
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TSZ22111 • 15 • 001
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TSZ02201-0G1G0G100570-1-2
05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Instruction Mode
After setting the CSB pin from High to Low, to execute each command, input Instruction Code, Address and Data from the
Most Significant Bit MSB.
Table 8. Instruction Mode
Instruction
Content
Instruction
Code (8 bit)
Address (MSB) / Data
(8 bit)
Address (LSB)
(8 bit)
Data
(8 bit)
WREN
Write Enable
0000 0110
-
-
-
WRDI
Write Disable
0000 0100
-
-
-
READ
Read
0000 0011
WA15 to WA8 (Note 18)
WA7 to WA0
D7 to D0 Output
WRITE
Write
0000 0010
WA15 to WA8 (Note 18)
WA7 to WA0
D7 to D0 Input
RDSR
Read Status
Register
0000 0101
D7 to D0 Output (Note 19)
-
-
WRSR
Write Status
Register
0000 0001
D7 to D0 Input (Note 19)
-
-
RDID
Read ID Page
1000 0011
0000 0000
00WA5 to WA0
D7 to D0 Output
WRID
Write ID Page
1000 0010
0000 0000
00WA5 to WA0
D7 to D0 Input
RDLS
Read Lock Status
1000 0011
0000 0100
0000 0000
LID
Lock ID page
1000 0010
0000 0100
0000 0000
D7 to D0 Output
(Note 20)
D7 to D0 Input
(Note 20)
(Note 18) WA15 = Don’t Care
(Note 19) Refer to Figure 45 and Figure 46
(Note 20) Refer to Figure 49 and Figure 50
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TSZ22111 • 15 • 001
20/41
TSZ02201-0G1G0G100570-1-2
05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Timing Chart
1. Write Enable Command (WREN)
It is set to write enable status by Write Enable command. As for this command, set CSB to Low, and then input the
Instruction Code of Write Enable command. This command is accepted at the 7th rise of SCK. Even with input over 7
clocks, command becomes valid.
Before carrying out Write command, Write Status Register command, Write ID Page command and Lock ID Page
command, it is necessary to set write enable status by the Write Enable command.
CSB
SCK
SI
SO
0
0
1
0
2
0
3
0
4
0
5
1
6
1
7
0
High-Z
Figure 39. Write Enable Command
2. Write Disable Command (WRDI)
It is set to write disable status, WEN bit becomes to “0”, by Write Disable command. As for this command, set CSB to Low,
and then input the Instruction Code of Write Disable command. This command is accepted at the 7th rise of SCK. Even
with input over 7 clocks, command becomes valid.
If Write command, Write Status Register command, Write ID Page command or Lock ID Page command is input in the
write disable status, commands are cancelled. And even in the write enable status, once Write command, Write Status
Register command, Write ID Page command or Lock ID Page is executed, it gets in the write disable status.
After power on, this IC is in write disable status.
CSB
SCK
SI
SO
0
0
1
0
2
0
3
0
4
0
5
1
6
0
7
0
High-Z
Figure 40. Write Disable Command
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05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Timing Chart - continued
3. Read Command (READ)
By Read command, data of EEPROM can be read. As for this command, set CSB to Low, then input address after
Instruction Code of Read command. This IC starts data output of the designated address. Data output is started from
SCK fall of 23 clock, and from D7 to D0 sequentially. This IC has increment read function. After output of data for 1 byte
(8 bit), by continuing input of SCK, data of the next address can be read. Increment read can read all the addresses of
EEPROM Array. After reading data of the most significant address, by continuing increment read, data of the least
significant address is read.
CSB
～
～
SCK
0
1
2
3
4
5
6
7
8
0
0
0
0
0
0
1
*
1
10
～
～
11
WA14 WA13 WA12
High-Z
SO
23
24
～
～
30
～
～
Address Input (16 bit)
～
～
Instruction Code(8 bit)
SI
9
～
～
31
WA1 WA0
Data Outputs of first byte (8 bit)
～
～
D7 D6
D2 D1 D0
～
～
～
～
second byte
D7
* Don’t Care
Figure 41. Read Command
4. Write Command (WRITE)
By Write command, data of EEPROM can be written. As for this command, set CSB to Low, then input address and data
after Instruction Code of Write command. Then, by making CSB to High, the IC starts write operation. The write time of
EEPROM requires time of tE/W (Max 3.5 ms). To start write operation, set CSB Low to High after taking the last data (D0),
and before the next SCK clock starts. At other timing, Write command is not executed, and this Write command is
cancelled.
During write operation, other than Read Status Register command is not accepted.
This IC has Page Write function, and after input of data for 1 byte (8 bit), by continuing data input without setting CSB High
to Low, data up to 64 byte can be written for one tE/W. In Page Write, the addressed lower 6 address bits are incremented
internally at every time when data of 1 byte is inputted and data is written to respective addresses. When the data input
exceeds the last address byte of the page, address rolls over to the first address byte of the same page. It is not
recommended to input data over 64 byte, it is recommended to input data in 64 byte. In case of the data input over 64
byte, it is explained in Table 10.
CSB rising valid timing to start write operation
CSB
～
～
SCK
0
1
2
3
4
5
6
7
8
Instruction Code (8 bit)
SI
0
0
0
0
0
0
1
0
*
9
11
10
23
～
～
Address Input (16 bit)
WA14 WA13 WA12
High-Z
SO
～
～
～
～
～
～
～
～
24
30
31
32
Data Input (8 bit)
WA1 WA0
D7
～
～
D6
～
～
～
～
D2
D1
D0
～
～
*Don't Care
Figure 42. Write Command (Byte Write)
CSB
SCK
0
1
2
3
4
5
6
8
7
Instruction Code (8 bit)
SI
SO
CSB rising valid timing to start write operation
～
～
0
0
0
0
0
0
1
0
*
High-Z
9
10
11
～
～
Address Input (16 bit)
～
～
WA14 WA13 WA12
～
～
23
24
25
～
～
～
～
(8n+24)-8 (8n+24)-7 (8n+24)-2 (8n+24)-1 8n+24
30
31
Data Input of first byte (8 bit)
～
～
WA1 WA0
D7
D6
～
～
D1
D0
32
D7
～
～
～
～
～
～
～
～
～
～
33
D6
～
～
～
～
～
～
～
～
Data Input of nth byte
～
～
D7
D6
～
～
～
～
D1
D0
*Don’t care
Figure 43. Write Command (Page Write)
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Timing Chart - continued
5. Page Write Function
Page 0
Page 1
Page 2
.
.
Page 510
Page 511
64 Byte of Page
Column 0
Column 1
Column 2
...
0000h
0040h
0080h
.
.
7F80h
7FC0h
0001h
0041h
0081h
.
.
7F81h
7FC1h
0002h
0042h
0082h
.
.
7F82h
7FC2h
...
...
...
.
.
...
...
Column
62
003Eh
007Eh
00BEh
.
.
7FBEh
7FFEh
These column addresses are
the first address of each pages.
Column
63
003Fh
007Fh
00BFh
.
.
7FBFh
7FFFh
These column addresses are
the last address of each pages.
Figure 44. EEPROM physical address for Page Write command (64 Byte)
(1) In case of Page Write command with lower than 64 byte data input
No.
1
4 Byte group
Table 9. Example of Page Write with 2 byte data input
Group 0
...
...
Group 15
Addresses of Page 0
0000h
0001h
0002h
0003h
0004h
...
003Ch
003Dh
003Eh
003Fh
Previous Data
00h
01h
02h
03h
04h
...
3Ch
3Dh
3Eh
3Fh
Input data for
AAh
55h
2
...
Page Write (2 Byte)
The Data
AAh
55h
02h
03h
04h
3Ch
3Dh
3Eh
3Fh
3
...
after Write operation
No.1: These data are EEPROM data before Write operation.
No.2: Inputted 2 byte data AAh, 55h from address 0000h.
No.3: If Write operation is executed with the data of No.2, the data are changed from the data of No.1 to the data of
No.3.The data of address 0000h, 0001h are changed to data AAh, 55h, the data of address 0002h, 0003h, the 4
byte group of Group 0, are over-written to data 02h, 03h.
When Write command is cancelled, EEPROM data keep No.1.
(2) In case of Page Write command with more than 64 byte data input
No.
4 Byte group
Table 10. Example of Page Write with 66 byte data input
Group 0
...
...
Group 15
Addresses of Page 0
0000h
0001h
0002h
0003h
0004h
...
003Ch
003Dh
003Eh
003Fh
1
Previous Data
00h
01h
02h
03h
04h
...
3Ch
3Dh
3Eh
3Fh
2
Input data for
Page Write (66 Byte)
55h
AAh
55h
AAh
55h
...
55h
AAh
55h
AAh
FFh
00h
-
-
-
...
-
-
-
-
3
The Data
FFh
00h
02h
03h
55h
55h
AAh
55h
AAh
...
after Write operation
No.1: These data are initial EEPROM data before Write operation.
No.2: Inputted 66 byte data 55h, AAh, - - , 55h, AAh, FFh, 00h from address 0000h.
The data of address 0000h, 0001h are set to data 55h, AAh first. The data of address 0002h, 0003h are set to
data 55h, AAh. After inputting data to Maximum byte (003Fh), the data address 0000h, 0001h are set to data FFh,
00h again. No data input to address 0002h, 0003h again.
No.3: If Page Write operation is executed with the data of No.2, the data are changed from the data of No.1 to the data of
No.3. The data of address 0000h, 0001h are changed to FFh, 00h inputted data later, not to 55h, AAh inputted
data first. The data of address 0002h, 0003h, the 4 byte group of Group 0, are over-written to 02h, 03h of Previous
Data, not to 55h, AAh inputted data first. The data of other addresses are changed to 55h, AAh - - , 55h, AAh.
When Write command is cancelled, EEPROM data keep No.1.
(3) Roll Over
In Page Write command, when data is set to the last address of a page (e.g. address “003Fh” of page 0), the next
data will be set to the first address of the same page (e.g. address “0000h” of page 0). Page Write address increment
is available in the same page including the address designated at first.
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Timing Chart - continued
6. Read Status Register Command (RDSR)
By Read Status register command, data of status register can be read. As for this command, set CSB to Low, then input
Instruction Code of Read Status Register command. This IC starts data output of the status register. Data output is
started from SCK fall of 7 clock, and from D7 to D0 sequentially. This IC has increment read function. After output of data
for 1 byte (8 bits), by continuing input of SCK, this IC repeats to output data of the status register.
Even if in write operation, Read Status Register command can be executed.
CSB
SCK
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Instruction Code (8 bit)
SI
0
0
0
0
0
1
0
1
High-Z
SO
D7
D6
D5
WPEN
0
0
Data Output (8 bit)
D4
D3
D2
0
BP1
BP0
D1
D0
WEN
R/B
Figure 45. Read Status Register Command
7. Write Status Register Command (WRSR)
Write Status Register command can write status register data. The data can be written by this command are 3 bits, that is,
WPEN (D7), BP1 (D3) and BP0 (D2) among 8 bits of status register. As for this command, set CSB to Low, and input
Instruction Code of Write Status Register command, and input data. Then, by making CSB to High, this IC starts write
operation. Write Time requires time of tE/W as same as Write command. As for CSB rise, start CSB after taking the last
data bit (D0), and before the next SCK clock starts. At other timing, command is cancelled.
To the write disabled block, write cannot be made, and only read can be made.
During write operation, other than Read Status Register command is not accepted.
CSB
SCK
0
1
2
3
4
5
6
7
8
9
SI
SO
0
0
0
0
0
0
10
11
12
13
14
15
Data Input (8 bit)
Instruction Code (8 bit)
0
1
D7
D6
D5
D4
WPEN
*
*
*
D3
D2
BP1 BP0
D1
D0
*
*
High-Z
*Don't care
Figure 46. Write Status Register Command
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Timing Chart - continued
8. Read ID Page Command (RDID)
By Read ID Page command, data of ID Page can be read. As for this command, set CSB to Low, then input address after
Instruction Code of Read ID Page command. By inputting lower address bits WA5 to WA0, it is possible to address to 64
byte ID Page. Data output is started from SCK fall of 23 clock, and from D7 to D0 sequentially. This IC has increment
read function. After output of data for 1 byte (8 bits), by continuing input of SCK, data of the next address can be read.
After reading data of the most significant address of ID Page, by continuing increment read, data of the least significant
address of ID Page is read.
CSB
～
～
SCK
0
1
2
3
4
5
6
7
～
～
Instruction Code(8 bit)
SI
SO
0
1
0
0
0
0
～
～
～
～
13
～
～
17
18
～
～
～
～
23
25
24
Address Input (16 bit)
1
1
～
～
High-Z
0
～
～
～
～
0
WA5
～
～
～
～
～
～
WA0
～
～
～
～
28
29
30
31
～
～
Data Outputs of first byte (8 bit)
～
～
D7 D6
D2 D1 D0
～
～
second byte
D7
Figure 47. Read ID Page Command
9. Write ID Page Command (WRID)
By Write ID Page command, data of ID Page can be written. As for this command, set CSB to Low, then input address and
data after Instruction Code of Write ID Page command. By inputting lower address bits WA5 to WA0, it is possible to
address to 64 byte ID Page. Then, by making CSB to High, the IC starts write operation. To start write operation, set CSB
Low to High after taking the last data (D0), and before the next SCK clock starts. At other timing, Write ID Page command
is not executed, and this Write ID Page command is cancelled. The write time of EEPROM requires time of tE/W (Max 3.5
ms).
During write operation, other than Read Status Register command is not accepted.
In case of Lock Status (LS) bit “1”, Write ID Page command can’t be executed.
Write ID Page command has Page Write Function same as Write command.
CSB rising valid timing to start write operation
CSB
SCK
SI
SO
0
1
2
3
4
5
6
7
～
～
～
～
～
～
～
～
～
～
～
～
Instruction Code (8 bit)
1
0
0
0
0
High-Z
0
1
13
17
18
～
～
23
24
～
～
～
～
0
～
～
0
～
～
WA5
～
～
～
～
～
～
30
29
31
32
Data Input (8 bit)
Address Input (16 bit)
～
～
0
25
WA0
D7
D6
～
～
～
～
D2
D1
D0
～
～
Figure 48. Write ID Page Command
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Timing Chart - continued
10. Read Lock Status Command (RDLS)
By Read Lock Status command, data of Lock Status can be read. As for this command, set CSB to Low, then input
address after Instruction Code of Read Lock Status command. Data output is started from SCK fall of 23 clock, and from
D7 to D0 sequentially. The data D0 indicates Lock Status bit. The data D7 to D1 are Don’t Care. This IC has increment
read function. After output of data for 1 byte (8 bits), by continuing input of SCK, this IC repeats to output data of the
Lock Status byte. In case of Lock Status (LS) bit “1”, ID Page is locked, Write ID Page command can’t be executed. In
case of LS bit “0”, ID Page is released to lock, Write ID Page command can be executed.
CSB
～
～
SCK
0
1
2
3
4
5
6
7
8
Instruction Code(8 bit)
SI
0
1
0
0
0
0
～
～
9
～
～
～
～
12
13
23
24
25
Address Input (16 bit)
1
1
0
0
～
～
High-Z
SO
～
～
1
0
0
～
～
～
～
29
～
～
31
30
～
～
Data Outputs of first byte (8 bit)
D7
D6
*
*
～
～
～
～
～
～*
D2
D1
D0
*
*
LS
second byte
* Don’t Care
Figure 49. Read Lock Status Command
11. Lock ID Page Command (LID)
By Lock ID Page command, data of Lock Status can be written. In case of Lock Status (LS) bit “1”, Lock ID Page
command can’t be executed permanently. As for this command, set CSB to Low, then input address and data after
Instruction Code of Lock ID Page command. To start write operation, set CSB Low to High after taking the last data
(D0), and before the next SCK clock starts. At other timing, Lock ID Page command is not executed, and this Lock ID
Page command is cancelled. The write time of EEPROM requires time of t E/W (Max 3.5 ms).
During write operation, other than Read Status Register command is not accepted.
CSB
SCK
SI
SO
CSB rising valid timing to start write operation
～
～
～
～
0
1
2
3
4
5
6
7
8
Instruction Code (8 bit)
1
0
0
0
0
0
～
～
9
～
～
～
～
12
23
13
Address Input (16 bit)
1
0
0
0
～
～
High-Z
0
1
～
～
24
D7
～
～
0
*
～
～
25
～
～
29
30
Data Input (8 bit)
D6
*
D2
～
～
*
*
～
～
～
～
31
D1
D0
LS
*
32
* Don’t Care
Figure 50. Lock ID Page Command
At Standby State
1. Standby Current
Set CSB = High, and be sure to set SCK, SI, WPB and HOLDB inputs = Low or High. Do not input intermediate voltage.
2. Timing
As shown in Figure.51, at standby, when SCK is High, even if CSB is fallen, SI status is not read at fall edge. SI status is
read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB = High status.
Even if CSB is fallen at SCK = SI = “High”,
SI status is not read at that edge.
CSB
Command start here. SI is read.
SCK
0
1
2
SI
Figure 51. Operating Timing
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Method to cancel each command
1. READ, RDID, RDLS
Method to cancel: cancel by CSB = High
Instruction Code
Address
Data
8 bits
16 bits
8 bits
Cancel available in all areas of read modes
Figure 52. READ, RDID, RDLS Cancel Valid Timing
2. RDSR
Method to cancel: cancel by CSB = High
Instruction Code
Data
8 bits
8 bits
Cancel available
in all areas of RDSR
Figure 53. RDSR Cancel Valid Timing
3. WRITE, WRID, LID
a: Instruction Code, Address Input Area
Cancellation is available by CSB = High.
b: Data Input Area (D7 to D1 input area)
Cancellation is available by CSB = High.
c: Data Input Area (D0 area)
When CSB is started, write starts.
After CSB rise, cancellation cannot be made by any
means.
d: tE/W Area
Cancellation is available by CSB = High. However,
when write starts (CSB is started) in the area c,
cancellation cannot be made by any means. And by
inputting on SCK clock, cancellation cannot be made.
In page write mode, there is write enable area at
every 8 clocks.
Instruction Code
Address
Data
8 bits
16 bits
8 bits
a
tE/W
b
d
c
SCK
SI
D7
D6
D5
D4
D3
D2
D1
D0
c
b
Figure 54. WRITE, WRID, LID Cancel Valid Timing
Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again.
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution/cancel becomes unstable, therefore, it is recommended to fall in
SCK = Low area. As for SCK rise, assure timing of tCSS/tCSH or higher.
4. WRSR
a: From Instruction code to 15th rising of SCK
Cancel by CSB = High.
b: From 15th rising of SCK to 16th rising of SCK (write
enable area)
When CSB is started, write starts.
c: After 16th rising of SCK
Cancel by CSB = High.
However, when write starts (CSB is started) in the
area b, cancellation cannot be made by any means.
And, by inputting on SCK clock, cancellation cannot
be made.
14
SCK
D1
SI
a
Instruction Code
15
16
17
D0
b
c
tE/W
Data
8 bits
8 bits
a
c
b
Figure 55. WRSR Cancel Valid Timing
Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again.
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution/cancel becomes unstable, therefore, it is recommended to fall in
SCK = Low area. As for SCK rise, assure timing of tCSS/tCSH or higher.
5. WREN/WRDI
a: From instruction code to 7th rising of SCK
Cancel by CSB = High.
b: Cancellation is not available when CSB is started
after 7th clock.
SCK
6
7
8
Instruction Code
8 bits
a
b
Figure 56. WREN/WRDI Cancel Valid Timing
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Application Examples
High Speed Operation
In order to realize stable high speed operations, pay attention to the following input/output pin conditions.
1. Pull Up, Pull Down Resistance for Input Pins
When to attach pull up, pull down resistance to EEPROM input pins, select an appropriate value for the microcontroller
VOL, IOL from VIL characteristics of this IC.
2. Pull Up Resistance
Microcontroller
IOLM
RPU
VOLM
𝑉𝐶𝐶 −𝑉𝑂𝐿𝑀
𝑅𝑃𝑈 ≥
EEPROM
(1)
𝐼𝑂𝐿𝑀
VILE
Low Output
(2)
𝑉𝑂𝐿𝑀 ≤ 𝑉𝐼𝐿𝐸
Low Input
Example) When Vcc = 5 V, VILE = 1.5 V, VOLM = 0.4 V, IOLM = 2 mA,
from the equation (1).
VILE : VIL of EEPROM
VOLM : VOL of Microcontroller
IOLM : IOL of Microcontroller
𝑅𝑃𝑈 ≥
Figure 57. Pull Up Resistance
5 − 0.4
2 × 10−3
𝑅𝑃𝑈 ≥ 2.3 [ kΩ ]
With the value of RPU to satisfy the above equation, VOLM becomes
0.4 V or lower, and with VILE (= 1.5 V), the equation (2) is also
satisfied.
And, in order to prevent malfunction, mistake write at power ON/OFF, be sure to make the CSB pin pull up.
3. Pull Down Resistance
Microcontroller
VOHM
High Output
𝑅𝑃𝐷 ≥
EEPROM
𝑉𝑂𝐻𝑀
(3)
𝐼𝑂𝐻𝑀
VIHE
IOHM
RPD
(4)
𝑉𝑂𝐻𝑀 ≥ 𝑉𝐼𝐻𝐸
High Input
Example) When VCC = 5 V, VOHM = VCC-0.5 V, IOHM = 0.4 mA,
VIHE = VCC x 0.7 V, from the equation (3),
VIHE : VIH of EEPROM
VOHM : VOH of Microcontroller
IOHM : IOH of Microcontroller
𝑅𝑃𝐷 ≥
Figure 58. Pull Down Resistance
5 − 0.5
0.4 × 10−3
𝑅𝑃𝐷 ≥ 11.3 [ kΩ ]
Further, by amplitude VIHE, VILE of signal input to EEPROM, operation speed changes. By inputting signal of amplitude of
Vcc/GND level to input, more stable high speed operations can be realized. On the contrary, when amplitude of
0.8Vcc/0.2Vcc is input, operation speed becomes slow.(Note 21)
In order to realize more stable high speed operation, it is recommended to make the values of RPU, RPD as large as
possible, and make the amplitude of signal input to EEPROM close to the amplitude of Vcc/GND level.
(Note 21) At this moment, operating timing guaranteed value is guaranteed.
°C
tPD - VIL Characteristic
80
70
60
Spec
tPD [ns]
50
40
30
Vcc = 2.5 V
Ta = 25 °C
VIH = Vcc
CL = 30 pF
20
10
0
0
0.2
0.4
0.6
VIL [V]
0.8
1
Figure 59. VIL dependency of Data Output Delay Time tPD
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Application Examples - continued
4. SO Load Capacitance Condition
Load capacitance of the SO Pin affects upon delay characteristic of SO output. (Data Output Delay Time, Time from
HOLDB to High-Z) In order to make output delay characteristic into higher speed, make SO load capacitance small. In
concrete, “Do not connect many devices to SO bus”, “Make the wire between the controller and EEPROM short”, and so
forth.
5. Other Cautions
Make the wire length from the Microcontroller to EEPROM input signal same length, in order to prevent setup/hold
violation to EEPROM, owing to difference of wire length of each input.
I/O Equivalence Circuits
1. Input (CSB, SCK, SI, HOLDB, WPB)
Figure 60. Input Equivalent Circuit (CSB, SCK, SI, HOLDB, WPB)
2. Output (SO)
Figure 61. Output Equivalent Circuit (SO)
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Caution on Power-Up Conditions
At power-up, as the VCC rises, the IC’s internal circuits may go through unstable low voltage area, making the IC’s internal
circuit not completely reset, hence, malfunction like miswriting and misread may occur. To prevent it, this IC is equipped with
Power-on Reset circuit. In order to ensure its operation, at power-up, please observe the conditions below. In addition, set
the power supply rise so that the supply voltage constantly increases from VBOT to VCC level. Furthermore, tINIT is the time
from the power become stable to the start of the first command input.
tR: VCC
tPOFF
tINIT
VCC
Command
start
VCC (Min)
VBOT
0V
Figure 62. Rise Waveform Diagram
Power-Up Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage at Power OFF
VBOT
-
-
0.3
V
Power OFF Time(Note 22)
tPOFF
1
-
-
ms
tINIT
0.1
-
-
ms
tR: VCC
0.001
-
100
ms
Initialize Time(Note 22)
Supply Voltage Rising Time
(Note 22)
(Note 22) Not 100 % Tested.
At power ON/OFF, set CSB = High (= Vcc).
When CSB is Low, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may
cause malfunction, mistake write or so. To prevent these, at power ON, set CSB = High. (When CSB is in High status, all
inputs are canceled.)
Vcc
VCC
GND
Vcc
CSB
GND
Good
Example
Bad
Example
Figure 63. CSB Timing at power ON/OFF
(Good example) the CSB Pin is pulled up to Vcc.
At power OFF, take 1 ms or higher before supply. If power is turned on without observing this condition, the IC internal
circuit may not be reset, which please note.
(Bad example) the CSB Pin is Low at power ON/OFF.
In this case, CSB always becomes Low (active status), and EEPROM may have malfunction, mistake write owing to
noises and the likes.
Even when CSB input is High-Z, the status becomes like this case, which please note.
Low Voltage Malfunction Prevention Function
LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ = 1.2 V) or below,
data rewrite is prevented.
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Noise Countermeasures
1. VCC Noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is
recommended to attach a bypass capacitor (0.1 μF) between IC VCC and GND. At that moment, attach it as close to IC
as possible. And, it is also recommended to attach a bypass capacitor between board VCC and GND.
2. SCK Noise
When the rise time (tRC) of SCK is long, and a certain degree or more of noise exists, malfunction may occur owing to
clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysteresis width of this circuit is set
about 0.2 V, if noises exist at SCK input, set the noise amplitude 0.2 Vp-p or below. And it is recommended to set the rise
time (tRC) of SCK 100 ns or below. In the case when the rise time is 100 ns or higher, take sufficient noise
countermeasures. Make the clock rise, fall time as small as possible.
3. WPB Noise
During execution of Write Status Register command, if there exist noises on the WPB pin, mistake in recognition may
occur and forcible cancellation may result, which please note. To avoid this, a Schmitt trigger circuit is built in WPB input.
In the same manner, a Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too.
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all
power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on
the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the operating conditions. The
characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always
be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Interpin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
10. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower
than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply
voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages
within the values specified in the electrical characteristics of this IC.
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temperature
and the decrease in nominal capacitance due to DC bias and others.
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Operational Notes - continued
12. Functional Safety
“ISO 26262 Process Compliant to Support ASIL-*”
A product that has been developed based on an ISO 26262 design process compliant to the ASIL level described in the
datasheet.
“Safety Mechanism is Implemented to Support Functional Safety (ASIL-*)”
A product that has implemented safety mechanism to meet ASIL level requirements described in the datasheet.
“Functional Safety Supportive Automotive Products”
A product that has been developed for automotive use and is capable of supporting safety analysis with regard to the
functional safety.
Note: “ASIL-*” is stands for the ratings of “ASIL-A”, “-B”, “-C” or “-D” specified by each product's datasheet.
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Ordering Information
B
R
2
5
H
2
5
6
x
x
x
-
5
A
C
x
x
BUS Type
25: SPI
Ambient Operating Temperature
/ Supply Voltage
-40 °C to +125 °C
/ 1.7 V to 5.5 V
Capacity
256 = 256 Kbit
Package
F: SOP8
FJ: SOP-J8
FVT: TSSOP-B8
FVM: MSOP8
NUX: VSON008X2030
5: Process Code
A: Revision
Product Rank
C: for Automotive Application
Packaging and Forming Specification
E2: Embossed tape and reel (SOP8, SOP-J8, TSSOP-B8)
TR: Embossed tape and reel (MSOP8, VSON008X2030)
Lineup
Package
Type
Quantity
Orderable Part Number
SOP8
Reel of 2500
BR25H256F
-5ACE2
SOP-J8
Reel of 2500
BR25H256FJ
-5ACE2
TSSOP-B8
Reel of 3000
BR25H256FVT
-5ACE2
MSOP8
Reel of 3000
BR25H256FVM
-5ACTR
VSON008X2030
Reel of 4000
BR25H256NUX
-5ACTR
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BR25H256xxx-5AC Series
Marking Diagrams
SOP8 (TOP VIEW)
MSOP8 (TOP VIEW)
5
Part Number Marking
5 H 2 5 A
H
A
5
J
5
Part Number Marking
LOT Number
LOT Number
Pin 1 Mark
Pin 1 Mark
VSON008X2030 (TOP VIEW)
SOP-J8 (TOP VIEW)
Part Number Marking
Part Number Marking
5 H 2 5 A
5 H 2
LOT Number
5 A 5
5
LOT Number
Pin 1 Mark
Part Number Marking
5
5 H 2 5 A
TSSOP-B8 (TOP VIEW)
Pin 1 Mark
LOT Number
Pin 1 Mark
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BR25H256xxx-5AC Series
Physical Dimension and Packing Information
Package Name
SOP8
(Max 5.35 (include.BURR))
(UNIT: mm)
PKG: SOP8
Drawing No.: EX112-5001-1
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BR25H256xxx-5AC Series
Physical Dimension and Packing Information - continued
Package Name
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SOP-J8
TSZ02201-0G1G0G100570-1-2
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BR25H256xxx-5AC Series
Physical Dimension and Packing Information - continued
Package Name
www.rohm.com
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TSSOP-B8
TSZ02201-0G1G0G100570-1-2
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BR25H256xxx-5AC Series
Physical Dimension and Packing Information - continued
Package Name
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MSOP8
TSZ02201-0G1G0G100570-1-2
05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Physical Dimension and Packing Information - continued
Package Name
www.rohm.com
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VSON008X2030
TSZ02201-0G1G0G100570-1-2
05.Jan.2022 Rev.002
BR25H256xxx-5AC Series
Revision History
Date
Revision
08.Jan.2021
001
05.Jan.2022
002
Changes
New Release
P.1 Add "Functional safety supportive automotive products".
P.6 Add Note.16.
P.30 Add Functional Safety in Operational Notes.
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
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Rev.001
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