Datasheet
600V High Voltage 3 Phase Bridge Driver
Integrated Bootstrap Diode
BS2132F
Key Specifications
General Description
High-Side Floating Supply Offset Voltage:
600V
11.5V to 20V
Input Voltage Range:
Output Current IO+/IO-:
200mA/350mA(Typ)
Bootstrap Diode Current Limit Resistance: 28Ω(Typ)
OCP Detect Voltage:
0.46V(Typ)
OCP Blanking Time:
150ns(Typ)
Turn-on/Turn-off Time:
630ns/580ns(Typ)
Offset Supply Leakage Current:
50µA(Max)
Operating Temperature Range:
-40°C to +125°C
The BS2132F is a monolithic bridge driver IC, which can
drive external Nch-FET and IGBT driver in 3 phase
systems with bootstrap operations. 600V high voltage
bootstrap diode is integrated between the VCC pin and
the VB pins.
The logic inputs can be used 3.3V and 5.0V.
As a protection function, the device includes an
Undervoltage Lockout (UVLO) circuit between VCC-COM
and between VB-VS and an Over Current Protection
(OCP) circuit.
In addition, the /FAULT pin outputs a protection detecting
signal, and the RCIN pin can determine the OCP holding
time by external resistance and capacitance.
Package
W(Typ) x D(Typ) x H(Max)
18.50mm x 9.90mm x 2.41mm
SOP28
Features
High-Side Floating Supply Offset Voltage Range to
600V
Gate Drive Supply Range from 11.5V to 20V
Integrated 600V High Voltage Bootstrap Diode
between the VCC pin and the VB pin
Built-in Undervoltage Lockout (UVLO) for Both
Channels
Built-in High Precision (0.46V±5%) Over Current
Protection (OCP) Circuit
Built-in the Enable Pin (EN) which Enable I/O
Functionality
Built-in the /FAULT pin which is Protection Detecting
Signals (OCP and UVLO) output pin
RCIN Pin can determine the OCP holding time by
External Resistance and Capacitance
3.3V and 5.0V Input Logic Compatible
Output in Phase with Input
Applications
MOSFET and IGBT Driver Applications
Typical Application Circuit
Up to 600V
VCC
VCC
VB1
HIN1
HIN1
HO1
HIN2
HIN2
VS1
HIN3
HIN3
LO1
LIN1
LIN1
LIN2
LIN2
VB2
LIN3
LIN3
HO2
/FAULT
EN
/FAULT
VS2
ITRIP
LO2
EN
VB3
RCIN
HO3
VSS
VS3
COM
LO3
M
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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〇This product has no designed protection against radioactive rays
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BS2132F
Pin Configuration
(TOP VIEW)
1
VCC
VB1
28
2
HIN1
HO1
27
3
HIN2
VS1
26
4
HIN3
NC
25
5
LIN1
VB2
24
6
LIN2
HO2
23
7
LIN3
VS2
22
8
/FAULT
NC
21
9
ITRIP
VB3
20
10
EN
HO3
19
11
RCIN
VS3
18
12
VSS
NC
17
13
COM
LO1
16
14
LO3
LO2
15
Figure 2. Pin Configuration
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BS2132F
Pin Description
Pin No.
Pin Name
Function
1
VCC
Low-side supply voltage
2
HIN1
Logic input for high-side gate driver output (HO1), in phase
3
HIN2
Logic input for high-side gate driver output (HO2), in phase
4
HIN3
Logic input for high-side gate driver output (HO3), in phase
5
LIN1
Logic input for low-side gate driver output (LO1), in phase
6
LIN2
Logic input for low-side gate driver output (LO2), in phase
7
LIN3
Logic input for low-side gate driver output (LO3), in phase
8
/FAULT
9
ITRIP
10
EN
11
RCIN
External RC-network to define /FAULT clear delay after the /FAULT signal
12
VSS
Logic ground
13
COM
Power ground
14
LO3
Low-side gate drive output
15
LO2
Low-side gate drive output
16
LO1
Low-side gate drive output
17
NC
Non-Connection
18
VS3
High-side negative power supply
19
HO3
High-side gate drive output
20
VB3
High-side positive power supply
21
NC
Non-Connection
22
VS2
High-side negative power supply
23
HO2
High-side gate drive output
24
VB2
High-side positive power supply
25
NC
Non-Connection
26
VS1
High-side negative power supply
27
HO1
High-side gate drive output
28
VB1
High-side positive power supply
OCP or low-side UVLO(VCC-COM) detect signal output (negative logic, open-drain output)
Analog input for over current shutdown, activates /FAULT and RCIN to VSS
Logic input to enable I/O functionality (positive logic)
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BS2132F
Block Diagram
VB1
HIN1
INPUT
NOISE
FILTER
LIN1
INPUT
NOISE
FILTER
DEAD TIME &
SHOOTTHROUGH
PREVENTION
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
HV
LEVEL
SHIFTER
UV
DETECT
RESET
SET
PULSE
FILTER
R
R
Q
DRV
HO1
S
VS1
VB2
INPUT
NOISE
FILTER
HIN2
DEAD TIME &
SHOOTTHROUGH
PREVENTION
INPUT
NOISE
FILTER
LIN2
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
HV
LEVEL
SHIFTER
UV
DETECT
RESET
SET
PULSE
FILTER
R
R
Q
DRV
HO2
S
VS2
VB3
INPUT
NOISE
FILTER
HIN3
DEAD TIME &
SHOOTTHROUGH
PREVENTION
INPUT
NOISE
FILTER
LIN3
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
HV
LEVEL
SHIFTER
UV
DETECT
RESET
SET
PULSE
FILTER
R
R
Q
DRV
HO3
S
VS3
VCC
UV
DETECT
INPUT
NOISE
FILTER
EN
ITRIP
+
-
INPUT
NOISE
FILTER
0.46V
S
DELAY
DRV
LO1
DELAY
DRV
LO2
DELAY
DRV
LO3
Q
Latch
R
RCIN
/FAULT
COM
VSS
Figure 3. Functional Block Diagram
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BS2132F
Absolute Maximum Ratings
(Unless otherwise specified
Ta=25°C, All voltages are absolute voltages referenced to VSS. VSS=0V)
Parameter
Symbol
Rating
Unit
High-side Offset Voltage
VS
VB - 25 to VB + 0.3
V
High-side Floating Supply Voltage
VB
VCOM - 0.3 to VCOM + 625
V
High-side Floating Output Voltage HOx(Note 1)
VHO
VS - 0.3 to VB + 0.3
V
Low-side and Logic Fixed Supply Voltage (VCC vs VSS)
VCC
- 0.3 to + 25
V
Low-side and Logic Fixed Supply Voltage (VCC vs COM)
VCCCOM
- 0.3 to + 25
V
Low-side Output Voltage LOx (LOx vs COM) (Note 1)
VLO
- 0.3 to VCCCOM + 0.3
V
Logic Input Voltage HINx, LINx(Note 1), EN
VIN
- 0.3 to VCC + 0.3
V
/FAULT Output Voltage
VFLT
- 0.3 to VCC + 0.3
V
RCIN Input Voltage
VRCIN
- 0.3 to VCC + 0.3
V
ITRIP Input Voltage
VITRIP
- 0.3 to VCC + 0.3
V
Power Ground
VCOM
- 5.5 to + 5.5
V
Allowable Offset Voltage Slew Rate
dVS/dt
50
V/ns
Tstg
- 55 to + 150
°C
Tjmax
150
°C
Storage Temperature Range
Maximum Junction Temperature
(Note 1) x=1, 2, 3.
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance(Note 2)
Parameter
Symbol
Thermal Resistance (Typ)
Unit
1s(Note 4)
2s2p(Note 5)
θJA
136.9
88.6
°C/W
ΨJT
19
15
°C/W
SOP28
Junction to Ambient
Junction to Top Characterization
Parameter(Note 3)
(Note 2) Based on JESD51-2A(Still-Air)
(Note 3) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 4) Using a PCB board based on JESD51-3.
(Note 5) Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.6mmt
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
74.2mm x 74.2mm
70μm
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BS2132F
Recommended Operating Ratings
(Unless otherwise specified
All voltages are absolute voltages referenced to VSS. VSS=0V)
Parameter
Symbol
Min
Typ
Max
Unit
High-side Floating Supply Offset Voltage (VSx vs COM) (Note 6)
VS
-
-
600
V
High-side Floating Supply Voltage (VBx vs VSx) (Note 6)
VBS
11.5
15
20
V
High-side Floating Output Voltage (HOx vs VSx) (Note 6)
VHO
0
15
VBS
V
Low-side Supply Voltage (VCC vs VSS)
VCC
11.5
15
20
V
Low-side Supply Voltage (VCC vs COM)
VCCCOM
11.5
15
20
V
Low-side Output Voltage LOx (LOx vs COM) (Note 6)
VLO
0
-
VCCCOM
V
Logic Input Voltage HINx, LINx(Note 6), EN
VIN
0
-
VCC
V
/FAULT Output Voltage
VFLT
0
-
VCC
V
RCIN Input Voltage
VRCIN
0
-
VCC
V
ITRIP Input Voltage
VITRIP
0
-
VCC
V
Power Ground
VCOM
-2.5
-
+2.5
V
Operating Temperature
Topr
-40
-
+125
°C
(Note 6) x=1, 2, 3.
Static Logic Function Table
VCC
VB-VS
RCIN
ITRIP
EN
/FAULT
HO1, HO2, HO3
LO1, LO2, LO3
VRCIN+
0V
0V
High-Z
0V
0V
(Note 7) X is not depend on the value.
(Note 8) State after the OCP. Because the latch circuit is not reset, the OCP state is maintained.
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BS2132F
DC Operation Electrical Characteristics
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
Parameter
VCC and VBS Supply Undervoltage
Positive Going Threshold
VCC and VBS Supply Undervoltage
Negative Going Threshold
VCC Supply Undervoltage Lockout
Hysteresis
Offset Supply Leakage Current
Symbol
VCCUV+
VBSUV+
VCCUVVBSUVVCCUVH
VBSUVH
ILK
Limit
Min
Typ
Max
9.6
10.4
11.2
8.6
9.4
10.2
-
1.0
-
-
-
50
Unit
Conditions
V
VB = VS = 600V
µA
Quiescent VBS Supply Current
IQBS
-
60
120
VIN = 0V or 5V
Quiescent VCC Supply Current
IQCC
-
0.7
1.3
Logic “1” Input Voltage
VIH
2.6
-
-
Logic “0” Input Voltage
VIL
-
-
0.8
EN Positive Going Threshold
VEN+
-
-
2.6
EN Negative Going Threshold
VEN-
0.8
-
-
VRCIN+
-
8
-
VRCIN_HYS
-
3
-
ITRIP Positive Going Threshold
VIT_TH+
0.437
0.46
0.483
ITRIP Hysteresis
VIT_HYS
-
0.07
-
High Level Output Voltage,
VCC (VBS) - VLO (VHO)
VOH
-
-
1.4
Low Level Output Voltage, VLO (VHO)
VOL
-
-
0.6
Logic “1” Input Bias Current
IIN+
-
100
150
Logic “0” Input Bias Current
IIN-
-
-
1.0
IITRIP
-
1
2
IO+
120
200
-
IO-
250
350
-
IRCIN
-
-
1
RCIN Low ON Resistance
RON_RCIN
-
50
100
/FAULT Low ON Resistance
RON_FLT
-
50
100
Bootstrap Diode Resistance
RBOOT
16
28
40
Bootstrap Diode Forward Voltage
VFBOOT
0.4
0.7
1.0
V
Bootstrap Diode Leakage Current
ILKBOOT
-
-
50
µA
mA
VIN = 0V or 5V
V
RCIN Positive Going Threshold
V
RCIN Hysteresis
V
ITRIP Input Bias Current
Output High Short Circuit Pulsed
Current
Output Low Short Circuit Pulsed
Current
RCIN Input Bias Current
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V
VIN = 3.3V
µA
VIN = 0V
VITRIP = 0V or 3.3V
mA
7/29
IO = 20mA
VO = 0V
Pulse Width ≤ 10µs
VO = 15V
Pulse Width ≤ 10µs
µA
VRCIN = 0.5V
Ω
VFLT = 0.5V
IF1 = 10mA, IF2 = 20mA
IF = 0.5mA,
VFBOOT = VCC - VB
VB = VS = 600V,
VCC = VSS
TSZ02201-0252AA800120-1-2
18.May.2018 Rev.001
BS2132F
AC Operation Electrical Characteristics
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
Parameter
Symbol
Limit
Min
Typ
Max
Unit
Conditions
Turn-on Propagation Delay
tON
480
630
780
VS = 0V, VIN = 0V to 5V
Turn-off Propagation Delay
tOFF
430
580
730
VS = 0V or 600V,
VIN = 5V to 0V
Turn-on Rise Time
tR
-
125
190
VIN = 0V to 5V
Turn-off Fall Time
tF
-
50
75
VIN = 5V to 0V
tEN
430
580
730
VIN = 5V, VEN = 5V to 0V
tITRIP
500
750
1000
EN Low to Output Shutdown
Propagation Delay
ITRIP to Output Shutdown
Propagation Delay
VITRIP = 5V
ns
ITRIP Blanking Time
tBL
100
150
-
VITRIP = 5V
ITRIP to /FAULT Propagation Delay
tFLT
400
600
800
VITRIP = 5V
Input Filter Time (HINx, LINx)(Note 9)
tFILIN
100
200
-
VIN = 0V to 5V, 5V to 0V
Enable Input Filter Time
tFLTEN
100
200
-
VEN = 0V to 5V, 5V to 0V
Dead Time
tDT
200
300
450
VIN = 0V to 5V, 5V to 0V
Delay Matching, High-side & Lowside Turn-on/off
tMT
-
-
150
tFLTCLR
1.3
1.65
2.0
/FAULT Clear Time
ms
RCIN : R = 2MΩ, C = 1nF
(Note 9) x=1, 2, 3.
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BS2132F
Typical Performance Curves
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
15.0
VBS Supply Undervoltage Threshold :
VBSUV+/VBSUV-[V]
VCC Supply Undervoltage Threshold :
VCCUV+ /VCCUV-[V]
15.0
VCCUV+
12.0
9.0
VCCUV6.0
3.0
9.0
VBSUV6.0
3.0
0.0
0.0
-50
-25
0
25
50
75 100
Ambient Temperature : Ta[ºC]
-50
125
-25
0
25
50
100
125
Figure 5. VBS Supply Undervoltage Threshold vs
Ambient Temperature
1.0
1.0
75
Ambient Temperature : Ta[ºC]
Figure 4. VCC Supply Undervoltage Threshold vs
Ambient Temperature
VB = VS = 600V
Tj = 150°C
Offset Supply Leakage Current : ILK[µA]
Offset Supply Leakage Current : ILK[µA]
VBSUV+
12.0
VB = VS
0.8
0.6
0.4
0.2
0.8
0.6
0.4
0.2
0.0
0.0
0
100
200
300
400
500
600
-40
700
Input Supply Voltage : VB[V]
Figure 6. Offset Supply Leakage Current vs
Input Supply Voltage VB
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0
40
80
120
160
Ambient Temperature : Ta[ºC]
Figure 7. Offset Supply Leakage Current vs
Ambient Temperature
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BS2132F
Typical Performance Curves – continued
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
1.0
Quiescent VCC Supply Current : IQCC[mA]
Quiescent VCC Supply Current : IQCC[mA]
1.0
0.8
0.6
0.4
0.2
0.0
VCC = 15V
0.8
0.6
0.4
0.2
0.0
0
2
4
6
8 10 12 14 16
Input Supply Voltage : VCC[V]
18
20
-50
Figure 8. Quiescent VCC Supply Current vs
Input Supply Voltage VCC
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
Figure 9. Quiescent VCC Supply Current vs
Ambient Temperature
125
Quiescent VBS Supply Current : IQBS[µA]
125
Quiescent VBS Supply Current : IQBS[µA]
-25
100
75
50
25
0
0
2
4
6
8 10 12 14 16
Input Supply Voltage : VBS[V]
18
20
100
75
50
25
0
-50
-25
0
25
50
75
100
125
Ambient Temperature : Ta[ºC]
Figure 10. Quiescent VBS Supply Current vs
Input Supply Voltage VBS
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VBS = 15V
Figure 11. Quiescent VBS Supply Current vs
Ambient Temperature
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BS2132F
Typical Performance Curves – continued
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
2.5
Logic "1"/"0" Input Voltage LIN : VIH/VIL[V]
Logic "1"/"0" Input Voltage HIN : VIH/VIL[V]
2.5
VIH
2.0
1.5
1.0
VIL
0.5
VIH
2.0
1.5
1.0
VIL
0.5
0.0
0.0
-50
-25
0
25
50
75
100
Ambient Temperature : Ta[ºC]
-50
125
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
Figure 13. Logic “1”/”0” Input Voltage LIN vs
Ambient Temperature
Figure 12. Logic “1”/”0” Input Voltage HIN vs
Ambient Temperature
0.8
ITRIP Threshold Voltage : VIT_TH+ [V]
1000
Logic "1" Input Bias Current : IIN+[µA]
-25
800
600
400
200
0
0
2
4
6
8 10 12 14 16
Logic Input Voltege : VIN[V]
18
20
Figure 14. Logic “1” Input Bias Current vs
Logic Input Voltage VIN
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0.6
VIT_TH+
0.4
VIT_TH0.2
0
-50
-25
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
Figure 15. ITRIP Threshold Voltage vs
Ambient Temperature
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BS2132F
Typical Performance Curves – continued
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
2.0
Io = 20mA
Io = 20mA
Low Level Output Voltage : VOL[V]
High Level Output Voltage VCC(VBS) - VO:
VOH[V]
2.0
1.5
1.0
0.5
0.0
1.5
1.0
0.5
0.0
-50
-25
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
-50
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
Figure 17. Low Level Output Voltage vs
Ambient Temperature
Figure 16. High Level Output Voltage vs
Ambient Temperature
100
100
VRCIN = 0.5V
/FAULT Low ON Resistance : RON_FLT[Ω]
RCIN Low ON Resistance : RON_RCIN[Ω]
-25
80
60
40
20
VFLT = 0.5V
80
60
40
20
0
0
-50
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Figure 19. /FAULT Low ON Resistance vs
Ambient Temperature
Figure 18. RCIN Low ON Resistance vs
Ambient Temperature
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-50
Ambient Temperature : Ta[ºC]
Ambient Temperature : Ta[ºC]
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BS2132F
Typical Performance Curves – continued
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
Bootstrap Diode Forward Voltage : V FBOOT[V]
Bootstrap Diode Resistance : RBOOT[Ω]
100
80
60
40
20
0
-50
-25
0
25
50
75
100
Ambient Temperature : Ta[ºC]
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
125
Figure 20. Bootstrap Diode Resistance vs
Ambient Temperature
-50
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
Figure 21. Bootstrap Diode Forward voltage vs
Ambient Temperature
1000
2
Turn-on/off Rise/Fall Time High-side :
tR/tF[µs]
Turn-on/off Propagation Delay High-side :
tON/tOFF[ns]
-25
800
Turn-on
600
Turn-off
400
200
0
1.6
1.2
Rise
0.8
Fall
0.4
0
-50
-25
0
25
50
75
100
125
Ambient Temperature : Ta[ºC]
Figure 22. Turn-on/off Propagation Delay High-side vs
Ambient Temperature
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0
2500
5000
7500
Load Capacitance : CL[pF]
10000
Figure 23. Turn-on/off Rise/Fall Time High-side vs
Load Capacitance
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Typical Performance Curves – continued
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
2
800
Turn-on/off Rise/Fall Time Low-side :
tR/tF[µs]
Turn-on/off Propagation Delay Low-side :
tON/tOFF[ns]
1000
Turn-on
600
Turn-off
400
200
1.6
1.2
Rise
0.8
Fall
0.4
0
0
-50
-25
0
25
50
75
100
125
0
2500
5000
7500
Load Capacitance : CL[pF]
Ambient Temperature : Ta[ºC]
Figure 25. Turn-on/off Rise/Fall Time Low-side vs
Load Capacitance
Figure 24. Turn-on/off Propagation Delay Low-side vs
Ambient Temperature
500
500
400
400
Dead Time LO→HO : tDT[ns]
Dead Time HO→LO : tDT[ns]
10000
300
200
100
0
300
200
100
0
-50
-25
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
-25
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
Figure 27. Dead Time LO→HO vs
Ambient Temperature
Figure 26. Dead Time HO→LO vs
Ambient Temperature
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BS2132F
Typical Performance Curves – continued
(Unless otherwise specified
Ta=25°C, VCC=VBS=15V, VSS=VCOM=VS1=VS2=VS3, CL=1000pF)
1000
ITRIP to Output Shutdown Propagation
Delay : tITRIP[ns]
Delay Matching, HS & LS Turn-on/off :
tMT[ns]
100
80
60
40
20
800
600
400
200
0
0
-50
-25
0
25
50
75
100
125
-50
-25
25
50
75
100
125
Figure 29. ITRIP to Output Shutdown Propagation Delay vs
Ambient Temperature
Figure 28. Delay Matching, HS & LS Turn-on/off vs
Ambient Temperature
1000
5
RCIN : R = 2MΩ, C = 1nF
/FAULT Clear Time : tFLTCLR[ms]
ITRIP to /FAULT Propagation Delay : tFLT[ns]
0
Ambient Temperature : Ta[ºC]
Ambient Temperature : Ta[ºC]
800
600
400
200
0
4
3
2
1
0
-50
-25
0
25
50
75
100
125
Ambient Temperature : Ta[ºC]
-25
0
25
50
75
100
Ambient Temperature : Ta[ºC]
125
Figure 31. /FAULT Clear Time vs
Ambient Temperature
Figure 30. ITRIP to /FAULT Propagation Delay vs
Ambient Temperature
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BS2132F
Timing Chart
50%
50%
HINx
LINx
tON
tOFF
tR
90%
90%
HOx
LOx
tF
10%
10%
x=1, 2, 3
(a) Propagation Delay
～
～
HINx
50%
50%
～
～
LINx
90%
LOx
tDT
tDT
HOx
～
～
～～
10%
90%
10%
(b) Dead time
x=1, 2, 3
Figure 32. Timing Chart
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BS2132F
Timing Chart – continued
Shoot-Through
Prevention
HINx
LINx
EN
Shutdown
HOx
LOx
Internal Deadtime
x=1, 2, 3
Figure 33. Input-Output Logic
V㏄
VCCUVH
VCCUV+
VCCUV-
LOx
LINx
/FAULT
x=1, 2, 3
Figure 34. UVLO of VCC Timing Chart
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BS2132F
Over Current Protection
As soon as the ITRIP voltage is exceeded the threshold voltage VIT_TH+=0.46V (Typ), the RCIN pin changes from “H” to ”L”
by discharge SW being turned on, and the /FAULT pin changes from “High-Z” to “L”.
ITRIP blanking time tBL=150ns (Typ) prevents the driver to detect false over-current protection events which caused by
noise. However, it is recommended to add a ceramic capacitor near the ITRIP pin.
The RCIN voltage increases by time constant of external resistance and capacitance. As soon as the RCIN voltage is
exceeded VRCIN+=8V (Typ), the /FAULT pin changes from “L” to “High-Z”.
Also, the RCIN voltage operates in the voltage VRCIN+ or less. However, it is not returned with stopping when the ITRIP
voltage goes over threshold voltage VIT_TH+ once. The RCIN voltage to recommend at the normal operation is VRCIN+ or
more.
VIT_TH+
VIT_TH-
ITRIP
VRCIN+
VRCIN_HYS
RCIN
tFLT
tFLTCLR
/FAULT
High-Z
High-Z
tITRIP
HOx/LOx
HINx/LINx
x=1, 2, 3
Figure 35. OCP Detection Timing Chart
The over current detection value is determined by R1, R2, and RS, which are connected to the ITRIP pin as Figure 36.
It is determined by the following equation.
I OCP
R1 R2 VIT _ TH
R2
RS
where:
I OCP
is over current detection value.
VIT _ TH
RS
is OCP threshold voltage 0.46V(Typ).
is shunt resistor.
It is determined the reset time when the /FAULT pin changes from “L” to “High-Z” after over current protection was removed
by the following equation.
V
t FLTCLR RRCIN C RCIN ln 1 RCIN
VCC
where:
VRCIN
is RCIN threshold voltage 8V(Typ).
Up to 600V
VCC
HINx
VBx
LINx
HOx
/FAULT
RRCIN
EN
RCIN
CRCIN
TO LOAD
VSx
ITRIP
VSS
LOx
COM
x=1, 2, 3
R1
RS
R2
Figure 36. OCP Detection Schematic
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BS2132F
Application Components Selection Method
(1) Gate Resistor
The gate resistor RG(on/off) is selected to the switching speed
of the power device. The switching time (tSW) is defined as
the time spent to reach the end of the plateau voltage, so
the turn-on gate resistor RG(on) can be calculated using the
following formulas.
Ig
Ig
RG(on)
HOx
(1)
t SW
Qgs Qgd
Cgd
Rpon
Rnoff
Qgs Qgd
RTOTAL ( on) R pon RG ( on)
t sw
VBx
VBS Vgs(th )
Ig
(Qgs Qgd )( R pon RG ( on) )
(VBS Vgs(th ) )
(2)
(3)
Cgs
RG(off)
VSx
BS2132F
x=1, 2, 3
Figure 37. Gate Driver Equivalent Circuit
Where:
Ig
is the gate current of the power device.
Qgs
is the charge between gate and source of the power device.
Qgd
is the charge between gate and drain of the power device.
Vgs(th)
is the threshold voltage of the power device.
The turn-on gate resistance can be changed to control
output slew rate (dVs/dt). The slew rate of the power device
is determined by the following equation.
Ig
dVs
dt
C rss
VDS
dVs/dt
(4)
ID
where:
C rss
VGS
is the feedback capacitance.
The gate resistance is determined as follows by
substituting equation (4) into equation (2).
RTOTAL ( on) R pon RG ( on)
RG ( on)
VBS Vgs(th )
R pon
dVs
Crss
dt
VBS Vgs(th )
dVs
Crss
dt
tSW
(5)
Figure 38. Gate Charge Transfer Characteristics
(6)
When other power devices are turned on, current flows in the power device which is off through C gd. At this point, the
gate resistance (RG(off)) should be set so that the gate voltage does not exceed the threshold of the power device and
turn on the power device itself.
Vgs(th ) ( Rnoff RG ( off ) ) I g ( Rnoff RG ( off ) ) C gd
RG ( off )
Vgs(th )
Rnoff
dVs
C gd
dt
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dVs
(7)
dt
(8)
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BS2132F
Application Components Selection Method – continued
(2) Bootstrap Capacitor CBS
To reduce ripple voltage, ceramic capacitors with low ESR value are recommended for use in the bootstrap circuit.
The bootstrap capacitor is determined by the voltage drop level and the total amount of the charge supplied.
The maximum voltage drop to be able to turn on the power device of the high-side is determined by following formula.
VBS VCC VF VGSMIN VOL VRS
(9)
where:
VCC
is the gate driver supply voltage.
VF
is the bootstrap diode forward voltage drop.
VGSMIN is the minimum gate-source voltage which can turn on the power device.
VOL is the ON voltage of the low-side power device.
VRS is the voltage of the OCP resistance.
The total amount of the charge (QTotal) supplied by the bootstrap capacitor is calculated by the following formula.
QTotal QG ( I LKGS I LK I LKDIO I QBS ) t HON
(10)
where:
QG
is the total gate charge.
I LKGS is the switch gate-source leakage current.
I LKDIO is the bootstrap diode leakage current.
I LK is the level shifter circuit leakage current.
I QBS
is the VB-VS supply current.
t HON
is the high-side switch on time.
The bootstrap capacitance should satisfy the following formula.
C BS
QTotal
VBS
(11)
However, VB-VS voltage is the voltage that VF of internal bootstrap diode was dropped. BS2132F has UVLO function
between VB and VS. The value of VCC and CBS should be set so that UVLO does not detect and ΔVBS has margin
enough. It is recommended to insert a 1 μF ceramic capacitor near VB-VS as a measure against noise.
Up to 600V
VF
VCC
HINx
VBx
LINx
HOx
/FAULT
VSx
VOL
EN
RCIN
ITRIP
VSS
TO LOAD
VGS
LOx
COM
VRS
x=1, 2, 3
Figure 39. Bootstrap Power Supply Circuit
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BS2132F
(2)
Bootstrap Capacitor CBS
– continued
In addition, average current to charge from VCC to CBS in operation is calculated by the following formula, and VBOOT
between VCC-VB voltage is Figure 40.
I CHARGE I GC I LV
9
CISS・VBS ・
0 f OSC 2.5 10 f OSC
(12)
where:
I GC
is average gate charge current of power device.
I LV
is average supply current of level shifter circuit.
VBS 0 is VS=0, and voltage between VB-VS of static state ( VBS 0 VCC VF ).
CISS is input capacitance of power device.
f OSC is operation frequency of high-side.
50
VCC=15V
ICHARGE[mA]
40
30
20
10
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
VBOOT[V]
Figure 40. ICHARGE vs VBOOT (VCC-VB voltage)
It is necessary to satisfy following formula not to operate UVLO between VB-VS.
1
VCC VBOOT VBS VBSMIN
2
(13)
where:
VBSMIN
is minimum operating voltage between VB-VS.
When equation (13) is not satisfied, it may not operate normally by UVLO detection. In the case, measures such as
adding a bootstrap diode of low-VF are required. It is recommended to evaluate enough.
(3) Input Capacitor
A low-ESR ceramic capacitor should be used near the VCC pin to reduce input ripple voltage.
To supply charge to high-side and low-side, the capacitor of VCC is recommended to use a ceramic capacitor four times
or more the minimum value of the bootstrap capacitor CBS calculated by equation (11).
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BS2132F
Application Components Selection Method – continued
(4) Input Signals Interval ΔtIN
The minimum interval of input signals (ΔtIN(Min)) to
prevent the power device of high-side and low-side
form shoot through can be calculated using the
following formula.
t DEAD (tON t IN ) (tOFF t F )
(14)
t F (ln 0.1 ln 0.9)
(15)
( RNON RG ) CL
(16)
LINx(HINx)
HINx(LINx)
50%
∆tIN
50%
tF
LOx(HOx)
90%
tOFF
where:
10%
t ON is turn-on propagation delay.
t OFF is turn-off propagation delay.
t F is turn-off fall time.
RNON is on-resistance of Nch-FET
tON
HOx(LOx)
10%
tDEAD
constituting the final stage inverter.
RG
CL
is gate resistance.
x=1, 2, 3
Figure 41. Shoot-Through Prevention Timing Chart
is load capacitance.
To prevent shoot through, it should be designed the timing to satisfy following formula.
t DEAD 0
(17)
(tON t IN ) (tOFF t F ) 0
(18)
t IN (t OFF t ON ) t F
(19)
t IN ( Min) (t OFF ( Max) t ON ( Min) ) ( RNON ( Max) RG ) C L (ln 0.1 ln 0.9)
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BS2132F
Overshoot / Undershoot of The Output Terminal at The Time of The Switching
The occurrence of overshoot / undershoot may be detected by the parasitic inductance of the PCB and the bonding wire in
the IC. The mechanism of overshoot in the switching off is Figure 43.
(1) After Pch-FET is turn-off, current flows from HO to VB through capacitance between Gate-Source and Gate-Drain.
(2) The current flows from HO to VB through parasitic diode of Pch-FET by the parasitic inductance. Forward voltage
VF of the parasitic diode is increased, and the HO voltage becomes VB+VF. Nch-FET is turn-on and it is discharged
to VS.
The undershoot of the switching on may be caused by the same mechanism, too.
In addition, it may be caused in low-side output LO because the circuit structure is the same. The overshoot / undershoot
voltage changes by the current of the parasitic diode.
When the overshoot / undershoot voltage is large, please adjust the gate resistance to slow the switching speed and
connect to reduce the parasitic inductance.
VBx
HOx
Parasitic inductance of bonding wire and PCB
VSx
x=1, 2, 3
Parasitic diode and capacitance between Gate-Source and Gate-Drain
Figure 42. Schematic with Parasitic Inductance
(1)
(2)
VBx
VBx
ON→OFF
Vgp
Vgp
HOx
OFF
Vgn
Vgn
OFF
HOx
VSx
OFF
x=1, 2, 3
VSx
x=1, 2, 3
Figure 43. Mechanism of Overshoot
Overshoot
HO-VB
500mV/div
Figure 44. Overshoot Wave
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BS2132F
PCB Layout
1.
Power GND and Logic GND
Surge voltage is caused by current of Power GND and parasitic inductance of the wire. Logic GND level fluctuates by
surge propagating in Logic GND, and incorrect signal may be input to input terminal which is based on Logic GND. It is
not recommended to connect Power GND and Logic GND by common all over pattern, and It is recommended to connect
Power GND and Logic GND at only a point.
2.
Shunt Resistor of OCP detection
It is recommended to locate a shunt resistor near the external power device of low-side. If the wiring is long, surge voltage
is caused by parasitic inductance and it may be incorrectly detected OCP. The wiring of COM devided from the shunt
resistor should be divided near the shunt resistor.
3.
ITRIP Filter Capacitor
To prevent a malfunction, it is recommended to locate a ceramic capacitor for filter near the ITRIP pin. GND of the
capacitor should be connected to Logic GND.
4.
Input Capacitor and Zener Diode
An input capacitor and a zener diode, a bootstrap capacitor should be located near the pin. It is recommended to select
a low ESR capacitor such as a ceramic capacitor.
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BS2132F
I/O Equivalence Circuits
Pin No.
Pin
Name
Pin Equivalent Circuit
Pin No.
Pin
Name
Pin Equivalent Circuit
VCC
VCC
1
VCC
12
VSS
13
COM
2,3,4
VSS
5,6,7
10
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
LINx
HINx
EN
EN
VSS
COM
x=1, 2, 3
VCC
8
/FAULT
11
RCIN
VCC
RCIN
/FAULT
9
ITRIP
ITRIP
VSS
VSS
VCC
VBx
VS1
VS2
VS3
18,22,26
14,15,16
LO1
LO2
LO3
LOx
19,23,27
HO1
HO2
HO3
HOx
VB1
VB2
VB3
VSx
20,24,28
COM
VCC
COM
x=1, 2, 3
x=1, 2, 3
Figure 45. I/O Equivalent Circuits
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BS2132F
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
8.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
9.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
10.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
11.
Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12.
Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within
the Area of Safe Operation (ASO).
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BS2132F
Ordering Information
B
S
2
1
3
Part Number
2
F
-
Package
F : SOP28
E2
Packaging and forming specification
E2 : Embossed tape and reel
Marking Diagram
SOP28(TOP VIEW)
Part Number Marking
BS2132F
LOT Number
Pin 1 Mark
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Physical Dimension and Packing Information
Package Name
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BS2132F
Revision History
Date
Revision
18.May.2018
001
Changes
New Release
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
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