HDMI Switch ICs
3 for input 1 output switch with Termination sense correspondence (Sync with HPD_SINK)
BU16018KV
No.09063EDT02
●Description BU16018KV is 3 for input 1 output HDMI/DVI switch LSI. Each port supports 2.25Gbps. (HDMI 1.3a). This device control is simple. It requires only 3.3V source and a few GPIO controls. Terminated resistors(50Ω) are integrated at each input port. When channel is not selected, termination resistors are turned off. TMDS inputs are high impedance. This device is integrated equalization function and DDC buffer function, so It can adapt long cable.
●Features 1) Supports 2.25 Gbps signaling rate for 480i/p, 720i/p, and 1080i/p resolution to 12-bit color depth 2) Compatible with HDMI 1.3a 3) Each port supports HDMI or DVI inputs 4) 5V tolerance to all DDC and HPD_SINK inputs 5) Integrated DDC buffer 6) Integrated switchable 50Ωreceiver termination 7) Integrated equalizer circuit to adapt long cable 8) High impedance outputs when disabled 9) HBM ESD Protection exceeds 10kV 10) 3.3V supply operation 11) VQFP80 package 12) ROHS compatible ●Applications Digital TV, DVD Player, Set-Top-Box, Audio Video Receiver, Digital Projector, DVI or HDMI Switch Box
●Line up matrix
Part No. BU16020KV BU16018KV BU16027KV BU16006KV BU16024KV Power Supply (V) 3 to 3.6 3 to 3.6 3 to 3.6 3 to 3.6 3 to 3.6 ESD (KV) 10 10 10 10 10 Input (ch) HDMI 4ch HDMI 3ch HDMI 3ch HDMI 2ch HDMI 1ch Output (ch) HDMI 1ch HDMI 1ch HDMI 1ch HDMI 1ch HDMI 1ch Data rate (Gbps) 2.7 2.25 2.25 2.25 2.25 Hot Plug Control Yes Yes Yes Yes Yes Termination Sense Correspondence Yes Yes Yes Yes Yes Switching Method GPIO/I C GPIO GPIO GPIO 2
DDC Buffer Yes Yes Yes Yes Yes
Equalizer Yes (adaptive) Yes Yes Yes Yes
De emphasis Yes Yes Yes (Always ON) Yes (Always ON) Yes
Package VQFP100 VQFP80 VQFP64 VQFP64 VQFP48C
RoHS Yes Yes Yes Yes Yes
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BU16018KV
●OUTSIDE DIMENSION CHART
Technical Note
BU16018KV
1PIN MARK
Lot No.
Figure 1-1 Outside dimension chart
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●BLOCK DIAGRAM
Technical Note
Figure 2-1 Block Diagram
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BU16018KV
Technical Note
●PIN EXPLANATION 1). PIN ASSIGNMENT
VCC HPD2 SDA2 SCL2 GND GND B21 A21 VCC B22 A22 GND B23 A23 VCC B24 A24 GND VCC HPD1
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
TEST3 GND A34 B34 VCC A33 B33 GND A32 B32 VCC A31 B31 GND SCL3 SDA3 HPD3 VCC OE TEST2 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 HPD_SINK SDA_SINK SCL_SINK GND GND Z1 Y1 VCC Z2 Y2 GND Z3 Y3 VCC Z4 Y4 GND S3 S2 S1
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TEST0 SDA1 SCL1 GND B11 A11 VCC B12 A12 GND B13 A13 VCC B14 A14 GND VCC VSADJ PRE TEST1
Figure 3-1 Pin Location
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2). PIN LIST TERMINAL NAME No. A11, A12, A13, A14 6, 9, 12, 15 A21, A22, A23, A24 68, 71, 74, 77 A31, A32, A33, A34 49, 52, 55, 58 B11, B12, B13, B14 5, 8, 11, 14 B21, B22, B23, B24 67, 70, 73, 76 B31, B32, B33, B34 48, 51, 54, 57 4, 10, 16, 24, 30, 36, 37, 47, GND 53, 59, 65, 66, 72, 78 HPD1 80 HPD2 62 HPD3 44 I/O I I I I I I DESCRIPTION Port 1 TMDS positive inputs Port 2 TMDS positive inputs Port 3 TMDS positive inputs Port 1 TMDS negative inputs Port 2 TMDS negative inputs Port 3 TMDS negative inputs
Technical Note
Ground
O O O
HPD_SINK
40
I
TEST0,1,2,3
_______
OE PRE SCL1 SCL2 SCL3 SCL_SINK SDA1 SDA2 SDA3 SDA_SINK S1, S2, S3 VCC
1, 20, 41, 60 42 19 3 64 46 38 2 63 45 39 21, 22, 23 7, 13, 17, 27, 33, 43, 50, 56, 61, 69, 75, 79 18 34, 31, 28, 25 35, 32, 29, 26
I I I/O I/O I/O I/O I/O I/O I/O I/O I
Port 1 hot plug detector output Port 2 hot plug detector output Port 3 hot plug detector output Sink side hot plug detector input High : 5-V power signal asserted from source to sink and EDID is ready Low : No 5-V power signal asserted from source to sink or EDID is not ready Open or GND connect (recommend) Output enable, active low Output de-emphasis adjustment High : ON, Low : OFF Port 1 DDC bus clock line Port 2 DDC bus clock line Port 3 DDC bus clock line Sink side DDC bus clock line Port 1 DDC bus data line Port 2 DDC bus data line Port 3 DDC bus data line Sink side DDC bus data line Source selector input Power supply TMDS compliant voltage swing control. Connect to GND via 4.64KΩ TMDS positive outputs TMDS negative outputs
VSADJ Y1, Y2, Y3, Y4 Z1, Z2, Z3, Z4
I O O
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●EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
Technical Note
TMDS Input Stage Vcc
50Ω 50Ω
TMDS Output Stage
Vcc Vcc
Control Input Stage Vcc Ym Zm PRE OE
S1 S2 S3
Vcc
Anm
Bnm
10mA
DDC Input/Output Stage Vcc SCL_SINK SDA_SINK SCLn SDAn
HPD_SINK Input Stage Vcc
HPD Output Stage Vcc
HPD_SINK Vcc HPDn
※n=1,2,3 m=1,2,3,4
Figure 4-1 I/O pin schematic diagram
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BU16018KV
●SOURCE SELECTION LOOKUP TABLE CONTROL PINS HPD_SINK S1 S2 S3
Technical Note
I/O SELECTED Y/Z A1/B1 Terminations of A2/B2 and A3/B3 are disconnected A2/B2 Terminations of A1/B1 and A3/B3 are disconnected A3/B3 Terminations of A1/B1 and A2/B2 are disconnected None (Z) All terminations are disconnected Disallowed (indeterminate)State All terminations are disconnected Disallowed (indeterminate)State All terminations are disconnected Disallowed (indeterminate)State All terminations are disconnected None (Z) All terminations are disconnected
HOT PLUG DETECT STATUS SCL_SINK HPD1 HPD2 SDA_SINK SCL1 SDA1 H L
HPD3
H
H
X
X
L
H
L
H
X
SCL2 SDA2
L
H
L
H
L
L
H
SCL3 SDA3 None (Z) Are pulled HIGH by external pull-up termination SCL1 SDA1
L
L
H
H
L
L
L
H
H
H
L
H
X
X
L
L
L
L
L
H
X
SCL2 SDA2
L
L
L
L
L
L
H
SCL3 SDA3 None (Z) Are pulled HIGH by external pull-up termination
L
L
L
L
L
L
L
L
L
L
(1) H: Logic high; L: Logic low; X: Don’t care; Z: High impedance
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●ERECTRICAL SPECIFICATIONS 1.) ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range (unless otherwise noted) ITEM MIN. TYP. MAX. Power supply voltage(Vcc) -0.3 4.0 DDC,HPD_SINK input voltage -0.3 6.0 Differential input voltage 2.5 4.0 _____ PRE, S1, S2, S3, OE input voltage -0.3 4.0 Power dissipation 1200 ※1 Storage temperature range -55 125 ※70mm×70mm×1.6mm glass epoxy board mount.(Reverse Cu occupation rate:15mm×15mm) When it’s used by than Ta=25℃, it’s reduced by 12mW/℃. 2.) RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER VCC Supply voltage TA Operating free-air temperature TMDS DIFFERENTIAL PINS (A/B) VID Receiver peak-to-peak differential input voltage VIC Input common mode voltage RVSADJ Resistor for TMDS compliant voltage swing range AVCC TMDS output termination voltage RT Termination resistance Signaling rate CONTROL PINS (S1,S2) VIH LVTTL High-level input voltage VIL LVTTL Low-level input voltage STATUS(HPD_SINK) VIH LVTTL High-level input voltage VIL LVTTL Low-level input voltage DDC PINS (SCL_SINK, SDA_SINK,SDA[3:1],SCL[3:1]) VI(DDC) Input voltage
Technical Note
UNIT V V V V mW ℃
MIN. 3.0 0 150 VCC-0.6 4.6 3.0 45 0 2 GND 2.4 GND GND
TYP. 3.3 4.64 3.3 50 -
MAX. 3.6 70 1560 VCC+0.01 4.68 3.6 55 2.25 VCC 0.8 5.5 0.8 5.5
UNIT V ℃ mVp-p V KΩ V Ω Gbps V V V V V
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3.) ELECTRICAL CHARACTERISTICS Over recommended operating conditions (unless otherwise noted)) LIMITS
SYMBOL
Technical Note
PARAMETER
TEST CONDITIONS
MIN.
TYP.(1)
MAX.
UNIT
Icc
Supply current
PD
Power dissipation
VIH =Vcc, VIL =Vcc-0.4V,RVSADJ = 4.64kΩ RT = 50Ω,AVcc = 3.3V Anm/Bnm=2.25Gbps HDMI data pattern n = 1 or 2 or 3, m = 2, 3, 4 An1/Bn1 = 225 MHz clock VIH =Vcc, VIL =Vcc-0.4V,RVSADJ = 4.64kΩ RT = 50Ω,AVcc = 3.3V Anm/Bnm=2.25Gbps HDMI data pattern, n = 1 or 2 or 3, m = 2, 3, 4 An1/Bn1 = 225 MHz clock
-
120
150
mA
-
450
600
mW
TMDS DIFFERENTIAL PINS (A/B; Y/Z) Single-ended high-level output VOH voltage Single-ended low-level output VOL voltage Single-ended low-level swing VSWING voltage Overshoot of output differential VOD(O) voltage Undershoot of output VOD(U) differential voltage Steady state output differential voltage with de-emphasis Input termination resistance Change in steady-state common-mode output voltage between logic states
AVcc-10 AVcc-600 AVcc = 3.3V, RT = 50Ω,PRE = 0V 400 PRE = Vcc Anm/Bnm = 250 Mbps HDMI data pattern , n = 1 or 2 or 3, m = 2, 3, 4 An1/Bn1 = 25 MHz clock VIN = 2.9V
6% 12%
AVcc+10 AVcc-400 600 15% 25%
mV mV mV 2xVswing 2xVswing
VODE(SS)
600
-
920
mVp-p
RINT ⊿VOC(SS)
45 -
50 5
55 -
Ω mV
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BU16018KV
Technical Note
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.(1)
MAX.
UNIT
DDC Input and output Tx : SCL_SINK , SDA_SINK IlkT ① Input leak current IlkT
②
VI = 5.5V VI = VCC VO = 3.6V VI L = GND RL= 4.7kΩ
-10 -10 -10 -10 0.43 20
0.5 100 0.5 100
10 10 10 10 0.57 190 0.57 190
uA uA uA uA V mV V mV
Input leak current
High-level output current Low-level input current Low-level output voltage Low-level input voltage below VOLT - VIL output low-level voltage VOLT Low-level output voltage Low-level input voltage below VOLT-VIL output low-level voltage Rx : SCLn , SDAn ( n = 1, 2, 3 ) IlkR ① Input leak current IlkR ② Input leak current IOHR High-level output current IILR Low-level input current VOLR Low-level output voltage _____ CONTROL PINS (PRE, S1, S2, S3, OE) IIH High–level digital input current IIL Low–level digital input current STATUS PINS (HPD_SINK) IIH IIL VOH(TTL) VOL(TTL) High–level digital input current Low–level digital input current TTL High–level output voltage TTL Low–level output voltage
IOHT IILT VOLT
RL=4.7kΩ
0.43 20
VI = 5.5V VI = VCC VO = 3.6V VIL = GND IOUT = 4mA VIH = VCC VIL = GND VIH = 5.5V VIH = VCC VIL = GND IOH = - 8mA IOL = 8mA
-10 -10 -10 -10 -10 -10 10 5 -10 2.4 0
50 30 -
10 10 10 10 0.2 10 10 100 80 10 Vcc 0.4
uA uA uA uA V uA uA uA uA uA V V
STATUS PINS (HPD1, 2, 3)
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10/19
2009.05 - Rev.D
BU16018KV
Technical Note
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS MIN. TYP.(1) MAX.
UNIT
TMDS DIFFERENTIAL PINS (Y/Z) Propagation delay time tPLH low-high-level output Propagation delay time tPHL high-low level output Differential output signal rise tr time See Figure 5-2, AVCC = 3.3V, (20%-80%) RT = 50Ω, PRE=0V Differential output signal fall tf time (20%-80%) tsk(p) Pulse skew (|tPHL - tPLH |) Intra-pair differential skew, see tsk(D) Figure 5-3. Inter-pair channel-to-channel tsk(o) (2) output skew tsk(pp) Part to part skew(3) tsx Select to switch output tdis Disable time ten Enable time DDC I/O PINS (SCLn, SCL_SINK, SDA,n SDA_SINK) (n = 1, 2, 3) Propagation delay time, tpdLHTR(DDC) low-to-high-level output Tx to Rx RL = 4.7KΩ CL = 100pF Propagation delay time, tpdHLTR(DDC) high-to-low-level output Tx to Rx Propagation delay time, tpdLHRT(DDC) low-to-high-level output Rx to Tx RL = 1.67KΩ CL = 400pF Propagation delay time, tpdHLRT(DDC) high-to-low-level output Rx to Tx tr Tx(DDC) Tx output Rise time RL = 4.7KΩ CL = 100pF tf Tx(DDC) Tx output Fall time tr Rx(DDC) Rx output Rise time RL = 1.67KΩ CL = 400pF tf Rx(DDC) Rx output Fall time Switch time from SCLn to tsx(DDC) CL=10pF SCL_SINK CIO Input/output capacitance VI=0V
-
480
-
ps
-
500
-
ps
-
160
-
ps
-
160 20 35 50 400 8 5 7
-
ps ps ps ps ps ns ns ns
-
650
-
ns
-
200
-
ns
-
500
-
ns
-
350 800 150 950 50 800 15
-
ns ns ns ns ns ns pF
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BU16018KV
Technical Note
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS MIN. TYP.(1) MAX.
UNIT
STATUS PINS(HPD1, 2, 3) Propagation delay time, tpdLH(HPD) low-to-high-level output from HPD_SINK to HPDn(n=1,2,3) Propagation delay time, tpdHL(HPD) high-to-low-level output from HPD_SINK to HPDn(n=1,2,3) Switch time from port select to tsx(HPD) the latest valid status of HPD
CL=10pF
-
5
-
ns
CL=10pF
-
5
-
ns
CL=10pF
-
8
-
ns
Note: 1. All typical values are at 25℃ and with a 3.3V supply. 2. tsk(o) is the magnitude of the difference in propagation delay times between any specified terminals of channel of a devices when inputs are tied together. 3. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of channel two devices, or between channel 1 of two devices, when both devices operate with the same source, the same supply voltages, at the same temperature, and have identical packages and test circuits.
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BU16018KV
●MEASUREMENT SYMBOL AND CIRCUIT PARAMETER MEASUREMENT INFORMATION
AVcc RT Zo = RT
TMDS Driver
Technical Note
RT
TMDS Receiver
Zo = R T
Figure 5-1 Termination for TMDS Output Driver
PARAMETER MEASUREMENT INFORMATION (continued)
Vcc RINT RINT Y
TMDS Receiver TMDS Driver
RT VY RT VZ AVCC
VA
A VID B VB
CL 0.5pF Z
VID = VA - VB
Vswing = VY - VZ
VA VB VID VID(pp) VID
DC Coupled VCC Vcc-0.4 V 0.4 V 0V -0.4 V tPHL 80% VOD(O) VOD(pp) tf 20% tr VOD(U) △VOS(SS) tPLH 100%
AC Coupled VCC+0.2V Vcc-0.2 V
0V Differential 0%
VOC
Figure 5-2 Timing Test Circuit and Definitions
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Technical Note
VY
VOH 50% VOL
VZ
tsk(D)
Figure 5-3 Definition of Intra-Pair Differential Skew
PARAMETER MEASUREMENT INFORMATION (continued)
A Port 1 B Port 2 A B Port 3 A B S1 Clocking S2=VDD S3=0V OE Vcc V Vcc-0.4 V Vcc-0.4 V Vcc V Vcc-0.4 V Vcc V VDD 2 VDD 0V 0V
tsx
Output Y Z
tsx
75mV HI-Z 75mV
-75mV
-75mV
tdis
ten
Figure 5-4 TMDS Outputs Control Timing Definitions
VDD 2
HPD_SINK
VDD 2
HPD1 tpdHL(HPD) HPD2 HPD3 S1 S2 SDA_SINK SDA1
1.5V
tpdLH(HPD)
tsx(HPD)
2.4V
0V Vcc 2
tpdHLRT(DDC) tpdLHRT(DDC)
80% 20% 1.5V
tpdHLTR(DDC)
tpdLHTR(DDC)
tSX(DDC)
VDD
V IL 80% 20% 0V
SDA2 SDA3 tfTX(DDC) trTX(DDC) tfRX(DDC) TX to RX trRX(DDC) RX to TX
VDD
Figure 5-5 DDC and HPD Timing Definitions
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BU16018KV
Technical Note
1). Y and Z terminal ESD diode notice. Y and Z terminals are connected ESD diode. When VCC+0.4 < AVCC. BU16018KV flow leak current from AVCC to VCC. In order to pass the compliance test. You must use mandatory application, refer Figure 6-1 for “Repeater” or “output Buffer” application. If you use “Repeater” or “output Buffer”
power down controler
10kΩ
AVCC
VCC
10kΩ
10kΩ TEST0
TEST2
TEST1
Figure 6-1 Leak current control
2). HPD_SINK Pull down resistance. HPD_SINK is a 5V tolerant structure shown in Figure 6-2. It needs some drive current to pull down HPD_SINK "H" to "L"(max10uA@HPD_SINK=2V). So to pull down HPD_SINK, please use 10kΩ(or under 10kΩ) resistor.
VCC BU16018KV
HPD_SINK
1 0kΩ
Figure 6-2 HPD_SINK I/O schematic
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3). About don’t use terminal. Unused TMDS input channel can be opened.
Technical Note
BU16018KV
Vcc R INT R INT RT A T MDS Receiver TMDS Driver Y AVcc
B
Z
RT
Figure 6-3 TMDS Input Fail-Safe Recommendation
Unused DDC Buffers of R side polled up to Vdd
VCC 4.7k RSCL RSDA R T TSCL TSDA
Figure 6-4 DDC Buffers in BU16018KV
Open unused HPDn.
Figure 6-5 Open unused HPDn
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4). About serial connect notice. When HDMI sw output connect to other HDMI sw input like following application. There is possibility that. 1080p(12bit) image isn’t displayed. It’s depend on receiver IC characteristic. When system is required 1080p (12bit), Rohm doesn’t recommend serial connect application.
Technical Note
Vcc RINT RINT RINT
Vcc RINT RT
A
TMDS Receiver
TMDS Driver
Y
A
TMDS Receiver
TMDS Driver
Y Z
AVCC
B
Z
B
RT
Figure 6-6 serial connect notice
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5). Offset voltage appearance. If differential input is opened, offset voltage appear at differential output OE is set to low to avoid it.
Technical Note
Figure 6-7 Offset voltage avoid 6). Limitation of Master and slave direction.
Figure 6-8 Limitation of Master and slave direction
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BU16018KV
Ordering part number
Technical Note
B U1 6 0 18
ROHM model name Package specification
KV
Package type VQFP80
E2
Packaging and forming specification E2 =Reel-shaped emboss taping
VQFP80
14.0 ± 0.2 12.0 ± 0.1
60 61 41 40
Tape Quantity Direction of feed
1.0 ± 0.2
Embossed carrier tape (with dry pack) 1000pcs E2
direction the at left when you ( The on the leftishand1pin of product is thethe upperthe right hand hold ) reel and you pull out tape on
14.0 ± 0.2
12.0 ± 0.1
80 1 20
21
1.25
1.6MAX
1PIN MARK
+0.05 0.145 -0.03 S
4 +6 –4
1.4 ± 0.05 0.1± 0.05
0.08 S +0.05 0.2 -0.04 0.5 ± 0.1 0.08
M
0.5 ± 0.15
1.25
1pin
Direction of feed
(Unit : mm)
Reel
∗ Order quantity needs to be multiple of the minimum quantity.
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Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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