BU2090

Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV 12-bit, serial IN, parallel OUT driver BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV The BU2090, BU2090F, BU2090FS, BU2092, BU2092F, and BU2092FV are 12-bit serial input, parallel output drivers. For the BU2090 / F / FS, data input is shifted to the 12-bit internal shift register on the rising edge of a clock pulse. On the falling edge of the pulse, if the DATA pin is HIGH, the data in the shift register is output in parallel to Q0 to Q11. For the BU2092 / F / FV, shift data read at the rising edge of CLOCK is output in parallel to Q0 to Q11 at the rising edge of LCK. These ICs also have an OE pin, which when HIGH, forces data to be output, regardless of the shift data state. •Applications players, telephones, compact audio systems, car stereos, and others Radio cassette •Features dissipation. 1) Low power 2) Operating voltages ranging from 2.7 to 5.5V. 3) Output is Nch open drain. 4) High output withstand voltage of + 25V. 5) Diverse variety of packages. BU2090 / F / FS: DIP16, SOP16, SSOP-A16 BU2092 / F / FV: DIP18, SOP18, SSOP-A18 (plastic molds) 6) High drive capability; direct lighting of green LED possible. 1 Standard ICs ratings 25°C) •Absolute maximumBU2092(Ta /=FV) (BU2090 / F / FS, /F Parameter Power supply voltage Power dissipation Power dissipation BU2090 / F / FS BU2092 / F / FV BU2090 / F / FS BU2092 / F / FV Symbol VDD Pd Limits – 0.3 ~ + 7.0 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Unit V mW 1000 (DIP), 300 (SOP), 500 (SSOP)∗1 1050 (DIP), 450 (SOP), 400 (SSOP)∗1 500 (SOP)∗2, 650 (SSOP)∗3 500 (SOP)∗2, 650 (SSOP)∗4 – 25 ~ + 75 – 55 ~ + 125 VSS – 0.3 ~ VDD + 0.3 VSS ~ 25.0 Pd Topr Tstg VIN VO mW °C °C V V Operating temperature Storage temperature Input voltage Output voltage ∗1 Unmounted ∗2 When mounted on a glass epoxy board of 50mm × 50mm × 1.6mm ∗3 When mounted on a glass epoxy board of 90mm × 50mm × 1.6mm ∗4 When mounted on a glass epoxy board of 70mm × 70mm × 1.6mm •Recommended operating conditions Parameter Power supply voltage Symbol VDD Limits 2.7 ~ 5.5 Unit V 2 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV •Block diagram BU2090 / F / FS BU2092 / F VSS 1 VSS 1 DATA 2 CLOCK 3 Q0 4 Output buffer (open drain) Control circuit 18 VDD 17 OE Control circuit 12-bit shift register Latch 16 VDD 15 Q11 DATA 2 12-bit shift register CLOCK 3 14 Q10 16 Q11 112-bit storage register LCK 4 13 Q9 15 Q10 14 Q9 13 Q8 12 Q7 11 Q6 10 Q5 Q0 5 12 Q8 Q1 5 Q2 6 Q3 7 Q4 8 Output buffer (open drain) Q1 6 11 Q7 Q2 7 10 Q6 Q3 8 9 Q5 Q4 9 BU2092FV VSS 1 DATA 2 12-bit shift register Control circuit 20 VDD 19 OE 18 Q11 CLOCK 3 LCK 4 Q0 5 Q1 6 Q2 7 Q3 8 Q4 9 Q5 10 12-bit storage register 17 Q10 16 Q9 15 Q8 14 Q7 13 N.C. 12 N.C. 11 Q6 Output buffer (open drain) 3 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV •Pin descriptions Pin No. BU2090 / F / FS 1 2 3 — 4 5 6 7 8 9 10 — — 11 12 13 14 15 — 16 BU2092 / F BU2092 / FV 1 2 3 4 5 6 7 8 9 10 11 — — 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin name VSS DATA CLOCK LCK Q0 Q1 Q2 Q3 Q4 Q5 Q6 N.C. N.C. Q7 Q8 Q9 Q10 Q11 OE VDD GND Serial data input Data shift clock input Data latch clock input Parallel data output Parallel data output Parallel data output Parallel data output Parallel data output Parallel data output Parallel data output Not connected Not connected Parallel data output Parallel data output Parallel data output Parallel data output Parallel data output Output Enable Power supply Function 4 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV •Electrical characteristics (Ta = 25°C) noted, Ta = 25°C, V DC characteristics (unless otherwise Parameter Input high level voltage Symbol VIH Min. 3.5 2.5 — VIL — — VOL IOZH IOZL IDD — — — — — Typ. — — — — — — — — — — SS = 0V) Unit V VDD 5 3 5 3 5 3 5 5 5 3 IOL = 20mA IOL = 5mA VO = 25.0V VO = 0V VIN = VSS or VDD OUTPUT: OPEN — Conditions — Max. — — 1.5 0.4 2.0 1.0 10.0 – 5.0 5.0 3.0 Input low level voltage V Output low level voltage "H" output disable current "L" output disable current Current dissipation V µA µA µA BU2090 / F / FS switching characteristics (unless otherwise noted, Ta = 25°C, VSS = 0V) Parameter Minimum clock pulse width Symbol tW Min. 500 1000 200 300 200 400 50 100 250 500 200 400 250 500 Typ. — — — — — — — — — — — — — — Max. — — — — — — — — — — — — — — ns ns ns ns ns ns ns Unit VDD 5 3 5 3 5 3 5 3 5 3 5 3 5 3 — — — — — — Conditions — Data shift setup time tSU Data shift hold time tH Data latch setup time tLSUH Data latch hold time tLHH Data latch "L" setup time tLSUL Data latch "L" hold time tLHL Not designed for radiation resistance. BU2090 / F / FS switching characteristics measurement conditions tW tW 90% 10% tH tLSUL tLHL 10% tLSUH 10% tLHH CLOCK 90% 10% tSU 90% VDD GND (VSS) DATA 90% 90% 10% 10% 90% 90% VDD GND (VSS) Fig.1 5 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV BU2092 / F / FV switching characteristics (unless otherwise noted, Ta = 25°C, VSS = 0V) Parameter Symbol tPLZ (LCK) Transmission delay time (LCK to OUTPUT QX) tPZL (LCK) Min. — — — — — — — — 500 1000 500 1000 200 400 200 400 200 400 Typ. 55 90 50 115 45 70 35 80 — — — — — — — — — — Max. — — — — — — — — — — — — — — — — — — Unit ns VDD 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 — — — — RL = 5kΩ CL = 10pF RL = 5kΩ CL = 10pF RL = 5kΩ CL = 10pF RL = 5kΩ CL = 10pF — Conditions ns tPLZ Output disable time (OE to OUTPUT QX) tPZL ns ns Minimum clock pulse width tW ns Minimum latch pulse width Setup time (LCK to CLOCK) Setup time (DATA to CLOCK) Hold time (CLOCK to DATA) tW (LCK) ns tS ns tSU ns tH ns Not designed for radiation resistance. BU2092 / F / FV switching characteristics measurement conditions tW 90% 90% 10% tH 90% 90% tS tW 90% 90% VDD GND (VSS) VDD GND (VSS) CLOCK 10% tSU 10% DATA tW (LCK) 90% 50% 10% 90% VDD GND (VSS) VDD 50% LCK tPLZ (LCK) tPZL (LCK) 50% 50% OE tPLZ 50% tPZL 50% GND (VSS) Qx 10% 10% Fig.2 6 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV •Truth tableF / FV BU2092 / INPUT CLOCK DATA × × × × L H × × × × × LCK × × × × × OE H L × × × × × Output (Q0 to Q11) disabled Output (Q0 to Q11) enabled First cell of the shift register stores the LOW. Other cells, respectively, store data from the preceding cells or other prior data. (Output state is HOLD.) First cell of the shift register stores the HIGH. Other cells, respectively, store data from the preceding cells or other prior data. (Storage state and output state are HOLD.) No change in shift register. Contents of shift register are stored in storage register. No change in shift register. FUNCTION Q0 to Q11 output for the BU2090 / F / FS and BU2092 / F / FV is Nch open drain output. When the shift register transfer data is LOW, the corresponding output FET is ON (continuous state). When the transfer data is HIGH, the output FET is OFF (discontinuous). •Input / output circuit BU2090 / F / FS Pin No. 2, 3 BU2092 / F BU2092FV BU2090 / F / FS BU2092 / F BU2092FV 5, 6, 7, 8, 9, 5, 6, 7, 8, 9, 4, 5, 6, 7, 8, 9 Pin No. 2, 3, 4, 17 Pin No. 2, 3, 4, 19 Pin No. 10, 11, 12, 13 Pin No. 10, 11, 12, 13 Pin No. 10, 11, 14, 15 14, 15 14, 15, 16 16, 17, 18 VDD VDD GND (VSS) GND (VSS) GND (VSS) 7 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV •Circuit operation pin is sent to the 12-bit shift register on the rising edge of the CLOCK pulse. Subsequently, it The logic of the DATA is shifted from Q0 to Q11 for every clock rising edge. For the BU2090 / F / FS When the DATA pin is LOW on the CLOCK falling edge, the data does not change its output state. It is only shifted in the internal shift register. However, when the DATA pin is HIGH, the content of the 12-bit shift register is latched and is output to the corresponding Q0 to Q11. CLOCK DATA Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Note 1) indicates unstable output. D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Note 2) Pull-up resistance is connected to the output pin. Fig.3 Operation timing chart 8 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV For the BU2092 / F / FV The content of the 12-bit shift register is stored in the 12-bit storage register at the rising edge of LCK, and is output to the corresponding Q0 to Q11. When OE is HIGH, regardless of the content of the storage register, the output FET turns OFF and enters a HIGH (discontinuous) state. CLOCK DATA D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LCK OE Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Note 1) indicates unstable output. Note 2) Pull-up resistance is connected to the output pin. Fig.4 Operation timing chart 9 Standard ICs example •Application/ FS BU2090 / F BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV VDD CLOCK DATA LED power supply GND (VSS) Control circuit Output buffer (open drain) GND (VSS) 12-bit shift register Latch Fig.5 BU2092 / F / (FV) VDD LED power supply GND DATA (VSS) CLOCK LCK Output buffer (open drain) Control circuit 12-bit storage register GND (VSS) OE 12-bit shift register Fig.6 10 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV •Electrical characteristic curves 1200 POWER DISSIPATION: Pd (mW) 1000 800 when mounted on SSOP16 (glass epoxy board)a 90mm × 50mm × 1.6mm 1200 POWER DISSIPATION: Pd (mW) DIP16 (Unmounted) DIP18 (Unmounted) 1000 800 OUTPUT CURRENT "LOW" LEVEL: IOL (mA) 30 25 20 15 10 5 VDD = 5V VDD = 3V SSOP-B20 (When mounted on a 70mm × 70mm × 1.6mm glass epoxy board) glass epoxy board) 600 SSOP16 (Unmounted) SOP16 (when mounted on a 50mm × 50mm × 1.6mm glass epoxy board) 600 SOP18 (when mounted on a 50mm × 50mm × 1.6mm SOP18 (Unmounted) 400 SSOP-B20 (Unmounted) 200 400 SOP16 (Unmounted) 200 0 25 50 75 100 125 150 0 25 50 75 100 125 150 0 0.5 1.0 1.5 2.0 2.5 AMBIENT TEMPERATURE: Ta (°C) AMBIENT TEMPERATURE: Ta (°C) OUTPUT VOLTAGE "LOW" LEVEL: VOL (V) Fig.7 BU2090 / F / FS thermal derating characteristics Fig.8 BU2092 / F / FV thermal derating characteristics Fig.9 Output current vs.output low level voltage 11 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV •External dimensions (Units: mm) BU2090 19.4 ± 0.3 16 9 6.5 ± 0.3 18 BU2092 22.9 ± 0.3 10 6.5 ± 0.3 1 9 7.62 0.51Min. 1 8 7.62 0.51Min. 0.3 ± 0.1 3.2 ± 0.2 4.25 ± 0.3 0.3 ± 0.1 2.54 0.5 ± 0.1 0° ~ 15° 3.29 ± 0.2 2.54 0.5 ± 0.1 0° ~ 15° DIP16 BU2090F 10.0 ± 0.2 16 6.2 ± 0.3 4.4 ± 0.2 9 7.8 ± 0.3 5.4 ± 0.2 18 DIP18 BU2092F 11.2 ± 0.2 10 1 1.5 ± 0.1 8 0.15 ± 0.1 1 1.8 ± 0.1 9 0.11 0.11 1.27 0.4 ± 0.1 0.3Min. 0.15 1.27 0.4 ± 0.1 0.3Min. 0.15 SOP16 BU2090FS 6.6 ± 0.2 16 4.4 ± 0.2 6.2 ± 0.3 9 6.4 ± 0.3 4.4 ± 0.2 20 SOP18 BU2092FV 6.5 ± 0.2 11 0.15 ± 0.1 0.15 ± 0.1 0.3Min. 0.1 0.15 ± 0.1 1.5 ± 0.1 1.15 ± 0.1 1 8 1 10 0.11 0.8 0.36 ± 0.1 0.1 0.3Min. 0.15 0.65 0.22 ± 0.1 SSOP-A16 SSOP-B20 12