High-performance Clock Generator Series
Clock Generator
with Built-in VCXO for A/V Equipments
BU2365FV
No.09005EAT05
●Description
The ROHM Clock Generator is an IC allowing for the generation of multiple clocks by a single chip through the connection of
a single crystal oscillator. The BU2365FV incorporates the ROHM’s unique PLL technology to provide the generation of
multiple high C/N clocks necessary for the DVD recorder system. This Clock Generator has the built-in high-precision VCXO
function and allows for high-precision synchronization with DVD Video clocks. It also has a built-in buffer having high driving
force and allows the supply of multiple 27MHz Video clocks for the system, thus providing the reduced number of the system
components.
●Features
1) The ROHM’s unique PLL technology allows for the generation of high C/N clocks.
2) Built-in high precision VCXO, which is essential for the DVD recorder system
3) Built-in buffer having high driving force (Load capacity/output CL=50pF, 27MHz drive, 1×input / 2×outputs)
4) Built-in half pulse clock protection [HPC]
5) Built-in power down function, Icc=0 uA(typ.)
6) SSOP-B24 package
7) Single power supply of 3.3 V
●Application
DVD recorder
●Absolute Maximum Ratings（Ta=25℃）
Parameter
Symbol
Limits
Unit
VDD
-0.3~7.0
V
Input voltage
VIN
-0.3~VDD+0.3
V
Storage temperature range
Tstg
-30~125
℃
Power dissipation
PD
820
mW
Symbol
Limit
Unit
Supply voltage
VDD
3.0~3.6
V
Input H voltage
VINH
0.8VDD~VDD
V
Input L voltage
VINL
0.0~0.2VDD
V
Operating temperature
Topr
-10~70
℃
22Pin / 19Pin
CL_CLK768FS/384FS
32(MAX)
pF
13Pin , 14Pin
CL_BUFOUT
50(MAX)
pF
18Pin / 24Pin
CL_CLK512FS/54M
15(MAX)
pF
Supply voltage
*1 Operation is not guaranteed.
*2 In the case of exceeding Ta = 25℃, 8.2mW should be reduced per 1℃.
*3 The radiation-resistance design is not carried out.
*4 Power dissipation is measured when the IC is mounted to the printed circuit board.
●Recommended Operating Range
Parameter
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1/16
2009.04- Rev.A
Technical Note
BU2365FV
●Electrical characteristics
VDD=3.3V, Ta=25℃, Crystal frequency (XTAL_IN)=27.000000MHz, at no load, unless otherwise specified.
Limit
Parameter
Symbol
Unit
Condition
Min.
Typ.
Max.
【Consumption circuit current】
IDD
－
55
71.5
mA
【Output H voltage】
VOH
2.4
－
－
V
When current load = -4.0mA
【Output L voltage】
VOL
－
－
0.4
V
When current load =4.0mA
Pull-Up R
168
260
578
kΩ
Pull-downR
31
48
106
kΩ
CLK768FS : FSEL=L
CLK768
FS_L
－
33.868800
－
MHz XTAL_IN×(3136/625)/4
CLK768FS : FSEL=H
CLK768
FS_H
－
36.864000
－
MHz XTAL_IN×(2048/375)/4
CLK384FS
CLK384
FS
－
18.432000
－
MHz XTAL_IN×(2048/375)/8
CLK512FS
CLK512
FS
－
24.576000
－
MHz XTAL_IN×(2048/375)/6
CLK54M
CLK54M
－
54.000000
－
MHz XTAL_IN×(32/4)/4
Duty1
45
50
55
％
Measured at a voltage of 1/2 of VDD
Rise time
Tr
－
2.5
－
nsec
Period of time required for the output to
reach 80% from 20% of VDD
Fall time
Tf
－
2.5
－
nsec
Period of time required for the output to
reach 20% from 80% of VDD
P-J1σ
－
50
－
psec
※1
P-J
MIN-MAX
－
300
－
psec
※2
【Output Lock-Time】
Tlock
－
－
1
msec
※3
【Frequency stability】
ΔF/F0
－15
－
15
ppm T=-10~70℃,VDD=3.3V±0.15V
【Frequency sensitivity】
ΔF/Fc
±30
±45
±60
ppm
※5
Linearity
－10
10
ppm
※5
【Buffer skew】
Tskew_BUF
－500
－
500
psec
Phase
difference
between
BUF_OUT1 and BUF_OUT26
【Buffer delay】
Td_BUF
－
4
8
nsec
Phase difference between BUF_IN
and BUF_OUT
【Pull-Up resistance value】
FSEL,OE
【Pull-Down resistance value】
TEST
At no output loads
Specified by a current value running
when a voltage of 0V is applied to a
measuring pin. (R=DD/I)
Specified by a current value running
when a VDD is applied to a
measuring pin. (R=VDD/I)
【Output frequency】
【Output waveform】
Duty
【Jitter】
Period-Jitter 1σ
Period-Jitter MIN-MAX
【Frequency sensitivity linearity】
※4
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTAL_IN.
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© 2009 ROHM Co., Ltd. All rights reserved.
2/16
2009.04- Rev.A
Technical Note
BU2365FV
※1 Period-Jitter 1σ
This parameter represents standard deviation (=1σ) on cycle distribution data at the time when the output clock cycles are
sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
※2 Period-Jitter MIN-MAX
This parameter represents a maximum distribution width on cycle distribution data at the time when the output clock cycles
are sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
※3 Output Lock-Time
This parameter represents elapsed time after power supply turns ON to reach a voltage of 3.0 V, after the system is
switched from Power-Down state to normal operation state, or after the output frequency is switched, until it is stabilized at
a specified frequency, respectively.
※4 Frequency stability
f0 : This parameter means an optimum frequency at T=25℃(27.000000 MHz), which represents a value of a single piece
of IC. Since no consideration is given to the stability of the crystal oscillator, it should be separately studied according to
the system in use.
※5 Frequency sensitivity/Frequency sensitivity linearity
These parameters represents that the frequency falls within the area shown in Fig. 2 in the control circuit of control voltage
shown in Fig. 1. It shows the value of IC itself. Since no consideration is given to the stability of the crystal oscillator, it
should be separately studied according to the system in use.
※Common – Recommended crystal oscillators
The electrical characteristics shown above have been all evaluated with the use of the crystal oscillator NX5032GA (Spec.
No. EXS00A-00278) manufactured by NIHON DEMPA KOGYO CO., LTD., under the conditions of Limiting resistance
Rd=30Ωand Crystal oscillator load CL=10pF. Consequently, in order to use the BU2365FV, the said crystal oscillator is
recommended.
R2
9Pin： VDD_V
R1
Vc
10Pin： VCTRL
BU2365FV
R1
R1：R2=1：0.875
Fig.1 Control Circuit of Control Voltage
Δf/f0
fH
+60ppm
+45ppm
+30ppm
fC
+15ppm
0ppm
Vc
－15ppm
－30ppm
－45ppm
－60ppm
fL
L
Frequency sensitivity dispersion range
However, frequency sensitivity linearity
Hi-Z
H
: fL = -45±15ppm, fC = 0±15ppm, fH = 45±15ppm
: -10ppm≦(fH - fC) -( fC - fL) ≦+10ppm
Fig. 2 Frequency Sensitivity Dispersion Range
※6 Buffer skew
This parameter is only functional when the BUF_OUT1 and the BUF_OUT2 are driven at the same load capacitance.
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© 2009 ROHM Co., Ltd. All rights reserved.
3/16
2009.04- Rev.A
Technical Note
BU2365FV
●Reference data (Basic data)
1.0V / div
1.0V / div
10dB / div
RBW=1KHz
VBW=100Hz
500psec / div
5.0nsec / div
Fig.3 33.8688MHz output waveform
VDD=3.3V,CL=32pF
10KHz / div
Fig.5 33.8688MHz spectrum
VDD=3.3V,CL=32pF
Fig.4 33.8688MHz Period-Jitter
VDD=3.3V,CL=32pF
10dB / div
1.0V / div
1.0V / div
RBW=1KHz
VBW=100Hz
5.0nsec / div
Fig.6 36.864MHz output waveform
VDD=3.3V,CL=32pF
10KHz / div
500psec / div
Fig.8 36.864MHz spectrum
VDD=3.3V,CL=32pF
Fig.7 36.864MHz Period-Jitter
VDD=3.3V,CL=32pF
10dB / div
1.0V / div
1.0V / div
RBW=1KHz
VBW=100Hz
500psec / div
10KHz / div
Fig.10 18.432MHz Period-Jitter
VDD=3.3V,CL=32pF
Fig.11 18.432MHz spectrum
VDD=3.3V,CL=32pF
10.0nsec / div
Fig.9 18.432MHz output waveform
VDD=3.3V,CL=32pF
10dB / div
1.0V / div
1.0V / div
RBW=1KHz
VBW=100Hz
5.0nsec / div
Fig.12 24.576MHz output waveform
VDD=3.3V,CL=15pF
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© 2009 ROHM Co., Ltd. All rights reserved.
500psec / div
Fig.13 24.576MHz Period-Jitter
VDD=3.3V,CL=15pF
4/16
10KHz / div
Fig.14 24.576MHz spectrum
VDD=3.3V,CL=15pF
2009.04- Rev.A
Technical Note
BU2365FV
●Reference data (Basic data)
10dB / div
1.0V / div
1.0V / div
RBW=1KHz
VBW=100Hz
5.0nsec / div
500psec / div
10KHz / div
Fig.15 54MHz output waveform
VDD=3.3V,CL=15pF
Fig.16 54MHz Period-Jitter
VDD=3.3V,CL=15pF
Fig.17 54MHz spectrum
VDD=3.3V,CL=15pF
10dB / div
1.0V / div
1.0V / div
RBW=1KHz
VBW=100Hz
5.0nsec / div
500psec / div
10KHz / div
Fig.18 BUF_OUT (27MHz)
output waveform
VDD=3.3V,CL=50pF
Fig.19 BUF_OUT(27MHz) Period-Jitter
VDD=3.3V,CL=50pF
Fig.20 BUF_OUT(27MHz) spectrum
VDD=3.3V,CL=50pF
5.0nsec / div
Fig.24 Buffer skew
output waveform
VDD=3.3V,CL=50pF
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© 2009 ROHM Co., Ltd. All rights reserved.
10KHz / div
500psec / div
Fig.22 VCXO_OUT(27MHz) Period-Jitter
VDD=3.3V,CL=4pF
0.5V / div
0.5V / div
5.0nsec / div
Fig.21 VCXO_OUT(27MHz)
output waveform
VDD=3.3V,CL=4pF
Fig.23 VCXO_OUT(27MHz) spectrum
VDD=3.3V,CL=4pF
0.5V / div
1.0V / div
1.0V / div
10dB / div
RBW=1KHz
VBW=100Hz
5.0nsec / div
Fig.25 Buffer delay(IN→OUT1)
VDD=3.3V,CL=50pF
5/16
5.0nsec / div
Fig.26 Buffer delay(IN→OUT2)
VDD=3.3V,CL=50pF
2009.04- Rev.A
Technical Note
BU2365FV
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
25
50
75
Temperature and Supply voltage variations data)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
100
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
Temperature：T [℃]
50
75
-25
100
0
25
50
75
100
Temperature：T [℃]
Fig.28 33.8688MHz
Temperature－rise-time
Fig.29 33.8688MHz
Temperature－fall-time
：
500
Period-Jitter MIN-MAX
P-JMIN-MAX [psec]
VDD=2.9V
VDD=3.3V
VDD=3.7V
VDD=3.7V
VDD=2.9V
VDD=3.3V
400
300
200
100
0
-25
0
25
50
75
-25
100
55
Rise Time ：Tr [nsec]
VDD=2.9V
VDD=3.3V
VDD=3.7V
51
50
49
48
47
46
45
-25
0
25
50
75
100
75
Temperature and Supply voltage variations data)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
100
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
Temperature： T [ ℃]
Fig.32 36.864MHz
Temperature－Duty
100
90
80
70
60
50
40
30
20
10
0
50
Fig.31 33.8688MHz
Temperature－Period-Jitter MIN-MAX
●Reference data (PLL: 36.864MHz output
52
25
Temperature：T [℃]
T emperature：T [℃]
Fig.30 33.8688MHz
Temperature－Period-Jitter 1σ
54
53
0
0
25
50
75
100
Fall Time ：Tf [nsec]
Period-Jitter 1 σ： P-J1 σ [psec]
25
VDD=2.9V
VDD=3.3V
VDD=3.7V
600
100
90
80
70
60
50
40
30
20
10
0
Duty ： Duty [%]
0
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Temperature：T [℃]
Fig.27 33.8688MHz
Temperature－Duty
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
25
50
75
100
Temperature：T [℃]
Temperature：T [℃]
Fig.33 36.864MHz
Temperature－rise-time
Fig.34 36.864MHz
Temperature－fall-time
：
600
VDD=2.9V
VDD=3.3V
VDD=3.7V
Period-Jitter MIN-MAX
P-JMIN-MAX [psec]
Period-Jitter 1 σ： P-J1 σ [psec]
Fall Time ：Tf [nsec]
55
54
53
52
51
50
49
48
47
46
45
Rise Time ：Tr [nsec]
Duty ： Duty [%]
●Reference data (PLL: 33.8688MHz output
500
VDD=2.9V
VDD=3.7V
VDD=3.3V
400
300
200
100
0
-25
0
25
50
75
100
Temperature：T [℃]
Fig.35 36.864MHz
Temperature－Period-Jitter 1σ
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© 2009 ROHM Co., Ltd. All rights reserved.
-25
0
25
50
75
100
Temperature：T [℃]
Fig.36 36.864MHz
Temperature－Period-Jitter MIN-MAX
6/16
2009.04- Rev.A
Technical Note
BU2365FV
0
25
50
75
-25
100
0
75
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
100
0
25
50
75
100
Temperature：T [℃]
Temperature：T [℃]
Fig.37 18.432MHz
Temperature－Duty
Fig.38 18.432MHz
Temperature－rise-time
Fig.39 18.432MHz
Temperature－fall-time
600
VDD=2.9V
VDD=3.3V
VDD=3.7V
VDD=2.9V
VDD=3.3V
VDD=3.7V
500
400
300
200
100
0
0
25
50
75
100
-25
0
T emperature：T [℃]
Rise Time ：Tr [nsec]
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
25
50
75
50
75
100
Fig.41 18.432MHz
Temperature－Period-Jitter MIN-MAX
●Reference data (PLL: 24.576MHz output
55
54
53
52
51
50
49
48
47
46
45
25
Temperature：T [℃]
Fig.40 18.432MHz
Temperature－Period-Jitter 1σ
Duty ： Duty [%]
50
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Temperature：T [℃]
100
90
80
70
60
50
40
30
20
10
0
-25
Temperature and Supply voltage variations data)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
100
Temperature：T [℃]
Fig.42 24.576MHz
Temperature－Duty
0
25
50
75
100
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
25
50
75
100
Temperature：T [℃]
Temperature：T [℃]
Fig.43 24.576MHz
Temperature－rise-time
Fig.44 24.576MHz
Temperature－fall-time
600
100
90
VDD=2.9V
VDD=3.3V
VDD=3.7V
80
70
60
Period-Jitter MIN-MAX：
P-JMIN-MAX [psec]
Period-Jitter 1σ：P-J1σ [psec]
25
Fall Time ：Tf [nsec]
Period-Jitter 1 σ：P-J1 σ [psec]
-25
VDD=2.9V
VDD=3.3V
VDD=3.7V
Fall Time ：Tf [nsec]
VDD=3.3V
VDD=2.9V
VDD=3.7V
Temperature and Supply voltage variations data)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Rise Time ：Tr [nsec]
55
54
53
52
51
50
49
48
47
46
45
Period-Jitter MIN-MAX：
P-JMIN-MAX [psec]
Duty ： Duty [%]
●Reference data (PLL: 18.432MHz output
50
40
30
20
10
0
-25
0
25
50
75
Temperature：T [℃]
100
Fig.45 24.576MHz
Temperature－Period-Jitter 1σ
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© 2009 ROHM Co., Ltd. All rights reserved.
500
VDD=2.9V
VDD=3.3V
400
VDD=3.7V
300
200
100
0
-25
0
25
50
75
100
Temperature：T [℃]
Fig.46 24.576MHz
Temperature－Period-Jitter MIN-MAX
7/16
2009.04- Rev.A
Technical Note
BU2365FV
0
25
50
75
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
100
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
50
75
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
100
0
25
50
75
100
Temperature：T [℃]
Temperature：T [℃]
Fig.47 54MHz
Temperature－Duty
Fig.48 54MHz
Temperature－rise-time
Fig.49 54MHz
Temperature－fall-time
600
VDD=2.9V
VDD=3.3V
VDD=3.7V
500
VDD=2.9V
VDD=3.3V
VDD=3.7V
400
300
200
100
0
-25
0
25
50
75
100
-25
0
25
50
75
100
Temperature：T [℃]
Temperature：T [℃]
Fig.50 54MHz
Temperature－Period-Jitter 1σ
Fig.51 54MHz
Temperature－Period-Jitter MIN-MAX
-25
0
25
50
75
100
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
VDD=2.9V
VDD=3.3V
VDD=3.7V
7
6
5
4
3
2
1
0
-25
0
25
50
75
100
Buffer Skew：Tskew_BUF [psec]
8
25
50
75
0
25
50
75
100
Temperature：T [℃]
Fig.53 27MHz BUFFER
Temperature－rise-time
Fig.54 27MHz BUFFER
Temperature－fall-time
500
400
300
200
100
0
-100
-200
-300
-400
-500
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
25
50
75
100
Temperature：T [℃]
Fig.55 27MHz BUFFER
Temperature－Delay
Fig.56 27MHz BUFFER
Temperature – Skew
(BUF_OUT2 Phase Lead)
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VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
100
Temperature：T [℃]
© 2009 ROHM Co., Ltd. All rights reserved.
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Temperature ：T [℃]
Temperature：T [℃]
Fig.52 27MHz BUFFER
Temperature－Duty
0
Fall Time ：Tf [nsec]
VDD=2.9V
VDD=3.3V
VDD=3.7V
Temperature and Supply voltage variations data)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Buffer Skew ： Tskew_BUF [psec]
55
54
53
52
51
50
49
48
47
46
45
Rise Time ：Tr [nsec]
●Reference data (CLOCK-BUFFER : 27MHz output
Duty ： Duty [%]
25
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Temperature：T [℃]
100
90
80
70
60
50
40
30
20
10
0
Buffer Delay ： Td_BUF [nsec]
Fall Time ：Tf [nsec]
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
Period-Jitter 1 σ：P-J1 σ [psec]
Rise Time ：Tr [nsec]
55
54
53
52
51
50
49
48
47
46
45
Temperature and Supply voltage variations data)
Period-Jitter MIN-MAX ：
P-JMIN-MAX [psec]
Duty ： Duty [%]
●Reference data (PLL: 54MHz output
8/16
500
400
300
200
100
0
-100
-200
-300
-400
-500
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
25
50
75
100
Temperature：T [℃]
Fig.57 27MHz BUFFER
Temperature – Skew
(BUF_OUT2 Phase Delay)
2009.04- Rev.A
Technical Note
BU2365FV
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
25
50
75
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
100
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
0
Temperature：T [℃]
50
75
400
VDD=2.9V
VDD=3.3V
VDD=3.7V
200
100
0
0
25
50
75
-25
100
0
25
50
75
25
50
75
100
Fig.60 27MHz VCXO
Temperature－fall-time
100
Temperature：T [℃]
Temperature：T [℃]
Fig.61 27MHz VCXO
Temperature－Period-Jitter 1σ
Fig.62 27MHz VCXO
Temperature－Period-Jitter MIN-MAX
Center freq. ： fc [ppm]
Period-Jitter MIN-MAX ：
P-JMIN-MAX [psec]
500
300
0
Temperature：T [℃]
Fig.59 27MHz VCXO
Temperature－rise-time
VDD=2.9V
VDD=3.7V
VDD=3.3V
-25
VDD=2.9V
VDD=3.3V
VDD=3.7V
-25
100
600
100
90
80
70
60
50
40
30
20
10
0
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Temperature：T [℃]
Fig.58 27MHz VCXO
Temperature－Duty
Period-Jitter 1 σ： P-J1 σ [psec]
25
Fall Time ：Tf [nsec]
55
54
53
52
51
50
49
48
47
46
45
Rise Time ：Tr [nsec]
Duty ： Duty [%]
●Reference data (VCXO:27MHz output Temperature and Supply voltage variations data)
This data represents the central frequency as a deviation to the optimum frequency of 27.000000MHz.
15
12
9
6
3
0
-3
-6
-9
-12
-15
VDD=3.15V
VDD=3.30V
VDD=3.45V
-25
0
25
50
75
100
Temperature：T [℃]
Fig.63 27MHz VCXO
Temperature – Central frequency fc
Frequency：f [ppm]
●Reference data (VCXO : 27MHz output Control voltage – Frequency data)
This data represents the central frequency as a deviation to the optimum frequency of 27.000000MHz.
100
80
60
40
20
0
-20
-40
-60
-80
-100
VDD=3.3V
0
0.55
1.1 1.65
2.2 2.75 3.3
Control Voltage：Vc [V]
Fig.64 27MHz VCXO
Control voltage – Frequency data
100
95
90
85
80
75
70
65
60
55
50
Standby Current ： Iccs [μA]
Circuit Current ：Icc [mA]
●Reference data (BU2365FV consumption current
VDD=3.7V
VDD=3.3V
VDD=2.9V
-25
0
25
50
75
100
Temperature：T [℃]
Fig.65 Maximum Load
Operating Circuit Current
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© 2009 ROHM Co., Ltd. All rights reserved.
Temperature and Supply voltage variations data)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
VDD=3.7V
VDD=3.3V
VDD=2.9V
-25
0
25
50
75
100
Temperature：T [℃]
Fig.66 Power-down
Standby Current
9/16
2009.04- Rev.A
Technical Note
BU2365FV
0.5V / div
0.5V / div
0.5V / div
●Reference data (PLL : Long Term Jitter data)
This data represents Period-Jitter at the 1000th cycle.
2.0nsec / div
2.0nsec / div
Fig.67 33.8688MHz
Long Term Jitter
2.0nsec / div
Fig.68 36.864MHz
Long Term Jitter
Fig.69 54MHz
Long Term Jitter
700
700
600
600
600
500
400
300
200
VDD=3.3V
100
0
500
400
300
200
100
10 20 30 40 50 60 70
Output Load：CL [pF]
500
400
300
200
0
10 20 30 40 50 60 70
Output Load：CL [pF]
Fig.71 36.864MHz
CL－Period-Jitter MIN-MAX
600
600
600
400
300
VDD=3.3V
200
100
Period-Jitter MIN-MAX ：
P-JMIN-MAX [psec]
700
Period-Jitter MIN-MAX ：
P-JMIN-MAX [psec]
700
500
400
300
200
VDD=3.3V
100
0
5
10 15 20 25
Output Load：C L [pF]
30
Fig.73 24.576MHz
CL－Period-Jitter MIN-MAX
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
500
400
VDD=3.3V
300
200
100
0
0
0
10 20 30 40 50 60 70
Output Load：CL [pF]
Fig.72 18.432MHz
CL－Period-Jitter MIN-MAX
700
500
VDD=3.3V
100
0
0
Fig.70 33.8688MHz
CL－Period-Jitter MIN-MAX
Period-Jitter MIN-MAX：
P-JMIN-MAX [psec]
VDD=3.3V
0
0
Period-Jitter MIN-MAX ：
P-JMIN-MAX
Period-Jitter MIN-MAX ：
P-JMIN-MAX [psec]
700
Period-Jitter MIN-MAX ：
P-JMIN-MAX [psec]
Period-Jitter MIN-MAX ：
P-JMIN-MAX [psec]
●Reference data (Period-Jitter MIN-MAX Output load CL dependence data)
This data represents the output load up to two times as high as the maximum load of each output.
Since the 27-MHz buffer is dependent on the jitter of a clock input, the output is represented by the ratio to the jitter at 50pF.
0
5
10 15 20 25
Output Load：CL [pF]
30
Fig.74 54MHz
CL－Period-Jitter MIN-MAX
0
1
2 3 4 5 6 7
Output Load：CL [pF]
8
Fig.75 27MHz VCXO
CL－Period-Jitter MIN-MAX
VDD=3.3V
0
25
50
75
Output Load：CL [pF]
100
Fig.76 27MHz BUFFER
CL－Period-Jitter MIN-MAX
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© 2009 ROHM Co., Ltd. All rights reserved.
10/16
2009.04- Rev.A
Technical Note
BU2365FV
●Block diagram, Pin assignment
3Pin：FSEL
PLL1
1/4
22Pin：CLK768FS output
(FSEL=L：33.8688MHz)
(FSEL=OPEN：36.864MHz)
PLL0
1/4
24Pin：CLK54M output
(54.0000MHz)
7Pin：XTAL_IN
27.0000MHz
Crystal
VCXO
1: VDD54M
24: CLK54M
2: VSS54M
23: OE
3: FSEL
22: CLK768FS
4: TEST
21: VDD
5: AVDD
20: VSS
6: AVSS
19: CLK384FS
7: XTAL_IN
18: CLK512FS
8: XTAL_OUT
17: VDD_B
9: VDD_V
16: BUF_IN
8Pin：XTAL_OUT
10Pin：VCTRL
PLL2
H:PLL ON
L:PLL OFF
1/4
1/8
19Pin：CLK384FS output
(18.432MHz)
18Pin：CLK512FS output
(24.576MHz)
1/6
23Pin：OE
H:output enable
L:L out
12Pin：VCXO_OUT output
(27.0000MHz)
10: VCTRL
15: VSS_B
11: VSS_V
14: BUF_OUT1
12: VCXO_OUT
13: BUF_OUT2
14Pin：BUF_OUT1 output
(CL=50pF、27MHz)
16Pin：BUF_IN
(27MHz)
13Pin：BUF_OUT2 output
(CL=50pF、27MHz)
Fig.78 Pin assignment
Fig.77 Block diagram
●Pin function
Pin No.
Pin Name
Function
1
VDD54M
Power supply for CLK54M output
2
VSS54M
3
FSEL
4
TEST
GND for CLK54M output
FS select (CLK768FS selection)
(FSEL=L: 44.1 kHz, FSEL=OPEN: 48 kHz, equipped with pull-up resistor)
TEST pin, normally “OPEN”, equipped with pull-down resistor)
5
AVDD
Power supply for PLL Analog
6
AVSS
GND for PLL Analog
7
XTAL_IN
8
XTAL_OUT
9
VDD_V
Power supply for VCXO
10
VCTRL
VCXO control input pin
GND for VCXO
Crystal oscillator input pin
Crystal oscillator output pin
11
VSS_V
12
VCXO_OUT
Monitor pin for VCXO output
13
BUF_OUT2
BUFFER output pin
14
BUF_OUT1
BUFFER output pin
15
VSS_B
GND for BUFFER
16
BUF_IN
BUFFER input pin
17
VDD_B
Power supply for BUFFER
18
CLK512FS
19
CLK384FS
18.432MHz output
20
VSS
GND for PLL Logic
21
VDD
Power supply for PLL Logic
22
CLK768FS
23
OE
24
CLK54M
24.576 MHz output
FSEL=L: 33.8688 MHz output, FSEL=OPEN: 36.864 MHz output
Output enable pin
L: POWER DOWN, OPEN: NORMAL, equipped with pull-up resistor
54MHz output
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11/16
2009.04- Rev.A
Technical Note
BU2365FV
●Audio Clock Functions
1) Output phase relation
The Audio clocks (i.e., CLK768FS, CLK384FS, and CLK512FS) of the BU2365FV are designed so that these clocks will
intentionally becomes out of the phase of each output, in order to provide low jitter and noise levels. Thus, overlapped
through currents generated at the clock edges can be suppressed to provide low jitter and noise levels.
For the generation of CLK384FS (18.432 MHz), generate two-phase CLK768FS (36.864 MHz) first. The CLK768FS1 and
CLK768FS2 will get to the phase relation with one clock out of the PLL2 output (VCO=147.456 MHz). By dividing the
frequency in sync with the leading edge of this CLK768FS1, the CLK384FS will fall out of the phase of the CLK768FS2.
Since the frequency of CLK512FS is divided into six portions in sync with the trailing edge of the PLL2 output, the
CLK512FS will fall out of the phases of CLK768FS and CLK384FS by half cycle.
As described above, the Audio clocks of the BU2365FV fall out of the phases each other, thus providing low jitter and
noise levels.
Furthermore, the true values of phase difference (Delay rate) between CLK384FS and CLK768FS are specified as shown
below with consideration given to variations in the measurements on the tests before shipment.
True value [nsec]
MIN
TYP
MAX
17.0
20.0
23.0
BU2365FV
CLK384FS： 18.432MHz
D Q
CLK768FS1： 36.864MHz(inside)
D Q
D Q
QB
QB
QB
CLK768FS2： 36.864MHz output
PLL2
VCO 147.456MHz
PLL2： 147.456MHz
CLK768FS1： 36.864MHz
CLK768FS2： 36.864MHz
CLK384FS： 18.432MHz
Delay
CLK512FS： 24.576MHz
Fig.79 Audio Clock Output Circuit Configuration and Timing Chart
2) Half-pulse clock protection [HPC]
The CLK768FS output is provided with a function used to prevent the occurrence of asynchronous droop of half cycle or
less (i.e., half-pulse clock) while in frequency selection under the FSEL pin control.
This function is designed to set the frequency to output L fixed after the elapse of two trailing clocks of output before the selection
and to a desired frequency after the elapse of two trailing clocks of output after the selection, when switching the FSEL pin.
Specifically speaking, when the FSEL pin is set to High, the CLK768FS outputs a frequency of 36.864 MHz. With this
setting, if the FSEL pin is switched to Low, the CLK768FS will be set to L Fixed after the lapse of two trailing clocks of
36.864 MHz, and then the CLK768FS will output a frequency of 33.8688 MHz after the lapse of two trailing clocks of
33.8688 MHz.
H/L change
H/L change
FSEL
①
36.864MHz
②
①
①
33.8688MHz
②
①
②
②
CLK768FS output
36.864Hz output
Output：L
33.8688MHz output
output：L
36.864MHz output
Fig.80 HPC timing chart
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12/16
2009.04- Rev.A
Technical Note
BU2365FV
●Package Outline
Lot No.
BU2365FV
Fig.81
●Equivalent circuit
PIN No.
Equivalent circuit of I/O
3,23
(With
pull-up)
PIN No.
Equivalent circuit of I/O
From the inside
of IC
To the inside
of IC
13,14,
18,19,
22,24
4
(With
pull-down)
To the inside
To the
inside of IC
of IC
10
7
To the inside
of IC
16
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© 2009 ROHM Co., Ltd. All rights reserved.
8
13/16
From the inside
of IC
2009.04- Rev.A
Technical Note
BU2365FV
●Application Circuit
L：33.8688MHz
OPEN：36.8640MHz
1:VDD54M
24:CLK54M
54.0000MHz
(CL=15pF)
2:VSS54M
23:OE
OPEN=enable
L=power down
3:FSEL
22:CLK768FS
4:TEST
21:VDD
FSEL=L ：33.8688MHz
FSEL=OPEN ：36.864MHz
(CL=32pF)
5:AVDD
20:VSS
6:AVSS
BU2365FV
7:XTAL_IN
27.0000MHz
0.0V～VDD
27.0000MHz
19:CLK384FS
18.432MHz
(CL=32pF)
18:CLK512FS
24.576MHz
(CL=15pF)
8:XTAL_OUT
17:VDD_B
9:VDD_V
16:BUF_IN
10:VCTRL
15:VSS_B
11:VSS_V
14:BUF_OUT1
12:VCXO_OUT
13:BUF_OUT2
27.0000MHz
27.0000MHz
(CL=50pF)
27.0000MHz
(CL=50pF)
Fig.82
Note)
1)
2)
3)
4)
5)
6)
7)
8)
Basically, mount ICs to the substrate for use. If the ICs are not mounted to the substrate, the characteristics of ICs may not be fully demonstrated.
Mount 0.1uF capacitors in the vicinity of the IC pins between 1PIN (VDD54M) and 2PIN (VSS54M), 5PIN (AVDD) and 6PIN (AVSS), 9PIN (VDD_V)
and 11PIN (VSS_V), 17PIN (VDD_B) and 15PIN (VSS_B), and 21PIN (VDD) and 20PIN (VSS), respectively.
For the fine-tuning of frequencies, insert several numbers of pF in the 7PIN and 8PIN to GND.
The electrical characteristics have been all evaluated with the use of the crystal oscillator NX5032GA (Spec. No. EXS00A-00278) manufactured by
NIHON DEMPA KOGYO CO., LTD., under the conditions of Limiting resistance Rd=30Ω and Load CL=10pF. Consequently, in order to use the
BU2365FV, the said crystal oscillator is recommended.
As to the jitters, the TYP values vary with the substrate, power supply, output loads, noises, and others. Besides, for the use of the BU2365FV, the
operating margin should be thoroughly checked.
Depending on the conditions of the substrate, mount an additional electrolytic capacitor between the power supply and GND terminal.
For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to the BU2365FV from the substrate or to insert a capacitor
(of 1Ω or less impedance), which bypasses high frequency desired, between the power supply and the GND terminal.
Even though we believe that the example of the application circuit is worth of a recommendation, please be sure to thoroughly recheck the
characteristics before use.
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14/16
2009.04- Rev.A
Technical Note
BU2365FV
●Cautions on use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as applied voltage (VDD or VIN), operating temperature range (Topr),
etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit.
If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take
physical safety measures including the use of fuses, etc.
(2) Recommended operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The
electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to
the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.
In this regard, for the digital block power supply and the analog block power supply, even though these power supplies
has the same level of potential, separate the power supply pattern for the digital block from that for the analog block,
thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to
the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal.
At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the
capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus
determining the constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric
transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting
can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or
between the terminal and the power supply or the GND terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the
jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In
addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention
to the transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of
the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input
terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not
apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power
supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the
guaranteed value of electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of
the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a
degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
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15/16
2009.04- Rev.A
Technical Note
BU2365FV
●Ordering part number
B
U
2
Part No
3
6
5
F
Part No
V
-
E
Package
FV: SSOP-B24
2
Packaging and forming specification
E2: Embossed tape and ree
SSOP-B24
7.8 ± 0.2
(MAX 8.15 include BURR)
13
Embossed carrier tape
Quantity
2000pcs
0.3Min.
1
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
12
0.15 ± 0.1
0.1
1.15 ± 0.1
Tape
Direction
of feed
5.6 ± 0.2
7.6 ± 0.3
24
0.1
0.65
0.22 ± 0.1
1pin
Reel
(Unit : mm)
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© 2009 ROHM Co., Ltd. All rights reserved.
16/16
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
2009.04- Rev.A
Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice - GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice - GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.001
