Datasheet
24bit Audio CODEC series
3W+3W Class AB/D Speaker AMP
Stereo Audio CODEC
BU26156RFS
General Description
BU26156RFS is Low Power Stereo Audio CODECs with
built-in various acoustic effects. BU26156RFS has stereo
line and monaural mic inputs that can input to 2Vrms,
stereo speaker amplifier that can change Class AB / D
and stereo Headphone Outputs.BU26156 also has
built-in voltage regulator for the stability of CODEC
characteristic that is sensitive to the outside noise.
Important Characteristic
Supply Voltage
SPLVDD,SPRVDD:
HVDD1:
HPVDD:
IOVDD:
Mic-ADC SNR:
Line-ADC SNR:
DAC-SP SNR:
DAC-LOUT SNR:
Operating Temperature:
Features
24bit Stereo ADC, DAC
2Vrms Input available, Stereo Line Input with ALC
Monoraul MIC Input with ALC
Switch Class AB/D 3W Stereo Speaker Amplifier
AM Avoidance Function
Stereo Headphone Output Amplifier
Digital signal processing
High Power Supply Rejection Ratio characteristic
Package
HTSSOP-A44R
2.7V to 5.5V
2.7V to 3.6V
2.7V to 3.6V
1.65V to 5.5V
87[dB](Typ.)
93[dB](Typ.)
86[dB](Typ.)
95[dB](Typ.)
-20℃ to +85℃
W(Typ.) x D(Typ.) x H(Max.)
18.50mm x 9.50mm x 1.00mm
Applications
Radio cassette recorder
PC Speaker
Figure 1. HTSSOP-A44R
Basic Block Diagram
Figure 2.
○Product structure:Silicon monolithic integrated circuit
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TSZ22111・14・001
○This product is not designed protection against radioactive rays
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Datasheet
BU26156RFS
Pin Layout HTSSOP-A44R
Top View
1
44
HPOUTL
HPVDD
HPOUTR
LIN 3R
HPGND
LIN 3L
HPOUTCAP
LIN2R
NC
LIN 2L
SPLVDD
LIN 1R
SPLM
LIN 1L
SPLP
VMID
2
43
3
42
4
41
5
40
6
39
7
38
8
37
9
36
SPLGND
AGND
SPRGND
MINP
SPRP
MINM
SPRM
PLLC
10
35
11
34
12
33
13
32
SPRVDD
MCLKI
SPMUTE
BCLK
14
31
15
30
BEEPIN
LRCLK
16
29
MICBIASREF
SDIN
17
28
MICBIAS
SDOUT
HVDD 1
IOVDD
18
27
19
26
AGND
IRQB
20
25
REGOUT
RESETB
DGND
CSB/SCL
21
24
22
23
SCLK/SAD
SDATA/SDA
Figure 3.
Pin Description
No
Name
25
RESETB
23
SDATA
/SDA
22
SCLK
/SAD
I/O
Power
I
IOVDD
IO
IOVDD
I
IOVDD
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Function
Reset pin
“L” level : Reset enable.
“H” level : Reset disable.
3 wire interface: data input output pin
It is indicated as SDATA on the description
of AC characteristics.
2 wire interface : data input output pin(Note1)
It is indicated as SDA on the description
of AC characteristics.
3 wire interface : Serial clock input pin
It is indicated as SCLK on the description
of AC characteristics.
2 wire interface: Slave address pin
Future explanation indicates SAD.
Choose from the following two kinds.
SAD Pin=HGND : ”0011010”
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Reset
No use
(input)
-
(input)
-
(input)
DGND
TSZ02201-0V1V0E502570-1-2
Jul.1.2014 Rev.001
Datasheet
BU26156RFS
24
CSB
/SCL
30
31
29
28
32
26
38
39
40
41
42
43
35
34
I
IOVDD
LRCLK
BCLK
SDIN
SDOUT
MCLKI
IRQB
LIN1L
LIN1R
LIN2L
LIN2R
LIN3L
LIN3R
MINP
MINM
IO
IO
I
O
I
O
I
I
I
I
I
I
I
I
IOVDD
IOVDD
IOVDD
IOVDD
IOVDD
IOVDD
REGOUT
REGOUT
REGOUT
REGOUT
REGOUT
REGOUT
REGOUT
REGOUT
15
BEEPIN
I
REGOUT
16
MICBIASREF
O
HVDD1
1
MICBIAS
O
HVDD1
37
VMID
O
REGOUT
20
REGOUT
O
HVDD1
8
7
11
12
SPLP
SPLM
SPRP
SPRM
O
O
O
O
SPLVDD
SPLVDD
SPRVDD
SPRVDD
14
SPMUTE
I
IOVDD
1
2
32
HPOUTL
HPOUTR
LOUTCAP
O
O
O
HPVDD
HPVDD
HVDD1
33
PLLC
O
REGOUT
27
IOVDD
P
-
6
SPLVDD
P
-
9
SPLGND
P
-
13
SPRVDD
P
-
10
SPRGND
P
-
18
HVDD1
P
-
19, 36
21
AGND
DGND
P
P
-
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SAD Pin=IOVDD : ”0011011”
3 wire interface : chip select input pin
It is indicated as CSB on the description of
AC characteristics.
(Note1)
2 wire interface : Serial clock input pin
It is indicated as SCL on the description of
AC characteristics.
SAI LR clock input/output pin
SAI bit clock input/output pin
SAI serial data input pin
SAI serial data output pin
Master Clock pin
Interrupt output Pin
Line analog input Lch pin 1
Line analog input Rch pin 1
Line analog input Lch pin 2
Line analog input Rch pin 2
Line analog input Lch pin 3
Line analog input Rch pin 3
Analog microphone + input
Analog microphone - input
Line input pin.
The input signal for this pin can output
Headphone output pins or Speaker output
pins.
External filter pin for microphone bias.
A capacitor is connected between
MICBIASREF and AGND.
Microphone bias voltage output pin
A capacitor is connected between
MICBIASCAP and AGND.
Analog reference voltage pin
A capacitor is connected between VMID
and AGND.
Regulator output pin
A capacitor is connected between
REGOUT and HGND1.
Please put in the chip close as much as
possible.
speaker Lch output + pin
speaker Lch output - pin
speaker Rch output + pin
speaker Rch output - pin
Test control pin “L” level : Release MUTE
“H” level : MUTE
Headphone Lch output pin
Headphone Rch output pin
Headphone Output capacitance pin
PLL filter pin
The width of the clock frequency to input
can be expanded.
Interface Power Supply pin
A capacitor is connected between IOVDD
and HGND1.
Speaker Lch Power Supply pin
It is used on the same voltage as SPRVDD.
A capacitor is connected between SPLVDD
and SPLGND.
Speaker Lch ground pin
Speaker Rch Power Supply pin
It is used on the same voltage as SPLVDD.
A capacitor is connected between SPRVDD
and SPRGND.
Speaker Rch ground pin
High voltage power supply 1 pin
A capacitor is connected between HVDD1
and HGND1.
Analog ground pin
Digital ground pin
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(input)
-
(input)
(input)
(input)
DGND
(input)
IOVDD
(input)
(input)
(input)
(input)
(input)
(input)
(input)
(input)
DGND
DGND
DGND
Open
DGND
Open
Open,
or coupling
capacitor
connected to
AGND near by
BU26156
(input)
ANGD
Open
AGND
Open
AGND
-
AGND
-
SPLGND
SPLGND
SPRGND
SPRGND
Open
Open
Open
Open
DGND
Open
HPGND
HPGND
AGND
Open
Open
Open
AGND
Open
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TSZ02201-0V1V0E502570-1-2
Jul.1.2014 Rev.001
Datasheet
BU26156RFS
44
HPVDD
P
3
5
HPGND
NC
P
-
Headphone Power Supply pin.
A capacitor is connected between HPVDD
and HPGND.
Headphone ground pin.
No Connection pin. Set open this pin.
Open
(Note1)In case of 2 wire serial, if this pin is used with external pull-up resistor, it possibly gets noise from power. Therefore tamper noise design is required in
the noisy environment.
Application Examples
Figure 4. Application Examples1(Use internal speaker amplifier)
Figure 5. Application Examples2 (Use external speaker amplifier)
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Datasheet
BU26156RFS
Absolute Maximum Ratings
Parameter
Symbol
Condition
Rating
Unit
SPLVDD
SPRVDD
-
-0.3 to 7.0
V
HPVDD Supply Voltage
HPVDD
-
-0.3 to 4.5
V
HVDD1 Supply Voltage
HVDD1
-
-0.3 to 4.5
V
IOVDD Supply Voltage
IOVDD
-
-0.3 to 7.0
V
-0.3 to IOVDD+0.3
V
VIN
MCLKI, LRCLK, BCLK, SDIN,
SDATA/SDA, SCLK/SAD,
CSB/SCL, SPMUTE
LIN1L, LIN1R, LIN2L, LIN2R,
MINL, MINR, BEEPIN
-0.3 to REGOUT+0.3
V
SPLVDD,
Voltage
SPRVDD
Supply
Input Voltage
Storage Temperature
Tstg
-
-55 to +150
°C
Package power dissipation
Θjc
HTSSOP-A44R
2
(Tjmax=+125℃)
℃/W
Output Current 1
IOSP
SPLM, SPLP,
SPRM, SPRP
-1.0 to +1.0
A
Output Current 2
IOLO
HPOUTL, HPOUTR
-100 to +100
mA
Output Current 3
IOREGO
REGOUT
-30 to 0
mA
Output Current 4
IOO
All digital pins
-8 to +8
mA
Do not short the output pin to another output pin, power supply pin or GND pin.
(Output pin includes an IO pin which is in output mode)
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Condition
Parameter
Symbol
Condition
Rating
Unit
SPLVDD
SPRVDD
SPLVDD=SPRVDD
2.7 to 5.5
V
HPVDD Supply Voltage
HPVDD
-
2.7 to 3.6
V
HVDD1 Supply Voltage
HVDD1
-
2.7 to 3.6
V
IOVDD Supply Voltage
IOVDD
-
1.65 to 5.5
V
Operating Temperature
Top
-
-20 to +85
°C
SPLVDD,
Voltage
SPRVDD
Supply
*The radiation-proof design is not carried out.
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Datasheet
BU26156RFS
Electrical Characteristics
DC Characteristics
Parameter
“H” Input
Voltage 1
“H” Input
Voltage 2
“L” Input
Voltage
“H” Output
Voltage
“L” Output
Voltage 1
“L” Output
Voltage 2
“H” Input
Leakage
Current 1
“L” Input
Leakage
Current
“Z” Output
Leakage
Current
“Z” Output
Leakage
Current
(ALL GND terminals=0V, HVDD1=3.3V, IOVDD=3.3V, SPLVDD=SPRVDD=HPVDD=3.3V, Ta=25°C)
Uni
Symbol
Condition
Min.
Typ.
Max.
Related Pin
t
RESETB,
SDATA/SDA,
SCLK/SAD,
VIH1
DGND=0V
IOVDD×0.8
IOVDD+0.3
V
CSB/SCL,
SPMUTE and
MCLKI pins.
LRCLK, BCLK
VIH2
DGND=0V
IOVDD×0.7
IOVDD+0.3
V
and SDIN
pins.
All Digital
VIL
DGND=0V
-0.3
IOVDD×0.2
V
Input
VOH
IOH=-1mA
IOVDD×0.85
-
-
V
Except SDA
VOL1
IOL=1mA
-
-
IOVDD×0.15
V
Except SDA
IOL=3mA,
IOVDD ≧2V
IOVDD