BU6939FV-E2

1/4 ◆Structure ：Silicon Monolithic integrated circuit ◆Product name：Voice Synthesis LSI ◆Type ：BU6939FV ◆Features 1) Single playback mode, Available bit-rate is 16kbps(High compression) - 128kbps(High Quarity) at 32kHz sampling or 16kHz sampling). 2) Voice/audio data is stored in serial Flash ROM which is connected to BU6939FV through SPI-serial Interface. Duration for playback is 32seconds/Mbits(standard) or max 64s/Mbits(Maximum). 3) Input system clock: 16.384MHz/8.192MHz/4.096MHz/2.048MHz. 4) Audio sampling rate is 32kHz or 16kHz and Built-in 16bits DAC 5) Operation by single power supply. Available voltage:2.7 to 3.6V. 6) Max numbers of tunes : 512 7) Maximum 10 phrase numbers memory as a ROM-phrase Number,and playback them only one command.(ROM_phrase number is available 0-46) 8) HOST-I/F is selectable from serial interface with status or direct-pin mode. 9) Enable to access(read/write) data stored in serial Flash ROM connected directly to BU6939FV. 10) Various play modes are available. 【play modes from serial Interface】 -available ROM-phrase function. -adjustable volume at each track independently -enable to playback tunes which are registered in the sequencer list. Order of tunes are randomly selected. Max 16 tunes can be registered. -For each track, enable to playback a selected tune or to playback tunes in the sequencer list with/without loop. -fade-in and fade-out functions are supported. 【Play modes from direct pin control】 -available ROM-phrase function. -maximum 23 tunes are registered to play. ★Radiation resistance design is not arranged. REV. A 2/4 ◆Absolute maximum ratings (Ta = 25〬C) Item Symbol Ratings Unit Pd 640 mW Ap plie d vo ltag e VDD -0.2～7.0 V In pu t vo ltag e VIN -0.2～VDD+0.3 V O per ating te mp era tu re ra ng e TOPR -40～+85 ℃ Stor age temper a tur e r ang e TSTG -50～125 ℃ Pow er dissipa tion *) *) Over Ta = 25℃ or more, reducing 6.4mW per ℃. ★Radiation resistance design is not arranged. ◆Operation Conditions (Ta= -40～+85℃ unless otherwise specified) Item Symbol Specified value Min Typ Max Unit Condition Operation power-supply voltage VDD_IN 2.7 － V － 3.6 ◆Electric characteristic (DC characteristic) DC Characteristics ■VDD_IN=3V（Ta=25℃） Specified value Min Typ Max Unit 0.7VDD － － V 2 VIL － － 0.3VDD V 2 "H" Output Voltage VOH VDD-0.4 － － V IO=2.0mA 2 "L" Output Voltage VOL － － 0.4 V IO=2.0mA 2 "H" Input current IIH － － 10 μA VIH=VDD 1 "L" Input current IIL － － -10 μA VIL=GND 1 Static consumption current IST － － 10 μA Vi=VDDorGND 3 Item Symbol "H" Input Voltage VIH "L" Input Voltage Condition Circuit form DAC characteristics ■VDD_IN=3V (Ta=25℃) Item DACOUToutput load registance DACOUT Output Voltage Symbol Specified Value Min. Typ. max. Unit Condition RAOUT 10 － － KΩ at No signal VAOUT GND － VDD V at No load REV. A 3/4 ◆External dimensions・Block diagram BU6939FV LOT No. SSOP-B28 Figure1 Direct tune input pin External dimention SIO Command　 I/F (Serial I/F) Main processor controller Voice signal Proccessing part Pre-Processor Controller Output I/F Temporary RAM DAC Coef. RAM Output ROM　I/F Regulator OSC SPI　I/F Serial ROM Figure 2. Block diagram REV. A 4/4 ◆Pin name Table Pin name Detailed table PIN NO. Pin Name I/O 1 2 3 4 GND VSEL2/TXD VSEL1/RXD VSEL0/RXCB － IO I I GND tune number pin#2 / Serial Interface output data tune number pin#1 / Serial Interface input data tune number pin#0 / Serial Interface CLK 5 TSEVENT/BUSY O Playing / ending flag("H":playing "L":stop) accessing Flash ROM ("H"：busy "L"：not busy) 6 VSEL3/SYNCREQ IO tune number pin#3 / Synchronous character request ("H" synchronization error) 7 8 9 10 11 12 13 GND VDD1.8_IN REG18 STBY TESTEN VDD_IN SPISCK － I O I I － O GND Core power supply input※3) Core power supply output※3) Standby ("H" oscillation stop) normally “L” Test Input(“L” fixation） Power supply input Clock for serial SPI-ROM 14 SPISO O Serial output data to serial SPI-ROM 15 16 17 18 19 SPISI SPICEB GND VSEL4/BFULLB APOFF I O － IO I 20 CLK16SEL I 21 REFOUT O 22 23 24 25 26 27 28 DACOUT GND VDD_IN RESETB SIO_ENBL XIN XOUT O － － I I I O Serial Input data from serial SPI-ROM chip enable for serial SPI-ROM GND tune number pin#4 /command buffer Full signal Analog Circuit Power off Clock selection “H”:16.384Mhz mode “L”:4.096MHzmode LSI TEST Pin (attach capacitance(>10uF)) DAC Output GND Power supply input Reset pin (low active) Selection of host interface(SIO or direction pin input*1)) Oscillation cell input *2 Oscillation cell Output *2 Function *1) At SIO_ENBL ="L", VSEL4, VSEL3, VSEL2, VSEL1, VSEL0 is valid, and SIO is invalid. *2) At no setting CLK setting Register, Clock is 16.384MHz at CLK16SEL="H",,4.096MHz at CLK16SEL ="L". *3) pin #8 and pin #9 should be connected in a shortest pass, and attach capacitance(>10uF) as following figure. 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