Datasheet
A/D Converter Series
Successive Approximation A/D Converter
12 bit, 0.5 MSPS to 1 MSPS, 2.7 V to 5.25 V,
1-channel, SPI Interface
BU79100G-LA
General Description
Key Specifications
This is the product guarantees long time support in
industrial market.
The BU79100G-LA is a general purpose, 12 bit
1-channel successive approximation AD converter. The
sampling rate of BU79100G-LA ranges from 0.5 MSPS to
1 MSPS.
◼ Supply Voltage Range:
◼ Sampling Rate:
◼ Power Consumption:
(In 1MSPS Operation)
◼
◼
◼
◼
◼
Features
Long Time Support Product for Industrial Applications
Maximum 1 MSPS Sampling Rate
Low Power Consumption
Small SSOP6 Package Compatible with SOT23-6
Serial Interface Compatible with
SPI/QSPI/MICROWIRE
◼ Operational Supply Voltage Range: 2.7 V to 5.25 V
◼ Single-ended Input
◼ Output Code in Straight Binary Format
◼
◼
◼
◼
◼
2.70 V to 5.25 V
0.5 MSPS to 1.0 MSPS
8 mW @VA = 5 V (Typ)
1.5 mW @VA = 3 V (Typ)
INL:
-1.1 LSB to +1.0 LSB
DNL:
-1.0 LSB to +1.0 LSB
SNR:
71.5 dB @ VA = 3 V (Typ)
SINAD:
71.0 dB @ VA = 3 V (Typ)
Operating Temperature Range: -40 °C to +85 °C
Package
SSOP6
W (Typ) x D (Typ) x H (Max)
2.9 mm x 2.8 mm x 1.25 mm
Applications
◼
◼
◼
◼
Industrial Equipment
Instrumentation and Control Systems
Motor Control Systems
Data Acquisition Systems
Typical Application Circuit
VOLTAGE
REFERENCE
VA
10µF
0.1µF
CSB
BU1S12S1BG-M
BU79100G-LA
ANALOG
SIGNAL
SOURCE
330Ω
SCLK
330Ω
VIN
22Ω
1000pF
to 0.1µF
〇Product structure : Silicon integrated circuit
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MICROPROCESSOR
or
DSP
SDATA
100Ω
GND
〇This product has no designed protection against radioactive rays.
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Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Key Specifications .......................................................................................................................................................................... 1
Package .......................................................................................................................................................................................... 1
Typical Application Circuit ............................................................................................................................................................... 1
Pin Configuration ............................................................................................................................................................................ 3
Pin Descriptions .............................................................................................................................................................................. 3
Block Diagram ................................................................................................................................................................................ 3
Absolute Maximum Ratings ............................................................................................................................................................ 4
Thermal Resistance ........................................................................................................................................................................ 4
Recommended Operating Conditions ............................................................................................................................................. 5
Electrical Characteristics................................................................................................................................................................. 6
Timing Specifications ...................................................................................................................................................................... 7
Term Definitions .............................................................................................................................................................................. 8
Typical Performance Curves ........................................................................................................................................................... 9
Description of Functions ............................................................................................................................................................... 12
Application Example ..................................................................................................................................................................... 15
I/O Equivalence Circuit ................................................................................................................................................................. 16
Operational Notes ......................................................................................................................................................................... 17
Ordering Information ..................................................................................................................................................................... 18
Marking Diagram .......................................................................................................................................................................... 18
Physical Dimension and Packing Information ............................................................................................................................... 19
Revision History ............................................................................................................................................................................ 20
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Pin Configuration
(TOP VIEW)
VA
1
6
CSB
GND
2
5
SDATA
VIN
3
4
SCLK
Pin Descriptions
Pin No.
Pin Name
1
VA
Power supply pin. This voltage is the full scale of the analog input.
Function
2
GND
Ground pin. This voltage level is the zero scale of the analog input.
3
VIN
Analog input pin. The voltage range must be between 0 V and VA.
4
SCLK
Digital clock input pin.
5
SDATA
Digital data output pin.
6
CSB
Chip select pin. A/D conversion starts at the falling edge of this signal.
Block Diagram
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Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Symbol
Rating
Unit
VA
5.7
V
Analog Input Voltage
VIN
-0.3 to VA+0.3
V
Digital Input Voltage
VDIN
-0.3 to +5.7
V
Tjmax
125
°C
Tstg
-55 to +125
°C
Supply Voltage
Maximum Junction Temperature
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 1)
Parameter
Symbol
Thermal Resistance (Typ)
1s(Note 3)
2s2p(Note 4)
Unit
SSOP6
Junction to Ambient
θJA
376.5
185.4
°C/W
Junction to Top Characterization Parameter(Note 2)
ΨJT
40
30
°C/W
(Note 1) Based on JESD51-2A (Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
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Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
VA
2.70
-
5.25
V
Analog Input Voltage
VIN
0
-
VA
V
Digital Input Voltage
VDIN
0
-
5.25
V
Operating Temperature
Topr
-40
+25
+85
°C
Clock Frequency
fSCLK
10
-
20
MHz
fS
0.5
-
1.0
MSPS
Supply Voltage
Sampling Rate
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Electrical Characteristics
Unless otherwise specified, Ta = -40 °C to +85 °C (typical: Ta = 25 °C), VA = 2.7 V to 5.25 V, fSCLK = 20 MHz, fS = 1 MSPS
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Resolution with No missing codes
RES
-
12
-
bit
Integral Non-linearity
INL
-1.1
-
+1.0
LSB
VA = 2.7 V to 3.6 V, 25 °C
Differential Non-linearity
DNL
-1.0
-
+1.0
LSB
VA = 2.7 V to 3.6 V, 25 °C
Offset Error
OE
-1.2
±0.2
+1.2
LSB
VA = 2.7 V to 3.6 V, 25 °C
Gain Error
GE
-1.2
±0.3
+1.2
LSB
VA = 2.7 V to 3.6 V, 25 °C
71
-
dB
VA = 2.7 V to 3.6 V, 25 °C
Statistic Converter Characteristics
VA = 2.7 V to 3.6 V
Dynamic Converter Characteristics (fIN = 100 kHz, VIN = -0.02 dBFS)
Signal to Noise and Distortion Ratio1
SINAD1
Signal to Noise and Distortion Ratio2
70
SINAD2
68
70
-
dB
VA = 4.75 V to 5.25 V, 25 °C
Signal to Noise Ratio1
SNR1
70.8
71.5
-
dB
VA = 2.7 V to 3.6 V, 25 °C
Signal to Noise Ratio2
SNR2
68.8
71.0
-
dB
VA = 4.75 V to 5.25 V, 25 °C
Total Harmonic Distortion
THD
-
-80
-
dB
VA = 2.7 V to 3.6 V
Spurious-free Dynamic Range
SFDR
-
82
-
dB
VA = 2.7 V to 3.6 V
Effective Number of Bits1
ENOB1
11.3
11.5
-
bit
VA = 2.7 V to 3.6 V, 25 °C
Effective Number of Bits2
Inter-modulation Distortion1
(Second Order Term)
Inter-modulation Distortion2
(Third Order term)
Full Power Band Width1
ENOB2
11.0
11.3
-
bit
IMD1
-
-78
-
dB
IMD2
-
-76
-
dB
fPBW1
-
10.1
-
MHz
VA = 4.75 V to 5.25 V, 25 °C
VA = 5.25 V,
103.5 kHz, 113.5 kHz
VA = 5.25 V,
103.5 kHz, 113.5 kHz
VA = 5 V
Full Power Band Width2
fPBW2
-
7.2
-
MHz
VA = 3 V
tAD
-
4.3
-
ns
VA = 5 V
VA = 5 V
Aperture Delay
Aperture Jitter
Clock Frequency
Sampling Rate
Track/Hold Acquisition Time
tAJ
-
30
-
ps
fSCLK
10
-
20
MHz
fS
500 k
-
1M
SPS
tACQ
-
-
350
ns
Analog Input Characteristics
Input Voltage Range
VIN
0
-
VA
V
Input DC Leakage Current
ILEAK
-1.0
±0.1
+1.0
µA
VIN = 0 V or VA
Input Capacitance1
CINA1
-
28
-
pF
track mode, VA = 5 V
Input Capacitance2
CINA2
-
4
-
pF
hold mode, VA = 5 V
High Input Voltage1
VIH1
2.4
-
-
V
VA = 5.25 V
High Input Voltage2
VIH2
2.1
-
-
V
VA = 3.6 V
Low Input Voltage1
VIL1
-
-
0.8
V
VA = 5 V
Low Input Voltage2
VIL2
-
-
0.4
V
VA = 3 V
Input Current
IIND
-1.0
±0.1
+1.0
µA
VIND = 0 V or VA
Input Capacitance
CIND
-
2.5
-
pF
-
V
ISOURCE = 200 µA
Digital Input Characteristics
Digital Output Characteristics
Output High Voltage1
VOH1
Output High Voltage2
VOH2
-
VA-0.1
-
V
ISOURCE = 1 mA
Output Low Voltage1
VOL1
-
0.02
0.40
V
ISINK = 200 µA
Output Low Voltage2
VOL2
-
0.1
-
V
ISINK = 1 mA
IOZ
-10.0
±0.1
+10.0
µA
VOZ = 0 V or VA
COUT
-
2
-
pF
Operational Current Consumption1
IA1
-
1.6
2.8
mA
VA = 5.25 V, fS = 1 MSPS
Operational Current Consumption2
IA2
-
0.5
1.2
mA
VA = 3.6 V, fS = 1 MSPS
High-Z Leakage Current
High-Z Output Capacitance
VA-0.20 VA-0.03
Current Consumption
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Timing Specifications
Unless otherwise specified, Ta = -40 °C to +85 °C (Typical: Ta = 25 °C), VA = 2.7 V to 5.25 V, fSCLK = 10 M to 20 MHz, CL = 25 pF
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Conversion Time
tCONV
-
16
-
SCLK
CSB Pulse Width
t1
10
-
-
ns
CSB Setup Time
t2
10
-
-
ns
SDATA Enable Time
t3
-
-
20
ns
SDATA Access Time1
t4
-
-
40
ns
VA = 2.7 V to 3.6 V
SDATA Access Time2
t4
-
-
20
ns
VA = 4.75 V to 5.25 V
SCLK Low Pulse Width
t5
0.4xtSCLK
-
-
ns
SCLK High Pulse Width
t6
0.4xtSCLK
-
-
ns
SDATA Hold Time1
t7
7
-
-
ns
VA = 2.7 V to 3.6 V
SDATA Hold Time2
t7
5
-
-
ns
VA = 4.75 V to 5.25 V
SDATA Disable Time1
t8
6
-
25
ns
VA = 2.7 V to 3.6 V
SDATA Disable Time2
t8
5
-
25
ns
VA = 4.75 V to 5.25 V
CSB Hold Time
t9
10
-
-
ns
t10
10
-
-
ns
tQUIET
50
-
-
ns
tPOWUP
-
1
-
µs
tTHROUGHPUT
1
-
20
µs
SCLK Setup Time
Quiet Time
Power-Up Time
Throughput Period
Hold mode
Track mode
t1
CSB
tCONV
t9
t2
1
2
3
t6
4
t10
5
13
15
14
16
SCLK
t4
t3
t5
t7
t8
tQUIET
SDATA
ZERO ZERO
ZERO
ZERO
DB11 DB10
DB2
DB1
DB0
High-Z
High-Z
4 LEADING ZEROS
tTHROUGHPUT
(a) If SCLK is high at the falling edge of CSB
Hold mode
Track mode
t1
CSB
tCONV
t9
t2
1
2
3
t6
4
t10
5
13
15
14
16
SCLK
t4
t3
t5
t7
t8
tQUIET
SDATA
ZERO ZERO
ZERO
ZERO
High-Z
DB11 DB10
DB2
DB1
DB0
High-Z
4 LEADING ZEROS
tTHROUGHPUT
(b) If SCLK is low at the falling edge of CSB
Figure 1. Serial Interface Timing Chart
(Note 5) When the BU79100G-LA is used at the sampling frequency of 1 MSPS, it is recommended to hold SCLK high at the falling edge of CSB as shown
in Figure 1(a). (See also “3. Serial Interface” on page 13.)
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Term Definitions
ACQUISITION TIME:
At the 13th rising edge of SCLK, the mode is changed from Hold mode to Track mode and the sampling capacitor starts to
be charged. It is the time when the voltage of the sampling capacitor equals input voltage from the charge start.
APERTURE DELAY:
It is defined as the time when the input voltage is held since a sampling capacitor was separated with outside by a falling
edge of CSB.
APERTURE JITTER:
The variation in the aperture delays in sampling operations. Aperture jitter gets to affect output noise.
INTEGRAL NON-LINEARLITY (INL):
It is a measure of the deviation of each individual code from a line drawn from zero scale (0.5 LSB below the first code
transition) through full scale (0.5 LSB above the last code transition). The deviation of any given code from this straight line
is measured from the center of that code value.
DIFFERENTIAL NON-LINEARLITY (DNL):
It is the measure of the maximum deviation from the ideal step size of 1 LSB.
OFFSET ERROR (OE):
It is the deviation of the first code transition “(000…000) to (000…001)” from the ideal of 0.5 LSB.
FULL SCALE ERROR (FSE):
It is the deviation of the last code transition “(111…110) to (111…111)” from the ideal of “VA–1.5 LSB”.
GAIN ERROR (GE):
It is defined as full scale error minus offset error.
TOTAL HARMONIC DISTORTION (THD):
It is the ratio, expressed in dB or dBc, of the RMS total of the first five harmonic components at the output to the RMS level
of the input signal frequency as seen at the output. THD is calculated as
where Af1 is the RMS power of the input frequency at the output and A f2 through Af6 are the RMS power in the first 5
harmonic frequencies.
SIGNAL TO NOISE AND DISTORTION RATIO (SINAD):
It is the ratio, expressed in dB, of the RMS value of the input signal to the RMS value of all other spectral components
below half the sampling frequency, including harmonics but excluding DC component.
EFFECTIVE NUMBER OF BITS (ENOB):
It is another method of specifying Signal to Noise and Distortion Ratio. ENOB is defined as “(SINAD–1.76) / 6.02” and
says that the converter is equivalent to a perfect A/D converter of this number of bits.
SIGNAL TO NOISE RATIO (SNR):
It is the ratio, expressed in dB, of the RMS value of the input signal to the RMS value of all other spectral components
below half the sampling frequency, not including harmonics and DC component.
SPURIOUS FREE DYNAMIC RANGE (SFDR):
It is the difference, expressed in dB, between the RMS value of the input signal to the RMS value of the peak spurious
spectral component, where a peak spurious spectral component is any spurious signal present in the output spectrum that
is not present at the input.
CONVERSION TIME:
It is the required time for the A/D converter to convert the input signal to the digital code.
THROUGHPUT PERIOD:
It is the period that should be used as an interval time between any adjacent conversions.
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Typical Performance Curves
1.00
1.00
0.75
0.75
INL [LSB]INL [LSB]
Integral Non-linearity:
DNL [LSB]DNL [LSB]
Differential Non-linearity:
(Reference Data)
Unless otherwise noted, Ta = 25 °C.
0.50
0.25
0.00
-0.25
-0.50
-0.75
0.50
0.25
0.00
-0.25
-0.50
-0.75
-1.00
-1.00
0
1024
2048
3072
0
4096
2048
3072
4096
OUTPUT CODE
CODE
OUTPUT
OUTPUT CODE
OUTPUT
CODE
Figure 3. Integral Non-linearity vs OUTPUT CODE
(VA = 3 V, fSCLK = 10 MHz, fS = 500 kSPS)
Figure 2. Differential Non-linearity vs OUTPUT CODE
(VA = 3 V, fSCLK = 10 MHz, fS = 500 kSPS)
1.00
1.00
0.75
0.75
INL [LSB]
Integral Non-linearity:
INL [LSB]
DNL [LSB]
Differential Non-linearity:
DNL [LSB]
1024
0.50
0.25
0.00
-0.25
-0.50
-0.75
-1.00
0.50
0.25
0.00
-0.25
-0.50
-0.75
-1.00
0
1024
2048
3072
4096
0
OUTPUT CODE
OUTPUT
CODE
2048
3072
4096
OUTPUT CODE
CODE
OUTPUT
Figure 4. Differential Non-linearity vs OUTPUT CODE
(VA = 3 V, fSCLK = 20 MHz, fS = 1 MSPS)
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1024
Figure 5. Integral Non-linearity vs OUTPUT CODE
(VA = 3 V, fSCLK = 20 MHz, fS = 1 MSPS)
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Typical Performance Curves – continued
(Reference Data)
Unless otherwise noted, Ta = 25 °C, fIN = 100 kHz.
1.5
1.0
INL [LSB]INL [LSB]
Integral Non-linearity:
DNL [LSB]DNL [LSB]
Differential Non-linearity:
1.5
VA = 5 V
0.5
VA = 3 V
0.0
VA = 3 V
-0.5
VA = 5 V
-1.0
VA = 5 V
1.0
0.5
VA = 3 V
0.0
VA = 3 V
-0.5
VA = 5 V
-1.0
-1.5
-1.5
0
5
10
15
0
20
SINAD
[dB]
Signal to Noise and Distortion
Ratio:
SINAD1, SINAD2 [dB]
SNRS[dB]
Signal to Noise Ratio:
NR1, SNR2 [dB]
80
75
VA = 5 V
VA = 3 V
65
60
5
10
15
20
ClockFrequency:
Frequency
[MHz]
Clock
fSCLK
[MHz]
Figure 8. Signal to Noise Ratio vs Clock Frequency
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15
20
Figure 7. Integral Non-linearity vs Clock Frequency
Figure 6. Differential Non-linearity vs Clock Frequency
0
10
Clock
Frequency:
fSCLK[MHz]
[MHz]
Clock
Frequency
Clock
Frequency:
fSCLK[MHz]
[MHz]
Clock
Frequency
70
5
75
VA = 3 V
70
VA = 5 V
65
60
55
0
5
10
15
20
Clock
fSCLK
[MHz]
ClockFrequency:
Frequency
[MHz]
Figure 9. Signal to Noise and Distortion Ratio vs Clock
Frequency
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Typical Performance Curves – continued
(Reference Data)
Unless otherwise noted, Ta = 25 °C, fIN = 100 kHz.
-70
THD [dB]THD [dB]
Total Harmonic Distortion:
SFDRRange:
[dB] SFDR [dB]
Spurious-free Dynamic
95
90
85
VA = 3 V
80
VA = 5 V
75
0
5
10
15
-75
-80
VA = 3 V
-85
-90
-95
-100
20
0
Clock
fSCLK
[MHz]
ClockFrequency:
Frequency
[MHz]
-20
-20
Amplitude
[dBFS]
Amplitude
[dBFS]
Amplitude
[dBFS]
Amplitude
[dBFS]
0
-40
-60
-80
-80
-120
-120
200
250
0
100
200
300
400
500
Frequency
[kHz]
Frequency
[kHz]
Frequency
[kHz]
Frequency
[kHz]
Figure 12. Amplitude vs Frequency
(VA = 5 V, fSCLK = 10 MHz, fS = 500 kSPS)
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20
-60
-100
150
15
-40
-100
100
10
Figure 11. Total Harmonic Distortion vs Clock Frequency
0
50
5
Clock
Frequency:
fSCLK[MHz]
[MHz]
Clock
Frequency
Figure 10. Spurious-free Dynamic Range vs Clock Frequency
0
VA = 5 V
Figure 13. Amplitude vs Frequency
(VA = 5 V, fSCLK = 20 MHz, fS = 1 MSPS)
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Description of Functions
1. Overview of A/D Conversion Process
BU79100G-LA is a successive-approximation A/D converter designed with a charge-redistribution D/A converter.
Simplified schematics of the A/D converter are shown in Figure 14 and Figure 15.
Figure 14 shows the A/D converter in Track mode: the switch SW1 is in the position A, SW2 is closed and balances the
comparator. Then, the sampling capacitor is charged with the analog input voltage VIN.
Figure 15 shows the A/D converter in Hold mode. When a conversion starts, the A/D converter goes into Hold mode: SW2
becomes open, SW1 connects the sampling capacitor to ground through the pin B and the comparator loses its balance.
The control logic controls the input voltage of the comparator via the sampling capacitors of the charge-redistribution D/A
converter to get the comparator back into a balanced state. A/D conversion finishes when the comparator balances again.
The control logic also generates the output code of the A/D converter.
CHARGE
REDISTRIBUTION
DAC
VIN
A
SAMPLING
CAPACITOR
VIN
A
SW1
SAMPLING
CAPACITOR
SW1
CONTROL
LOGIC
SW2
B
GND
CHARGE
REDISTRIBUTION
DAC
GND
VA
2
Figure 14. Track mode
CONTROL
LOGIC
SW2
B
VA
2
Figure 15. Hold mode
2. Ideal Transfer Characteristics
Figure 16 shows the ideal transfer characteristics of BU79100G-LA. Code transitions occur midway between successive
integer LSB values, such as 0.5 LSB, 1.5 LSB, and so on. The LSB size for the BU79100G-LA is VA / 4096. The output
code format of the A/D converter is straight binary.
111...111
・・・ ・・
ADC CODE
111...110
111...000
1LSB
1 LSB==VVAA/ /4096
4096
011...111
・・・
000...010
000...001
000...000
0.5LSB
0.5
LSB
00V
V
+V
1.5LSB
LSB
+V
A A–-1.5
ANALOG INPUT
Figure 16. Ideal Transfer Characteristics
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Description of Functions – continued
3. Serial Interface
The serial interface timing is shown in Figure 17. When CSB goes low, both a conversion process and data transfer are
started. At the falling edge of CSB, SDATA changes its state from High-Z to Low, the converter moves from Track mode to
Hold mode. A tracked input signal is sampled and held for conversion at this point. The converter returns from Hold mode
back to Track mode at the rising edge of SCLK subsequent to the 13th falling edge of it. SDATA goes back to High-Z at the
16th falling edge of SCLK or at the rising edge of CSB. After a conversion, the quiet time tQUIET must be satisfied before the
next conversion triggered by the falling edge of CSB.
Sixteen SCLK cycles are needed to read a complete data of the A/D conversion from BU79100G-LA. First, four leading
zeros come out from SDATA. Then, the 12 bit data comes out bit by bit, starting from the MSB. The first zero is clocked out
at the falling edge of CSB. The remaining leading 3 zeros and data bits are clocked out to SDATA at the falling edge of
SCLK; the host IC, the receiver of the A/D conversion data, is intended to receive the data at the subsequent falling edge
of SCLK.
To perform A/D conversion properly, the BU79100G-LA needs at least 16 SCLK cycles while CSB is low. If an A/D
conversion is interrupted in the middle of the conversion with CSB going to high before the 16 th SCLK falling edge, the
following A/D conversion may not be performed normally. Therefore, it is necessary that equal to or more than 16 falling
edges of SCLK exist while CSB is low.
In addition, SCLK should be held either high or low at the falling edge of CSB. If SCLK is low at the falling edge of CSB, as
shown in Figure 17(b), a Hold mode time length is about a half clock period longer than one if SCLK is high as shown in
Figure 17(a). Therefore, when the BU79100G-LA is used at the sampling frequency of 1 MSPS, it is recommended to hold
SCLK high at the falling edge of CSB, as shown in Figure 17(a), in order to ensure sufficient Track mode time for the
maximum acquisition time.
Hold mode
Track mode
CSB
1
2
3
4
5
6
7
8
9
DB11
DB10
DB9
DB8
DB7
10
11
12
13
14
15
16
SCLK
SDATA
High-Z
ZERO
ZERO
ZERO
ZERO
DB6
DB5
DB4
DB3
DB2
DB1
DB0
High-Z
4 LEADING ZEROS
(a)
If SCLK is high at the falling edge of CSB
Hold mode
Track mode
CSB
1
2
3
4
5
6
7
8
9
DB11
DB10
DB9
DB8
DB7
10
11
12
13
14
15
16
SCLK
SDATA
High-Z
ZERO
ZERO
ZERO
ZERO
DB6
DB5
DB4
DB3
DB2
DB1
DB0
High-Z
4 LEADING ZEROS
(b)
If SCLK is low at the falling edge of CSB
Figure 17. Serial Interface Timing
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BU79100G-LA
Description of Functions – continued
4. Dummy Conversion
Dummy conversions are necessary in the following cases.
(1) A/D conversion after power-up
The first A/D conversion data after applying power to the BU79100G-LA is invalid. Therefore, a dummy conversion is
necessary after power-up. In addition, the power-up time is satisfied with a cycle of the dummy conversion.
after power-up
dummy conversion
CSB
1
16
1
16
SCLK
SDATA
VALID DATA
INVALID DATA
Figure 18. A/D conversion after power-up
(2) A/D conversion after a stop period more than the maximum throughput time
The BU79100G-LA may stop performing A/D conversion between some A/D conversion cycles. If the maximum limit of
the throughput period of 20 μs is violated, the first A/D conversion data after the resumption is not valid similar to the
case after power-up. Therefore, a dummy conversion cycle is necessary.
more than max throughput time
dummy conversion
CSB
1
16
1
16
1
16
SCLK
SDATA
INVALID DATA
VALID DATA
VALID DATA
Figure 19. A/D conversion after a long suspension
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BU79100G-LA
Application Example
VOLTAGE
REFERENCE
10
10µF
µF
VA
0.1
0.1µF
µF
CSB
BU1S12S1BG-M
BU79100G-LA
ANALOG
SIGNAL
SOURCE
330
330 Ω
Ω
SCLK
330Ω
Ω
330
VIN
22
22ΩΩ
1000
pF
1000pF
toto0.1
0.1µF
µF
MICROPROCESSOR
or
DSP
SDATA
100
100 Ω
Ω
GND
Figure 20. Application Circuit
As shown in Figure 20, a power supply pin connects voltage source and put two bypass capacitors for the high frequency
and low frequency noise between VA and GND to make the maximum use of the A/D converter’s capability. Ceramic
capacitors of 0.1 μF and 1 μF to 10 μF are to be used as bypass capacitor for BU79100G-LA. Especially, the capacitor of 0.1
μF should be placed as close to the VA pin of BU79100G-LA as possible.
Because the voltages of VA and GND are used as the reference voltages for the A/D converter, the deviation of the supply
voltage directly affects the full scale and has much influence on its characteristics. Therefore, the fully stable supply voltage
should be connected to VA.
The output impedance of the analog input signal source should be small enough. Charge in the sampling capacitor is swept
out to the VIN pin at the transition from Hold mode to Track mode because of the difference of the voltage between the input
signal voltage and the sampling capacitor voltage. This charge could cause undesirable voltage deviation. If influence of the
deviation remains at the transition from Track mode to Hold mode, it could cause the conversion error.
If a buffer amplifier is used to get low output impedance, high-speed response is required of the buffer amplifier. A decoupling
capacitor and a resister on the VIN analog input could support the amplifier to reduce the influence of the charge.
The voltage fluctuation on the supply and ground pins is caused by the charge and discharge of the digital input and output
pins through the digital signals. This fluctuation can be reduced by inserting resisters serially to the digital input and output
pins. The resistance values must be small enough not to cause critical delay errors. It is more effective to place these
resisters as close to the digital pins as possible.
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I/O Equivalence Circuit
(1) Analog Input Pin
The equivalent analog input circuit is shown in Figure 21. The diodes, D1 and D2, are placed for ESD protection. If the
analog input voltage is more than “VA+0.3 V”, or less than “GND–0.3 V”, these diodes are turned on and forward current is
generated. This current might cause malfunction or irreversible damage to BU79100G-LA. The capacitance value of the
C1 in Figure 21 is typically 4 pF, derived from the package parasitic capacitance. The R1 is the resistance of the track/hold
switch, typically 500 Ω. The C2 is the sampling capacitance of BU79100G-LA, and the capacitance value is typically 24 pF.
VA
DD1
1
RR1
1
VIN
CC1
1
D2
D
2
SW1
OPEN : HOLD MODE
CLOSE : TRACK MODE
C2
C
2
Figure 21. Analog Input Equivalent Circuit
(2) Digital Input and Output Pins
The equivalent digital input circuit is shown in Figure 22. Digital input pins, CSB and SCLK, don’t have any diodes to VA.
Thus, the maximum rating of “VA+0.3 V” is not applied to these digital input pins. Digital input voltage range is 5.25 V in
ground reference regardless of the supply voltage VA. This enables BU79100G-LA to be interfaced with a wide range of
logic levels, independent of the supply voltage.
VA
VA
SCLK
SDATA
CSB
Figure 22. Equivalent Digital Input Circuit
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Figure 23. Equivalent Digital Output Circuit
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05.Feb.2021 Rev.001
BU79100G-LA
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
10. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin
lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power
supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have
voltages within the values specified in the electrical characteristics of this IC.
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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BU79100G-LA
Ordering Information
B
U
7
9
1
0
0
G
Package
G: SSOP6
LAT R
-
Product Class
LA: for Industrial Applications
Packaging and forming specification
TR: Embossed tape and reel
Marking Diagram
Part Number Marking
G
R
SSOP6 (TOP VIEW)
Pin 1 Mark
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BU79100G-LA
Physical Dimension and Packing Information
Package Name
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SSOP6
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BU79100G-LA
Revision History
Date
Revision
05.Feb.2021
001
Changes
New Release
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
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Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
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Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
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