BU90RT102

LVDS Interface ICs 70bit LVDS Distributor BU90RT102 No.10057EAT08 ●Description LVDS Interface IC of ROHM "Serializer" "Deserializer" operates from 8MHz to 150MHz wide clock range, and number of bits range is from 35 to 70. Data is transmitted seven times (7X) stream and reduce cable number by 3(1/3) or less. The ROHM's LVDS has low swing mode to be able to expect further low EMI. Driver and Receiver of 4 bits operate to 250MHz. It can be used for a variety of purposes, home appliances such as LCD-TV, business machines such as decoders, instruments, and medical equipment. ●Features 1) RGB10bits dual channel LVDS Receiver and Transmitter 2) Operating frequency range : 20～135MHz 3) Power down mode supported. 4) Support spread spectrum clock generator. 5) Support reduced swing LVDS for low EMI. 6) Package HTSSOP-C64 ●Applications Digital TV (Signal System) Car Navigation System Copier FA equipment Medical equipment Vending machine, Ticket vending machine www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/18 2010.10 - Rev.A BU90RT102 ●Absolute Maximum Ratings Parameter Supply Voltage Input Voltage Output Voltage Storage Temperature Range Symbol VDD VIN VOUT Tstg Ratings -0.3 ~ 4.0 -0.3 ~ VDD+0.3 -0.3 ~ VDD+0.3 -55 ~ 125 Unit V V V ℃ Technical Note ●Recommended Operating Conditions Parameter Supply Voltage Operating Temperature Range Symbol VDD Topr Fin Dual-in/Dual-out Fout Fin Distribution Fout Fin Single-in / Dual-out Fout Fin Dual-in / Single-out Fout 40 135 MHz 20 20 62.5 62.5 MHz MHz 20 40 135 135 MHz MHz 20 20 135 135 MHz MHz Ratings Min 3.0 -20 20 Typ 3.3 Max 3.6 85 135 Unit V ℃ MHz www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/18 2010.10 - Rev.A BU90RT102 ●Block Diagram Technical Note 1st Link (135MHz Max.) 1st Link (135MHz Max.) TA1+/- ~ TE1+/RA1+/- ~ RE1+/LVDS-Rx De-Serialize LVDS-Tx Serialize RCLK1 +/PLL Inter-Link Multiplex & De-Multiplex PLL TCLK1 +/- TCLK2 +/RCLK2 +/PLL RA2+/- ~ RE2+/- LVDS-Rx De-Serialize LVDS-Tx Serialize TA2+/- ~ TE2+/- XRST MODE[1:0] RS CAP 2nd Link (135MHz Max.) LDO Regulator 2nd Link (135MHz Max.) Dual in / Dual out mode 135 MHz 135 MHz 135 MHz Distribution mode 135 MHz Rx Tx Rx Tx 135 MHz Rx Tx 135 MHz Rx Tx 135 MHz Dual in / Single out mode 62 .5 MHz 135 MHz Single in / Dual out mode 135 MHz 62. 5MHz Rx + Tx Rx - Tx 62 .5 MHz Rx Tx Rx Tx 62 .5MHz Fig.1 Block Diagram www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/18 2010.10 - Rev.A BU90RT102 ●Pin Configuration Technical Note RS CAP GND VDD RA1RA1+ RB1RB1+ RC1RC1+ RCLK1RCLK1+ RD1RD1+ RE1RE1+ RA2RA2+ RB2RB2+ RC2RC2+ RCLK2RCLK2+ RD2RD2+ RE2RE2+ VDD GND RESERVE1 XRST 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Top View 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 GND RESERVE2 GND VDD TA1TA1+ TB1TB1+ TC1TC1+ TCLK1TCLK1+ TD1TD1+ TE1TE1+ TA2TA2+ TB2TB2+ TC2TC2+ TCLK2TCLK2+ TD2TD2+ TE2TE2+ VDD GND MODE1 MODE0 Fig.2 Pin Configuration (Top View) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/18 2010.10 - Rev.A BU90RT102 ●Pin Description Pin Name RA1+/RB1+/RC1+/RD1+/RE1+/RCLK1+/RA2+/RB2+/RC2+/RD2+/RE2+/RCLK2+/TA1+/TB1+/TC1+/TD1+/TE1+/TCLK1+/TA2+/TB2+/TC2+/TD2+/TE2+/TCLK2+/XRST RS Pin No. 5,6 7,8 9,10 13,14 15,16 11,12 17,18 19,20 21,22 25,26 27,28 23,24 59,60 57,58 55,56 51,52 49,50 53,54 47,48 45,46 43,44 39,40 37,38 41,42 32 1 Type Descriptions Link1 chA LVDS data input Link1 chB LVDS data input Link1 chC LVDS data input Link1 chD LVDS data input Link1 chE LVDS data input Link1 LVDS clock input Link2 chA LVDS data input Link2 chB LVDS data input Link2 chC LVDS data input Link2 chD LVDS data input Link2 chE LVDS data input Link2 LVDS clock input Link1 chA LVDS data output Link1 chB LVDS data output Link1 chC LVDS data output Link1 chD LVDS data output Link1 chE LVDS data output Link1 LVDS clock output Link2 chA LVDS data output Link2 chB LVDS data output Link2 chC LVDS data output Link2 chD LVDS data output Link2 chE LVDS data output Link2 LVDS clock output Power Down H : Normal operation L : Power down (all outputs are Hi-Z) LVDS swing level select H : TYP=350mV L : TYP=200mV RCLK2/clkin Hi-z Hi-z clkin - Technical Note Input LVDS Output Input Input MODE1 MODE0 33,34 Input CMOS Pixel data mdoe MODE1 MODE0 L L L L H L L H H H Description Dual-in/Dual-out mode Distribution mode Single-in/Dual-out mode Dual-in/Single-out mode Reserved VDD GND CAP RESERVE1/2 4,29,36,61 3,30,35,62,64 2 31,63 Input - - Power supply pins. Ground pins Decoupling capacitor pin This pin should be connected to external decoupling capacitor. Recommended capacitor is 2.2µF.*1 Reserve pins Must be open *1. Parts list of recommended external decoupling capacitor Size Maker Parts Number [mm] Murata Murata TDK Kyocera Kyocera GRM155B30G225ME15D GRM155R60J225ME15D C1005X7R1H222KT CM05X5R225K04AH CM05X5R225M04AH 1.0x0.5x0.5 1.0x0.5x0.5 1.0x0.5x0.5 1.0x0.5x0.5 1.0x0.5x0.5 Reference Capacity Capacitance Temperature Tolerance Characteristics Temperature [μF] 2.2 2.2 2.2 2.2 2.2 [%] ±20 ±20 ±20 ±20 ±20 B X5R X7R X5R X5R [℃] 20 25 25 25 25 Capacitance Change [%] ±10% ±15% ±15% ±15% ±15% Operating Temperature Range [℃] -25～85 -55～85 -55～125 -55～85 -55～85 Voltage [V] 4.0 6.3 5.0 4.0 4.0 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/18 2010.10 - Rev.A BU90RT102 ●DC Characteristics Table 1 : LVCMOS DC Characteristics(VDD=3.0V～3.6V, Ta=-20℃～+85℃） Limits Parameter Symbol Unit Min Typ Max High Level Input Voltage Low Level Input Voltage Input Leak Current Pull-down resistor VIH VIL IINC PDR VDD×0.8 GND -10 20 46 VDD VDD×0.2 +10 100 V V μA KΩ 0V  VIN  VDD - Technical Note Conditions - Table 2 : LVDS Receiver DC Characteristics(VDD=3.0V～3.6V, Ta=-20℃～+85℃） Limits Parameter Symbol Unit Min Typ Max LVDS-Rx Input Voltage LVDS-Rx Common Voltage Differential Input High Threshold Differential Input Low Threshold LVDS-Rx Differential Voltage LVDS-Rx Input Current VIN_RX VIC_RX VTH_RX VTL_RX |VID_RX| VIN_RX 0.4 0.7 -100 100 -20 1.2 2.1 1.8 +100 600 20 V V mV mV mV µA Conditions VIC_RX=1.2V VIC_RX=1.2V - V TH_RX V IC_RX V TL_RX VIN_RX 0V (GND) Fig.3 LVDS Receiver DC Characteristics www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/18 2010.10 - Rev.A BU90RT102 Table 3 : LVDS Transmitter DC Characteristics(VDD=3.0V～3.6V, Ta=-20℃～+85℃） Limits Parameter Symbol Unit Min Typ Max 250 Differential Output Voltage Change in VOD between complementary output states Common Voltage Change in VOC between complementary output states Output Short Circuit Current Output Tri-state Current VOD 100 ΔVOD VOC ΔVOC IOS IOZ 1.125 -60 -10 200 1.25 300 35 1.375 35 +10 mV mV V mV mA μA VOUT=0V XRST=0V, VOUT=0V to VDD RL=100Ω 350 450 mV RL=100Ω Technical Note Conditions Normal swing RS=VDD Reduced swing RS=GND Diff_N VOD= | V (Diff_P) -V (Diff_N) | VOC= (V (Diff_P) +V (Diff_N)) / 2 0V (GND) Note: Diff_P=TA1+ ~ TA2+ , TCLK1+ ,TCLK2+ Diff_N=TA1- ~ TA2- , TCLK1- ,TCLK2- Fig.4 LVDS Transmitter DC Characteristics www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/18 2010.10 - Rev.A BU90RT102 ●AC Characteristics Table 4 : Switching Characteristics(VDD=3.3V, Ta=25℃） Parameter Skew Time between RCLK1 and RCLK2 Phase Lock Loop Set Time dual-in/dual-out distribution Data Latency single-in/dual-out dual-in/single-out DE Input High Time DE Input Low Time DE Input Period tDEH tDEL tDEL tRIP6 2 tRCP 2 tRCP 4 tRCP 6tRCP+5 2.5tRCP+5 Must be 2ntRCP (n=integer) Symbol tCK12 tLT Limits Min -0.3 tRCP Typ 4tRCP+5 4tRCP+5 Technical Note Max 0.3 tRCP 10 - Unit ns ms ns ns ns ns ns ns ns Note: 1) Vdiffrc = (RCLK+)-(RCLK-) (RCLK1+)-(RCLK1-) tck12 (RCLK2+)-(RCLK2-) Vdiffrc=0V Vdiffrc=0V Fig.5 Skew Time between RCLK1 and RCLK2 3.0V VDD RCLK1 +/- VDD×0.8 PD tLT Note: 1) Vdiffrc = (RCLK+)-(RCLK-) TCLKx +/x=1,2 Vdiffrc = 0V Fig.6 Phase Lock Loop Set Time www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/18 2010.10 - Rev.A BU90RT102 ●LVDS Receiver AC Characteristics Table 5 : Switching Characteristics(VDD=3.3V, Ta=25℃） Parameter dual /dual distribution Input Clock Period single/dual dual/single CLKIN= 75MHz Differential Input Data Setup Margin CLKIN= 112MHz CLKIN= 135MHz CLKIN= 75MHz Differential Input Data Hold Margin CLKIN= 112MHz CLKIN= 135MHz Differential Input Data Position 6 Differential Input Data Position 5 Differential Input Data Position 4 Differential Input Data Position 3 Differential Input Data Position 2 Differential Input Data Position 1 Differential Input Data Position 0 tRIP6 tRIP5 tRIP4 tTOP3 tRIP2 tRIP1 tRIP0 2 3 4 5 6 7 8 tRHLD tRSUP tRCP 7.4 16 480 250 220 480 250 220 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 Technical Note Symbol Limits Min 7.4 7.4 Typ 2 3 4 5 6 7 8 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 Max 50 50 25 50 2 3 4 5 6 7 8 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 tRCP 7 Unit ns ns ns ns ps ps ps ps ps ps -tRHLD -tRHLD -tRHLD -tRHLD -tRHLD -tRHLD -tRHLD +tRSUP +tRSUP +tRSUP +tRSUP +tRSUP +tRSUP +tRSUP ns ns ns ns ns ns ns www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/18 2010.10 - Rev.A BU90RT102 ●AC Timing Diagram Technical Note tRIP0 tRIP1 tRIP2 tRIP3 tRIP4 tRIP5 tRIP6 Ryx +/- D D D D D D D tRCP tRCH tRCL RCLKx + RCLKx x=1,2 y=A,B,C,D,E Ry1 +/- skew margin is the one between RCLK1 +/- and Ry1 +/Ry2 +/- skew margin is the one between RCLK2 +/- and Ry2 +/- Fig.7 AC Timing Diagram (1) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/18 2010.10 - Rev.A BU90RT102 ●LVDS Transmitter AC Characteristics Table 6 : Switching Characteristics(VDD=3.3V, Ta=25℃） Parameter dual /dual Output Clock Period distribution single/dual dual/single Differential Output Transition Time CLKOUT=75MHz Differential Output Setup Time CLKOUT=112MHz CLKOUT=135MHz CLKOUT=75MHz Differential Output Hold Time CLKOUT=112MHz CLKOUT=135MHz Differential Output Position 6 Differential Output Position 5 Differential Output Position 4 Differential Output Position 3 Differential Output Position 2 Differential Output Position 1 Differential Output Position 0 tTOP6 tTOP5 tTOP4 tTOP3 tTOP2 tTOP1 tTOP0 2 3 4 5 6 7 8 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 Technical Note Symbol Limits Min 7.4 Typ 0.6 2 3 4 5 6 7 8 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 Max 50 50 50 25 1.5 250 200 170 250 200 170 2 3 4 5 6 7 8 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 tTCP 7 Unit ns ns ns ns ns ps ps ps ps ps ps ns ns ns ns ns ns ns tTCP 7.4 16 7.4 tLVT - TTSUP - TTHLD - TTHLD - TTHLD - TTHLD - TTHLD - TTHLD - TTHLD - TTHLD + TTSUP + TTSUP + TTSUP + TTSUP + TTSUP + TTSUP + TTSUP www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/18 2010.10 - Rev.A BU90RT102 ●AC Timing Diagram tTOP0 tTOP1 tTOP2 tTOP 3 tTOP4 tTOP 5 tTOP 6 Technical Note Tyx +/- D tTCP tTCH D D D D D D tTCL TCLKx + TCLKx x=1,2 y= A,B,C,D,E Ty1 +/- output timing is the one between TCLK 1 +/- and Ty1 +/- . Ty2 +/- output timing is the one between TCLK 2 +/- and Ty2 +/- . Note 80 ％ Vdifft 20 ％ 80 ％ 20 ％ 1) Vdifft =(Ty+)-(Ty-) =A,B,C,CLK,D,E y=1,2 t LVT t LVT Fig.8 AC Timing Diagram (2) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/18 2010.10 - Rev.A BU90RT102 ●LVDS Data Mapping(1) Dual-in / Dual-out mode LVDS- Rx Input Mapping RCLK1+/ RA1+/ RB1+/ RC1+/ RD1+/ RE 1+/ G1[4] B1[5] DE R1[9] B1[4] R1[8] G1[9] R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] R1[4] G1[5] B1[6] G3[4] B3[5] DE R3[9] B3[4] R3[8] G3[9] R3[7] G3[8] B3[9] G3[3] G3[1] R3[6] G3[7] B3[8] G3[2] G3[0] Technical Note R3[5] G3[6] B3[7] R3[3] R3[1] R3[4] G3[5] B3[6] R3[2] R3[0] VSYNC HSYNC VSYNC HSYNC data11 B1[3] data12 B1[1] B1[2] B1[0] R1[2] data11 B3[3] R1[0] data12 B3[1] B3[2] B3[0] RCLK2+/ RA2+/ RB2+/ RC2+/ RD2+/ RE 2+/ LVDS- Tx Output Mapping TCLK1+/ TA1+/ TB1+/ TC1+/ TD1+/ TE1+/ G1[4] B1[5] DE R1[9] B1[4] R1[8] G1[9] R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] R1[4] G1[5] B1[6] G3[4] B3[5] DE R3[9] B3[4] R3[8] G3[9] R3[7] G3[8] B3[9] G3[3] G3[1] R3[6] G3[7] B3[8] G3[2] G3[0] R3[5] G3[6] B3[7] R3[3] R3[1] R3[4] G3[5] B3[6] R3[2] R3[0] G2[4] B2[5] DE R2[9] B2[4] R2[8] G2[9] R2[7] G2[8] B2[9] G2[3] G2[1] R2[6] G2[7] B2[8] G2[2] G2[0] R2[5] G2[6] B2[7] R2[3] R2[1] R2[4] G2[5] B2[6] R2[2] R2[0] G4[4] B4[5] DE R4[9] B4[4] R4[8] G4[9] R4[7] G4[8] B4[9] G4[3] G4[1] R4[6] G4[7] B4[8] G4[2] G4[0] R4[5] G4[6] B4[7] R4[3] R4[1] R4[4] G4[5] B4[6] R4[2] R4[0] VSYNC HSYNC VSYNC HSYNC data21 B2[3] data22 B2[1] B2[2] B2[0] data21 B4[4] data22 B4[1] B4[2] B4[0] VSYNC HSYNC VSYNC HSYNC data11 B1[3] data12 B1[1] B1[2] B1[0] R1[2] data11 B3[3] R1[0] data12 B3[1] B3[2] B3[0] TCLK2+/ TA2+/ TB2+/ TC2+/ TD2+/ TE2+/ G2[4] B2[5] DE R2[9] B2[4] R2[8] G2[9] R2[7] G2[8] B2[9] G2[3] G2[1] R2[6] G2[7] B2[8] G2[2] G2[0] R2[5] G2[6] B2[7] R2[3] R2[1] R2[4] G2[5] B2[6] G4[4] B4[5] DE R4[9] B4[4] R4[8] G4[9] R4[7] G4[8] B4[9] G4[3] G4[1] R4[6] G4[7] B4[8] G4[2] G4[0] R4[5] G4[6] B4[7] R4[3] R4[1] R4[4] G4[5] B4[6] R4[2] R4[0] VSYNC HSYNC VSYNC HSYNC data21 B2[3] data22 B2[1] B2[2] B2[0] R2[2] data21 B4[4] R2[0] data22 B4[1] B4[2] B4[0] Fig.9 LVDS Data Mapping(1) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/18 2010.10 - Rev.A BU90RT102 ●LVDS Data Mapping(2) Distribution Mode Distribution mode,RCLK2+/- must be High-z. LVDS-Rx Input Mapping RCLK1+/ RA 1+/ RB 1+/ RC 1+/ RD 1+/ RE1+/ G1[4] B1[5] DE R1[9] B1[4] R1[8] G1[9] R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] R1[4] G1[5] B1[6] G2[4] B2[5] DE R2[9] B2[4] R2[8] G2[9] R2[7] G2[8] B2[9] G2[3] G2[1] R2[6] Technical Note R2[5] R2[4] G2[5] B2[6] R2[2] R2[0] G2[7] G2[6] B2[8] G2[2] G2[0] B2[7] R2[3] R2[1] VSYNC HSYNC VSYNC HSYNC data11 B1[3] data12 B1[1] B1[2] B1[0] R1[2] data11 B2[3] R1[0] data12 B2[1] B2[2] B2[0] RCLK 2+/ RA 2+/ RB 2+/ RC 2+/ RD 2+/ RE 2+/ LVDS - x Output Mapping T TCLK 1+/ TA 1+/ TB 1+/ TC 1+/ TD 1+/ TE 1+/ G1[4] B1[5] DE R1[9] B1[4] R1[8] G1[9] R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] Hi- z no care no care no care no care no care R1[4] G1[5] B1[6] G2[4] B2[5] DE R2[9] B2[4] R2[8] G2[9] R2[7] G2[8] B2[9] G2[3] G2[1] R2[6] R2[5] R2[4] G2[5] B2[6] R2[2] R2[0] G2[7] G2[6] B2[8] G2[2] G2[0] B2[7] R2[3] R2[1] VSYNC HSYNC VSYNC HSYNC data11 B1[3] data12 B1[1] B1[2] B1[0] R1[2] data11 B2[3] R1[0] data12 B2[1] B2[2] B2[0] TCLK2+/ TA 2+/ TB 2+/ TC 2+/ TD 2+/ TE 2+/ G1[4] B1[5] DE R1[9] B1[4] R1[8] G1[9] R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] R1[4] G1[5] B1[6] G2[4] B2[5] DE R2[9] B2[4] R2[8] G2[9] R2[7] G2[8] B2[9] G2[3] G2[1] R2[6] R2[5] R2[4] G2[5] B2[6] R2[2] R2[0] G2[7] G2[6] B2[8] G2[2] G2[0] B2[7] R2[3] R2[1] VSYNC HSYNC VSYNC HSYNC data11 B1[3] data12 B1[1] B1[2] B1[0] R1[2] data11 B2[3] R1[0] data12 B2[1] B2[2] B2[0] (Regardless of the Data Latency ) Fig.10 LVDS Data Mapping(2) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/18 2010.10 - Rev.A BU90RT102 ●LVDS Data Mapping(3) Single-in / Dual-out mode Single-in / Dual-out mode, RCLK2+/- must be High-z. LVDS-Rx Input Mapping RCLK1+/ RA1+/ RB1+/ RC1+/ RD1+/ RE1+/ G1[4] B1[5] DE R1[9] B1[4] R1[8] G1[9] R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] R1[4] G1[5] B1[6] G2[4] B2[5] DE R2[9] B2[4] R2[8] G2[9] R2[7] G2[8] B2[9] G2[3] G2[1] R2[6] G2[7] B2[8] G2[2] G2[0] Technical Note R2[5] G2[6] B2[7] R2[3] R2[1] R2[4] G2[5] B2[6] R2[2] R2[0] VSYNC HSYNC VSYNC HSYNC data11 B1[3] data12 B1[1] B1[2] B1[0] R1[2] data11 B2[3] R1[0] data12 B2[1] B2[2] B2[0] RCLK 2+/ RA2+/ RB2+/ RC2+/ RD2+/ RE2+/ LVDS - x Output Mapping T TCLK1+/ TA 1+/ TB 1+/ TC 1+/ TD1+/ TE1+/ G1[4] B1[5] DE data11 data12 Hi- z no care no care no care no care no care R1[9] B1[4] VSYNC R1[8] G1[9] HSYNC R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] R1[4] G1[5] B1[6] R1[2] R1[0] B1[3] B1[1] B1[2] B1[0] TCLK2+/ TA 2+/ TB 2+/ TC2+/ TD2+/ TE2+/ G2[4] B2[5] DE data11 data12 R2[9] B2[4] VSYNC R2[8] G2[9] HSYNC R2[7] G2[8] B2[9] G2[3] G2[1] R2[6] G2[7] B2[8] G2[2] G2[0] R2[5] G2[6] B2[7] R2[3] R2[1] R2[4] G2[ 5] B2[6] R2[2] R2[0] B2[3] B2[1] B2[2] B2[0] (Regardless of the Data Latency ) Fig.11 LVDS Data Mapping (3) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/18 2010.10 - Rev.A BU90RT102 ●LVDS Data Mapping(4) Dual-in / Single-out mode LVDS-Rx Input Mapping RCLK1+/ RA1+/ RB1+/ RC1+/ RD1+/ RE1+/ G1[4] B1[5] DE data11 data12 Technical Note R1[9] B1[4] VSYNC R1[8] G1[9] HSYNC R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] R1[4] G1[5] B1[6] R1[2] R1[0] B1[3] B1[1] B1[2] B1[0] RCLK2+/ RA 2+/ RB 2+/ RC 2+/ RD 2+/ RE 2+/ G2[4] B2[5] DE data11 data12 R2[9] B2[4] VSYNC R2[8] G2[9] HSYNC R2[7] G2[8] B2[9] G2[3] G2[1] R2[6] G2[7] B2[8] G2[2] G2[0] R2[5] G2[6] B2[7] R2[3] R2[1] R2[4] G2[5] B2[6] R2[2] R2[0] B2[3] B2[1] B2[2] B2[0] LVDS-Tx Output Mapping TCLK1+/ TA1+/ TB1+/ TC1+/ TD1+/ TE1+/ G1[4] B1[5] DE R1[9] B1[4] R1[8] G1[9] R1[7] G1[8] B1[9] G1[3] G1[1] R1[6] G1[7] B1[8] G1[2] G1[0] R1[5] G1[6] B1[7] R1[3] R1[1] R1[4] G1[5] B1[6] G2[4] B2[5] DE R2[9] B2[4] R2[8] G2[9] R2[7] G2[8] B2[9] R2[3] R2[1] R2[6] G2[7] B2[8] R2[2] R2[0] R2[5] G2[6] B2[7] R2[3] R2[1] R2[4] G2[5] B2[6] R2[2] R2[0] VSYNC HSYNC VSYNC HSYNC data11 B1[3] data12 B1[1] B1[2] B1[0] R1[2] data11 R2[3] R1[0] data12 R2[1] R2[2] R2[0] TCLK 2+/ TA 2+/ TB 2+/ TC 2+/ TD 2+/ TE 2+/ - Hi- z no care no care no care no care no care ( Regardless of the Data Latency ) Fig.12 LVDS Data Mapping(4) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/18 2010.10 - Rev.A BU90RT102 ●Application Circuit Technical Note BU90RT102 CAP 2.2µF LDO 100Ω 100Ω LVDS Tx LVDS Rx LVDS Tx LVDS Rx LOGIC LVDS Tx LVDS Rx LVDS Tx LVDS Rx OPEN RESERVE 2 RESERVE１ Fig.13 Application circuit example V DD ● ● To VDD 0.01[µF] 10[µF] 0.1[µF] Fig.14 Filtering capacitor of power line www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 17/18 2010.10 - Rev.A BU90RT102 ●Ordering part number Technical Note B U 9 0 R T 1 0 2 - E 2 Part No. Part No. 90RT102 Package HTSSOP-C64 Packaging and forming specification E2: Embossed tape and reel HTSSOP-C64 17.2± 0.1 (MAX 17.94 include BURR) 4.45 REF 64 33 Tape +6 4 -4 Embossed carrier tape (with dry pack) 2000pcs E2 The direction is the 1pin of product is at the upper left when you hold Quantity Direction of feed 3.05 REF 0.45±0.15 8.1± 0.2 6.1± 0.1 0.85 1.1MAX 1 32 1PIN MARK S +0.05 0.145 -0.03 0.9±0.05 0.1±0.05 0.5 +0.05 0.22 -0.04 0.08 S 0.08 M 1.0±0.2 ( reel on the left hand and you pull out the tape on the right hand ) 1pin (Unit : mm) Reel Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 18/18 2010.10 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A