Datasheet
LCD Segment Drivers
Multi-function LCD Segment Drivers
BU91510KV-M
MAX 216 Segment(54SEG x 4COM)
General Description
Key Specifications
■
■
■
■
■
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The BU91510KV-M is 1/4 or 1/3 Duty General-purpose
LCD driver that can be used for frequency display in
electronic tuners under the control of a microcontroller.
The BU91510KV-M can drive up to 216 LCD Segments
directly. The BU91510KV-M can also control up to 6
General-purpose output pins / 6 PWM output pins.
Supply Voltage Range:
+2.7V to +6.0V
Operating Temperature Range:
-40°C to +105°C
Max Segments:
216 Segments
Display Duty:
1/3, 1/4 Selectable
Bias:
1/2, 1/3 Selectable
Interface:
3wire Serial Interface
Features
AEC-Q100 Qualified (Note 1)
Either 1/4 or 1/3 Duty can be selected with the Serial
Control Data.
1/4 Duty Drive: up to 216 Segments
1/3 Duty Drive: up to 162 Segments
Serial Data Control of Frame Frequency for Common
and Segment Output Waveforms
Serial Data Control of Switching between the
Segment Output Pin, PWM Output Pin and
General-purpose Output Pin Functions(Max 6 Pin)
Built-in OSC Circuit
The INHb Pin can Force the Display to the off State.
Integrated Voltage Detect Type Power on Reset
(VDET) circuit
No External Component
Low Power Consumption Design
Package
W (Typ) x D(Typ) x H(Max)
VQFP64
12.00mm x 12.00mm x 1.60mm
(Note 1) Grade 2
Applications
Car Audio, Home Electrical Appliance,
Meter Equipment etc.
Typical Application Circuit
(P1/G1)
(P6/G6)
+5V
VDD
(Note 2)
COM1
COM2
COM3
COM4
S1/P1/G1
S2/P2/G2
・
・
・
・
・
・
・
・
S6/P6/G6
S7
・・
・・
・・
・・
・
S51
INHb
SCE
SCL
From
Controller
SDI
(General-purpose / PWM pins)
(For use control of backlight)
・
・
・
・
LCD Panel
(Up to 216
Segments)
S52/OSC
S53
S54
(Note 2) Insert capacitors between VDD and VSS C ≥ 0.1µF
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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Block Diagram
COM4 COM3 COM2 COM1
S54
S53 S52/OSC….S7 S6/P6/G6 …. S1/P1/G1
SEGMENT Driver/Latch
COMMON Driver
INHb
Clock /Timing
Generator
LCD voltage
Generator VLCD
VDD
PWM Register
Control Register
VLCD1
Shift Register
VDET
VLCD2
Serial Interface
VSS
SCE
SCL
SDI
Figure 2. Block Diagram
S33
33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
48
S48
Pin Arrangement
49
32
S49
S32
S50
S31
COM4
S30
COM3
S29
COM2
S28
COM1
S27
S51
S26
VDD
S25
S53
S24
S54
S23
VSS
S22
S52/OSC
S21
INHb
S20
SCE
S19
SCL
S18
SDI
S17
17
S16
S15
S14
S13
S12
S11
S10
S9
S8
S7
G6/P6/S6
G5/P5/S5
G4/P4/S4
G3/P3/S3
G2/P2/S2
G1/P1/S1
16
1
64
Figure 3. Pin Configuration (TOP VIEW)
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Absolute Maximum Ratings (VSS = 0.0V)
Parameter
Maximum Supply
Voltage
Input Voltage
Allowable Loss
Operating Temperature
Storage Temperature
Symbol
Conditions
Ratings
Unit
VDD
VDD
-0.3 to +7.0
V
VIN1
Pd
Topr
Tstg
SCE, SCL, SDI, INHb, OSC
-
-0.3 to +7.0
1.00(Note)
-40 to +105
-55 to +125
V
W
°C
°C
(Note) When use more than Ta=25°C, subtract 10mW per degree. (Using ROHM standard board)
(Board size: 70mm×70mm×1.6mm material: FR4 board copper foil: land pattern only)
Caution1: Operating the IC over absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with power dissipation taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Recommended Operating Conditions (Ta = -40°C to +105°C, VSS = 0.0V)
Parameter
Supply Voltage
Symbol
VDD
Conditions
Ratings
Typ
-
Min
2.7
VDD
Max
6.0
Unit
V
Electrical Characteristics (Ta = -40°C to +105°C, VDD = 2.7V to 6.0V, VSS = 0.0V)
Parameter
Hysteresis
Power On Detection
Voltage
Symbol
VH
VDET
V
VDD
-
1.4
1.8
2.2
V
VDD=4.0V to 6.0V
0.4VDD
-
VDD
V
VDD=2.7V to 4.0V
0.8VDD
-
VDD
V
0.2VDD
V
COM1 to COM4
1/2 Bias IO = ±100µA
VMID3
S1 to S54
1/3 Bias IO = ±20µA
VMID4
S1 to S54
1/3 Bias IO = ±20µA
VMID5
COM1 to COM4
1/3 Bias IO = ±100µA
VMID6
COM1 to COM4
1/3 Bias IO = ±100µA
IDD1
VDD
IDD2
VDD
Power-saving mode
VDD = 5.0V
Output open
1/2 Bias
Frame Frequency =
80Hz
VDD = 5.0V
Output open
1/3 Bias
Frame Frequency =
80Hz
IIH1
“L” Level Input Current
IIL1
Middle Level
Output Voltage
-
VMID2
“H” Level Input Current
Current Drain
IDD3
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Unit
0.03VDD
1/2 Bias IO = ±20µA
VIL1
Max
-
S1 to S54
“L” Level Input Voltage
Limit
Typ
-
VMID1
VIH2
Min
SCE, SCL, SDI,
INHb, OSC
VOH1
VOH2
VOH3
VOL1
VOL2
VOL3
“H” Level Input Voltage
“L” Level
Output Voltage
Conditions
SCE, SCL, SDI,
INHb, OSC
SCE, SCL, SDI,
INHb, OSC
SCE, SCL, SDI,
INHb, OSC
SCE, SCL, SDI,
INHb, OSC
SCE, SCL, SDI,
INHb, OSC
S1 to S54
COM1 to COM4
P1/G1 to P6/G6
S1 to S54
COM1 to COM4
P1/G1 to P6/G6
VIH1
“H” Level
Output Voltage
Pin
VDD
-
-
0
VI = 6.0V
-
-
5.0
µA
-5.0
-
-
µA
VDD-0.9
VDD-0.9
VDD-0.9
1/2VDD
-0.9
1/2VDD
-0.9
2/3VDD
-0.9
1/3VDD
-0.9
2/3VDD
-0.9
1/3VDD
-0.9
-
-
-
0.9
0.9
0.9
1/2VDD
+0.9
1/2VDD
+0.9
2/3VDD
+0.9
1/3VDD
+0.9
2/3VDD
+0.9
1/3VDD
+0.9
15
-
70
150
VI = 0V
IO = -20µA
IO = -100µA
IO = -1mA
IO = 20µA
IO = 100µA
IO = 1mA
3/31
-
V
V
V
µA
-
95
200
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BU91510KV-M
Oscillation Characteristics (Ta = -40°C to +105°C, VDD = 2.7V to 6.0V, VSS = 0.0V)
Parameter
Oscillator Frequency1
Oscillator Frequency2
External Clock
Frequency(Note 3)
External Clock Rise
Time
External Clock Fall
Time
External Clock Duty
Symbol
Pin
fOSC1
fOSC2
Conditions
VDD = 2.7V to 6.0V
VDD = 5.0V
-
fOSC3
tr
External clock mode
(OC=1)
OSC
tf
tDTY
Min
150
255
Limit
Typ
300
Max
360
345
30
-
600
kHz
-
160
-
ns
-
160
-
ns
30
50
70
%
Unit
kHz
kHz
(Note 3) Frame frequency is decided external clock and dividing ratio of FC0 to FC2 setting.
[Reference Data]
330
VDD = 6.0V
fosc[kHz]
300
VDD = 5.0V
270
VDD = 3.3V
240
VDD = 2.7V
210
180
150
-40
-20
0
20
40
60
80
Temperature[°C]
Figure 4. Oscillator Frequency Typical Temperature Characteristics
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MPU Interface Characteristics (Ta = -40°C to +105°C, VDD = 2.7V to 6.0V, VSS = 0.0V)
Parameter
Symbol
Data Setup Time
Data Hold Time
SCE Wait Time
SCE Setup Time
SCE Hold Time
High-Level Clock Pulse
Width
Low-Level Clock Pulse
Width
Rise Time
Fall Time
INH Switching Time
tDS
tDH
tCP
tCS
tCH
Pin
Conditions
tCHW
SCL, SDI
SCL, SDI
SCE, SCL
SCE, SCL
SCE, SCL
SCL
-
tCLW
SCL
-
SCE, SCL, SDI
SCE, SCL, SDI
INHb, SCE
-
tr
tf
tC
Min
160
160
160
160
160
Limit
Typ
-
Max
-
160
-
-
ns
160
-
-
ns
10
160
160
-
-
ns
ns
µs
Unit
ns
ns
ns
ns
ns
1. When SCL is stopped at the low level
VIH1
VIL1
SCE
tCHW
SCL
tCLW
VIH1
50%
VIL1
tr
SDI
tf
tCP
tCS
tCH
VIH1
VIL1
tDS
tDH
2. When SCL is stopped at the high level
VIH1
VIL1
SCE
tCLW
tCHW
VIH1
50%
VIL1
SCL
tr
tf
tCP
tCS
tCH
VIH1
VIL1
SDI
tDS
tDH
Figure 5. Serial Interface Timing
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BU91510KV-M
Pin Description
Pin Name
Pin No.
S1/P1/G1 to
S6/P6/G6
1 to 6
S7 to S51,
S53, S54
COM1 to COM4
7 to 50
55,57,58
51 to 54
S52/OSC
60
SCE
SCL
SDI
62
63
64
INHb(Note)
61
VDD
56
VSS
59
Function
Segment output for displaying the Display Data transferred by
serial data input. The S1/P1/G1 to S6/P6/G6 pins can also be
used as General-purpose or PWM output when so set up by
the control data.
Segment output for displaying the Display Data transferred by
serial data input.
Common driver output pins. The frame frequency is fo[Hz].
Segment output for displaying the Display Data transferred by
serial data input. The S52/OSC pin can be used external clock
input pin when set up by the control data.
Serial data transfer inputs. Must be connected to the
controller.
SCE: Chip enable
SCL: Synchronization clock
SDI: Transfer data
Display Off control input
INHb = low (VSS) ...Display forced off
S1/P1/G1 to S6/P6/G6 = low (VSS)
S7 to S54 = low (VSS)
COM1 to COM4 = low (VSS)
Shuts off current to the LCD drive bias voltage generation
divider resistors.
Stop the internal oscillation circuit.
INHb = high (VDD)...Display On
However, serial data transfer is possible when the display is
forced off.
Power supply pin for the logic circuit block.
A power voltage of 2.7V to 6.0V must be applied to this pin.
Power supply pin. Must be connected to ground.
Active
I/O
Handling
when
unused
-
O
OPEN
O
OPEN
O
I
OPEN
VSS
O
OPEN
H
↑
-
I
I
I
VSS
VSS
VSS
L
I
VDD
-
-
-
-
-
-
-
(Note) Regarding the details of the INHb pin and the control of each output, refer to “The INHb Pin and Display Control”.
IO Equivalence Circuit
VDD
VDD
SCE / SDI / SCL / INHb
VSS
VSS
VDD
VDD
S7 to S51, S53, S54
S52/OSC
COM1 to COM4
VSS
VSS
VDD
S1/P1/G1 to
S6/P6/G6
VSS
Figure 6. I/O Equivalence Circuit
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BU91510KV-M
Serial Data Transfer Formats
1. 1/4 Duty
(1)When SCL is stopped at the low level
SCE
SCL
1
0
B0
B1
SDI
0
0
B2
0
B3
0
A0
A1
1
A2
D1
0
D2
D47
D48
Device code
8bit
1
0
B0
B1
0
B2
0
B3
1
0
B1
0
B2
0
A0
0
B3
0
A1
1
A2
1
0
B1
0
B2
D52
D53
D54
D55
D56
0
0
0
P0
P1
P2
DR
0
0
A1
0
D57
D58
D102
D103
D104
D105
D106
D107
D108
D109
D110
D112
0
0
0
0
1
A2
0
A1
FC1
FC2
OC
SC
BU
0
0
PG1
PG2
PG3
DD
2bit
PG4
PG5
PG6
PF0
PF1
PF2
PF3
0
1
0
D113
D114
D159
D160
D161
D162
D163
D164
W10
W11
W12
W13
W14
W15
W20
W21
W22
W23
W24
W25
W30
DD
2bit
W31
W32
W33
W34
W35
1
0
A3
1
A2
FC0
Control data
14bit
Control data
18bit
Display data
52bit
0
A0
DT
Control data
14bit
Display data
56bit
A0
0
B3
D51
A3
Device code
8bit
B0
D50
Display data
56bit
Device code
8bit
B0
D49
A3
0
D165
D166
D211
D212
D213
D214
D215
D216
W40
W41
W42
W43
W44
W45
W50
W51
W52
W53
DD
2bit
W54
W55
W60
W61
W62
W63
W64
W65
1
1
A3
Device code
8bit
Control data
18bit
Display data
52bit
DD
2bit
Figure 7. 3-SPI Data Transfer Format
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Serial Data Transfer Formats – continued
(2)When SCL is stopped at the high level
SCE
SCL
SDI
1
0
B0
A3
B1
0
0
B2
0
0
B3
1
A0
D1
0
A1
D2
D47
D48
D49
Device code
8bit
1
B0
A3
0
0
B1
0
B2
0
B3
0
A0
1
0
0
B1
0
B2
0
B3
1
A1
1
0
B1
0
0
B2
0
0
0
1
A1
D54
D55
D56
0
0
0
P0
P1
P2
DR
FC0
FC1
FC2
OC
SC
BU
0
0
D57
D58
D102
D103
D104
D105
D106
D107
D108
D109
D110
D112
0
0
0
0
PG1
PG2
PG3
PG4
PG5
DD
2bit
PG6
PF0
PF1
PF2
PF3
0
1
Control data
14bit
D113
D114
D159
D160
D161
D162
D163
D164
W10
W11
W12
W13
W14
W15
W20
W21
W22
W23
W24
W25
DD
2bit
W30
W31
W32
W33
W34
W35
1
0
A2
0
1
A1
DT
Control data
14bit
Contrl data
18bit
Display data
52bit
0
A0
D53
Display data
56bit
A0
0
B3
D52
A2
Device code
8bit
B0
A3
D51
Display data
56bit
Device code
8bit
B0
A3
D50
A2
D165
D166
D211
D212
D213
D214
D215
D216
W40
W41
W42
W43
W44
W45
W50
W51
W52
W53
DD
2bit
W54
W55
W60
W61
W62
W63
W64
W65
1
1
A2
Device code
8bit
Control data
18bit
Display data
52bit
DD
2bit
Figure 8. 3-SPI Data Transfer Format
Device code ································ “41H”
D1 to D216·································· Display Data
P0 to P2 ····································· Segment / PWM / General-purpose output pin switching control data
DR ············································ 1/3 Bias drive or 1/2 Bias drive switching control data
DT ············································· 1/4 Duty drive or 1/3 Duty drive switching control data
FC0 to FC2 ································· Common / Segment output waveform frame frequency switching control data
OC ············································ Internal oscillator operating mode / External clock operating mode switching control
data
SC ············································· Segment on / off switching control data
BU ············································· Normal mode / power-saving mode switching control data
PG1 to PG6 ································· PWM / General-purpose output switching control data
PF0 to PF3·································· PWM output frame frequency switching control data
W10 to W15, W20 to W25, W30 to W35, W40 to W45, W50 to W55, W60 to W65
·················································· PWM output duty switching control data
DD ············································ Direction Data
When it is coincident with device code, BU91510KV-M capture display data and control data at falling edge of SCE.
So, please transfer the bit number of send display data and control data as specified number in the above figure.
Specified number of bits is 80bit (Device code: 8bit, Display data and Control data: 70bit, DD: 2bit).
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Serial Data Transfer Formats – continued
2. 1/3 Duty
(1) When SCL is stopped at the low level
CE
SCE
CL
SCL
0
1
SDI
B0
0
B1
0
B2
0
B3
A0
0
A1
1
A2
0
D1
D2
D47
D48
D49
Device code
8bit
1
B0
0
B1
0
B2
0
B3
0
A0
1
0
B1
0
B2
0
B3
0
A1
1
A2
1
0
B1
0
B2
0
B3
0
A1
D55
D56
D57
0
0
P0
P1
P2
DR
0
1
A2
0
A1
FC0
FC1
FC2
OC
SC
BU
0
0
D58
D104
D59
D105
D106
D107
D108
D109
D110
D111
D112
D113
D114
0
0
0
PG1
PG2
PG3
PG4
PG5
DD
2bit
PG6
PF0
PF1
PF2
PF3
0
1
0
D115
D116
D161
D162
0
0
Control data
13bit
0
0
W10
W11
W12
W13
W14
W15
W20
W21
W22
W23
W24
W25
W30
DD
2bit
W31
W32
W33
W34
W35
1
0
A3
1
A2
DT
Control data
13bit
Display data
48bit
0
A0
D54
A3
Device code
8bit
B0
D53
Display data
57bit
0
A0
D52
Display data
57bit
Device code
8bit
B0
D51
D50
A3
0
0
0
Control data
22bit
0
0
0
0
0
0
W40
W41
W42
W43
W44
W45
W50
W51
W52
DD
2bit
W53
W54
W55
W60
W61
W62
W63
W64
W65
1
1
A3
Device code
8bit
Control data
70bit
DD
2bit
Figure 9. 3-SPI Data Transfer Format
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Serial Data Transfer Formats – continued
(2) When SCL is stopped at the high level
SCE
SCL
SDI
D1
1
0
0
0
0
0
1
0
B0
B1
B2
B3
A0
A1
A2
A3
D2
D47
D48
D49
D50
Device code
8bit
1
0
0
0
0
B0
B1
B2
B3
A0
D51
D52
D53
D54
D55
D56
0
D57
0
P0
P1
P2
0
1
0
A2
A3
D58
D59
D104
D105
D106
Device code
8bit
D107
D108
D109
D110
D111
D112
D113
D114
0
0
0
PG1
PG2
PG3
1
0
0
0
0
0
B1
B2
B3
A0
A1
1
0
A2
A3
D115
D116
Device code
8bit
D161
D162
0
0
0
0
W10
W11
W12
W13
W14
W15
1
0
0
0
0
0
B1
B2
B3
A0
A1
1
A2
0
0
0
FC1
FC2
OC
SC
0
BU
PG4
PG5
W20
W21
W22
W23
W24
W25
0
0
0
0
0
0
W40
W41
W42
W43
W44
W45
W50
W51
0
DD
2bit
PG6
PF0
PF1
PF2
PF3
0
1
DD
2bit
W30
W31
W32
W33
W34
W35
0
1
Control data
22bit
Display data
48bit
B0
FC0
Control data
13bit
Display data
57bit
B0
DT
Control data
13bit
Display data
57bit
A1
DR
DD
2bit
W52
W53
W54
W55
W60
W61
W62
W63
W64
W65
1
1
A3
Device code
8bit
Control data
70bit
DD
2bit
Figure 10. 3-SPI Data Transfer Format
Device code ································ “41H”
D1 to D162·································· Display Data
P0 to P2 ····································· Segment / PWM / General-purpose output pin switching control data
DR ············································ 1/3 Bias drive or 1/2 Bias drive switching control data
DT ············································· 1/4 Duty drive or 1/3 Duty drive switching control data
FC0 to FC2 ································· Common / Segment output waveform frame frequency switching control data
OC ············································ Internal oscillator operating mode / External clock operating mode switching control
data
SC ············································· Segment on / off switching control data
BU ············································· Normal mode/power-saving mode switching control data
PG1 to PG6 ································· PWM / General-purpose output switching control data
PF0 to PF3·································· PWM output frame frequency switching control data
W10 to W15, W20 to W25, W30 to W35, W40 to W45, W50 to W55, W60 to W65
················································· PWM output duty switching control data
DD ············································ Direction Data
When it is coincident with device code, BU91510KV-M capture display data and control data at falling edge of SCE.
So, please transfer the bit number of send display data and control data as specified number in the above figure.
Specified number of bits is 80bit (Device code: 8bit, Display data and Control data: 70bit, DD: 2bit).
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TSZ22111 • 15 • 001
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BU91510KV-M
Control Data Functions
1. P0, P1 and P2: Segment / PWM / General-purpose output pin switching control data
These control bits are used to select the function of the S1/P1/G1 to S6/P6/G6 output pins (Segment Output Pins or PWM
Output Pins or General-purpose Output Pins).
Please refer to the table below.
Reset
P0
P1
P2
S1/P1/G1 S2/P2/G2 S3/P3/G3 S4/P4/G4 S5/P5/G5 S6/P6/G6
Condition
0
0
0
S1
S2
S3
S4
S5
S6
○
0
0
1
P1/G1
S2
S3
S4
S5
S6
0
1
0
P1/G1
P2/G2
S3
S4
S5
S6
0
1
1
P1/G1
P2/G2
P3/G3
S4
S5
S6
1
0
0
P1/G1
P2/G2
P3/G3
P4/G4
S5
S6
1
0
1
P1/G1
P2/G2
P3/G3
P4/G4
P5/G5
S6
1
1
0
P1/G1
P2/G2
P3/G3
P4/G4
P5/G5
P6/G6
1
1
1
S1
S2
S3
S4
S5
S6
PWM output or General-purpose Output Pin is selected by PGx(x=1 to 6) control data bit.
When the General-purpose Output Pin Function is selected, the correspondence between the output pins and the
respective Display Data is given in the table below.
Corresponding Display Data
Output Pins
1/4 Duty Mode
1/3 Duty Mode
S1/P1/G1
D1
D1
S2/P2/G2
D5
D4
S3/P3/G3
D9
D7
S4/P4/G4
D13
D10
S5/P5/G5
D17
D13
S6/P6/G6
D21
D16
When the General-purpose Output Pin Function is selected, the respective output pin outputs a “HIGH” level when its
corresponding display data is set to “1”. Likewise, it will output a “LOW” level, if its corresponding display data is set to “0”.
For example, S4/P4/G4 is used as a General-purpose Output Pin in case of 1/4 Duty, if its corresponding Display Data – D13
is set to “1”, then S4/P4/G4 will output “HIGH” level. Likewise, if D13 is set to “0”, then S4/P4/G4 will output “LOW” level.
2. DR: 1/3 Bias drive or 1/2 Bias drive switching control data
This control data bit selects either 1/3 Bias drive or 1/2 Bias drive.
DR
Bias Drive Scheme
0
1/3 Bias drive
1
1/2 Bias drive
Reset Condition
○
-
3. DT: 1/4 Duty drive or 1/3 Duty drive switching control data
This control data bit selects either 1/4 Duty drive or 1/3 Duty drive.
DT
Duty Drive Scheme
0
1/4 Duty drive
1
1/3 Duty drive
Reset Condition
○
-
4. FC0, FC1 and FC2: Frame frequency switching control data
These control data bits set the frame frequency for common and segment output waveforms.
FC0
FC1
FC2
Frame Frequency fo(Hz)
Reset Condition
0
0
0
fOSC/6144
○
0
0
1
fOSC/5376
0
1
0
fOSC/4608
0
1
1
fOSC/3840
1
0
0
fOSC/3072
1
0
1
fOSC/2304
1
1
0
fOSC/1920
1
1
1
fOSC/1536
(Note) fOSC: Internal oscillation frequency (300kHz Typ)
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TSZ22111 • 15 • 001
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Control Data Functions – continued
5. OC: Internal oscillator operating mode / External clock operating mode switching control data
Reset
OC
Operating Mode
In/Out Pin(S52/OSC) Status
Condition
0
Internal oscillator
S52 (segment output)
○
1
External Clock
OSC (clock input)
Internal oscillation / external clock select signal behavior is below.
Input external clock after serial data sending.
SCE
SCL
SDI
1
0
0
0
0
0
1
0
B0
B1
B2
B3
A0
A1
A2
A3
D1
D2
FC1
Display Data/
Control Data
Dev ice Code
8bits
FC2
OC
SC
BU
0
0
DD
2 bits
Internal oscillation・Extarnal Clock
Select signal(Internal signal)
Internal oscillation
(Internal signal)
Extarnal Clock
(OSC)
6. SC: Segment on/off switching control data
This control data bit controls the on/off state of the segments.
SC
Display State
Reset Condition
0
On
1
Off
○
Note that when the segments are turned off by setting SC to “1”, the segments are turned off by outputting segment
off waveforms from the segment output pins.
7. BU: Normal mode / Power-saving mode switching control data
This control data bit selects either normal mode or power-saving mode.
BU
Mode
Reset Condition
0
Normal Mode
1
Power-saving Mode
○
Power-saving mode status: S1/P1/G1 to S6/P6/G6 = active only General-purpose output
S7 to S54 = low(VSS)
COM1 to COM4 = low(VSS)
Shut off current to the LCD drive bias voltage generation circuit
Stop the Internal oscillation circuit
However, serial data transfer is possible when Power-saving mode.
Regarding the details of the INHb pin and the control of each output, refer to “The INHb Pin and Display Control”.
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BU91510KV-M
Control Data Functions – continued
8. PG1, PG2, PG3, PG4, PG5 and PG6: PWM / General-purpose output switching control data
This control data bit select either PWM output or General-purpose output of Sx/Px/Gx pins.(x=1 to 6)
PGx(x=1 to 6)
Mode
Reset Condition
0
PWM output
○
1
General-purpose output
-
[PWMGPO Changing function]
Normal behavior of changing GPO to PWM is below.
- PWM operation is started by command import timing of DD:01 during GPO ---> PWM change.
- Please take care of reflect timing of new duty setting of DD:10, DD:11 is from the next PWM.
SCE
DD:01
DD:00
DD:10
GPO ---> PWM change
DD:11
new duty decided timing
PWM/GPO output
start of PWM operation
next PWM cycle
(PWM waveform in immediate duty)
(PWM waveform in new duty)
In order to avoid this operation, please input commands reversely as below.
DD:10
DD:11
DD:01
DD:00
SCE
new duty decided timing
GPO -->PWM change
PWM/GPO output
Start of PWM operation
(PWM waveform on new duty)
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BU91510KV-M
Control Data Functions – continued
9. PF0, PF1, PF2 and PF3: PWM output frame frequency switching control data
These control data bits set the frame frequency for PWM output.
PF0
PF1
PF2
PF3
PWM Output Frame Frequency fp(Hz)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
fOSC/2048
fOSC/1920
fOSC/1792
fOSC/1664
fOSC/1536
fOSC/1408
fOSC/1280
fOSC/1152
fOSC/1024
fOSC/896
fOSC/768
fOSC/640
fOSC/512
fOSC/384
fOSC/256
fOSC/128
Reset
Condition
○
-
10. W10 to W15, W20 to W25, W30 to W35, W40 to W45, W50 to W55 and W60 to W65(Note): PWM output duty switching
control data
These control data bits set the high level pulse width for PWM output.
Reset
Wn0
Wn1
Wn2
Wn3
Wn4
Wn5
PWM Duty
Condition
0
0
0
0
0
0
(1/64) x Tp
○
1
0
0
0
0
0
(2/64) x Tp
0
1
0
0
0
0
(3/64) x Tp
1
1
0
0
0
0
(4/64) x Tp
0
0
1
0
0
0
(5/64) x Tp
1
0
1
0
0
0
(6/64) x Tp
0
1
1
0
0
0
(7/64) x Tp
1
1
1
0
0
0
(8/64) x Tp
0
0
0
1
0
0
(9/64) x Tp
1
0
0
1
0
0
(10/64) x Tp
0
1
0
1
0
0
(11/64) x Tp
1
1
0
1
0
0
(12/64) x Tp
0
0
1
1
0
0
(13/64) x Tp
1
0
1
1
0
0
(14/64) x Tp
0
1
1
1
0
0
(15/64) x Tp
…
…
…
…
…
…
…
…
1
0
0
0
1
1
(50/64) x Tp
0
1
0
0
1
1
(51/64) x Tp
1
1
0
0
1
1
(52/64) x Tp
0
0
1
0
1
1
(53/64) x Tp
1
0
1
0
1
1
(54/64) x Tp
0
1
1
0
1
1
(55/64) x Tp
1
1
1
0
1
1
(56/64) x Tp
0
0
0
1
1
1
(57/64) x Tp
1
0
0
1
1
1
(58/64) x Tp
0
1
0
1
1
1
(59/64) x Tp
1
1
0
1
1
1
(60/64) x Tp
0
0
1
1
1
1
(61/64) x Tp
1
0
1
1
1
1
(62/64) x Tp
0
1
1
1
1
1
(63/64) x Tp
1
1
1
1
1
1
(64/64) x Tp
(Note) W10 to W15:S1/P1/G1 PWM duty data
W20 to W25:S2/P2/G2 PWM duty data
W30 to W35:S3/P3/G3 PWM duty data
W40 to W45:S4/P4/G4 PWM duty data
W50 to W55:S5/P5/G5 PWM duty data
W60 to W65:S6/P6/G6 PWM duty data
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TSZ22111 • 15 • 001
n = 1 to 6
Tp = 1/fp
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BU91510KV-M
Display Data and Output Pin Correspondence
1. 1/4 Duty
Output Pin(Note)
S1/P1/G1
S2/P2/G2
S3/P3/G3
S4/P4/G4
S5/P5/G5
S6/P6/G6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
S51
S52
S53
S54
COM1
D1
D5
D9
D13
D17
D21
D25
D29
D33
D37
D41
D45
D49
D53
D57
D61
D65
D69
D73
D77
D81
D85
D89
D93
D97
D101
D105
D109
D113
D117
D121
D125
D129
D133
D137
D141
D145
D149
D153
D157
D161
D165
D169
D173
D177
D181
D185
D189
D193
D197
D201
D205
D209
D213
COM2
D2
D6
D10
D14
D18
D22
D26
D30
D34
D38
D42
D46
D50
D54
D58
D62
D66
D70
D74
D78
D82
D86
D90
D94
D98
D102
D106
D110
D114
D118
D122
D126
D130
D134
D138
D142
D146
D150
D154
D158
D162
D166
D170
D174
D178
D182
D186
D190
D194
D198
D202
D206
D210
D214
COM3
D3
D7
D11
D15
D19
D23
D27
D31
D35
D39
D43
D47
D51
D55
D59
D63
D67
D71
D75
D79
D83
D87
D91
D95
D99
D103
D107
D111
D115
D119
D123
D127
D131
D135
D139
D143
D147
D151
D155
D159
D163
D167
D171
D175
D179
D183
D187
D191
D195
D199
D203
D207
D211
D215
COM4
D4
D8
D12
D16
D20
D24
D28
D32
D36
D40
D44
D48
D52
D56
D60
D64
D68
D72
D76
D80
D84
D88
D92
D96
D100
D104
D108
D112
D116
D120
D124
D128
D132
D136
D140
D144
D148
D152
D156
D160
D164
D168
D172
D176
D180
D184
D188
D192
D196
D200
D204
D208
D212
D216
(Note) The Segment Output Pin function is assumed to be selected for the output pins – S1/P1/G1 to S6/P6/G6.
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TSZ22111 • 15 • 001
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BU91510KV-M
Display Data and Output Pin Correspondence – continued
To illustrate further, the states of the S21 output pin is given in the table below.
Display Data
State of S21 Output Pin
D81 D82
D83
D84
0
0
0
0
LCD Segments corresponding to COM1 to COM4 are OFF.
0
0
0
1
LCD Segment corresponding to COM4 is ON.
0
0
1
0
LCD Segment corresponding to COM3 is ON.
0
0
1
1
LCD Segments corresponding to COM3 and COM4 are ON.
0
1
0
0
LCD Segment corresponding to COM2 is ON.
0
1
0
1
LCD Segments corresponding to COM2 and COM4 are ON.
0
1
1
0
LCD Segments corresponding to COM2 and COM3 are ON.
0
1
1
1
LCD Segments corresponding to COM2, COM3 and COM4 are ON.
1
0
0
0
LCD Segment corresponding to COM1 is ON.
1
0
0
1
LCD Segments corresponding to COM1 and COM4 are ON.
1
0
1
0
LCD Segments corresponding to COM1 and COM3 are ON.
1
0
1
1
LCD Segments corresponding to COM1, COM3 and COM4 are ON.
1
1
0
0
LCD Segments corresponding to COM1 and COM2 are ON.
1
1
0
1
LCD Segments corresponding to COM1, COM2, and COM4 are ON.
1
1
1
0
LCD Segments corresponding to COM1, COM2, and COM3 are ON.
1
1
1
1
LCD Segments corresponding to COM1 to COM 4 are ON.
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BU91510KV-M
Display Data and Output Pin Correspondence – continued
2. 1/3 Duty
Output Pin(Note)
S1/P1/G1
S2/P2/G2
S3/P3/G3
S4/P4/G4
S5/P5/G5
S6/P6/G6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
S51
S52
S53
S54
COM1
D1
D4
D7
D10
D13
D16
D19
D22
D25
D28
D31
D34
D37
D40
D43
D46
D49
D52
D55
D58
D61
D64
D67
D70
D73
D76
D79
D82
D85
D88
D91
D94
D97
D100
D103
D106
D109
D112
D115
D118
D121
D124
D127
D130
D133
D136
D139
D142
D145
D148
D151
D154
D157
D160
COM2
D2
D5
D8
D11
D14
D17
D20
D23
D26
D29
D32
D35
D38
D41
D44
D47
D50
D53
D56
D59
D62
D65
D68
D71
D74
D77
D80
D83
D86
D89
D92
D95
D98
D101
D104
D107
D110
D113
D116
D119
D122
D125
D128
D131
D134
D137
D140
D143
D146
D149
D152
D155
D158
D161
COM3
D3
D6
D9
D12
D15
D18
D21
D24
D27
D30
D33
D36
D39
D42
D45
D48
D51
D54
D57
D60
D63
D66
D69
D72
D75
D78
D81
D84
D87
D90
D93
D96
D99
D102
D105
D108
D111
D114
D117
D120
D123
D126
D129
D132
D135
D138
D141
D144
D147
D150
D153
D156
D159
D162
(Note) The Segment Output Pin function is assumed to be selected for the output pins – S1/P1/G1 to S6/P6/G6.
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Display Data and Output Pin Correspondence – continued
To illustrate further, the states of the S21 output pin is given in the table below.
Display Data
State of S21 Output Pin
D61 D62
D63
0
0
0
LCD Segments corresponding to COM1 to COM3 are OFF.
0
0
1
LCD Segment corresponding to COM3 is ON.
0
1
0
LCD Segment corresponding to COM2 is ON.
0
1
1
LCD Segments corresponding to COM2 and COM3 are ON.
1
0
0
LCD Segment corresponding to COM1 is ON.
1
0
1
LCD Segments corresponding to COM1 and COM3 are ON.
1
1
0
LCD Segments corresponding to COM1 and COM2 are ON.
1
1
1
LCD Segments corresponding to COM1 to COM3 are ON.
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LCD Driving Waveforms
(1/4 Duty 1/3 Bias Drive Scheme)
fo[Hz]
VLCD
VLCD1
VLCD2
COM1
0V
VLCD
VLCD1
VLCD2
COM2
0V
VLCD
VLCD1
VLCD2
COM3
0V
VLCD
VLCD1
VLCD2
COM4
0V
VLCD
LCD driver output when all LCD
VLCD1
segments correstpoding to COM1,
VLCD2
COM2,COM3 and COM4 are off.
0V
VLCD
VLCD1
LCD driver output when only LCD segment
VLCD2
corresponding to COM1 is on.
0V
VLCD
VLCD1
LCD driver output when only LCD segment
VLCD2
corresponding to COM2 is on.
0V
VLCD
VLCD1
LCD driver output when LCD segments
VLCD2
corresponding to COM1 and COM2 are on.
0V
VLCD
VLCD1
LCD driver output when only LCD segment
VLCD2
corresponding to COM3 is on.
0V
VLCD
VLCD1
LCD driver output when LCD segments
VLCD2
corresponding to COM1 and COM3 are on.
0V
VLCD
VLCD1
LCD driver output when LCD segments
VLCD2
corresponding to COM2 and COM3 are on.
0V
VLCD
VLCD1
LCD driver output when LCD segments
VLCD2
corresponding to COM1, COM2
0V
and COM3 are on.
VLCD
VLCD1
LCD driver output when only LCD segment
VLCD2
corresponding to COM4 is on.
0V
VLCD
VLCD1
LCD driver output when LCD segments
VLCD2
corresponding to COM2 and COM4 are on.
0V
VLCD
LCD driver output when
VLCD1
all LCD segments corresponding
VLCD2
to COM1, COM2, COM3 and COM4 are on.
0V
Figure 11. LCD Waveform (1/4 Duty, 1/3 Bias)
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LCD Driving Waveforms– continued
(1/4 Duty 1/2 Bias Drive Scheme)
fo[Hz]
VLCD
VLCD1,VLCD2
COM1
0V
VLCD
VLCD1,VLCD2
COM2
0V
VLCD
VLCD1,VLCD2
COM3
0V
VLCD
VLCD1,VLCD2
COM4
0V
LCD driver output when all LCD
VLCD
segments correstpoding to COM1,
VLCD1,VLCD2
COM2,COM3 and COM4 are off.
0V
VLCD
LCD driver output when only LCD segment
VLCD1,VLCD2
corresponding to COM1 is on.
0V
VLCD
LCD driver output when only LCD segment
VLCD1,VLCD2
corresponding to COM2 is on.
0V
VLCD
LCD driver output when LCD segments
VLCD1,VLCD2
corresponding to COM1 and COM2 are on.
0V
VLCD
LCD driver output when only LCD segment
VLCD1,VLCD2
corresponding to COM3 is on.
0V
VLCD
LCD driver output when LCD segments
VLCD1,VLCD2
corresponding to COM1 and COM3 are on.
0V
VLCD
LCD driver output when LCD segments
VLCD1,VLCD2
corresponding to COM2 and COM3 are on.
0V
VLCD
LCD driver output when LCD segments
VLCD1,VLCD2
corresponding to COM1,COM2 and COM3 are on.
0V
VLCD
LCD driver output when only LCD segment
VLCD1,VLCD2
corresponding to COM4 is on.
0V
VLCD
LCD driver output when LCD segments
VLCD1,VLCD2
corresponding to COM2 and COM4 are on.
0V
VLCD
LCD driver output when
VLCD1,VLCD2
all LCD segments corresponding
0V
to COM1, COM2, COM3 and COM4 are on.
Figure 12. LCD Waveform (1/4 Duty, 1/2 Bias)
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LCD Driving Waveforms– continued
(1/3 Duty 1/3 Bias Drive Scheme)
fo[Hz]
VLCD
VLCD1
VLCD2
COM1
0V
VLCD
VLCD1
VLCD2
COM2
0V
VLCD
VLCD1
VLCD2
COM3
0V
VLCD
LCD driver output when all LCD
VLCD1
segments correstponding to COM1,
VLCD2
COM2 and COM3 are off.
0V
VLCD
VLCD1
LCD driver output when only LCD segment
VLCD2
corresponding to COM1 is on.
0V
VLCD
VLCD1
LCD driver output when only LCD segment
VLCD2
corresponding to COM2 is on.
0V
VLCD
VLCD1
LCD driver output when LCD segments
VLCD2
corresponding to COM1 and COM2 are on.
0V
VLCD
VLCD1
LCD driver output when only LCD segment
VLCD2
corresponding to COM3 is on.
0V
VLCD
VLCD1
LCD driver output when LCD segments
VLCD2
corresponding to COM1 and COM3 are on.
0V
VLCD
VLCD1
LCD driver output when LCD segments
VLCD2
corresponding to COM2 and COM3 are on.
0V
VLCD
VLCD1
LCD driver output when all LCD segments
VLCD2
corresponding to COM1, COM2,
0V
and COM3 are on.
Figure 13. LCD Waveform (1/3 Duty, 1/3 Bias) (Note)
(Note) COM4 function is same as COM1 at 1/3 Duty.
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LCD Driving Waveforms– continued
(1/3 Duty 1/2 Bias Drive Scheme)
fo[Hz]
VLCD
VLCD1,VLCD2
COM1
0V
VLCD
VLCD1,VLCD2
COM2
0V
VLCD
VLCD1,VLCD2
COM3
0V
LCD driver output when all LCD
VLCD
segments correstpoding to COM1,
VLCD1,VLCD2
COM2, and COM3 are off.
0V
VLCD
LCD driver output when only LCD segment
VLCD1,VLCD2
corresponding to COM1 is on.
0V
VLCD
LCD driver output when only LCD segment
VLCD1,VLCD2
corresponding to COM2 is on.
0V
VLCD
LCD driver output when LCD segments
VLCD1,VLCD2
corresponding to COM1 and COM2 are on.
0V
VLCD
LCD driver output when only LCD segment
VLCD1,VLCD2
corresponding to COM3 is on.
0V
VLCD
LCD driver output when LCD segments
VLCD1,VLCD2
corresponding to COM1 and COM3 are on.
0V
VLCD
LCD driver output when LCD segments
VLCD1,VLCD2
corresponding to COM2 and COM3 are on.
0V
VLCD
LCD driver output when all LCD segments
VLCD1,VLCD2
corresponding to COM1,COM2 and COM3 are on.
0V
Figure 14. LCD Waveform (1/3 Duty, 1/2 Bias) (Note)
(Note) COM4 function is same as COM1 at 1/3 Duty.
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The INHb Pin and Display Control
The INHb pin operates Display off of LCD.
INHb control depends on set pin function.
Below table shows pin function and control by the INHb pin.
Control
Pin Function
INHb = L
INHb = H
SEG/COM
Display forced off
Display on
PWM/GPO
Operation Stop
Operation Available
External Clock Input
Available regardless of INHb
Below table shows pin name and pin state of INHb = L.
Each output state are decided by Control data(P0 to P2 and OC)
For the details, please refer to “Control Data Functions”.
Pin Function(Note) (In case of INHb = L)
Pin Name
SEG
COM
PWM
GPO
External
Clock Input
S1/P1/G1 to S6/P6/G6
Stop
(VSS)
-
Stop
(VSS)
Stop
(VSS)
-
S7 to S51, S53, S54
Stop
(VSS)
-
-
-
-
S52/OSC
Stop
(VSS)
-
-
-
Clock Input
Operation
COM1 to COM4
-
Stop
(VSS)
-
-
-
(Note) “-” means the pin does not have the function.
For example, S1/P1/G1 to S6/P6/G6 are not set COM and External Clock Input.
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The INHb Pin and Display Control – continued
Since the IC internal data (the Display Data D1 to D216 and the control data) is undefined when power is first applied,
applications should set the INHb pin low at the same
time as power is applied to turn off the display (This sets the S1/P1/G1 to S6/P6/G6, S7 to S54, COM1 to COM4 to the VSS
level.) and during this period send serial data from the controller. The controller should then set the INHb pin high after the data
transfer has completed. This procedure prevents meaningless displays at Power On.
1. 1/4 Duty
t1
(Note 1)
90%
VDET (Min)
VDD
(Note 1)
INHb
VIL1
tC
t2
(Note 1)
VIL1
SCE
Display data and control data transfer
Internal data
D1 to D56 ,P0 to P2,DR,
DT,OC,FC0 to FC2,SC,BU
(Note 2)
Undefined
Internal data
D57 to D112,PG1 to PG6,
PF0 to PF3
Undefined
Internal data
D113 to D164,W10 to W35
Undefined
Internal data
D165 to D216,W40 to W65
Undefined
Default
(Note 2)
Default
Defined
Undefined
Defined
Undefined
Defined
Undefined
(Note 2)
Default
(Note 2)
Default
Undefined
Defined
Figure 15. Power On/Off and INHb Control Sequence (1/4 Duty)
(Note 1) t1≥0, t2≥0, tC: (Min) 10μs
When VDD level is over 90%, there may be cases where command is not received correctly in unstable VDD.
(Note 2) Display Data are undefined. Regarding default value, refer to “Reset Condition”
2. 1/3 Duty
(Note 3)
t1
90%
VDET (Min)
VDD
(Note 3)
INHb
VIL1
tC
t2
(Note 3)
VIL1
SCE
Display data and control data transfer
Internal data
D1 to D57 ,P0 to P2,DR,
DT,OC,FC0 to FC2,SC,BU
Undefined
Internal data
D58 to D114,PG1 to PG6,
PF0 to PF3
Undefined
Internal data
D115 to D162,W10 to W35
Undefined
Internal data
W40 to W65
Undefined
(Note 4)
Default
(Note 4)
Default
(Note 4)
Default
Defined
Undefined
Defined
Undefined
Defined
Undefined
(Note 4)
Default
Defined
Undefined
Figure 16. Power On/Off and INHb Control Sequence (1/3 Duty)
(Note 3) t1≥0, t2≥0, tC: (Min) 10μs
When VDD level is over 90%, there may be cases where command is not received correctly in unstable VDD.
(Note 4) Display Data are undefined. Regarding default value, refer to “Reset Condition”.
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Oscillation Stabilization Time of the Internal Oscillation Circuit
It must be noted that the oscillation of the internal oscillation circuit is unstable for a maximum of 100μs (oscillation stabilization
time) after oscillation has started.
Internal
oscillation
circuit
Oscillation
stabilization time
100μs(Max)
Oscillation stopped
Oscillation operation
(under normal conditions)
1.If the INHb pin status is switched from "L" to "H"
when control data OC = "0" and BU ="0"
2.If the control data BU is set from "1" to "0"
when INHb = "H" and control data OC ="0"
Figure 17. Oscillation Stabilization Time
Power-saving mode operation in external clock mode
After receiving [BU]=[1], BU91510KV-M enter to Power-saving mode synchronized with frame then Segment and Common
pins output VSS level.
Therefore, in external clock mode, it is necessary to input the external clock based on each frame frequency setting after
sending [BU]=[1].
For the required number of clock, refer to Control Data Functions “4. FC0, FC1 and FC2: Frame frequency switching control
data”.
For example, please input the external clock as below.
[FC0,FC1,FC2]=[0,0,0]: In case of fOSC/6144 setting, it needs over 6144clk,
[FC0,FC1,FC2]=[0,1,0]: In case of fOSC/4608 setting, it needs over 4608clk,
[FC0,FC1,FC2]=[1,1,1]: In case of fOSC/1536 setting, it needs over 1536clk
Please refer to the timing chart below.
SCE
SCL
SDI
SDI
1
0
0
0
0
0
1
0
B0
B1
B2
B3
A0
A1
A2
A3
Dev ice Code
8bits
D1
D2
FC1
FC2
OC
Display Data/
Control Data
SC
BU
0
0
DD
2 bits
OSC
OSC
To input External clock at
least 1 f rame or more
SEG
VSS
COM1
VSS
COM2
VSS
COM3
VSS
COM4
VSS
Output at Normal mode
Output at Power sav ing mode(VSS lev el)
Power sav ing
Last Display f lame
of Sirial data
receiv ing
Figure 18. External Stop Timing(1/4 Duty)
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Voltage Detection Type Reset Circuit (VDET)
The Voltage Detection Type Reset Circuit generates an output signal and resets the system when power is applied for
the first time and when voltage drops (that is, for example, the power supply voltage is less than or equal to the power
down detection voltage (VDET = 1.8V Typ) ). To ensure that this reset function works properly, it is recommended that a
capacitor must be connected to the power supply line so that both the power supply voltage (VDD) rise time when power
is first applied and the power supply voltage (VDD) fall time when the voltage drops are at least 1ms.
To refrain from data transmission is strongly recommended while power supply is rising up or falling down to prevent from the
occurrence of disturbances on transmission and reception.
t1
VDD
t2
VDD Min
VDD Min
t3
VDD = 1.0V
Figure 19. VDET Detection Timing
Power supply voltage VDD fall time: t1 > 1ms
Power supply voltage VDD rise time: t2 > 1ms
Internal reset power supply retain time: t3 > 1ms
If the above conditions cannot be satisfied, the IC may not initialize, so unintended display lighting may occur.
In order to reduce this effect, initialize the IC as soon as possible after turning on the power supply.
Refer to the IC initialization flow below.
But since commands are not received when the power is OFF, the IC initialization flow is not the same function as POR.
Set the BU command to power save mode ([BU] = [1]) and SC command to off (SC = 1) immediately after turning on the
power.
In BU91510KV-M, command reception is possible (VDD:90%) 0ns after turning on the power.
Refer to the timing chart for “The INHb Pin and Display Control”.
Reset Condition
When BU91510KV-M is initialized, the internal status after power supply has been reset as the following table.
Table 1. control data reset condition
Instruction
At Reset Condition
S1/P1/G1 to S6/P6/G6 Pin
[P0,P1,P2]=[0,0,0]:all segment output
LCD Bias
DR=0: 1/3 Bias
LCD Duty
DT=0: 1/4 Duty
Display Frequency
[FC0,FC1,FC2]=[0,0,0]:fOSC/6144
Display Clock Mode
OC=0:Internal oscillator
LCD Display
SC=1:OFF
Power Mode
BU=1:Power saving mode
PWM / GPO Output
PGx=0:PWM output(x=1 to 6)
PWM Frequency
[PF0,PF1,PF2,PF3]=[0,0,0,0]:fOSC/2048
PWM Duty
[Wn0 to Wn5]=[0,0,0,0,0,0]
:(1/64)xTp(n=1 to 6,Tp=1/fp)
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
8.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
9.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
10.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
11. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The
operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical
damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an
input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when
no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins
have voltages within the values specified in the electrical characteristics of this IC.
12.
Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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Ordering Information
B
U
9
1
5
Part Number
1
0
K
V
Package
KV : VQFP64
-
ME2
Product Rank
M: for Automotive
Packaging Specification
E2: Embossed tape and reel
Marking Diagram
VQFP64 (TOP VIEW)
Part Number Marking
BU91510KV
LOT Number
Pin 1 Mark
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Physical Dimension, Tape and Reel Information
Package Name
VQFP64
1PIN MARK
(UNIT:mm)
PKG:VQFP64
Drawing: EX252-5001-1
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Revision History
Version
001
002
003
Date
Description
8.July.2015 New edition
Page 3. Remove temperature condition in Absolute Maximum Ratings. Ta=25°C → Removed
Page 3. Modify Maximum Supply Voltage in Absolute Maximum Ratings: -0.3 to +6.5 → -0.3 to +7.0.
Page 3. Modify Input Voltage in Absolute Maximum Ratings: -0.3 to +6.5 → -0.3 to +7.0.
Page 3. Add OSC in Absolute Maximum Ratings Input Voltage.
Add Caution2 in Absolute Maximum Ratings condition. (Moved from Operational Notes)
Page 4. Add “External Clock Rise Time”, “External Clock Fall Time” and “External Clock Duty” in
Oscillation Characteristics.
Page.6 Typo Modification in Pin Description in page.6.
S1/P1/G1 to S6/P6/G6, S7 to S54 → S1/P1/G1 to S6/P6/G6, S7 to S51, S53, S54
Page.6 Add S52/OSC in Pin Description Function additional explanation
Page.6 Add S52/OSC descriptions of “Function”, “I/O” and “Handling when unused” of in Pin
29.Jan.2018
Description.
Page.6 Modify diagram of “Figure 6.I/O Equivalence Circuit”.
Page 11 to 14. Add “Reset condition” in Control Data Functions.
Page 12. Add “External Clock input timing function” in “5.OC: Internal oscillator operating
mode/External clock operating mode switching control data”.
Page 23. Modify diagram of “Figure 15. Power On/Off and INHb Control Sequence (1/4 Duty)”.
Modify diagram of “Figure 16. Power On/Off and INHb Control Sequence (1/3 Duty)”.
Page.23 Add notes for Figure 15 and Figure 16..
Page 24. Add “Power-saving mode operation in external clock mode”.
Page 25. Add explanation in “Voltage Detection Type Reset Circuit (VDET)”.
Correction of errors
Page.6 Add Pin Description Note
18.Jul.2019 Page.8,10,and 12 Add Description
Page.23 Add INHb Pin and Display Control description
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001