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BU91799KV-ME2

BU91799KV-ME2

  • 厂商:

    ROHM(罗姆)

  • 封装:

    VQFP64_10X10MM

  • 描述:

  • 数据手册
  • 价格&库存
BU91799KV-ME2 数据手册
Datasheet Low Duty LCD Segment Driver for Automotive Application BU91799KV-M MAX 200 segments (SEG50×COM4) General Description Key Specifications ■ ■ ■ ■ ■ ■ ■ BU91799KV-M is a 1/4 duty general-purpose LCD driver that can be used for automotive applications and can drive up to 200 LCD Segments. It can support operating temperature of up to +105°C and qualified for AEC-Q100 Grade2, as required for automotive applications. It has integrated display RAM for reducing CPU load. Also, it is designed with low power consumption and no external component needed. Supply Voltage Range: +2.5V to +6.0V LCD Drive Power Supply Range: +2.5V to +6.0V Operating Temperature Range: -40°C to +105°C Max Segments: 200 Segments Display Duty: 1/4 Bias: 1/3 Interface: 2wire Serial Interface Special Characteristics Features ■ ■   Package        AEC-Q100 Qualified (Note) Integrated RAM for Display Data (DDRAM): 50 x 4 bit (Max 200 Segment) LCD Drive Output : 4 Common Output, Max 50 Segment Output Integrated Buffer AMP for LCD Driving Integrated Oscillator Circuit No External Components Low Power Consumption Design Independent Power Supply for LCD Driving Integrated Electrical Volume Register (EVR)function ESD(HBM): Latch-up Current: ±2000V ±100mA W (Typ) x D (Typ) x H (Max) (Note) Grade 2 VQFP64 12.00mm x 12.00mm x 1.60mm Applications        etc. Instrument Clusters Climate Controls Car Audios / Radios Metering White Goods Healthcare Products Battery Operated Applications Typical Application Circuit VLCD COM0 COM1 COM2 COM3 VDD VLCD C > 0.1µF Controller VDD SDA SCL Segment LCD VDD VDD / VSS and VLCD / VSS VSS …... Insert Capacitors between SEG0 SEG1 …... INHb OSCIN TEST1 SEG49 Internal Clock Mode Figure 1. Typical Application Circuit ○Product structure:Silicon monolithic integrated circuit www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 14 • 001 ○This product is not designed for protection against radioactive rays. 1/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Block Diagram / Pin Configuration / Pin Description Segment Driver SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 33 Common Driver 48 LCD voltage generator SEG34 SEG 49 SEG35 … SEG36 VLCD SEG0 SEG37 COM0 …… COM 3 49 + - + LCD - BIAS SELECTOR + Common Blink Timing Counter Generator DDRAM - VSS INHb Command Data Decoder Command Register OSCIN SEG38 32 SEG21 SEG39 SEG20 SEG40 SEG19 SEG41 SEG18 SEG42 SEG17 SEG43 SEG16 SEG44 SEG15 SEG45 SEG14 SEG46 SEG13 SEG47 SEG12 SEG48 SEG11 SEG49 SEG10 COM0 SEG9 COM1 SEG8 COM2 OSCILLATOR Power On Reset Serial Interface SEG7 COM3 SEG6 17 64 TEST 1 SDA 16 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 NC TEST1 INHb SDA SCL NC OSCIN VSS VLCD IF FILTER VSS VDD 1 VDD SCL Figure 2. Block Diagram Figure 3. Pin Configuration (TOP VIEW) Table 1 Pin Description Handling when unused Pin Name Pin No. I/O Function INHb 8 I TEST1 9 I NC 10 - Non connection OPEN NC 5 - Non connection OPEN OSCIN 4 I External clock input External clock and Internal clock modes can be selected by command Must be connected to VSS when using internal oscillator. SDA 7 I/O SCL 6 VSS Input terminal for display control VDD: Display enable VSS: Display disenable POR enable setting VDD: POR disenable (Note) VSS: POR enable VDD VSS VSS Serial data in-out terminal - I Serial clock terminal - 3 - Ground - VDD 2 - Power supply - VLCD 1 - Power supply for LCD driving - SEG0 to SEG49 11 to 60 O SEGMENT output for LCD driving OPEN COM0 to COM3 61 to 64 O COMMON output for LCD driving OPEN (Note) This function is guaranteed by design, not tested in production process. Software Reset is necessary to initialize IC in case of TEST1=VDD. www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 2/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Absolute Maximum Ratings (VSS=0V) Parameter Symbol Ratings Unit Remarks Maximum Voltage1 VDD -0.5 to +7.0 V Power Supply Maximum Voltage2 VLCD -0.5 to +7.0 V LCD Drive Voltage Power Dissipation Pd 1.00(Note 1) W Input Voltage Range Operational Temperature Range Storage Temperature Range VIN -0.5 to VDD+0.5 V Topr -40 to +105 °C Tstg -55 to +125 ºC (Note 1) Derate by 10mW/°C when operating above Ta=25°C (when mounted in ROHM’s standard board). Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Recommended Operating Conditions (Ta=-40°C to +105°C, VSS=0V) Parameter Symbol Ratings Min Typ Max Unit Remarks Power Supply Voltage1 VDD 2.5 - 6.0 V Power Supply Power Supply Voltage2 VLCD 2.5 - 6.0 V LCD Drive Voltage Electrical Characteristics DC Characteristics (VDD=2.5V to 6.0V, VLCD=2.5V to 6.0V, VSS=0V, Ta=-40°C to +105°C, unless otherwise specified) Limits Parameter Symbol Unit Conditions Min Typ Max “H” Level Input Voltage VIH 0.7VDD - VDD V SDA, SCL, OSCIN, INHb “L” Level Input Voltage VIL VSS - 0.3VDD V SDA, SCL, OSCIN, INHb “H” Level Input Current1 IIH1 - - 1 µA SDA, SCL, OSCIN(Note 2), INHb “L” Level Input Current1 IIL1 -1 - - µA SDA, SCL, OSCIN, INHb, TEST1 “H” Level Input Current2 IIH2 - - 300 µA TEST1 Iload = 3mA SDA “L” Level Output Voltage VOL_SDA 0 - 0.4 V SEG RON - 3 - kΩ COM RON - 3 - kΩ Standby Current Ist - - 5 µA Power Consumption 1 IDD - 2.5 15 µA Power Consumption 2 ILCD - 10 20 µA LCD Driver on Resistance Iload=±10µA Display off, Oscillation off VDD=3.3V, VLCD=5V, Ta=+25°C Power save mode1, FR=71Hz 1/3 bias, Frame inverse VDD=3.3V, VLCD=5V, Ta=+25°C Power save mode1, FR=71Hz 1/3 bias, Frame inverse (Note 2) For external clock mode only www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 3/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Electrical Characteristics – continued Oscillation Characteristics (VDD=2.5V to 6.0V, VLCD=2.5V to 6.0V, VSS=0V, Ta=-40°C to +105°C, unless otherwise specified) Limits Parameter Symbol Unit Conditions Min Typ Max FR = 80Hz setting, Frame Frequency1 fCLK1 56 80 112 Hz VDD=2.5V to 6.0V, Ta=-40°C to +105°C FR = 80Hz setting, VDD=3.3V, Frame Frequency2 fCLK2 70 80 90 Hz Ta=+25°C FR = 80Hz setting, VDD=5.0V, Frame Frequency3 fCLK3 77.5 87.5 97.5 Hz Ta=+25°C FR = 80Hz setting, VDD=5.0V, Frame Frequency4 fCLK4 67.5 87.5 108 Hz Ta=-40°C to +105°C External Clock Rise Time tr 0.3 µs External Clock Fall Time tf - - 0.3 µs External Frequency fEXCLK 15 - 300 kHz External Clock Duty tDTY 30 50 70 % (Note) DISCTL 80HZ setting: Frame frequency [Hz] = external clock [Hz] DISCTL 71HZ setting: Frame frequency [Hz] = external clock [Hz] DISCTL 64HZ setting: Frame frequency [Hz] = external clock [Hz] DISCTL 53HZ setting: Frame frequency [Hz] = external clock [Hz] External clock mode (OSCIN)(Note) / 512 / 576 / 648 / 768 [Reference Data] 110 Frame Frequency [Hz] 100 VDD = 6.0V VDD = 5.0V 90 VDD = 3.3V 80 VDD = 2.7V 70 60 50 -40 -20 0 20 40 60 80 100 Temperature [°C] Figure 4. Frame Frequency Typical Temperature Characteristics www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 4/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Electrical Characteristics – continued MPU interface Characteristics (VDD=2.5V to 6.0V, VLCD=2.5V to 6.0V, VSS=0V, Ta=-40°C to +105°C, unless otherwise specified) Limits Parameter Symbol Unit Conditions Min Typ Max Input Rise Time tr - - 0.3 µs Input Fall Time tf - - 0.3 µs SCL Cycle Time tSCYC 2.5 - - µs “H” SCL Pulse Width tSHW 0.6 - - µs “L” SCL Pulse Width tSLW 1.3 - - µs SDA Setup Time tSDS 100 - - ns SDA Hold Time tSDH 100 - - ns Buss Free Time tBUF 1.3 - - µs START Condition Hold Time tHD;STA 0.6 - - µs START Condition Setup Time tSU;STA 0.6 - - µs STOP Condition Setup Time tSU;STO 0.6 - - µs SDA tf tSLW tBUF tSCYC SLW SCL tHD;STA tr tSDH tSHW tSDS SDA tSU;STO tSU;STA Figure 5. Interface Timing I/O Equivalence Circuit SDA VDD VSS VSS VLCD SCL VSS VSS VDD VDD OSCIN TEST1 VSS VSS VLCD VDD INHb SEG/COM VSS VSS Figure 6. I/O Equivalence Circuit www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 5/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Application Example VLCD VDD VDD VLCD Controller COM0 COM1 COM2 COM3 SDA SCL Segment LCD VDD ・・・・・・・ VSS SEG0 SEG1 ・・・・・ INHb OSCIN TEST1 SEG49 Internal Clock Mode VLCD VDD VDD VLCD Controller COM0 COM1 COM2 COM3 SDA SCL Segment LCD VDD ・・・・・・・ VSS SEG0 SEG1 ・・・・・ INHb OSCIN TEST1 SEG49 External Clock Mode Figure 7. Example of Application Circuit www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 6/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Functional Descriptions Command / Data Transfer Method BU91799KV-M is controlled by 2-wire signal (SDA, SCL). SDA SCL START condition STOP condition Figure 8. 2-SPI Command / Data Transfer Format It is necessary to generate START and STOP condition when sending Command or Display Data through this 2 wire serial interface. Slave Address S A Command 0 1 1 1 1 1 0 0 A C Display Data A P 0 Command or data judgment bit START condition STOP condition Acknowledge Figure 9. Interface Protcol The following procedure shows how to transfer Command and Display Data. (1) Generate “START condition”. (2) Issue Slave Address. (3) Transfer Command and Display Data. (4) Generate “STOP condition Acknowledge Data format is comprised of 8 bits, Acknowledge bit is returned after sending 8-bit data. After the transfer of 8-bit data (Slave Address, Command, Display Data), release the SDA line at the falling edge of the 8th clock. The SDA line is then pulled “Low” until the falling edge of the 9th clock SCL. (Output cannot be pulled “High” because of open drain NMOS). If acknowledge function is not required, keep SDA line at “Low” level from 8th falling edge to 9th falling edge of SCL. SDA 1 to 7 8 9 1 to 7 8 9 1 to 7 8 9 SCL S P Slave Address ACK DATA ACK START condition DATA ACK STOP condition Figure 10. Acknowledge Timing www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 7/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Functional Descriptions – continued Command Transfer Method Issue Slave Address (“01111100”) after generate “START condition”. The 1st byte after Slave Address always becomes command input. MSB (“command or data judge bit”) of command decide to next data is Command or Display Data. When set “command or data judge bit”=‘1’, next byte will be command. When set “command or data judge bit”=‘0’, next byte data is Display Data. S Slave Address A A 1 Command A 1 Command 1 Command A 0 Command A Display Data … P It cannot accept input command once it enters into Display Data transfer state. In order to input command again it is necessary to generate “START condition”. If “START condition” or “STOP condition” is sent in the middle of command transmission, command will be cancelled. If Slave Address is continuously sent following “START condition”, it remains in command input state. “Slave Address” must be sent right after the “START condition”. When Slave Address cannot be recognized in the first data transmission, no Acknowledge bit is generated and next transmission will be invalid. When data is invalid status, if “START condition” is transmitted again, it will return to valid status. Consider the MPU interface characteristic such as Input rise time and Setup / Hold time when transferring command and data (Refer to MPU Interface characteristic). Write Display and Transfer Method BU91799KV-M has Display Data RAM (DDRAM) of 50×4=200bits. The relationship between data input and Display Data, DDRAM Data and address are as follows; Slave Address S 01111100 Command A A 0 0000000 a b c d e f g h A i j k l m n o p A … P Display Data 8-bit data is stored in DDRAM. ADSET command specifies the address to be written, and address is automatically incremented in every 4-bit data. Data can be continuously written in DDRAM by transmitting data continuously. When RAM data is written successively, after writing RAM data to 31h (SEG49), the address is returned to 00h (SEG0) by the auto-increment function BIT 04h DDRAM address 05h 06h 07h 00h 01h 02h 03h 0 a e i m COM0 1 b f j n COM1 2 c g k o COM2 3 d h l p COM3 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 ... 2Fh SEG47 30h SEG48 31h SEG49 Display Data is written to DDRAM every 4-bit data. No need to wait for ACK bit to complete data transfer. www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 8/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Functional Descriptions – continued Oscillator The clock signals for logic and analog circuit can be generated from internal oscillator or external clock. If internal oscillator circuit is used, OSCIN must be connected to VSS level. When using external clock mode, input external clock to OSCIN terminal after ICSET command setting. OSCIN OSCIN BU91799KV-M VSS BU91799KV-M VSS Figure 11. Internal Clock Mode Clock Figure 12. External Clock Mode LCD Driver Bias Circuit BU91799KV-M generates LCD driving voltage with on-chip Buffer AMP. And it can drive LCD at low power consumption. Line or frame inversion can be set by DISCTL command. Refer to the “LCD Driving Waveform” for each LCD bias setting. Blink Timing Generator BU91799KV-M has Blink function. Blink mode is asserted by BLKCTL command. The Blink frequency varies depending on fCLK characteristics at internal clock mode. Refer to Oscillation Characteristics for fCLK. Reset Initialize Condition Initial condition after executing Software Reset is as follows. -Display is off. -DDRAM address is initialized (DDRAM Data is not initialized). Refer to Command Description for initialize value of registers. Command / Function List Description List of Command / Function No. Command Function 1 Mode Set (MODESET) Display on/off, 1/3bias setting 2 Address Set (ADSET) DDRAM address setting (00h to 31h) 3 Display Control (DISCTL) Frame frequency, Power save mode setting 4 Set IC Operation (ICSET) Software Reset, internal/external clock setting ( P2 is MSB data of DDRAM address ) 5 Blink Control (BLKCTL) Blink off/0.5Hz/1Hz/2Hz Blink setting 6 All Pixel Control (APCTL) All pixels on/off during DISPON 7 EVR Set 1 (EVRSET1) Set EVR 1 8 EVR Set 2 (EVRSET2) Set EVR 2 www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 9/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Functional Descriptions – continued Detailed Command Description D7 (MSB) is a command or data judgment bit. Refer to Command / Data Transfer Method. C: 0: Next byte is RAM write data. 1: Next byte is command. Mode Set (MODESET) MSB D7 D6 D5 C 1 D4 D3 D2 D1 LSB D0 0 P3 0 * * 0 ( * : Don’t care) Set display on and off Setup P3 Reset initialize condition Display off (DISPOFF) 0 ○ Display on (DISPON) 1 - Display off : Regardless of DDRAM Data, all SEGMENT and COMMON output will be stopped after 1frame of OFF data write. Display off mode will be disabled after Display on command. Display on : SEGMENT and COMMON output will be active and start to read the Display Data from DDRAM. Set bias level Setup P2 Reset initialize condition 0 ○ Prohibit 1 Refer to LCD Driving Waveform - 1/3 Bias Address Set (ADSET) MSB D7 D6 D5 C 0 0 D4 D3 D2 D1 LSB D0 P4 P3 P2 P1 P0 The range of address can be set from 000000 to 110001(bin). Internal register Command MSB Address [5] ICSET P2 Address [4] ADSET P4 Address [3] ADSET P3 Address [2] ADSET P2 Address [1] ADSET P1 LSB Address [0] ADSET P0 Address [5:0]: MSB bit is specified in ICSET P2 and [4:0] are specified as ADSET P4 to P0. Don’t set out of range address, otherwise address will be set 00000. www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 10/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Functional Descriptions – continued Display Control (DISCTL) MSB D7 D6 D5 C 0 1 D4 D3 D2 D1 LSB D0 P4 P3 P2 P1 P0 Set Power save mode FR Power save mode FR P4 P3 Reset initialize condition Normal mode (80Hz) 0 0 ○ Power save mode1 (71Hz) 0 1 - Power save mode2 (64Hz) 1 0 - Power save mode3 (53Hz) 1 1 Power consumption is reduced in the following order: Normal mode > Power save mode1 > Power save mode 2 > Power save mode 3. Set LCD drive waveform Setup Line inversion P2 Reset initialize condition 0 ○ Frame inversion 1 Power consumption is reduced in the following order: Line inversion > Frame inversion Typically, when driving large capacitance LCD, Line inversion will increase the influence of crosstalk. Regarding driving waveform, refer to LCD Driving Waveform. Set Power save mode SR Setup P1 P0 Reset initialize condition Power save mode1 0 0 - Power save mode2 0 1 - Normal mode 1 0 ○ High power mode 1 1 Power consumption is increased in the following order: Power save mode 1 < Power save mode 2 < Normal mode < High power mode (Reference current consumption data) Setup Current consumption Power save mode 1 ×0.50 Power save mode 2 ×0.67 Normal mode ×1.00 High power mode ×1.80 The data above is for reference only. Actual consumption depends on Panel load. www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 11/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Functional Descriptions – continued Set IC Operation (ICSET) MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 C 1 1 0 1 P2 P1 P0 P2: MSB data of DDRAM address. Refer to Address Set (ADSET). Set Software Reset execution Setup P1 Software Reset Not Execute 0 Software Reset Execute 1 When “Software Reset” is executed, BU91799KV-M is reset to initial condition. (Refer to Reset initialize condition) Don’t set Software Reset (P1) with P2, P0 at the same time. Set oscillator mode Setup Internal clock P0 Reset initialize condition 0 ○ External clock 1 Internal clock mode: OSCIN must be connected to VSS level. External clock mode: Input external clock to OSCIN terminal.. DISCTL 80Hz setting: Frame frequency [Hz] = external clock [Hz] / 512 DISCTL 71Hz setting: Frame frequency [Hz] = external clock [Hz] / 576 DISCTL 64Hz setting: Frame frequency [Hz] = external clock [Hz] / 648 DISCTL 53Hz setting: Frame frequency [Hz] = external clock [Hz] / 768 Command ICSET OSCIN_EN Internal clock mode ( Internal signal ) ( External clock mode Internal oscillation ( Internal signal ) External clock ( OSCIN ) Figure 13. OSC MODE Switch Timing Blink Control (BLKCTL) MSB D7 D6 D5 C 1 1 D4 1 D3 0 D2 * D1 P1 LSB D0 P0 ( * : Don’t care) Set Blink mode Blink mode (Hz) P1 P0 Reset initialize condition OFF 0 0 ○ 0.5 0 1 - 1.0 1 0 - 2.0 1 1 The Blink frequency varies depending on fCLK characteristics at internal clock mode. Refer to Oscillation Characteristics for fCLK. www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 12/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Functional Descriptions – continued All Pixel Control (APCTL) MSB D7 D6 D5 C 1 1 D4 D3 D2 D1 LSB D0 1 1 1 P1 P0 All display set on, off Setup P1 Reset initialize condition Normal 0 ○ All pixel on (APON) 1 - P0 Reset initialize condition 0 ○ Setup Normal 1 All pixel off (APOFF) All pixels on: All pixels are on regardless of DDRAM Data. All pixels off: All pixels are off regardless of DDRAM Data. This command is valid in Display on status. The data of DDRAM is not changed by this command. If set both P1 and P0 =”1”, APOFF will be selected. EVR Set 1 (EVRSET1) MSB D7 D6 D5 C 1 1 D4 0 D3 0 D2 P2 D1 P1 LSB D0 P0 BU91799KV-M has 32-step Electrical Volume Register (EVR) that can set the best V0 voltage level (maximum LCD driving voltage). Electrical Volume Register (EVR) setting is shown below. MSB LSB Internal register EVR4 EVR3 EVR2 EVR1 EVR0 Command EVRSET1 P2 EVRSET1 P1 EVRSET1 P0 EVRSET2 P1 EVRSET2 P0 Reset initialize condition 0 0 0 0 0 Electrical Volume Register (EVR) is set to “00000” in reset initialize condition. In “00000” condition, V0 output voltage is equal to VLCD input voltage. Refer to The Relationship of Electrical Volume Register (EVR) Setting and V0 voltage. Keep EVR setting for V0 voltage more than 2.5V only. And ensure “VLCD – V0 > 0.6” condition is satisfied. Unstable IC output voltage may result if the above conditions are not satisfied. EVRSET1 command defines the upper 3bit of EVR. EVR setting is reflected by sending EVRSET1 command. EVR Set 2 (EVRSET2) MSB D7 D6 D5 C 1 1 D4 1 D3 1 D2 0 D1 P1 LSB D0 P0 EVRSET2 command defines the lower 2bit of EVR. EVR setting is reflected by sending by sending EVRSET2 command. www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 13/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Functional Descriptions – continued The Relationship of Electrical Volume Register (EVR) Setting and V0 voltage EVR Calculation formula VLCD = 6.000 VLCD = 5.500 VLCD = 5.000 VLCD = 4.000 VLCD = 3.500 VLCD = 3.000 VLCD = 2.500 V 0 VLCD V0= 6.000 V0= 5.500 V0= 5.000 V0= 4.000 V0= 3.500 V0= 3.000 V0= 2.500 V 1 0.967*VLCD V0= 5.802 V0= 5.323 V0= 4.839 V0= 3.871 V0= 3.387 V0= 2.903 V0= 2.419 V 2 0.937*VLCD V0= 5.622 V0= 5.156 V0= 4.688 V0= 3.750 V0= 3.281 V0= 2.813 V0= 2.344 V 3 0.909*VLCD V0= 5.454 V0= 5.000 V0= 4.545 V0= 3.636 V0= 3.182 V0= 2.727 V0= 2.273 V 4 0.882*VLCD V0= 5.292 V0= 4.853 V0= 4.412 V0= 3.529 V0= 3.088 V0= 2.647 V0= 2.206 V 5 0.857*VLCD V0= 5.142 V0= 4.714 V0= 4.286 V0= 3.429 V0= 3.000 V0= 2.571 V0= 2.143 V 6 0.833*VLCD V0= 4.998 V0= 4.583 V0= 4.167 V0= 3.333 V0= 2.917 V0= 2.500 V0= 2.083 V 7 0.810*VLCD V0= 4.860 V0= 4.459 V0= 4.054 V0= 3.243 V0= 2.838 V0= 2.432 V0= 2.027 V 8 0.789*VLCD V0= 4.734 V0= 4.342 V0= 3.947 V0= 3.158 V0= 2.763 V0= 2.368 V0= 1.974 V 9 0.769*VLCD V0= 4.614 V0= 4.231 V0= 3.846 V0= 3.077 V0= 2.692 V0= 2.308 V0= 1.923 V 10 0.750*VLCD V0= 4.500 V0= 4.125 V0= 3.750 V0= 3.000 V0= 2.625 V0= 2.250 V0= 1.875 V 11 0.731*VLCD V0= 4.386 V0= 4.024 V0= 3.659 V0= 2.927 V0= 2.561 V0= 2.195 V0= 1.829 V 12 0.714*VLCD V0= 4.284 V0= 3.929 V0= 3.571 V0= 2.857 V0= 2.500 V0= 2.143 V0= 1.786 V 13 0.697*VLCD V0= 4.182 V0= 3.837 V0= 3.488 V0= 2.791 V0= 2.442 V0= 2.093 V0= 1.744 V 14 0.681*VLCD V0= 4.086 V0= 3.750 V0= 3.409 V0= 2.727 V0= 2.386 V0= 2.045 V0= 1.705 V 15 0.666*VLCD V0= 3.996 V0= 3.667 V0= 3.333 V0= 2.667 V0= 2.333 V0= 2.000 V0= 1.667 V 16 0.652*VLCD V0= 3.912 V0= 3.587 V0= 3.261 V0= 2.609 V0= 2.283 V0= 1.957 V0= 1.630 V 17 0.638*VLCD V0= 3.828 V0= 3.511 V0= 3.191 V0= 2.553 V0= 2.234 V0= 1.915 V0= 1.596 V 18 0.625*VLCD V0= 3.750 V0= 3.438 V0= 3.125 V0= 2.500 V0= 2.188 V0= 1.875 V0= 1.563 V 19 0.612*VLCD V0= 3.672 V0= 3.367 V0= 3.061 V0= 2.449 V0= 2.143 V0= 1.837 V0= 1.531 V 20 0.600*VLCD V0= 3.600 V0= 3.300 V0= 3.000 V0= 2.400 V0= 2.100 V0= 1.800 V0= 1.500 V 21 0.588*VLCD V0= 3.528 V0= 3.235 V0= 2.941 V0= 2.353 V0= 2.059 V0= 1.765 V0= 1.471 V 22 0.576*VLCD V0= 3.456 V0= 3.173 V0= 2.885 V0= 2.308 V0= 2.019 V0= 1.731 V0= 1.442 V 23 0.566*VLCD V0= 3.396 V0= 3.113 V0= 2.830 V0= 2.264 V0= 1.981 V0= 1.698 V0= 1.415 V 24 0.555*VLCD V0= 3.330 V0= 3.056 V0= 2.778 V0= 2.222 V0= 1.944 V0= 1.667 V0= 1.389 V 25 0.545*VLCD V0= 3.270 V0= 3.000 V0= 2.727 V0= 2.182 V0= 1.909 V0= 1.636 V0= 1.364 V 26 0.535*VLCD V0= 3.210 V0= 2.946 V0= 2.679 V0= 2.143 V0= 1.875 V0= 1.607 V0= 1.339 V 27 0.526*VLCD V0= 3.156 V0= 2.895 V0= 2.632 V0= 2.105 V0= 1.842 V0= 1.579 V0= 1.316 V 28 0.517*VLCD V0= 3.102 V0= 2.845 V0= 2.586 V0= 2.069 V0= 1.810 V0= 1.552 V0= 1.293 V 29 0.508*VLCD V0= 3.048 V0= 2.797 V0= 2.542 V0= 2.034 V0= 1.780 V0= 1.525 V0= 1.271 V 30 0.500*VLCD V0= 3.000 V0= 2.750 V0= 2.500 V0= 2.000 V0= 1.750 V0= 1.500 V0= 1.250 V 31 0.491*VLCD V0= 2.946 V0= 2.705 V0= 2.459 V0= 1.967 V0= 1.721 V0= 1.475 V0= 1.230 V Prohibit setting www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 14/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) LCD Driving Waveform (1/3bias) Line Inversion Frame Inversion SEGn SEG n+1 SEG n+2 SEG n+3 SEGn SEGn+1 SEGn+2 SEGn+3 COM0 stateA COM0 stateA COM1 stateB COM1 stateB COM2 COM2 COM3 COM3 1frame 1frame V0 V0 COM0 COM0 VSS VSS V0 V0 COM1 COM1 VSS VSS V0 V0 COM2 COM2 VSS VSS V0 V0 COM3 COM3 VSS VSS V0 V0 SEGn SEGn VSS VSS V0 V0 SEGn+1 SEGn+1 VSS VSS V0 V0 SEGn+2 SEGn+2 VSS VSS V0 V0 SEGn+3 SEGn+3 VSS VSS stateA (COM0-SEGn) stateA (COM0-SEGn) stateB (COM1-SEGn) stateB (COM1-SEGn) Figure 14. LCD Waveform at Line Inversion (1/3bias) www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Figure 15. LCD Waveform at Frame Inversion (1/3bias) 15/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Example of Display Data If LCD layout pattern is like Figure 16 and Figure 17, and display pattern is like Figure18, Display Data will be shown as below. COM0 COM1 COM2 COM3 Figure 16. Example COM Line Pattern SEG1 SEG3 SEG2 SEG5 SEG7 SEG4 SEG6 SEG8 SEG9 SEG10 Figure 17. Example SEG Line Pattern Figure 18. Example Display Pattern S E G 0 S E G 1 S E G 2 S E G 3 S E G 4 S E G 5 S E G 6 S E G 7 S E G 8 S E G 9 S E G 10 S E G 11 S E G 12 S E G 13 S E G 14 S E G 15 S E G 16 S E G 17 S E G 18 S E G 19 COM0 D0 0 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 COM1 D1 0 0 1 1 1 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 COM2 D2 0 0 0 1 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 COM3 D3 0 0 1 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 16/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Initialize Sequence Follow the Power-on sequence below to initialize condition. Power on ↓ STOP condition ↓ START condition ↓ Issue Slave Address ↓ Execute Software Reset by sending ICSET command. After Power-on and before sending initialize sequence, each register value, DDRAM address and DDRAM Data are random. Start Sequence Start Sequence Example1 No. Input 2 3 4 5 6 7 8 9 10 11 12 D5 D4 D3 D2 D1 D0 Power on ↓ Wait min 100µs ↓ STOP ↓ START ↓ Slave Address ↓ ICSET ↓ BLKCTL ↓ DISCTL ↓ EVRSET1 EVRSET2 ↓ ICSET ↓ ADSET ↓ Display Data Display Data Descriptions VDD=0V→5V (tR: Min 1ms to Max 500ms) Initialize BU91799KV-M STOP condition START condition 0 1 1 1 1 1 0 0 Issue Slave Address 1 1 1 0 1 0 1 0 Software Reset 1 1 1 1 0 * 0 0 Blink off 1 0 1 0 0 1 0 0 80Hz, Frame inv., Power save mode1 1 1 1 1 1 1 0 1 0 1 0 0 0 0 1 1 EVR: 001xx EVR: 00101 1 1 1 0 1 0 0 1 External clock input 0 0 0 0 0 0 0 0 RAM address set * * * * * * * * * * * * * * * * Address Address 00h to 01h 02h to 03h * * * * * * * * Address 30h to 31h … 13 D6 … 1 D7 Display Data ↓ 14 STOP ↓ 15 START ↓ 16 Slave Address ↓ 17 MODESET ↓ 18 STOP (*:Don’t’ care) www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 STOP condition START condition 0 1 1 1 1 1 0 0 Issue Slave Address 1 1 0 0 1 0 * * Display on STOP condition 17/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Start Sequence– continued Start Sequence Example2 Initialize Initialize Sequence DISPON DISPON Sequence RAM Write RAM Write Sequence DISPOFF DISPOFF Sequence BU91799KV-M is initialized with Start Sequence, starts to display with “DISPON Sequence”, updates Display Data with “RAM Write Sequence” and stops the display with “DISPOFF Sequence”. Execute “DISPON Sequence” in order to restart display. Initialize Sequence Input DATA Description D7 D6 D5 D4 D3 D2 D1 D0 Power on Wait 100µs STOP START Slave Address ICSET MODESET ADSET Display Data … 0 1 1 1 1 1 0 0 1 1 1 0 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * * * * * * * * Execute Software Reset Display off RAM address set Display Data STOP DISPON Sequence Input DATA Description D7 D6 D5 D4 D3 D2 D1 D0 START Slave Address ICSET DISCTL BLKCTL APCTL EVRSET1 EVRSET2 MODESET STOP 0 1 1 1 1 1 0 0 1 1 1 0 1 0 0 1 1 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 0 0 1 1 1 0 0 0 0 0 1 1 1 1 1 0 0 0 1 1 0 0 1 0 0 0 Execute internal OSC mode Set Display Control Set BLKCTL Set APCTL Set EVR1 Set EVR2 Display on RAM Write Sequence DATA Input Description D7 D6 D5 D4 D3 D2 D1 D0 START Slave Address ICSET DISCTL BLKCTL APCTL EVRSET1 EVRSET2 MODESET ADSET Display Data … STOP 0 1 1 1 1 1 0 0 1 1 1 0 1 0 0 1 1 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 0 0 1 1 1 0 0 0 0 0 1 1 1 1 1 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 * * * * * * * * Execute internal OSC mode Set Display Control Set BLKCTL Set APCTL Set EVR1 Set EVR2 Display on RAM address set Display Data DISPOFF Sequence Input DATA Description D7 D6 D5 D4 D3 D2 D1 D0 START Slave Address ICSET MODESET STOP 0 1 1 1 1 1 0 0 1 1 1 0 1 0 0 1 Execute internal OSC mode 1 1 0 0 0 0 0 0 Display off Abnormal operation may occur in BU91799KV-M due to the effect of noise or other external factor. To avoid this phenomenon, it is highly recommended to input command according to sequence described above during initialization, display on/off and refresh of RAM data www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 18/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Cautions in Power on/off To prevent incorrect display, malfunction and abnormal current, follow Power on/off sequence shown in waveform below. VDD must be turned on before VLCD during power up sequence. VDD must be turned off after VLCD during power down sequence. Set t1>0ns and t2>0ns. To refrain from data transmission is strongly recommended while power supply is rising up or falling down to prevent from the occurrence of disturbances on transmission and reception. t1 VLCD VDD t2 10% 10% VDD (Min) VDD (Min) Figure 19. Power Supply Sequence www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 19/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Caution in POR Circuit Use BU91799KV-M has “POR” (Power-on Reset) circuit and Software Reset function. Keep the following recommended Power-on conditions in order to power up properly. Set power up conditions to meet the recommended tR, tF, tOFF, and VBOT specification below in order to ensure POR operation. Set pin TEST1=”L” to enable POR circuit. VDD tF tR tOFF VBOT Recommended condition of tR, tF, tOFF, VBOT (Ta=+25°C) tR(Note) tF(Note) tOFF(Note) VBOT(Note) 1ms 1ms Less than Min 20ms to 500ms to 500ms 0.1V (Note) This function is guaranteed by design, not tested in production process. Figure 20. Power on/off Waveform When it is difficult to keep above conditions, it is possibility to cause meaningless display due to no IC initialization. Please execute the IC initialization as quickly as possible after Power-on to reduce such an affect. See the IC initialization flow as below. Setting TEST1="H" disables the POR circuit, in such case, execute the following sequence. Note however that it cannot accept command while supply is unstable or below the minimum supply range. Note also that Software Reset is not a complete alternative to POR function. 1.Generate STOP Condition VDD SDA SCL STOP condition Figure 21. STOP Condition 2.Generate START Condition VDD SDA SCL START condition Figure 22. START Condition 3.Issue Slave Address 4.Execute Software Reset (ICSET) Command www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 20/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Display off Operation in External Clock Mode After receiving MODESET(Display off), BU91799KV-M enter to DISPOFF sequence synchronized with frame then Segment and Common ports output VSS level after 1frame of off data write. Therefore, in external clock mode, it is necessary to input the external clock based on each frame frequency setting after sending MODESET (Display off). For the required number of clock, refer to Power save mode FR of DISCTL. Please input the external clock as below. DISCTL 80HZ setting (Frame frequency [Hz] = external clock [Hz] / 512), it needs over 1024clk DISCTL 71HZ setting (Frame frequency [Hz] = external clock [Hz] / 576), it needs over 1152clk DISCTL 64HZ setting (Frame frequency [Hz] = external clock [Hz] / 648), it needs over 1296clk DISCTL 53HZ setting (Frame frequency [Hz] = external clock [Hz] / 768), it needs over 1536clk Please refer to the timing chart below. Command MODESET OSCIN To input External clock at least 2 f rames or more SEG VSS COM0 VSS COM1 VSS COM2 VSS COM3 VSS Display on Display of f Last Display f rame of MODESET receiv ing 1 f rame of OFF data write Figure 23. External Clock Stop Timing www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 21/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Note on the Multiple Devices be Connected to 2 Wire Interface Do not access the other device without power supply (VDD) to the BU91799KV-M. BU91799KV-M Controller Device1 Figure 24. Example of BUS connection To control the slope of the falling edge, a capacitor is connected between gate and drain of a NMOS transistor (Refer to Figure 25). The gate is in a high-impedance state when the power supply (VDD) is not supplied. In this condition, the gate voltage is pulled up by the current flow through the capacitance as a result of the SDA signal's transition from LOW to HIGH. The NMOS transistor turns on and draws some current (Ids) from the SDA port if the gate voltage (Vg) is higher than the threshold voltage (Vth). An external resistor (R) is connected between the power line and SDA line to keep the SDA line as logic HIGH. But the line cannot be kept as logic HGH if the voltage drop (R*Ids) is large. Apply power supply (VDD) to BU91799KV-M when the multiple devices are on the same bus. Z=1/jωC VDD SDA Vg Internal circuit Figure 25. SDA output cell structure www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 22/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply pins. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Thermal Consideration Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the Pd rating. 6. Recommended Operating Conditions These conditions represent a range within which the expected characteristics of the IC can be approximately obtained. The electrical characteristics are guaranteed under the conditions of each parameter. 7. Inrush Current When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. Operation Under Strong Electromagnetic Field Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction. 9. Testing on Application Boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 10. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 23/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Operational Notes – continued 11. Unused Input Pins Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply or ground line. 12. Regarding the Input Pin of the IC In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages within the values specified in the electrical characteristics of this IC. www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 24/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Ordering Information B U 9 1 7 Part Number 9 9 K V - ME 2 Product Rank M: for Automotive Packaging and forming specification E2: Embossed tape and reel Package KV : VQFP64 Marking Diagram VQFP64 (TOP VIEW) Part Number Marking BU91799KV LOT Number Pin 1 Mark www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 25/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Physical Dimension and Packing Information Package Name VQFP64 1PIN MARK (UNIT: mm) PKG: VQFP64 Drawing: EX252-5001-1 www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 26/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 BU91799KV-M MAX 200 segments (SEG50×COM4) Revision History Date Revision 08.Feb.2016 001 28.Jun.2017 002 Changes First release Prohibit 1/2 bias setting P.7 Modify Figure 9,Interface Protocol P.9 Modify BLKCTL of Description List of Command / Function P.11 Modify Set Power save mode FR table.(50Hz -> 53Hz) P.22 Add Note on EVR set P.19 Add “Caution in Power ON / OFF” Sequence P.20 Modify the comment in Caution in P.O.R Circuit Use P.21 Add Display off operation in external clock mode P.22 Add Note on the multiple devices be connected to 2 wire interface P.23 Modify Operational Notes 5. Thermal Consideration P.24 Delete Operational Notes 13. Data transmission P.25 Modify Marking Diagram, 1 Pin Mark -> Pin 1 Mark P.26 Change Packing Information figure. Correction of errors www.rohm.com © 2015 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 27/27 TSZ02201-0P4P0D301050-1-2 12.Jun.2017 Rev.002 Notice Precaution on using ROHM Products 1. (Note 1) If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment , aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PAA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice-PAA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice – WE © 2015 ROHM Co., Ltd. All rights reserved. Rev.001
BU91799KV-ME2 价格&库存

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BU91799KV-ME2
  •  国内价格 香港价格
  • 1000+13.222081000+1.65378
  • 2000+12.889302000+1.61216
  • 3000+12.722693000+1.59132
  • 5000+12.538035000+1.56822
  • 7000+12.430177000+1.55473

库存:4604

BU91799KV-ME2
    •  国内价格 香港价格
    • 1+5.518681+0.69026
    • 10+5.3642010+0.67094
    • 50+5.2697950+0.65913
    • 100+5.16679100+0.64625
    • 500+5.14105500+0.64303
    • 1000+5.132461000+0.64196
    • 2000+5.123882000+0.64088

    库存:45

    BU91799KV-ME2
    •  国内价格 香港价格
    • 1+24.446171+3.05766
    • 10+18.1959810+2.27590
    • 25+16.6395525+2.08123
    • 100+14.93267100+1.86774
    • 250+14.11759250+1.76579
    • 500+13.62626500+1.70434

    库存:4604

    BU91799KV-ME2
    •  国内价格
    • 1+13.74480
    • 10+11.45400
    • 30+9.16320
    • 100+7.63600

    库存:0