BU95101BL

Drivers for Large LCD Panels 6bit RSDSTM Source Driver BU95101 No.10043EAT01 ●Description ROHMLCD drivers for large panels are display drivers optimized for large LCDs in a variety of applications, including desktop PCs, laptops, and TVs. The broad lineup is offered in low amplitude differential transmission interface type TM (RSDS ) featuring low EMI, 6bit gradation precision, and different output configurations (384 and up) for wide compatibility. ●Features 1) 384 output channels TM 2) 6bit 9pair RSDS inputs 3) Dot & n-line inversion available 4) Built-in 2ch repair amplifiers 5) γcorrection is possible 6) Built-in input data reversing function(INV) 7) Output voltage range : AVSS+0.1V ~ AVDD-0.1V 8) High speed data transfer : fCLK(MAX)=85MHz 9) Logic power supply voltage (DVDD) : 2.7 ~ 3.6V 10) Driver power supply voltage (AVDD) : 8.0 ~ 13.5V 11) Package : COF35 ●Applications TFT LCD Panels ●Line up matrix BU95101 Number of outputs 384 BU95303 384 / 414 / 420 / 432 BU95306 600 / 618 / 630 / 642 BU95408 684 / 690 / 702 / 720 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/14 2010.10 - Rev.A BU95101 ●Absolute maximum ratings Parameter Logic power supply voltage Driver power supply voltage Logic input voltage Logic output voltage Driver input voltage Driver output voltage Storage temperature range Symbol DVDD AVDD VI1 VO1 VI2 VO2 Tstg Ratings -0.3 ~ +4.5 -0.3 ~ +14.0 -0.3 ~ DVDD+0.3 -0.3 ~ DVDD+0.3 -0.3 ~ AVDD+0.3 -0.3 ~ AVDD+0.3 -55 ~ +125 Unit V V V V V V ℃ Technical Note ●Recommended operating range Parameter Logic power supply voltage Driver power supply voltage γ-correction reference voltage Driver output voltage Output load capacitance Maximum clock frequency Operating temperature range * AVSS=DVSS=0V Symbol DVDD AVDD V1 ~ V10 VO CL fCLK(MAX) Topr Ratings +2.7 ~ +3.6 +8.0 ~ +13.5 0.1 ~ AVDD-0.1 0.1 ~ AVDD-0.1 150 85 -20 ~ +75 Unit V V V V pF MHz ℃ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/14 2010.10 - Rev.A BU95101 ●Electrical characteristics (DC) Technical Note (Unless otherwise noted, Ta=-20 ~ +75℃, DVDD=2.7 ~ 3.6V, AVDD=8.0 ~ 13.5V, DVSS=AVSS=0V) Limits Parameter Symbol Unit Conditions Min. Typ. Max. Logic Part Logic supply current Input “H” voltage Input “L” voltage Input “H” current Input “L” current Output “H” voltage Output “L” voltage Driver part Driver supply current γ correction resistance Output voltage deviation Output swing voltage Deviation Output voltage deviation 2 (between chips) Repair input voltage Repair input “H” current Repair input “L” current Driver output “H” current Driver output“L” current RSDS Input part RSDSTM input “H” voltage RSDSTM input “L” voltage RSDSTM common input voltage *1 *2 *3 *4 *5 TM IDDL V1H V1L I1H1 I1L1 VOH VOL 0.7DVDD 0 -1 DVDD-0.5 - 8 - 12 DVDD 0.3DVDD +1 0.5 mA V V μA μA V V fclk=85MHz,Data=15h-2Ah R/L,SFTR,INV,SFTL, POL,STB VIN=DVDD VIN=DVSS IOH=-1.0mA SFTR,SFTL IOL=1.0mA Dxx, SFTR, POL, INV, SFTL,CLK,STB,R/L IDDA RγUP RγLOW VOD1*1 VRMS VOD2 *2 11.2 11.2 0.1 -1 -1 0.4 0.8 5 16.0 16.0 ±20 ±10 ±10 ±3 -0.8 -2.0 0.8 2.0 10 20.8 20.8 ±30 ±20 ±20 ±10 ±7.5 AVDD-0.1 +1 +1 -0.4 -0.8 - mA kΩ kΩ mV mV mV mV mV V μA μA mA mA mA mA noLoad, fclk=85MHz,Data=15h-2Ah V1 ~ V5 V6 ~ V10 Yout=0.1V ~ 1.2V,Yout=10.8V ~ 11.9V Yout=1.2V ~ 10.8V Yout=0.1V ~ 1.2V,Yout=10.8V ~ 11.9V Yout=1.2V ~ 10.8V *3 V1NB I1BH I1BL IVOHY IVOHR IVOLY IVOLR VIN=AVDD=13.5V VIN=AVSS IREP1,2 Y1 ~ Y384, Vx=8 V, Yout=11V OREP1,2, OREP1,2, Vx=8 V, Yout=11V Vx=4 V, Yout=1V Y1 ~ Y384, Vx=4 V, Yout=1V VIHRSDS VILRSDS VCMRSDS 100 0.5 200 -200 - -100 1.4 mV VCMRSDS=+1.2V*4 mV V VDIFF=200mV*5 CLKP/N,DXXP/N (X=0,1,2) VOD1=measured output voltage - averaged output voltage of all outputs VRMS=measured output swing voltage - averaged output swing voltage of all outputs VOD2=averaged output voltage - target value VCM RSDS = (VCLKP+VCLKN)/2 or (VDXXP+VDXXN)/2 VDIFF = VCLKP- VCLKN or VDXXP-VDXXN www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/14 2010.10 - Rev.A BU95101 ●Electrical characteristics (AC) (Unless otherwise noted, Ta=-20 ~ +75℃, DVDD=2.7 ~ 3.6V, AVDD=8.0 ~ 13.5V, DVSS=AVSS=0V) Limits Parameter Symbol Unit Min. Typ. Max. Clock pulse width Clock pulse "H" period Clock pulse "L" period Data setup time Data hold time Start pulse setup time Start pulse hold time Start pulse width Carry output delay time STB pulse width Final data timing Time between STB↑and start pulse↑ Time between STB↑and CLK↓ POL/STB setup time Output delay time *1 *2 *3 Technical Note Conditions tw th tl tsu1 thd1 tsu2 thd2 tWSFT tdc tWSTB tLDT tSTB-SFT tSTB-CLK tsp tdout 1/85MHz 4 4 2 0 2 2 1 1 0 5 4 14 - - 2 10 6 10 ns ns ns ns ns ns ns CLK period ns CLK period CLK period CLK period ns ns μs μs *1*3 *2*3 CL=15pF The value is specified when the drive voltage value reaches the target output voltage level of 90%. he value is specified when the drive voltage value reaches the target output voltage level of 6-bit accuracy. Output load condition: R1=R2=R3=1kΩ, C1=C2=C3=50pF Output R1 (Test Probe) R2 R3 C1 Vcom=AVSS C2 C3 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/14 2010.10 - Rev.A BU95101 ●Block diagram Technical Note Y1 Y2 Y3 ・・・・・・・・・・・・・・・・・ AVDD AVSS Output Buffer ・・・・・・・・・・・・・・・・・ Y382 Y383 Y384 OREP1 IREP1 10 OREP2 IREP2 V1～V10 POL D/A Converter 6 66 ・・・・・・・・・・・・・・・・・ 666 Level Shifter 6 66 ・・・・・・・・・・・・・・・・・ 6 66 STB 6 66 Data Latch ・・・・・・・・・・・・・・・・・ 666 D00P/N～D02P/N D10P/N～D12P/N D20P/N～D22P/N Data Register RSDS Rx Latch INV 240 bit Bi-directional Shift Register CLKP/N SFTR R/L DVDD DVSS SFTL Fig.1 Block diagram www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/14 2010.10 - Rev.A BU95101 ●Pin configuration IREP2 OREP2 SFTL D22P D22N D21P D21N D20P D20N D12P D12N D11P D11N D10P D10N DVDD R/L V10 V9 V8 V7 V6 AVDD AVSS V5 V4 V3 V2 V1 DVSS CLKP CLKN STB POL INV D02P D02N D01P D01N D00P D00N SFTR OREP1 IREP1 BUMP Y384 Y383 Y382 ・ ・ ・ Technical Note ・ ・ ・ ・ BU95101 Top View ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Y3 Y2 Y1 ↓ BUMP IC Fig.2 Pin configuration (Top View) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/14 2010.10 - Rev.A BU95101 ●Pin descriptions Pin Name D00P/N ~ D02P/N D10P/N ~ D12P/N D20P/N ~ D22P/N CLKP/N Technical Note In/Out In Active Differential Descriptions RSDS input terminals of display data The 3-bit differential input pairs generate the internal 6-bit data through the comparison between DXXP and DXXN. The RSDS clock input pair generate the internal shift clock through the comparison between CLKP and CLKN. Driver outputs for D/A converted 64 gray scale analog voltage. The shift direction of internal shift register is controlled by this pin as shown below. R/L=H : Right shift SFTR→Y1→Y384→SFTL R/L=L : Left shift SFTL→Y384→Y1→SFTR SFTR=H：Right shift start pulse input terminal in cascade connection. SFTR=L：Carry output terminal in cascade connection. SFTL=H：Carry output terminal in cascade connection. SFTL=L：Left shift start pulse input terminal in cascade connection. The data in the data register are transferred to the data latch at the rising edge of STB, then the gray scale voltages are output from the buffer at the falling edge of STB. In Differential Y1 ~ Y384 Out - R/L In - SFTR In/Out H SFTL In/Out H STB In INV In H Terminal to specify inverting or non-inverting of display data INV:H : Input data are inverted in the IC. INV:L : Input data are not inverted. Input for the γ-correction reference voltage The following external reference voltages are input. At the rising edge of STB, the state of POL are transferred to the driver. POL=H : The reference voltage for odd number outputs are V1 to V5 and those for even number outputs are V6 to V10. POL=L : The reference voltage for odd number outputs are V6 to V10 and those for even number outputs are V1 to V5 Repair amplifier input V1 ~ V10 In - POL In - IREP1,2 In - OREP1,2 Out - Repair amplifier output AVDD In - Power supply for driver block AVSS In - Ground for AVDD DVDD In - Power supply for digital block DVSS In - Ground for DVDD www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/14 2010.10 - Rev.A BU95101 ●Relationship between Input Data and Output Terminals R/L=H (Right Shift) First Data Output R/L=L (Left Shift) First Data Output D00P ~ D02N Y382 D10P ~ D12N Y383 D20P ~ D22N Y384 → … … D00P ~ D02N Y1 Last D10P ~ D12N Y2 D00P ~ D02N Y1 D10P ~ D12N Y2 D20P ~ D22N Y3 → … … D00P ~ D02N Y382 Last D10P ~ D12N Y383 Technical Note D20P ~ D22N Y384 D20P ~ D22N Y3 ●Relationship between R/L , SFTR , SFTL and Output Direction R/L pin controls the shift direction of the internal shift resistor as shown below. Terminal Right Shift Mode Left Shift Mode R/L SFTR SFTL Output direction “H” Input Output Y1,Y2,Y3→Y382,Y383,Y384 “L” Output Input Y384,Y383,Y382→Y3,Y2,Y1 ●Relationship between POL and Output Polarity POL Y1 Y2 Y3 Y4 Y5 Y6 ・ ・ Y379 Y380 Y381 Y382 Y383 Y384 *1 “H” +*1 + + ・ ・ + + + - “L” -*1 + + + ・ ・ + + + +: The reference voltage are V1 ~ V5 -: The reference voltage are V6 ~ V10 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/14 2010.10 - Rev.A BU95101 ●Relationship between Input Data and Output Voltage The LCD driver output voltages are determined by the input data and 10γ-corrected power supply. 0.1V≦V10≦V9≦V8≦V7≦V6≦0.5AVDD 0.5 AVDD≦V5≦V4≦V3≦V2≦V1≦AVDD -0.1V Vout AVDD V1 Technical Note V2 V3 V4 V5 VCOM V6 V7 V8 V9 V10 AVSS 00H 08H 10H 18H 20H 28H 30H 38H 3FH Input Data Fig.3 Input data - γ correction curve www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/14 2010.10 - Rev.A BU95101 ●γ correction Power Supply Circuit 10 external γ-corrected power supply is connected to ladder resistors inside IC. IC Internal Circuit V1 Technical Note RS0 V2 RS1 V3 RS2 V4 RS3 V5 External γ-corrected power supply V6 RS4 V7 RS5 V8 RS6 V9 RS7 V10 Fig.4 γ correction power supply circuit www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/14 2010.10 - Rev.A BU95101 ●RSDSTM data timing Technical Note thd2 tsu2 thd1 tsu1 thd1 tsu1 CLKP/N SFTR D00P/N Y1 (0) Y1 (1) Y4 (0) Y4 (1) Y7 (0) Y7 (1) D01P/N Y1 (2) Y1 (3) Y4 (2) Y4 (3) Y7 (2) Y7 (3) D02P/N Y1 (4) Y1 (5) Y4 (4) Y4 (5) Y7 (4) Y7 (5) D10P/N Y2 (0) Y2 (1) Y5 (0) Y5 (1) Y8 (0) Y8 (1) D11P/N Y2 (2) Y2 (3) Y5 (2) Y5 (3) Y8 (2) Y8 (3) D12P/N Y2 (4) Y2 (5) Y5 (4) Y5 (5) Y8 (4) Y8 (5) D20P/N Y3 (0) Y3 (1) Y6 (0) Y6 (1) Y9 (0) Y9 (1) D21P/N Y3 (2) Y3 (3) Y6 (2) Y6 (3) Y9 (2) Y9 (3) D22P/N Y3 (4) Y3 (5) Y6 (4) Y6 (5) Y9 (4) Y9 (5) Fig.5 RSDS data timing www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/14 2010.10 - Rev.A BU95101 ●Timing chart www.rohm.com 3 tsu1 thd1 tSTB-CLK tSTB-CLK ODD EVEN ODD EVEN ODD Last Data tw 128 129 1 2 th tl 3 CLKP 1 2 © 2010 ROHM Co., Ltd. All rights reserved. EVEN -CLKN VDIFE INVALID DXXP -DXXN VCM tsu1 thd1 INVALID 0V(DVSS) tsu2 thd2 tSTB-SFT Fig.6 Timing chart 12/14 tdc tdc tLDT tsp Hi-Z SFTR input (SFTL input) tWSFT SFTL output tWSTB (SFTR output) STB POL Yout Technical Note 2010.10 - Rev.A BU95101 ●Power Supply Sequence Maintain the following power supply order to prevent the device from being destroyed. Turn on power order : DVDD → Input signal → AVDD, V1 ~ V10 Turn off power order : AVDD, V1 ~ V10 → Input signal → DVDD Technical Note AVDD Voltage V1～V10 DVDD Input signal DVSS, AVSS t ●Notes for use 1) When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may flow instantaneously. Therefore, give special consideration to power coupling capacitance, power wiring, width of GNDwiring, and routing of connections. 2) For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of wiring. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/14 2010.10 - Rev.A BU95101 ●Ordering part number Technical Note B Part No. U 9 Part No. 5 1 0 1 - S R Reel packing specification SR: A pattern side is an inner arrow. The output side is the right side. SL: A pattern side is an inner arrow. The output side is the left side. BR: A pattern side is an outside arrow. The output side is the right side. BL: A pattern side is an outside arrow. The output side is the left side. COF35 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/14 2010.10 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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